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Made device->tag and devconfig->tag into private member variables (m_tag).

Browse Source 
Added inline tag() function to return a const char * version. Updated
callers to use this instead of directly accessing tag.cstr() which
was awkward.
This commit is contained in:
Aaron Giles 2010-03-08 17:06:27 +00:00
parent 5826c45ea4
commit ec586731b9
114 changed files with 886 additions and 884 deletions
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2
src/emu/clifront.c
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@ -676,7 +676,7 @@ int cli_info_listdevices(core_options *options, const char *gamename)
case DEVICE_CLASS_TIMER: printf(" Timer: "); break; case DEVICE_CLASS_TIMER: printf(" Timer: "); break;
default: printf(" Other: "); break; default: printf(" Other: "); break;
} }
printf("%s ('%s')", devconfig->name(), devconfig->tag.cstr()); printf("%s ('%s')", devconfig->name(), devconfig->tag());
if (devconfig->clock >= 1000000000) if (devconfig->clock >= 1000000000)
printf(" @ %d.%02d GHz\n", devconfig->clock / 1000000000, (devconfig->clock / 10000000) % 100); printf(" @ %d.%02d GHz\n", devconfig->clock / 1000000000, (devconfig->clock / 10000000) % 100);
else if (devconfig->clock >= 1000000) else if (devconfig->clock >= 1000000)

2
src/emu/cpu/cdp1802/cdp1802.c
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@ -923,7 +923,7 @@ static CPU_EXECUTE( cdp1802 )
{ {
case CDP1802_MODE_LOAD: case CDP1802_MODE_LOAD:
// RUN mode cannot be initiated from LOAD mode // RUN mode cannot be initiated from LOAD mode
logerror("CDP1802 '%s' Tried to initiate RUN mode from LOAD mode\n", device->tag.cstr()); logerror("CDP1802 '%s' Tried to initiate RUN mode from LOAD mode\n", device->tag());
cpustate->mode = CDP1802_MODE_LOAD; cpustate->mode = CDP1802_MODE_LOAD;
break; break;

4
src/emu/cpu/h83002/h8periph.c
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@ -749,7 +749,7 @@ UINT8 h8_3007_register1_read8(h83xx_state *h8, UINT32 address)
case 0xfee018: return h8->per_regs[0xF8]; // IPRA case 0xfee018: return h8->per_regs[0xF8]; // IPRA
} }
logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte read from %08X\n",h8->device->tag.cstr(),h8->pc,address); logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte read from %08X\n",h8->device->tag(),h8->pc,address);
return 0; return 0;
} }
@ -761,7 +761,7 @@ void h8_3007_register1_write8(h83xx_state *h8, UINT32 address, UINT8 val)
case 0xfee016: h8_ISR_w(h8, val); return; // ISR case 0xfee016: h8_ISR_w(h8, val); return; // ISR
case 0xfee018: h8->per_regs[0xF8] = val; return; // IPRA case 0xfee018: h8->per_regs[0xF8] = val; return; // IPRA
} }
logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte write to %08X = %02X\n",h8->device->tag.cstr(),h8->pc,address,val); logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte write to %08X = %02X\n",h8->device->tag(),h8->pc,address,val);
} }
void h8_3007_itu_init(h83xx_state *h8) void h8_3007_itu_init(h83xx_state *h8)

4
src/emu/cpu/hd6309/hd6309.c
View File

@ -584,7 +584,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
{ {
if (m68_state->nmi_state == state) return; if (m68_state->nmi_state == state) return;
m68_state->nmi_state = state; m68_state->nmi_state = state;
LOG(("HD6309 '%s' set_irq_line (NMI) %d (PC=%4.4X)\n", m68_state->device->tag.cstr(), state, pPC.d)); LOG(("HD6309 '%s' set_irq_line (NMI) %d (PC=%4.4X)\n", m68_state->device->tag(), state, pPC.d));
if( state == CLEAR_LINE ) return; if( state == CLEAR_LINE ) return;
/* if the stack was not yet initialized */ /* if the stack was not yet initialized */
@ -622,7 +622,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
} }
else if (irqline < 2) else if (irqline < 2)
{ {
LOG(("HD6309 '%s' set_irq_line %d, %d (PC=%4.4X)\n", m68_state->device->tag.cstr(), irqline, state, pPC.d)); LOG(("HD6309 '%s' set_irq_line %d, %d (PC=%4.4X)\n", m68_state->device->tag(), irqline, state, pPC.d));
m68_state->irq_state[irqline] = state; m68_state->irq_state[irqline] = state;
if (state == CLEAR_LINE) return; if (state == CLEAR_LINE) return;
check_irq_lines(m68_state); check_irq_lines(m68_state);

6
src/emu/cpu/i860/i860dec.c
View File

@ -4465,13 +4465,13 @@ static CPU_EXECUTE( i860 )
if (cpustate->pc == 0xfffc0370 || if (cpustate->pc == 0xfffc0370 ||
cpustate->pc == 0xfffc03a4) cpustate->pc == 0xfffc03a4)
{ {
fprintf(stderr, "(%s) 0x%08x: snag 0x20000000\n", cpustate->device->tag.cstr(), cpustate->pc); fprintf(stderr, "(%s) 0x%08x: snag 0x20000000\n", cpustate->device->tag(), cpustate->pc);
cpustate->single_stepping = 0; cpustate->single_stepping = 0;
} }
else if (cpustate->pc == 0xfffc0384 || else if (cpustate->pc == 0xfffc0384 ||
cpustate->pc == 0xfffc03b8) cpustate->pc == 0xfffc03b8)
{ {
fprintf(stderr, "(%s) 0x%08x: passed 0x20000000\n", cpustate->device->tag.cstr(), cpustate->pc); fprintf(stderr, "(%s) 0x%08x: passed 0x20000000\n", cpustate->device->tag(), cpustate->pc);
cpustate->single_stepping = 0; cpustate->single_stepping = 0;
} }
#endif #endif
@ -4551,7 +4551,7 @@ static void disasm (i860s *cpustate, UINT32 addr, int len)
/* Note that we print the incoming (possibly virtual) address as the /* Note that we print the incoming (possibly virtual) address as the
PC rather than the translated address. */ PC rather than the translated address. */
fprintf (stderr, " (%s) 0x%08x: ", cpustate->device->tag.cstr(), addr); fprintf (stderr, " (%s) 0x%08x: ", cpustate->device->tag(), addr);
insn = memory_read_dword_64le(cpustate->program, phys_addr); insn = memory_read_dword_64le(cpustate->program, phys_addr);
#ifdef HOST_MSB #ifdef HOST_MSB
BYTE_REV32 (insn); BYTE_REV32 (insn);

10
src/emu/cpu/m6502/m4510.c
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@ -272,7 +272,7 @@ INLINE void m4510_take_irq(m4510_Regs *cpustate)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M4510 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M4510 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -302,7 +302,7 @@ static CPU_EXECUTE( m4510 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M4510 '%s' after_cli was >0", cpustate->device->tag.cstr())); LOG(("M4510 '%s' after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {
@ -331,7 +331,7 @@ static void m4510_set_irq_line(m4510_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(("M4510 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(("M4510 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = M4510_NMI_VEC; EAD = M4510_NMI_VEC;
cpustate->icount -= 7; cpustate->icount -= 7;
PUSH(PCH); PUSH(PCH);
@ -340,7 +340,7 @@ static void m4510_set_irq_line(m4510_Regs *cpustate, int irqline, int state)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M4510 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M4510 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -348,7 +348,7 @@ static void m4510_set_irq_line(m4510_Regs *cpustate, int irqline, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(("M4510 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(("M4510 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }

32
src/emu/cpu/m6502/m6502.c
View File

@ -216,7 +216,7 @@ INLINE void m6502_take_irq(m6502_Regs *cpustate)
P |= F_I; /* set I flag */ P |= F_I; /* set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -246,7 +246,7 @@ static CPU_EXECUTE( m6502 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag.cstr())); LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {
@ -284,7 +284,7 @@ static void m6502_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = M6502_NMI_VEC; EAD = M6502_NMI_VEC;
cpustate->icount -= 2; cpustate->icount -= 2;
PUSH(PCH); PUSH(PCH);
@ -293,7 +293,7 @@ static void m6502_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
P |= F_I; /* set I flag */ P |= F_I; /* set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -302,7 +302,7 @@ static void m6502_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
{ {
if( cpustate->so_state && !state ) if( cpustate->so_state && !state )
{ {
LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag()));
P|=F_V; P|=F_V;
} }
cpustate->so_state=state; cpustate->so_state=state;
@ -311,7 +311,7 @@ static void m6502_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
// cpustate->pending_irq = 2; // cpustate->pending_irq = 2;
cpustate->int_occured = cpustate->icount; cpustate->int_occured = cpustate->icount;
@ -437,7 +437,7 @@ INLINE void m65c02_take_irq(m6502_Regs *cpustate)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M65c02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M65c02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -468,7 +468,7 @@ static CPU_EXECUTE( m65c02 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag.cstr())); LOG(("M6502 '%s' after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {
@ -497,7 +497,7 @@ static void m65c02_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = M6502_NMI_VEC; EAD = M6502_NMI_VEC;
cpustate->icount -= 2; cpustate->icount -= 2;
PUSH(PCH); PUSH(PCH);
@ -506,7 +506,7 @@ static void m65c02_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -562,7 +562,7 @@ INLINE void deco16_take_irq(m6502_Regs *cpustate)
P |= F_I; /* set I flag */ P |= F_I; /* set I flag */
PCL = RDMEM(EAD+1); PCL = RDMEM(EAD+1);
PCH = RDMEM(EAD); PCH = RDMEM(EAD);
LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6502 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -577,7 +577,7 @@ static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = DECO16_NMI_VEC; EAD = DECO16_NMI_VEC;
cpustate->icount -= 7; cpustate->icount -= 7;
PUSH(PCH); PUSH(PCH);
@ -586,7 +586,7 @@ static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
P |= F_I; /* set I flag */ P |= F_I; /* set I flag */
PCL = RDMEM(EAD+1); PCL = RDMEM(EAD+1);
PCH = RDMEM(EAD); PCH = RDMEM(EAD);
LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6502 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -595,7 +595,7 @@ static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
{ {
if( cpustate->so_state && !state ) if( cpustate->so_state && !state )
{ {
LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set overflow\n", cpustate->device->tag()));
P|=F_V; P|=F_V;
} }
cpustate->so_state=state; cpustate->so_state=state;
@ -604,7 +604,7 @@ static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6502 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }
@ -634,7 +634,7 @@ static CPU_EXECUTE( deco16 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M6502 %s after_cli was >0", cpustate->device->tag.cstr())); LOG(("M6502 %s after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {

12
src/emu/cpu/m6502/m6509.c
View File

@ -200,7 +200,7 @@ INLINE void m6509_take_irq( m6509_Regs *cpustate)
P |= F_I; /* knock out D and set I flag */ P |= F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M6509 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6509 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -230,7 +230,7 @@ static CPU_EXECUTE( m6509 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M6509 '%s' after_cli was >0", cpustate->device->tag.cstr())); LOG(("M6509 '%s' after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {
@ -259,7 +259,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6509 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6509 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = M6509_NMI_VEC; EAD = M6509_NMI_VEC;
EAWH = PBWH; EAWH = PBWH;
cpustate->icount -= 2; cpustate->icount -= 2;
@ -269,7 +269,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
P |= F_I; /* knock out D and set I flag */ P |= F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M6509 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M6509 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -278,7 +278,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
{ {
if( cpustate->so_state && !state ) if( cpustate->so_state && !state )
{ {
LOG(( "M6509 '%s' set overflow\n", cpustate->device->tag.cstr())); LOG(( "M6509 '%s' set overflow\n", cpustate->device->tag()));
P|=F_V; P|=F_V;
} }
cpustate->so_state=state; cpustate->so_state=state;
@ -287,7 +287,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(( "M6509 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "M6509 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }

10
src/emu/cpu/m6502/m65ce02.c
View File

@ -159,7 +159,7 @@ INLINE void m65ce02_take_irq(m65ce02_Regs *cpustate)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M65ce02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M65ce02 '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), PCD));
/* call back the cpuintrf to let it clear the line */ /* call back the cpuintrf to let it clear the line */
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, 0);
} }
@ -189,7 +189,7 @@ static CPU_EXECUTE( m65ce02 )
/* check if the I flag was just reset (interrupts enabled) */ /* check if the I flag was just reset (interrupts enabled) */
if( cpustate->after_cli ) if( cpustate->after_cli )
{ {
LOG(("M65ce02 '%s' after_cli was >0", cpustate->device->tag.cstr())); LOG(("M65ce02 '%s' after_cli was >0", cpustate->device->tag()));
cpustate->after_cli = 0; cpustate->after_cli = 0;
if (cpustate->irq_state != CLEAR_LINE) if (cpustate->irq_state != CLEAR_LINE)
{ {
@ -218,7 +218,7 @@ static void m65ce02_set_irq_line(m65ce02_Regs *cpustate, int irqline, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(("M65ce02 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(("M65ce02 '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
EAD = M65CE02_NMI_VEC; EAD = M65CE02_NMI_VEC;
cpustate->icount -= 7; cpustate->icount -= 7;
PUSH(PCH); PUSH(PCH);
@ -227,7 +227,7 @@ static void m65ce02_set_irq_line(m65ce02_Regs *cpustate, int irqline, int state)
P = (P & ~F_D) | F_I; /* knock out D and set I flag */ P = (P & ~F_D) | F_I; /* knock out D and set I flag */
PCL = RDMEM(EAD); PCL = RDMEM(EAD);
PCH = RDMEM(EAD+1); PCH = RDMEM(EAD+1);
LOG(("M65ce02 '%s' takes NMI ($%04x)\n", cpustate->device->tag.cstr(), PCD)); LOG(("M65ce02 '%s' takes NMI ($%04x)\n", cpustate->device->tag(), PCD));
} }
} }
else else
@ -235,7 +235,7 @@ static void m65ce02_set_irq_line(m65ce02_Regs *cpustate, int irqline, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if( state != CLEAR_LINE ) if( state != CLEAR_LINE )
{ {
LOG(("M65ce02 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(("M65ce02 '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }

4
src/emu/cpu/m6502/ops02.h
View File

@ -623,7 +623,7 @@
if ( P & F_I ) { \ if ( P & F_I ) { \
PULL(P); \ PULL(P); \
if ((cpustate->irq_state != CLEAR_LINE) && !(P & F_I)) { \ if ((cpustate->irq_state != CLEAR_LINE) && !(P & F_I)) { \
LOG(("M6502 '%s' PLP sets after_cli\n",cpustate->device->tag.cstr())); \ LOG(("M6502 '%s' PLP sets after_cli\n",cpustate->device->tag())); \
cpustate->after_cli = 1; \ cpustate->after_cli = 1; \
} \ } \
} else { \ } else { \
@ -665,7 +665,7 @@
P |= F_T | F_B; \ P |= F_T | F_B; \
if( (cpustate->irq_state != CLEAR_LINE) && !(P & F_I) ) \ if( (cpustate->irq_state != CLEAR_LINE) && !(P & F_I) ) \
{ \ { \
LOG(("M6502 '%s' RTI sets after_cli\n",cpustate->device->tag.cstr())); \ LOG(("M6502 '%s' RTI sets after_cli\n",cpustate->device->tag())); \
cpustate->after_cli = 1; \ cpustate->after_cli = 1; \
} }

6
src/emu/cpu/m6502/opsce02.h
View File

@ -676,7 +676,7 @@
PULL(temp); \ PULL(temp); \
P=(P&F_E)|F_B|(temp&~F_E); \ P=(P&F_E)|F_B|(temp&~F_E); \
if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \
LOG(("M65ce02 '%s' PLP sets after_cli\n", cpustate->device->tag.cstr())); \ LOG(("M65ce02 '%s' PLP sets after_cli\n", cpustate->device->tag())); \
AFTER_CLI = 1; \ AFTER_CLI = 1; \
} \ } \
} else { \ } else { \
@ -756,7 +756,7 @@
PULL(PCH); \ PULL(PCH); \
if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) \
{ \ { \
LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag.cstr())); \ LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag())); \
AFTER_CLI = 1; \ AFTER_CLI = 1; \
} }
@ -787,7 +787,7 @@
PULL(PCL); \ PULL(PCL); \
PULL(PCH); \ PULL(PCH); \
if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \ if( IRQ_STATE != CLEAR_LINE && !(P & F_I) ) { \
LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag.cstr())); \ LOG(("M65ce02 '%s' RTI sets after_cli\n", cpustate->device->tag())); \
AFTER_CLI = 1; \ AFTER_CLI = 1; \
} }

20
src/emu/cpu/m6800/m6800.c
View File

@ -546,7 +546,7 @@ INLINE void WM16(m6800_state *cpustate, UINT32 Addr, PAIR *p )
/* IRQ enter */ /* IRQ enter */
static void enter_interrupt(m6800_state *cpustate, const char *message,UINT16 irq_vector) static void enter_interrupt(m6800_state *cpustate, const char *message,UINT16 irq_vector)
{ {
LOG((message, cpustate->device->tag.cstr())); LOG((message, cpustate->device->tag()));
if( cpustate->wai_state & (M6800_WAI|M6800_SLP) ) if( cpustate->wai_state & (M6800_WAI|M6800_SLP) )
{ {
if( cpustate->wai_state & M6800_WAI ) if( cpustate->wai_state & M6800_WAI )
@ -965,7 +965,7 @@ static void set_irq_line(m6800_state *cpustate, int irqline, int state)
{ {
//int eddge; //int eddge;
LOG(("M6800 '%s' set_irq_line %d,%d\n", cpustate->device->tag.cstr(), irqline, state)); LOG(("M6800 '%s' set_irq_line %d,%d\n", cpustate->device->tag(), irqline, state));
cpustate->irq_state[irqline] = state; cpustate->irq_state[irqline] = state;
if (irqline == M6800_TIN_LINE && state != cpustate->irq_state[irqline]) if (irqline == M6800_TIN_LINE && state != cpustate->irq_state[irqline])
@ -2411,7 +2411,7 @@ static READ8_HANDLER( m6803_internal_registers_r )
case 0x0e: case 0x0e:
return (cpustate->input_capture >> 8) & 0xff; return (cpustate->input_capture >> 8) & 0xff;
case 0x0f: case 0x0f:
logerror("CPU '%s' PC %04x: warning - read from unsupported register %02x\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),offset); logerror("CPU '%s' PC %04x: warning - read from unsupported register %02x\n",space->cpu->tag(),cpu_get_pc(space->cpu),offset);
return 0; return 0;
case 0x10: case 0x10:
return cpustate->rmcr; return cpustate->rmcr;
@ -2428,7 +2428,7 @@ static READ8_HANDLER( m6803_internal_registers_r )
case 0x13: case 0x13:
return cpustate->tdr; return cpustate->tdr;
case 0x14: case 0x14:
logerror("CPU '%s' PC %04x: read RAM control register\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu)); logerror("CPU '%s' PC %04x: read RAM control register\n",space->cpu->tag(),cpu_get_pc(space->cpu));
return cpustate->ram_ctrl; return cpustate->ram_ctrl;
case 0x15: case 0x15:
case 0x16: case 0x16:
@ -2442,7 +2442,7 @@ static READ8_HANDLER( m6803_internal_registers_r )
case 0x1e: case 0x1e:
case 0x1f: case 0x1f:
default: default:
logerror("CPU '%s' PC %04x: warning - read from reserved internal register %02x\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),offset); logerror("CPU '%s' PC %04x: warning - read from reserved internal register %02x\n",space->cpu->tag(),cpu_get_pc(space->cpu),offset);
return 0; return 0;
} }
} }
@ -2475,7 +2475,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
| (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))); | (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
if (cpustate->port2_ddr & 2) if (cpustate->port2_ddr & 2)
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu)); logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->cpu->tag(),cpu_get_pc(space->cpu));
} }
break; break;
case 0x02: case 0x02:
@ -2574,10 +2574,10 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
case 0x0d: case 0x0d:
case 0x0e: case 0x0e:
case 0x12: case 0x12:
logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),data,offset); logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->cpu->tag(),cpu_get_pc(space->cpu),data,offset);
break; break;
case 0x0f: case 0x0f:
logerror("CPU '%s' PC %04x: warning - write %02x to unsupported internal register %02x\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),data,offset); logerror("CPU '%s' PC %04x: warning - write %02x to unsupported internal register %02x\n",space->cpu->tag(),cpu_get_pc(space->cpu),data,offset);
break; break;
case 0x10: case 0x10:
cpustate->rmcr = data & 0x0f; cpustate->rmcr = data & 0x0f;
@ -2617,7 +2617,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
cpustate->tdr = data; cpustate->tdr = data;
break; break;
case 0x14: case 0x14:
logerror("CPU '%s' PC %04x: write %02x to RAM control register\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),data); logerror("CPU '%s' PC %04x: write %02x to RAM control register\n",space->cpu->tag(),cpu_get_pc(space->cpu),data);
cpustate->ram_ctrl = data; cpustate->ram_ctrl = data;
break; break;
case 0x15: case 0x15:
@ -2632,7 +2632,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
case 0x1e: case 0x1e:
case 0x1f: case 0x1f:
default: default:
logerror("CPU '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->cpu->tag.cstr(),cpu_get_pc(space->cpu),data,offset); logerror("CPU '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->cpu->tag(),cpu_get_pc(space->cpu),data,offset);
break; break;
} }
} }

14
src/emu/cpu/m68000/m68k_in.c
View File

@ -3288,7 +3288,7 @@ M68KMAKE_OP(callm, 32, ., .)
REG_PC += 2; REG_PC += 2;
(void)ea; /* just to avoid an 'unused variable' warning */ (void)ea; /* just to avoid an 'unused variable' warning */
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n", logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_illegal(m68k); m68ki_exception_illegal(m68k);
@ -4366,7 +4366,7 @@ M68KMAKE_OP(cpbcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{ {
logerror( "%s at %08x: called unimplemented instruction %04x (cpbcc)\n", logerror( "%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_1111(m68k); m68ki_exception_1111(m68k);
@ -4378,7 +4378,7 @@ M68KMAKE_OP(cpdbcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{ {
logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n", logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_1111(m68k); m68ki_exception_1111(m68k);
@ -4390,7 +4390,7 @@ M68KMAKE_OP(cpgen, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{ {
logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n", logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_1111(m68k); m68ki_exception_1111(m68k);
@ -4402,7 +4402,7 @@ M68KMAKE_OP(cpscc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{ {
logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n", logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_1111(m68k); m68ki_exception_1111(m68k);
@ -4414,7 +4414,7 @@ M68KMAKE_OP(cptrapcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type)) if(CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{ {
logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n", logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_1111(m68k); m68ki_exception_1111(m68k);
@ -8812,7 +8812,7 @@ M68KMAKE_OP(rtm, 32, ., .)
{ {
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n", logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n",
m68k->device->tag.cstr(), REG_PC - 2, m68k->ir); m68k->device->tag(), REG_PC - 2, m68k->ir);
return; return;
} }
m68ki_exception_illegal(m68k); m68ki_exception_illegal(m68k);

4
src/emu/cpu/m6809/m6809.c
View File

@ -438,7 +438,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
{ {
if (m68_state->nmi_state == state) return; if (m68_state->nmi_state == state) return;
m68_state->nmi_state = state; m68_state->nmi_state = state;
LOG(("M6809 '%s' set_irq_line (NMI) %d\n", m68_state->device->tag.cstr(), state)); LOG(("M6809 '%s' set_irq_line (NMI) %d\n", m68_state->device->tag(), state));
if( state == CLEAR_LINE ) return; if( state == CLEAR_LINE ) return;
/* if the stack was not yet initialized */ /* if the stack was not yet initialized */
@ -469,7 +469,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
} }
else if (irqline < 2) else if (irqline < 2)
{ {
LOG(("M6809 '%s' set_irq_line %d, %d\n", m68_state->device->tag.cstr(), irqline, state)); LOG(("M6809 '%s' set_irq_line %d, %d\n", m68_state->device->tag(), irqline, state));
m68_state->irq_state[irqline] = state; m68_state->irq_state[irqline] = state;
if (state == CLEAR_LINE) return; if (state == CLEAR_LINE) return;
check_irq_lines(m68_state); check_irq_lines(m68_state);

10
src/emu/cpu/mcs51/mcs51.c
View File

@ -2026,7 +2026,7 @@ static void mcs51_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat
case ADDR_SCON: case ADDR_SCON:
break; break;
default: default:
LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %x at 0x%04x, data=%x\n", mcs51_state->device->tag.cstr(), (UINT32)offset,PC,data)); LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %x at 0x%04x, data=%x\n", mcs51_state->device->tag(), (UINT32)offset,PC,data));
/* no write in this case according to manual */ /* no write in this case according to manual */
return; return;
} }
@ -2066,7 +2066,7 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100); return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100);
/* Illegal or non-implemented sfr */ /* Illegal or non-implemented sfr */
default: default:
LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", mcs51_state->device->tag.cstr(), (UINT32)offset,PC)); LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", mcs51_state->device->tag(), (UINT32)offset,PC));
/* according to the manual, the read may return random bits */ /* according to the manual, the read may return random bits */
return 0xff; return 0xff;
} }
@ -2318,8 +2318,8 @@ static CPU_INIT( i80c31 )
****************************************************************************/ ****************************************************************************/
#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag.cstr(), PC, d)) #define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag(), PC, d))
#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag.cstr(), PC)) #define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag(), PC))
INLINE UINT8 ds5002fp_protected(mcs51_state_t *mcs51_state, size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask) INLINE UINT8 ds5002fp_protected(mcs51_state_t *mcs51_state, size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask)
{ {
@ -2345,7 +2345,7 @@ static void ds5002fp_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8
if ((data == 0xaa) && (mcs51_state->ds5002fp.ta_window == 0)) if ((data == 0xaa) && (mcs51_state->ds5002fp.ta_window == 0))
{ {
mcs51_state->ds5002fp.ta_window = 6; /* 4*12 + 2*12 */ mcs51_state->ds5002fp.ta_window = 6; /* 4*12 + 2*12 */
LOG(("ds5002fp '%s': TA window initiated at 0x%04x\n", mcs51_state->device->tag.cstr(), PC)); LOG(("ds5002fp '%s': TA window initiated at 0x%04x\n", mcs51_state->device->tag(), PC));
} }
break; break;
case ADDR_MCON: data = ds5002fp_protected(mcs51_state, ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break; case ADDR_MCON: data = ds5002fp_protected(mcs51_state, ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break;

2
src/emu/cpu/mcs51/mcs51ops.c
View File

@ -976,5 +976,5 @@ OPHANDLER( xrl_a_r )
//illegal opcodes //illegal opcodes
OPHANDLER( illegal ) OPHANDLER( illegal )
{ {
LOG(("i8051 '%s': illegal opcode at 0x%03x: %02x\n", mcs51_state->device->tag.cstr(), PC-1, r)); LOG(("i8051 '%s': illegal opcode at 0x%03x: %02x\n", mcs51_state->device->tag(), PC-1, r));
} }

24
src/emu/cpu/saturn/satops.c
View File

@ -1,7 +1,7 @@
#define IRQ_ADDRESS 0xf #define IRQ_ADDRESS 0xf
#define saturn_assert(x) \ #define saturn_assert(x) \
do { if (!(x)) logerror("SATURN '%s' assertion failed: %s at %s:%i, pc=%05x\n", cpustate->device->tag.cstr(), #x, __FILE__, __LINE__, cpustate->pc); } while (0) do { if (!(x)) logerror("SATURN '%s' assertion failed: %s at %s:%i, pc=%05x\n", cpustate->device->tag(), #x, __FILE__, __LINE__, cpustate->pc); } while (0)
INLINE int READ_OP(saturn_state *cpustate) INLINE int READ_OP(saturn_state *cpustate)
{ {
@ -186,24 +186,24 @@ INLINE void saturn_push(saturn_state *cpustate, SaturnAdr adr)
INLINE void saturn_interrupt_on(saturn_state *cpustate) INLINE void saturn_interrupt_on(saturn_state *cpustate)
{ {
LOG(( "SATURN '%s' at %05x: INTON\n", cpustate->device->tag.cstr(), cpustate->pc-4 )); LOG(( "SATURN '%s' at %05x: INTON\n", cpustate->device->tag(), cpustate->pc-4 ));
cpustate->irq_enable=1; cpustate->irq_enable=1;
if (cpustate->irq_state) if (cpustate->irq_state)
{ {
LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq=1; cpustate->pending_irq=1;
} }
} }
INLINE void saturn_interrupt_off(saturn_state *cpustate) INLINE void saturn_interrupt_off(saturn_state *cpustate)
{ {
LOG(( "SATURN '%s' at %05x: INTOFF\n", cpustate->device->tag.cstr(), cpustate->pc-4 )); LOG(( "SATURN '%s' at %05x: INTOFF\n", cpustate->device->tag(), cpustate->pc-4 ));
cpustate->irq_enable=0; cpustate->irq_enable=0;
} }
INLINE void saturn_reset_interrupt(saturn_state *cpustate) INLINE void saturn_reset_interrupt(saturn_state *cpustate)
{ {
LOG(( "SATURN '%s' at %05x: RSI\n", cpustate->device->tag.cstr(), cpustate->pc-5 )); LOG(( "SATURN '%s' at %05x: RSI\n", cpustate->device->tag(), cpustate->pc-5 ));
if (cpustate->config&&cpustate->config->rsi) cpustate->config->rsi(cpustate->device); if (cpustate->config&&cpustate->config->rsi) cpustate->config->rsi(cpustate->device);
} }
@ -234,27 +234,27 @@ INLINE void saturn_shutdown(saturn_state *cpustate)
{ {
cpustate->sleeping=1; cpustate->sleeping=1;
cpustate->irq_enable=1; cpustate->irq_enable=1;
LOG(( "SATURN '%s' at %05x: SHUTDN\n", cpustate->device->tag.cstr(), cpustate->pc-3 )); LOG(( "SATURN '%s' at %05x: SHUTDN\n", cpustate->device->tag(), cpustate->pc-3 ));
} }
INLINE void saturn_bus_command_b(saturn_state *cpustate) INLINE void saturn_bus_command_b(saturn_state *cpustate)
{ {
logerror( "SATURN '%s' at %05x: BUSCB opcode not handled\n", cpustate->device->tag.cstr(), cpustate->pc-4 ); logerror( "SATURN '%s' at %05x: BUSCB opcode not handled\n", cpustate->device->tag(), cpustate->pc-4 );
} }
INLINE void saturn_bus_command_c(saturn_state *cpustate) INLINE void saturn_bus_command_c(saturn_state *cpustate)
{ {
logerror( "SATURN '%s' at %05x: BUSCC opcode not handled\n", cpustate->device->tag.cstr(), cpustate->pc-3 ); logerror( "SATURN '%s' at %05x: BUSCC opcode not handled\n", cpustate->device->tag(), cpustate->pc-3 );
} }
INLINE void saturn_bus_command_d(saturn_state *cpustate) INLINE void saturn_bus_command_d(saturn_state *cpustate)
{ {
logerror( "SATURN '%s' at %05x: BUSCD opcode not handled\n", cpustate->device->tag.cstr(), cpustate->pc-4 ); logerror( "SATURN '%s' at %05x: BUSCD opcode not handled\n", cpustate->device->tag(), cpustate->pc-4 );
} }
INLINE void saturn_serial_request(saturn_state *cpustate) INLINE void saturn_serial_request(saturn_state *cpustate)
{ {
logerror( "SATURN '%s' at %05x: SREQ? opcode not handled\n", cpustate->device->tag.cstr(), cpustate->pc-3 ); logerror( "SATURN '%s' at %05x: SREQ? opcode not handled\n", cpustate->device->tag(), cpustate->pc-3 );
} }
INLINE void saturn_out_c(saturn_state *cpustate) INLINE void saturn_out_c(saturn_state *cpustate)
@ -275,7 +275,7 @@ INLINE void saturn_in(saturn_state *cpustate, int reg)
saturn_assert(reg>=0 && reg<9); saturn_assert(reg>=0 && reg<9);
if (!(cpustate->pc&1)) if (!(cpustate->pc&1))
logerror( "SATURN '%s' at %05x: reg=IN opcode at odd addresse\n", logerror( "SATURN '%s' at %05x: reg=IN opcode at odd addresse\n",
cpustate->device->tag.cstr(), cpustate->pc-3 ); cpustate->device->tag(), cpustate->pc-3 );
if (cpustate->config&&cpustate->config->in) in = cpustate->config->in(cpustate->device); if (cpustate->config&&cpustate->config->in) in = cpustate->config->in(cpustate->device);
S64_WRITE_WORD(cpustate, reg,in); S64_WRITE_WORD(cpustate, reg,in);
cpustate->monitor_in = in; cpustate->monitor_in = in;
@ -459,7 +459,7 @@ INLINE void saturn_return_carry_clear(saturn_state *cpustate)
INLINE void saturn_return_interrupt(saturn_state *cpustate) INLINE void saturn_return_interrupt(saturn_state *cpustate)
{ {
LOG(( "SATURN '%s' at %05x: RTI\n", cpustate->device->tag.cstr(), cpustate->pc-2 )); LOG(( "SATURN '%s' at %05x: RTI\n", cpustate->device->tag(), cpustate->pc-2 ));
cpustate->in_irq=0; /* set to 1 when an IRQ is taken */ cpustate->in_irq=0; /* set to 1 when an IRQ is taken */
cpustate->pc=saturn_pop(cpustate); cpustate->pc=saturn_pop(cpustate);
// cpustate->icount-=10; // cpustate->icount-=10;

8
src/emu/cpu/saturn/sattable.c
View File

@ -38,25 +38,25 @@ static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C};
static void saturn_invalid3( saturn_state *cpustate, int op1, int op2, int op3 ) static void saturn_invalid3( saturn_state *cpustate, int op1, int op2, int op3 )
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x at %05x\n", logerror( "SATURN '%s' invalid opcode %x%x%x at %05x\n",
cpustate->device->tag.cstr(), op1, op2, op3, cpustate->pc-3 ); cpustate->device->tag(), op1, op2, op3, cpustate->pc-3 );
} }
static void saturn_invalid4( saturn_state *cpustate, int op1, int op2, int op3, int op4 ) static void saturn_invalid4( saturn_state *cpustate, int op1, int op2, int op3, int op4 )
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x at %05x\n", logerror( "SATURN '%s' invalid opcode %x%x%x%x at %05x\n",
cpustate->device->tag.cstr(), op1, op2, op3, op4, cpustate->pc-4 ); cpustate->device->tag(), op1, op2, op3, op4, cpustate->pc-4 );
} }
static void saturn_invalid5( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5 ) static void saturn_invalid5( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5 )
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x at %05x\n", logerror( "SATURN '%s' invalid opcode %x%x%x%x%x at %05x\n",
cpustate->device->tag.cstr(), op1, op2, op3, op4, op5, cpustate->pc-5 ); cpustate->device->tag(), op1, op2, op3, op4, op5, cpustate->pc-5 );
} }
static void saturn_invalid6( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5, int op6 ) static void saturn_invalid6( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5, int op6 )
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x%x at %05x\n", logerror( "SATURN '%s' invalid opcode %x%x%x%x%x%x at %05x\n",
cpustate->device->tag.cstr(), op1, op2, op3, op4, op5, op6, cpustate->pc-6 ); cpustate->device->tag(), op1, op2, op3, op4, op5, op6, cpustate->pc-6 );
} }

8
src/emu/cpu/saturn/saturn.c
View File

@ -162,7 +162,7 @@ INLINE void saturn_take_irq(saturn_state *cpustate)
saturn_push(cpustate, cpustate->pc); saturn_push(cpustate, cpustate->pc);
cpustate->pc=IRQ_ADDRESS; cpustate->pc=IRQ_ADDRESS;
LOG(("Saturn '%s' takes IRQ ($%04x)\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Saturn '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), cpustate->pc));
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_IRQ_LINE); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_IRQ_LINE);
} }
@ -206,7 +206,7 @@ static void saturn_set_nmi_line(saturn_state *cpustate, int state)
cpustate->nmi_state = state; cpustate->nmi_state = state;
if ( state != CLEAR_LINE ) if ( state != CLEAR_LINE )
{ {
LOG(( "SATURN '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "SATURN '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }
@ -217,7 +217,7 @@ static void saturn_set_irq_line(saturn_state *cpustate, int state)
cpustate->irq_state = state; cpustate->irq_state = state;
if ( state != CLEAR_LINE && cpustate->irq_enable ) if ( state != CLEAR_LINE && cpustate->irq_enable )
{ {
LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag()));
cpustate->pending_irq = 1; cpustate->pending_irq = 1;
} }
} }
@ -226,7 +226,7 @@ static void saturn_set_wakeup_line(saturn_state *cpustate, int state)
{ {
if (cpustate->sleeping && state==1) if (cpustate->sleeping && state==1)
{ {
LOG(( "SATURN '%s' set_wakeup_line(ASSERT)\n", cpustate->device->tag.cstr())); LOG(( "SATURN '%s' set_wakeup_line(ASSERT)\n", cpustate->device->tag()));
if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_WAKEUP_LINE); if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_WAKEUP_LINE);
cpustate->sleeping = 0; cpustate->sleeping = 0;
} }

30
src/emu/cpu/sh2/sh2comn.c
View File

@ -101,7 +101,7 @@ static void sh2_timer_activate(SH2 *sh2)
sh2->frc_base = cpu_get_total_cycles(sh2->device); sh2->frc_base = cpu_get_total_cycles(sh2->device);
timer_adjust_oneshot(sh2->timer, cpu_clocks_to_attotime(sh2->device, max_delta), 0); timer_adjust_oneshot(sh2->timer, cpu_clocks_to_attotime(sh2->device, max_delta), 0);
} else { } else {
logerror("SH2.%s: Timer event in %d cycles of external clock", sh2->device->tag.cstr(), max_delta); logerror("SH2.%s: Timer event in %d cycles of external clock", sh2->device->tag(), max_delta);
} }
} }
} }
@ -138,7 +138,7 @@ static TIMER_CALLBACK( sh2_dmac_callback )
int dma = param & 1; int dma = param & 1;
SH2 *sh2 = (SH2 *)ptr; SH2 *sh2 = (SH2 *)ptr;
LOG(("SH2.%s: DMA %d complete\n", sh2->device->tag.cstr(), dma)); LOG(("SH2.%s: DMA %d complete\n", sh2->device->tag(), dma));
sh2->m[0x63+4*dma] |= 2; sh2->m[0x63+4*dma] |= 2;
sh2->dma_timer_active[dma] = 0; sh2->dma_timer_active[dma] = 0;
sh2_recalc_irq(sh2); sh2_recalc_irq(sh2);
@ -306,7 +306,7 @@ WRITE32_HANDLER( sh2_internal_w )
case 0x04: // TIER, FTCSR, FRC case 0x04: // TIER, FTCSR, FRC
if((mem_mask & 0x00ffffff) != 0) if((mem_mask & 0x00ffffff) != 0)
sh2_timer_resync(sh2); sh2_timer_resync(sh2);
// printf("SH2.%s: TIER write %04x @ %04x\n", sh2->device->tag.cstr(), data >> 16, mem_mask>>16); // printf("SH2.%s: TIER write %04x @ %04x\n", sh2->device->tag(), data >> 16, mem_mask>>16);
sh2->m[4] = (sh2->m[4] & ~(ICF|OCFA|OCFB|OVF)) | (old & sh2->m[4] & (ICF|OCFA|OCFB|OVF)); sh2->m[4] = (sh2->m[4] & ~(ICF|OCFA|OCFB|OVF)) | (old & sh2->m[4] & (ICF|OCFA|OCFB|OVF));
COMBINE_DATA(&sh2->frc); COMBINE_DATA(&sh2->frc);
if((mem_mask & 0x00ffffff) != 0) if((mem_mask & 0x00ffffff) != 0)
@ -314,7 +314,7 @@ WRITE32_HANDLER( sh2_internal_w )
sh2_recalc_irq(sh2); sh2_recalc_irq(sh2);
break; break;
case 0x05: // OCRx, TCR, TOCR case 0x05: // OCRx, TCR, TOCR
// printf("SH2.%s: TCR write %08x @ %08x\n", sh2->device->tag.cstr(), data, mem_mask); // printf("SH2.%s: TCR write %08x @ %08x\n", sh2->device->tag(), data, mem_mask);
sh2_timer_resync(sh2); sh2_timer_resync(sh2);
if(sh2->m[5] & 0x10) if(sh2->m[5] & 0x10)
sh2->ocrb = (sh2->ocrb & (~mem_mask >> 16)) | ((data & mem_mask) >> 16); sh2->ocrb = (sh2->ocrb & (~mem_mask >> 16)) | ((data & mem_mask) >> 16);
@ -358,7 +358,7 @@ WRITE32_HANDLER( sh2_internal_w )
{ {
INT32 a = sh2->m[0x41]; INT32 a = sh2->m[0x41];
INT32 b = sh2->m[0x40]; INT32 b = sh2->m[0x40];
LOG(("SH2 '%s' div+mod %d/%d\n", sh2->device->tag.cstr(), a, b)); LOG(("SH2 '%s' div+mod %d/%d\n", sh2->device->tag(), a, b));
if (b) if (b)
{ {
sh2->m[0x45] = a / b; sh2->m[0x45] = a / b;
@ -386,7 +386,7 @@ WRITE32_HANDLER( sh2_internal_w )
{ {
INT64 a = sh2->m[0x45] | ((UINT64)(sh2->m[0x44]) << 32); INT64 a = sh2->m[0x45] | ((UINT64)(sh2->m[0x44]) << 32);
INT64 b = (INT32)sh2->m[0x40]; INT64 b = (INT32)sh2->m[0x40];
LOG(("SH2 '%s' div+mod %" I64FMT "d/%" I64FMT "d\n", sh2->device->tag.cstr(), a, b)); LOG(("SH2 '%s' div+mod %" I64FMT "d/%" I64FMT "d\n", sh2->device->tag(), a, b));
if (b) if (b)
{ {
INT64 q = a / b; INT64 q = a / b;
@ -536,7 +536,7 @@ void sh2_set_frt_input(running_device *device, int state)
sh2_timer_resync(sh2); sh2_timer_resync(sh2);
sh2->icr = sh2->frc; sh2->icr = sh2->frc;
sh2->m[4] |= ICF; sh2->m[4] |= ICF;
logerror("SH2.%s: ICF activated (%x)\n", sh2->device->tag.cstr(), sh2->pc & AM); logerror("SH2.%s: ICF activated (%x)\n", sh2->device->tag(), sh2->pc & AM);
sh2_recalc_irq(sh2); sh2_recalc_irq(sh2);
} }
@ -550,11 +550,11 @@ void sh2_set_irq_line(SH2 *sh2, int irqline, int state)
if( state == CLEAR_LINE ) if( state == CLEAR_LINE )
{ {
LOG(("SH-2 '%s' cleared nmi\n", sh2->device->tag.cstr())); LOG(("SH-2 '%s' cleared nmi\n", sh2->device->tag()));
} }
else else
{ {
LOG(("SH-2 '%s' assert nmi\n", sh2->device->tag.cstr())); LOG(("SH-2 '%s' assert nmi\n", sh2->device->tag()));
sh2_exception(sh2, "Set IRQ line", 16); sh2_exception(sh2, "Set IRQ line", 16);
@ -571,12 +571,12 @@ void sh2_set_irq_line(SH2 *sh2, int irqline, int state)
if( state == CLEAR_LINE ) if( state == CLEAR_LINE )
{ {
LOG(("SH-2 '%s' cleared irq #%d\n", sh2->device->tag.cstr(), irqline)); LOG(("SH-2 '%s' cleared irq #%d\n", sh2->device->tag(), irqline));
sh2->pending_irq &= ~(1 << irqline); sh2->pending_irq &= ~(1 << irqline);
} }
else else
{ {
LOG(("SH-2 '%s' assert irq #%d\n", sh2->device->tag.cstr(), irqline)); LOG(("SH-2 '%s' assert irq #%d\n", sh2->device->tag(), irqline));
sh2->pending_irq |= 1 << irqline; sh2->pending_irq |= 1 << irqline;
#ifdef USE_SH2DRC #ifdef USE_SH2DRC
sh2->test_irq = 1; sh2->test_irq = 1;
@ -647,27 +647,27 @@ void sh2_exception(SH2 *sh2, const char *message, int irqline)
if (sh2->internal_irq_level == irqline) if (sh2->internal_irq_level == irqline)
{ {
vector = sh2->internal_irq_vector; vector = sh2->internal_irq_vector;
LOG(("SH-2 '%s' exception #%d (internal vector: $%x) after [%s]\n", sh2->device->tag.cstr(), irqline, vector, message)); LOG(("SH-2 '%s' exception #%d (internal vector: $%x) after [%s]\n", sh2->device->tag(), irqline, vector, message));
} }
else else
{ {
if(sh2->m[0x38] & 0x00010000) if(sh2->m[0x38] & 0x00010000)
{ {
vector = sh2->irq_callback(sh2->device, irqline); vector = sh2->irq_callback(sh2->device, irqline);
LOG(("SH-2 '%s' exception #%d (external vector: $%x) after [%s]\n", sh2->device->tag.cstr(), irqline, vector, message)); LOG(("SH-2 '%s' exception #%d (external vector: $%x) after [%s]\n", sh2->device->tag(), irqline, vector, message));
} }
else else
{ {
sh2->irq_callback(sh2->device, irqline); sh2->irq_callback(sh2->device, irqline);
vector = 64 + irqline/2; vector = 64 + irqline/2;
LOG(("SH-2 '%s' exception #%d (autovector: $%x) after [%s]\n", sh2->device->tag.cstr(), irqline, vector, message)); LOG(("SH-2 '%s' exception #%d (autovector: $%x) after [%s]\n", sh2->device->tag(), irqline, vector, message));
} }
} }
} }
else else
{ {
vector = 11; vector = 11;
LOG(("SH-2 '%s' nmi exception (autovector: $%x) after [%s]\n", sh2->device->tag.cstr(), vector, message)); LOG(("SH-2 '%s' nmi exception (autovector: $%x) after [%s]\n", sh2->device->tag(), vector, message));
} }
#ifdef USE_SH2DRC #ifdef USE_SH2DRC

18
src/emu/cpu/sh4/sh4comn.c
View File

@ -179,7 +179,7 @@ void sh4_exception(SH4 *sh4, const char *message, int exception) // handle excep
sh4->m[INTEVT] = 0x1c0; sh4->m[INTEVT] = 0x1c0;
vector = 0x600; vector = 0x600;
sh4->irq_callback(sh4->device, INPUT_LINE_NMI); sh4->irq_callback(sh4->device, INPUT_LINE_NMI);
LOG(("SH-4 '%s' nmi exception after [%s]\n", sh4->device->tag.cstr(), message)); LOG(("SH-4 '%s' nmi exception after [%s]\n", sh4->device->tag(), message));
} else { } else {
// if ((sh4->m[ICR] & 0x4000) && (sh4->nmi_line_state == ASSERT_LINE)) // if ((sh4->m[ICR] & 0x4000) && (sh4->nmi_line_state == ASSERT_LINE))
// return; // return;
@ -193,7 +193,7 @@ void sh4_exception(SH4 *sh4, const char *message, int exception) // handle excep
sh4->irq_callback(sh4->device, SH4_INTC_IRL0-exception+SH4_IRL0); sh4->irq_callback(sh4->device, SH4_INTC_IRL0-exception+SH4_IRL0);
else else
sh4->irq_callback(sh4->device, SH4_IRL3+1); sh4->irq_callback(sh4->device, SH4_IRL3+1);
LOG(("SH-4 '%s' interrupt exception #%d after [%s]\n", sh4->device->tag.cstr(), exception, message)); LOG(("SH-4 '%s' interrupt exception #%d after [%s]\n", sh4->device->tag(), exception, message));
} }
sh4_exception_checkunrequest(sh4, exception); sh4_exception_checkunrequest(sh4, exception);
@ -407,7 +407,7 @@ static TIMER_CALLBACK( sh4_dmac_callback )
SH4 *sh4 = (SH4 *)ptr; SH4 *sh4 = (SH4 *)ptr;
int channel = param; int channel = param;
LOG(("SH4 '%s': DMA %d complete\n", sh4->device->tag.cstr(), channel)); LOG(("SH4 '%s': DMA %d complete\n", sh4->device->tag(), channel));
sh4->dma_timer_active[channel] = 0; sh4->dma_timer_active[channel] = 0;
switch (channel) switch (channel)
{ {
@ -1028,7 +1028,7 @@ void sh4_set_frt_input(running_device *device, int state)
sh4_timer_resync(); sh4_timer_resync();
sh4->icr = sh4->frc; sh4->icr = sh4->frc;
sh4->m[4] |= ICF; sh4->m[4] |= ICF;
logerror("SH4 '%s': ICF activated (%x)\n", sh4->device->tag.cstr(), sh4->pc & AM); logerror("SH4 '%s': ICF activated (%x)\n", sh4->device->tag(), sh4->pc & AM);
sh4_recalc_irq(); sh4_recalc_irq();
#endif #endif
} }
@ -1056,7 +1056,7 @@ void sh4_set_irq_line(SH4 *sh4, int irqline, int state) // set state of external
{ {
if ((state == CLEAR_LINE) && (sh4->nmi_line_state == ASSERT_LINE)) // rising if ((state == CLEAR_LINE) && (sh4->nmi_line_state == ASSERT_LINE)) // rising
{ {
LOG(("SH-4 '%s' assert nmi\n", sh4->device->tag.cstr())); LOG(("SH-4 '%s' assert nmi\n", sh4->device->tag()));
sh4_exception_request(sh4, SH4_INTC_NMI); sh4_exception_request(sh4, SH4_INTC_NMI);
sh4_dmac_nmi(sh4); sh4_dmac_nmi(sh4);
} }
@ -1065,7 +1065,7 @@ void sh4_set_irq_line(SH4 *sh4, int irqline, int state) // set state of external
{ {
if ((state == ASSERT_LINE) && (sh4->nmi_line_state == CLEAR_LINE)) // falling if ((state == ASSERT_LINE) && (sh4->nmi_line_state == CLEAR_LINE)) // falling
{ {
LOG(("SH-4 '%s' assert nmi\n", sh4->device->tag.cstr())); LOG(("SH-4 '%s' assert nmi\n", sh4->device->tag()));
sh4_exception_request(sh4, SH4_INTC_NMI); sh4_exception_request(sh4, SH4_INTC_NMI);
sh4_dmac_nmi(sh4); sh4_dmac_nmi(sh4);
} }
@ -1088,12 +1088,12 @@ void sh4_set_irq_line(SH4 *sh4, int irqline, int state) // set state of external
if( state == CLEAR_LINE ) if( state == CLEAR_LINE )
{ {
LOG(("SH-4 '%s' cleared external irq IRL%d\n", sh4->device->tag.cstr(), irqline)); LOG(("SH-4 '%s' cleared external irq IRL%d\n", sh4->device->tag(), irqline));
sh4_exception_unrequest(sh4, SH4_INTC_IRL0+irqline-SH4_IRL0); sh4_exception_unrequest(sh4, SH4_INTC_IRL0+irqline-SH4_IRL0);
} }
else else
{ {
LOG(("SH-4 '%s' assert external irq IRL%d\n", sh4->device->tag.cstr(), irqline)); LOG(("SH-4 '%s' assert external irq IRL%d\n", sh4->device->tag(), irqline));
sh4_exception_request(sh4, SH4_INTC_IRL0+irqline-SH4_IRL0); sh4_exception_request(sh4, SH4_INTC_IRL0+irqline-SH4_IRL0);
} }
} }
@ -1107,7 +1107,7 @@ void sh4_set_irq_line(SH4 *sh4, int irqline, int state) // set state of external
sh4_exception_unrequest(sh4, SH4_INTC_IRLn0+s); sh4_exception_unrequest(sh4, SH4_INTC_IRLn0+s);
if (sh4->irln < 15) if (sh4->irln < 15)
sh4_exception_request(sh4, SH4_INTC_IRLn0+sh4->irln); sh4_exception_request(sh4, SH4_INTC_IRLn0+sh4->irln);
LOG(("SH-4 '%s' IRLn0-IRLn3 level #%d\n", sh4->device->tag.cstr(), sh4->irln)); LOG(("SH-4 '%s' IRLn0-IRLn3 level #%d\n", sh4->device->tag(), sh4->irln));
} }
} }
if (sh4->test_irq && (!sh4->delay)) if (sh4->test_irq && (!sh4->delay))

2
src/emu/cpu/tms32031/tms32031.c
View File

@ -388,7 +388,7 @@ static CPU_INIT( tms32031 )
state_save_register_device_item(device, 0, tms->pc); state_save_register_device_item(device, 0, tms->pc);
for (i = 0; i < 36; i++) for (i = 0; i < 36; i++)
state_save_register_generic(device->machine, "tms32031", device->tag, i, "reg", tms->r[i].i8, UINT8, 8); state_save_register_generic(device->machine, "tms32031", device->tag(), i, "reg", tms->r[i].i8, UINT8, 8);
state_save_register_device_item(device, 0, tms->bkmask); state_save_register_device_item(device, 0, tms->bkmask);
state_save_register_device_item(device, 0, tms->irq_state); state_save_register_device_item(device, 0, tms->irq_state);
state_save_register_device_item(device, 0, tms->delayed); state_save_register_device_item(device, 0, tms->delayed);

18
src/emu/cpu/tms34010/tms34010.c
View File

@ -599,7 +599,7 @@ static void check_interrupt(tms34010_state *tms)
/* check for NMI first */ /* check for NMI first */
if (IOREG(tms, REG_HSTCTLH) & 0x0100) if (IOREG(tms, REG_HSTCTLH) & 0x0100)
{ {
LOG(("TMS34010 '%s' takes NMI\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes NMI\n", tms->device->tag()));
/* ack the NMI */ /* ack the NMI */
IOREG(tms, REG_HSTCTLH) &= ~0x0100; IOREG(tms, REG_HSTCTLH) &= ~0x0100;
@ -626,28 +626,28 @@ static void check_interrupt(tms34010_state *tms)
/* host interrupt */ /* host interrupt */
if (irq & TMS34010_HI) if (irq & TMS34010_HI)
{ {
LOG(("TMS34010 '%s' takes HI\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes HI\n", tms->device->tag()));
vector = 0xfffffec0; vector = 0xfffffec0;
} }
/* display interrupt */ /* display interrupt */
else if (irq & TMS34010_DI) else if (irq & TMS34010_DI)
{ {
LOG(("TMS34010 '%s' takes DI\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes DI\n", tms->device->tag()));
vector = 0xfffffea0; vector = 0xfffffea0;
} }
/* window violation interrupt */ /* window violation interrupt */
else if (irq & TMS34010_WV) else if (irq & TMS34010_WV)
{ {
LOG(("TMS34010 '%s' takes WV\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes WV\n", tms->device->tag()));
vector = 0xfffffe80; vector = 0xfffffe80;
} }
/* external 1 interrupt */ /* external 1 interrupt */
else if (irq & TMS34010_INT1) else if (irq & TMS34010_INT1)
{ {
LOG(("TMS34010 '%s' takes INT1\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes INT1\n", tms->device->tag()));
vector = 0xffffffc0; vector = 0xffffffc0;
irqline = 0; irqline = 0;
} }
@ -655,7 +655,7 @@ static void check_interrupt(tms34010_state *tms)
/* external 2 interrupt */ /* external 2 interrupt */
else if (irq & TMS34010_INT2) else if (irq & TMS34010_INT2)
{ {
LOG(("TMS34010 '%s' takes INT2\n", tms->device->tag.cstr())); LOG(("TMS34010 '%s' takes INT2\n", tms->device->tag()));
vector = 0xffffffa0; vector = 0xffffffa0;
irqline = 1; irqline = 1;
} }
@ -781,7 +781,7 @@ static CPU_EXIT( tms34010 )
static void set_irq_line(tms34010_state *tms, int irqline, int linestate) static void set_irq_line(tms34010_state *tms, int irqline, int linestate)
{ {
LOG(("TMS34010 '%s' set irq line %d state %d\n", tms->device->tag.cstr(), irqline, linestate)); LOG(("TMS34010 '%s' set irq line %d state %d\n", tms->device->tag(), irqline, linestate));
/* set the pending interrupt */ /* set the pending interrupt */
switch (irqline) switch (irqline)
@ -815,7 +815,7 @@ static TIMER_CALLBACK( internal_interrupt_callback )
/* call through to the CPU to generate the int */ /* call through to the CPU to generate the int */
IOREG(tms, REG_INTPEND) |= type; IOREG(tms, REG_INTPEND) |= type;
LOG(("TMS34010 '%s' set internal interrupt $%04x\n", tms->device->tag.cstr(), type)); LOG(("TMS34010 '%s' set internal interrupt $%04x\n", tms->device->tag(), type));
/* generate triggers so that spin loops can key off them */ /* generate triggers so that spin loops can key off them */
cpu_triggerint(tms->device); cpu_triggerint(tms->device);
@ -1151,7 +1151,7 @@ VIDEO_UPDATE( tms340x0 )
} }
} }
if (tms == NULL) if (tms == NULL)
fatalerror("Unable to locate matching CPU for screen '%s'\n", screen->tag.cstr()); fatalerror("Unable to locate matching CPU for screen '%s'\n", screen->tag());
/* get the display parameters for the screen */ /* get the display parameters for the screen */
tms34010_get_display_params(tms->device, &params); tms34010_get_display_params(tms->device, &params);

2
src/emu/cpu/tms7000/tms7000.c
View File

@ -366,7 +366,7 @@ void tms7000_set_irq_line(tms7000_state *cpustate, int irqline, int state)
{ /* check for transition */ { /* check for transition */
cpustate->irq_state[irqline] = state; cpustate->irq_state[irqline] = state;
LOG(("tms7000: (cpu '%s') set_irq_line (INT%d, state %d)\n", cpustate->device->tag.cstr(), irqline+1, state)); LOG(("tms7000: (cpu '%s') set_irq_line (INT%d, state %d)\n", cpustate->device->tag(), irqline+1, state));
if (state == CLEAR_LINE) if (state == CLEAR_LINE)
{ {

12
src/emu/cpu/upd7810/7810ops.c
View File

@ -9,12 +9,12 @@
static void illegal(upd7810_state *cpustate) static void illegal(upd7810_state *cpustate)
{ {
logerror("uPD7810 '%s': illegal opcode %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, PC); logerror("uPD7810 '%s': illegal opcode %02x at PC:%04x\n", cpustate->device->tag(), OP, PC);
} }
static void illegal2(upd7810_state *cpustate) static void illegal2(upd7810_state *cpustate)
{ {
logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, OP2, PC); logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag(), OP, OP2, PC);
} }
/* prefix 48 */ /* prefix 48 */
@ -8648,7 +8648,7 @@ static void SKN_bit(upd7810_state *cpustate)
val = RP( cpustate, UPD7807_PORTT ); val = RP( cpustate, UPD7807_PORTT );
break; break;
default: default:
logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, imm, PC); logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag(), OP, imm, PC);
val = 0; val = 0;
break; break;
} }
@ -8702,7 +8702,7 @@ static void SETB(upd7810_state *cpustate)
// PT is input only // PT is input only
// break; // break;
default: default:
logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, imm, PC); logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag(), OP, imm, PC);
break; break;
} }
} }
@ -8752,7 +8752,7 @@ static void CLR(upd7810_state *cpustate)
// PT is input only // PT is input only
// break; // break;
default: default:
logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, imm, PC); logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag(), OP, imm, PC);
break; break;
} }
} }
@ -8801,7 +8801,7 @@ static void SK_bit(upd7810_state *cpustate)
val = RP( cpustate, UPD7807_PORTT ); val = RP( cpustate, UPD7807_PORTT );
break; break;
default: default:
logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag.cstr(), OP, imm, PC); logerror("uPD7810 '%s': illegal opcode %02x %02x at PC:%04x\n", cpustate->device->tag(), OP, imm, PC);
val = 0; val = 0;
break; break;
} }

296
src/emu/cpu/z180/z180.c
View File

@ -937,68 +937,68 @@ static UINT8 z180_readcontrol(z180_state *cpustate, offs_t port)
{ {
case Z180_CNTLA0: case Z180_CNTLA0:
data = cpustate->IO_CNTLA0 & Z180_CNTLA0_RMASK; data = cpustate->IO_CNTLA0 & Z180_CNTLA0_RMASK;
LOG(("Z180 '%s' CNTLA0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CNTLA0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CNTLA1: case Z180_CNTLA1:
data = cpustate->IO_CNTLA1 & Z180_CNTLA1_RMASK; data = cpustate->IO_CNTLA1 & Z180_CNTLA1_RMASK;
LOG(("Z180 '%s' CNTLA1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CNTLA1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CNTLB0: case Z180_CNTLB0:
data = cpustate->IO_CNTLB0 & Z180_CNTLB0_RMASK; data = cpustate->IO_CNTLB0 & Z180_CNTLB0_RMASK;
LOG(("Z180 '%s' CNTLB0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CNTLB0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CNTLB1: case Z180_CNTLB1:
data = cpustate->IO_CNTLB1 & Z180_CNTLB1_RMASK; data = cpustate->IO_CNTLB1 & Z180_CNTLB1_RMASK;
LOG(("Z180 '%s' CNTLB1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CNTLB1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_STAT0: case Z180_STAT0:
data = cpustate->IO_STAT0 & Z180_STAT0_RMASK; data = cpustate->IO_STAT0 & Z180_STAT0_RMASK;
data |= 0x02; // kludge for 20pacgal data |= 0x02; // kludge for 20pacgal
LOG(("Z180 '%s' STAT0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' STAT0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_STAT1: case Z180_STAT1:
data = cpustate->IO_STAT1 & Z180_STAT1_RMASK; data = cpustate->IO_STAT1 & Z180_STAT1_RMASK;
LOG(("Z180 '%s' STAT1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' STAT1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TDR0: case Z180_TDR0:
data = cpustate->IO_TDR0 & Z180_TDR0_RMASK; data = cpustate->IO_TDR0 & Z180_TDR0_RMASK;
LOG(("Z180 '%s' TDR0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TDR0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TDR1: case Z180_TDR1:
data = cpustate->IO_TDR1 & Z180_TDR1_RMASK; data = cpustate->IO_TDR1 & Z180_TDR1_RMASK;
LOG(("Z180 '%s' TDR1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TDR1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RDR0: case Z180_RDR0:
data = cpustate->IO_RDR0 & Z180_RDR0_RMASK; data = cpustate->IO_RDR0 & Z180_RDR0_RMASK;
LOG(("Z180 '%s' RDR0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RDR0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RDR1: case Z180_RDR1:
data = cpustate->IO_RDR1 & Z180_RDR1_RMASK; data = cpustate->IO_RDR1 & Z180_RDR1_RMASK;
LOG(("Z180 '%s' RDR1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RDR1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CNTR: case Z180_CNTR:
data = cpustate->IO_CNTR & Z180_CNTR_RMASK; data = cpustate->IO_CNTR & Z180_CNTR_RMASK;
LOG(("Z180 '%s' CNTR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CNTR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TRDR: case Z180_TRDR:
data = cpustate->IO_TRDR & Z180_TRDR_RMASK; data = cpustate->IO_TRDR & Z180_TRDR_RMASK;
LOG(("Z180 '%s' TRDR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TRDR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TMDR0L: case Z180_TMDR0L:
data = cpustate->tmdr_value[0] & Z180_TMDR0L_RMASK; data = cpustate->tmdr_value[0] & Z180_TMDR0L_RMASK;
LOG(("Z180 '%s' TMDR0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TMDR0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
/* if timer is counting, latch the MSB and set the latch flag */ /* if timer is counting, latch the MSB and set the latch flag */
if ((cpustate->IO_TCR & Z180_TCR_TDE0) == 0) if ((cpustate->IO_TCR & Z180_TCR_TDE0) == 0)
{ {
@ -1038,17 +1038,17 @@ data |= 0x02; // kludge for 20pacgal
{ {
cpustate->read_tcr_tmdr[0] = 1; cpustate->read_tcr_tmdr[0] = 1;
} }
LOG(("Z180 '%s' TMDR0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TMDR0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RLDR0L: case Z180_RLDR0L:
data = cpustate->IO_RLDR0L & Z180_RLDR0L_RMASK; data = cpustate->IO_RLDR0L & Z180_RLDR0L_RMASK;
LOG(("Z180 '%s' RLDR0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RLDR0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RLDR0H: case Z180_RLDR0H:
data = cpustate->IO_RLDR0H & Z180_RLDR0H_RMASK; data = cpustate->IO_RLDR0H & Z180_RLDR0H_RMASK;
LOG(("Z180 '%s' RLDR0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RLDR0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TCR: case Z180_TCR:
@ -1074,27 +1074,27 @@ data |= 0x02; // kludge for 20pacgal
cpustate->read_tcr_tmdr[1] = 1; cpustate->read_tcr_tmdr[1] = 1;
} }
LOG(("Z180 '%s' TCR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TCR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO11: case Z180_IO11:
data = cpustate->IO_IO11 & Z180_IO11_RMASK; data = cpustate->IO_IO11 & Z180_IO11_RMASK;
LOG(("Z180 '%s' IO11 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO11 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASEXT0: case Z180_ASEXT0:
data = cpustate->IO_ASEXT0 & Z180_ASEXT0_RMASK; data = cpustate->IO_ASEXT0 & Z180_ASEXT0_RMASK;
LOG(("Z180 '%s' ASEXT0 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASEXT0 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASEXT1: case Z180_ASEXT1:
data = cpustate->IO_ASEXT1 & Z180_ASEXT1_RMASK; data = cpustate->IO_ASEXT1 & Z180_ASEXT1_RMASK;
LOG(("Z180 '%s' ASEXT1 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASEXT1 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_TMDR1L: case Z180_TMDR1L:
data = cpustate->tmdr_value[1] & Z180_TMDR1L_RMASK; data = cpustate->tmdr_value[1] & Z180_TMDR1L_RMASK;
LOG(("Z180 '%s' TMDR1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TMDR1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
/* if timer is counting, latch the MSB and set the latch flag */ /* if timer is counting, latch the MSB and set the latch flag */
if ((cpustate->IO_TCR & Z180_TCR_TDE1) == 0) if ((cpustate->IO_TCR & Z180_TCR_TDE1) == 0)
{ {
@ -1134,217 +1134,217 @@ data |= 0x02; // kludge for 20pacgal
{ {
cpustate->read_tcr_tmdr[1] = 1; cpustate->read_tcr_tmdr[1] = 1;
} }
LOG(("Z180 '%s' TMDR1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' TMDR1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RLDR1L: case Z180_RLDR1L:
data = cpustate->IO_RLDR1L & Z180_RLDR1L_RMASK; data = cpustate->IO_RLDR1L & Z180_RLDR1L_RMASK;
LOG(("Z180 '%s' RLDR1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RLDR1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RLDR1H: case Z180_RLDR1H:
data = cpustate->IO_RLDR1H & Z180_RLDR1H_RMASK; data = cpustate->IO_RLDR1H & Z180_RLDR1H_RMASK;
LOG(("Z180 '%s' RLDR1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RLDR1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_FRC: case Z180_FRC:
data = cpustate->IO_FRC & Z180_FRC_RMASK; data = cpustate->IO_FRC & Z180_FRC_RMASK;
LOG(("Z180 '%s' FRC rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' FRC rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO19: case Z180_IO19:
data = cpustate->IO_IO19 & Z180_IO19_RMASK; data = cpustate->IO_IO19 & Z180_IO19_RMASK;
LOG(("Z180 '%s' IO19 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO19 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASTC0L: case Z180_ASTC0L:
data = cpustate->IO_ASTC0L & Z180_ASTC0L_RMASK; data = cpustate->IO_ASTC0L & Z180_ASTC0L_RMASK;
LOG(("Z180 '%s' ASTC0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASTC0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASTC0H: case Z180_ASTC0H:
data = cpustate->IO_ASTC0H & Z180_ASTC0H_RMASK; data = cpustate->IO_ASTC0H & Z180_ASTC0H_RMASK;
LOG(("Z180 '%s' ASTC0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASTC0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASTC1L: case Z180_ASTC1L:
data = cpustate->IO_ASTC1L & Z180_ASTC1L_RMASK; data = cpustate->IO_ASTC1L & Z180_ASTC1L_RMASK;
LOG(("Z180 '%s' ASTC1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASTC1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ASTC1H: case Z180_ASTC1H:
data = cpustate->IO_ASTC1H & Z180_ASTC1H_RMASK; data = cpustate->IO_ASTC1H & Z180_ASTC1H_RMASK;
LOG(("Z180 '%s' ASTC1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ASTC1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CMR: case Z180_CMR:
data = cpustate->IO_CMR & Z180_CMR_RMASK; data = cpustate->IO_CMR & Z180_CMR_RMASK;
LOG(("Z180 '%s' CMR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CMR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CCR: case Z180_CCR:
data = cpustate->IO_CCR & Z180_CCR_RMASK; data = cpustate->IO_CCR & Z180_CCR_RMASK;
LOG(("Z180 '%s' CCR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CCR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_SAR0L: case Z180_SAR0L:
data = cpustate->IO_SAR0L & Z180_SAR0L_RMASK; data = cpustate->IO_SAR0L & Z180_SAR0L_RMASK;
LOG(("Z180 '%s' SAR0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' SAR0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_SAR0H: case Z180_SAR0H:
data = cpustate->IO_SAR0H & Z180_SAR0H_RMASK; data = cpustate->IO_SAR0H & Z180_SAR0H_RMASK;
LOG(("Z180 '%s' SAR0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' SAR0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_SAR0B: case Z180_SAR0B:
data = cpustate->IO_SAR0B & Z180_SAR0B_RMASK; data = cpustate->IO_SAR0B & Z180_SAR0B_RMASK;
LOG(("Z180 '%s' SAR0B rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' SAR0B rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DAR0L: case Z180_DAR0L:
data = cpustate->IO_DAR0L & Z180_DAR0L_RMASK; data = cpustate->IO_DAR0L & Z180_DAR0L_RMASK;
LOG(("Z180 '%s' DAR0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DAR0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DAR0H: case Z180_DAR0H:
data = cpustate->IO_DAR0H & Z180_DAR0H_RMASK; data = cpustate->IO_DAR0H & Z180_DAR0H_RMASK;
LOG(("Z180 '%s' DAR0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DAR0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DAR0B: case Z180_DAR0B:
data = cpustate->IO_DAR0B & Z180_DAR0B_RMASK; data = cpustate->IO_DAR0B & Z180_DAR0B_RMASK;
LOG(("Z180 '%s' DAR0B rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DAR0B rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_BCR0L: case Z180_BCR0L:
data = cpustate->IO_BCR0L & Z180_BCR0L_RMASK; data = cpustate->IO_BCR0L & Z180_BCR0L_RMASK;
LOG(("Z180 '%s' BCR0L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' BCR0L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_BCR0H: case Z180_BCR0H:
data = cpustate->IO_BCR0H & Z180_BCR0H_RMASK; data = cpustate->IO_BCR0H & Z180_BCR0H_RMASK;
LOG(("Z180 '%s' BCR0H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' BCR0H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_MAR1L: case Z180_MAR1L:
data = cpustate->IO_MAR1L & Z180_MAR1L_RMASK; data = cpustate->IO_MAR1L & Z180_MAR1L_RMASK;
LOG(("Z180 '%s' MAR1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' MAR1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_MAR1H: case Z180_MAR1H:
data = cpustate->IO_MAR1H & Z180_MAR1H_RMASK; data = cpustate->IO_MAR1H & Z180_MAR1H_RMASK;
LOG(("Z180 '%s' MAR1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' MAR1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_MAR1B: case Z180_MAR1B:
data = cpustate->IO_MAR1B & Z180_MAR1B_RMASK; data = cpustate->IO_MAR1B & Z180_MAR1B_RMASK;
LOG(("Z180 '%s' MAR1B rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' MAR1B rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IAR1L: case Z180_IAR1L:
data = cpustate->IO_IAR1L & Z180_IAR1L_RMASK; data = cpustate->IO_IAR1L & Z180_IAR1L_RMASK;
LOG(("Z180 '%s' IAR1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IAR1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IAR1H: case Z180_IAR1H:
data = cpustate->IO_IAR1H & Z180_IAR1H_RMASK; data = cpustate->IO_IAR1H & Z180_IAR1H_RMASK;
LOG(("Z180 '%s' IAR1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IAR1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IAR1B: case Z180_IAR1B:
data = cpustate->IO_IAR1B & Z180_IAR1B_RMASK; data = cpustate->IO_IAR1B & Z180_IAR1B_RMASK;
LOG(("Z180 '%s' IAR1B rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IAR1B rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_BCR1L: case Z180_BCR1L:
data = cpustate->IO_BCR1L & Z180_BCR1L_RMASK; data = cpustate->IO_BCR1L & Z180_BCR1L_RMASK;
LOG(("Z180 '%s' BCR1L rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' BCR1L rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_BCR1H: case Z180_BCR1H:
data = cpustate->IO_BCR1H & Z180_BCR1H_RMASK; data = cpustate->IO_BCR1H & Z180_BCR1H_RMASK;
LOG(("Z180 '%s' BCR1H rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' BCR1H rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DSTAT: case Z180_DSTAT:
data = cpustate->IO_DSTAT & Z180_DSTAT_RMASK; data = cpustate->IO_DSTAT & Z180_DSTAT_RMASK;
LOG(("Z180 '%s' DSTAT rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DSTAT rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DMODE: case Z180_DMODE:
data = cpustate->IO_DMODE & Z180_DMODE_RMASK; data = cpustate->IO_DMODE & Z180_DMODE_RMASK;
LOG(("Z180 '%s' DMODE rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DMODE rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_DCNTL: case Z180_DCNTL:
data = cpustate->IO_DCNTL & Z180_DCNTL_RMASK; data = cpustate->IO_DCNTL & Z180_DCNTL_RMASK;
LOG(("Z180 '%s' DCNTL rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' DCNTL rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IL: case Z180_IL:
data = cpustate->IO_IL & Z180_IL_RMASK; data = cpustate->IO_IL & Z180_IL_RMASK;
LOG(("Z180 '%s' IL rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IL rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_ITC: case Z180_ITC:
data = cpustate->IO_ITC & Z180_ITC_RMASK; data = cpustate->IO_ITC & Z180_ITC_RMASK;
LOG(("Z180 '%s' ITC rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' ITC rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO35: case Z180_IO35:
data = cpustate->IO_IO35 & Z180_IO35_RMASK; data = cpustate->IO_IO35 & Z180_IO35_RMASK;
LOG(("Z180 '%s' IO35 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO35 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_RCR: case Z180_RCR:
data = cpustate->IO_RCR & Z180_RCR_RMASK; data = cpustate->IO_RCR & Z180_RCR_RMASK;
LOG(("Z180 '%s' RCR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' RCR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO37: case Z180_IO37:
data = cpustate->IO_IO37 & Z180_IO37_RMASK; data = cpustate->IO_IO37 & Z180_IO37_RMASK;
LOG(("Z180 '%s' IO37 rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO37 rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CBR: case Z180_CBR:
data = cpustate->IO_CBR & Z180_CBR_RMASK; data = cpustate->IO_CBR & Z180_CBR_RMASK;
LOG(("Z180 '%s' CBR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CBR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_BBR: case Z180_BBR:
data = cpustate->IO_BBR & Z180_BBR_RMASK; data = cpustate->IO_BBR & Z180_BBR_RMASK;
LOG(("Z180 '%s' BBR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' BBR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_CBAR: case Z180_CBAR:
data = cpustate->IO_CBAR & Z180_CBAR_RMASK; data = cpustate->IO_CBAR & Z180_CBAR_RMASK;
LOG(("Z180 '%s' CBAR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' CBAR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO3B: case Z180_IO3B:
data = cpustate->IO_IO3B & Z180_IO3B_RMASK; data = cpustate->IO_IO3B & Z180_IO3B_RMASK;
LOG(("Z180 '%s' IO3B rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO3B rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO3C: case Z180_IO3C:
data = cpustate->IO_IO3C & Z180_IO3C_RMASK; data = cpustate->IO_IO3C & Z180_IO3C_RMASK;
LOG(("Z180 '%s' IO3C rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO3C rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IO3D: case Z180_IO3D:
data = cpustate->IO_IO3D & Z180_IO3D_RMASK; data = cpustate->IO_IO3D & Z180_IO3D_RMASK;
LOG(("Z180 '%s' IO3D rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IO3D rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_OMCR: case Z180_OMCR:
data = cpustate->IO_OMCR & Z180_OMCR_RMASK; data = cpustate->IO_OMCR & Z180_OMCR_RMASK;
LOG(("Z180 '%s' OMCR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' OMCR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
case Z180_IOCR: case Z180_IOCR:
data = cpustate->IO_IOCR & Z180_IOCR_RMASK; data = cpustate->IO_IOCR & Z180_IOCR_RMASK;
LOG(("Z180 '%s' IOCR rd $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, cpustate->io[port & 0x3f])); LOG(("Z180 '%s' IOCR rd $%02x ($%02x)\n", cpustate->device->tag(), data, cpustate->io[port & 0x3f]));
break; break;
} }
@ -1364,251 +1364,251 @@ static void z180_writecontrol(z180_state *cpustate, offs_t port, UINT8 data)
switch (port + Z180_CNTLA0) switch (port + Z180_CNTLA0)
{ {
case Z180_CNTLA0: case Z180_CNTLA0:
LOG(("Z180 '%s' CNTLA0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CNTLA0_WMASK)); LOG(("Z180 '%s' CNTLA0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CNTLA0_WMASK));
cpustate->IO_CNTLA0 = (cpustate->IO_CNTLA0 & ~Z180_CNTLA0_WMASK) | (data & Z180_CNTLA0_WMASK); cpustate->IO_CNTLA0 = (cpustate->IO_CNTLA0 & ~Z180_CNTLA0_WMASK) | (data & Z180_CNTLA0_WMASK);
break; break;
case Z180_CNTLA1: case Z180_CNTLA1:
LOG(("Z180 '%s' CNTLA1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CNTLA1_WMASK)); LOG(("Z180 '%s' CNTLA1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CNTLA1_WMASK));
cpustate->IO_CNTLA1 = (cpustate->IO_CNTLA1 & ~Z180_CNTLA1_WMASK) | (data & Z180_CNTLA1_WMASK); cpustate->IO_CNTLA1 = (cpustate->IO_CNTLA1 & ~Z180_CNTLA1_WMASK) | (data & Z180_CNTLA1_WMASK);
break; break;
case Z180_CNTLB0: case Z180_CNTLB0:
LOG(("Z180 '%s' CNTLB0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CNTLB0_WMASK)); LOG(("Z180 '%s' CNTLB0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CNTLB0_WMASK));
cpustate->IO_CNTLB0 = (cpustate->IO_CNTLB0 & ~Z180_CNTLB0_WMASK) | (data & Z180_CNTLB0_WMASK); cpustate->IO_CNTLB0 = (cpustate->IO_CNTLB0 & ~Z180_CNTLB0_WMASK) | (data & Z180_CNTLB0_WMASK);
break; break;
case Z180_CNTLB1: case Z180_CNTLB1:
LOG(("Z180 '%s' CNTLB1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CNTLB1_WMASK)); LOG(("Z180 '%s' CNTLB1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CNTLB1_WMASK));
cpustate->IO_CNTLB1 = (cpustate->IO_CNTLB1 & ~Z180_CNTLB1_WMASK) | (data & Z180_CNTLB1_WMASK); cpustate->IO_CNTLB1 = (cpustate->IO_CNTLB1 & ~Z180_CNTLB1_WMASK) | (data & Z180_CNTLB1_WMASK);
break; break;
case Z180_STAT0: case Z180_STAT0:
LOG(("Z180 '%s' STAT0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_STAT0_WMASK)); LOG(("Z180 '%s' STAT0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_STAT0_WMASK));
cpustate->IO_STAT0 = (cpustate->IO_STAT0 & ~Z180_STAT0_WMASK) | (data & Z180_STAT0_WMASK); cpustate->IO_STAT0 = (cpustate->IO_STAT0 & ~Z180_STAT0_WMASK) | (data & Z180_STAT0_WMASK);
break; break;
case Z180_STAT1: case Z180_STAT1:
LOG(("Z180 '%s' STAT1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_STAT1_WMASK)); LOG(("Z180 '%s' STAT1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_STAT1_WMASK));
cpustate->IO_STAT1 = (cpustate->IO_STAT1 & ~Z180_STAT1_WMASK) | (data & Z180_STAT1_WMASK); cpustate->IO_STAT1 = (cpustate->IO_STAT1 & ~Z180_STAT1_WMASK) | (data & Z180_STAT1_WMASK);
break; break;
case Z180_TDR0: case Z180_TDR0:
LOG(("Z180 '%s' TDR0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TDR0_WMASK)); LOG(("Z180 '%s' TDR0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TDR0_WMASK));
cpustate->IO_TDR0 = (cpustate->IO_TDR0 & ~Z180_TDR0_WMASK) | (data & Z180_TDR0_WMASK); cpustate->IO_TDR0 = (cpustate->IO_TDR0 & ~Z180_TDR0_WMASK) | (data & Z180_TDR0_WMASK);
break; break;
case Z180_TDR1: case Z180_TDR1:
LOG(("Z180 '%s' TDR1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TDR1_WMASK)); LOG(("Z180 '%s' TDR1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TDR1_WMASK));
cpustate->IO_TDR1 = (cpustate->IO_TDR1 & ~Z180_TDR1_WMASK) | (data & Z180_TDR1_WMASK); cpustate->IO_TDR1 = (cpustate->IO_TDR1 & ~Z180_TDR1_WMASK) | (data & Z180_TDR1_WMASK);
break; break;
case Z180_RDR0: case Z180_RDR0:
LOG(("Z180 '%s' RDR0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RDR0_WMASK)); LOG(("Z180 '%s' RDR0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RDR0_WMASK));
cpustate->IO_RDR0 = (cpustate->IO_RDR0 & ~Z180_RDR0_WMASK) | (data & Z180_RDR0_WMASK); cpustate->IO_RDR0 = (cpustate->IO_RDR0 & ~Z180_RDR0_WMASK) | (data & Z180_RDR0_WMASK);
break; break;
case Z180_RDR1: case Z180_RDR1:
LOG(("Z180 '%s' RDR1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RDR1_WMASK)); LOG(("Z180 '%s' RDR1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RDR1_WMASK));
cpustate->IO_RDR1 = (cpustate->IO_RDR1 & ~Z180_RDR1_WMASK) | (data & Z180_RDR1_WMASK); cpustate->IO_RDR1 = (cpustate->IO_RDR1 & ~Z180_RDR1_WMASK) | (data & Z180_RDR1_WMASK);
break; break;
case Z180_CNTR: case Z180_CNTR:
LOG(("Z180 '%s' CNTR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CNTR_WMASK)); LOG(("Z180 '%s' CNTR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CNTR_WMASK));
cpustate->IO_CNTR = (cpustate->IO_CNTR & ~Z180_CNTR_WMASK) | (data & Z180_CNTR_WMASK); cpustate->IO_CNTR = (cpustate->IO_CNTR & ~Z180_CNTR_WMASK) | (data & Z180_CNTR_WMASK);
break; break;
case Z180_TRDR: case Z180_TRDR:
LOG(("Z180 '%s' TRDR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TRDR_WMASK)); LOG(("Z180 '%s' TRDR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TRDR_WMASK));
cpustate->IO_TRDR = (cpustate->IO_TRDR & ~Z180_TRDR_WMASK) | (data & Z180_TRDR_WMASK); cpustate->IO_TRDR = (cpustate->IO_TRDR & ~Z180_TRDR_WMASK) | (data & Z180_TRDR_WMASK);
break; break;
case Z180_TMDR0L: case Z180_TMDR0L:
LOG(("Z180 '%s' TMDR0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TMDR0L_WMASK)); LOG(("Z180 '%s' TMDR0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TMDR0L_WMASK));
cpustate->IO_TMDR0L = data & Z180_TMDR0L_WMASK; cpustate->IO_TMDR0L = data & Z180_TMDR0L_WMASK;
cpustate->tmdr_value[0] = (cpustate->tmdr_value[0] & 0xff00) | cpustate->IO_TMDR0L; cpustate->tmdr_value[0] = (cpustate->tmdr_value[0] & 0xff00) | cpustate->IO_TMDR0L;
break; break;
case Z180_TMDR0H: case Z180_TMDR0H:
LOG(("Z180 '%s' TMDR0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TMDR0H_WMASK)); LOG(("Z180 '%s' TMDR0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TMDR0H_WMASK));
cpustate->IO_TMDR0H = data & Z180_TMDR0H_WMASK; cpustate->IO_TMDR0H = data & Z180_TMDR0H_WMASK;
cpustate->tmdr_value[0] = (cpustate->tmdr_value[0] & 0x00ff) | (cpustate->IO_TMDR0H << 8); cpustate->tmdr_value[0] = (cpustate->tmdr_value[0] & 0x00ff) | (cpustate->IO_TMDR0H << 8);
break; break;
case Z180_RLDR0L: case Z180_RLDR0L:
LOG(("Z180 '%s' RLDR0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RLDR0L_WMASK)); LOG(("Z180 '%s' RLDR0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RLDR0L_WMASK));
cpustate->IO_RLDR0L = (cpustate->IO_RLDR0L & ~Z180_RLDR0L_WMASK) | (data & Z180_RLDR0L_WMASK); cpustate->IO_RLDR0L = (cpustate->IO_RLDR0L & ~Z180_RLDR0L_WMASK) | (data & Z180_RLDR0L_WMASK);
break; break;
case Z180_RLDR0H: case Z180_RLDR0H:
LOG(("Z180 '%s' RLDR0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RLDR0H_WMASK)); LOG(("Z180 '%s' RLDR0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RLDR0H_WMASK));
cpustate->IO_RLDR0H = (cpustate->IO_RLDR0H & ~Z180_RLDR0H_WMASK) | (data & Z180_RLDR0H_WMASK); cpustate->IO_RLDR0H = (cpustate->IO_RLDR0H & ~Z180_RLDR0H_WMASK) | (data & Z180_RLDR0H_WMASK);
break; break;
case Z180_TCR: case Z180_TCR:
LOG(("Z180 '%s' TCR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TCR_WMASK)); LOG(("Z180 '%s' TCR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TCR_WMASK));
cpustate->IO_TCR = (cpustate->IO_TCR & ~Z180_TCR_WMASK) | (data & Z180_TCR_WMASK); cpustate->IO_TCR = (cpustate->IO_TCR & ~Z180_TCR_WMASK) | (data & Z180_TCR_WMASK);
break; break;
case Z180_IO11: case Z180_IO11:
LOG(("Z180 '%s' IO11 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO11_WMASK)); LOG(("Z180 '%s' IO11 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO11_WMASK));
cpustate->IO_IO11 = (cpustate->IO_IO11 & ~Z180_IO11_WMASK) | (data & Z180_IO11_WMASK); cpustate->IO_IO11 = (cpustate->IO_IO11 & ~Z180_IO11_WMASK) | (data & Z180_IO11_WMASK);
break; break;
case Z180_ASEXT0: case Z180_ASEXT0:
LOG(("Z180 '%s' ASEXT0 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASEXT0_WMASK)); LOG(("Z180 '%s' ASEXT0 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASEXT0_WMASK));
cpustate->IO_ASEXT0 = (cpustate->IO_ASEXT0 & ~Z180_ASEXT0_WMASK) | (data & Z180_ASEXT0_WMASK); cpustate->IO_ASEXT0 = (cpustate->IO_ASEXT0 & ~Z180_ASEXT0_WMASK) | (data & Z180_ASEXT0_WMASK);
break; break;
case Z180_ASEXT1: case Z180_ASEXT1:
LOG(("Z180 '%s' ASEXT1 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASEXT1_WMASK)); LOG(("Z180 '%s' ASEXT1 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASEXT1_WMASK));
cpustate->IO_ASEXT1 = (cpustate->IO_ASEXT1 & ~Z180_ASEXT1_WMASK) | (data & Z180_ASEXT1_WMASK); cpustate->IO_ASEXT1 = (cpustate->IO_ASEXT1 & ~Z180_ASEXT1_WMASK) | (data & Z180_ASEXT1_WMASK);
break; break;
case Z180_TMDR1L: case Z180_TMDR1L:
LOG(("Z180 '%s' TMDR1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TMDR1L_WMASK)); LOG(("Z180 '%s' TMDR1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TMDR1L_WMASK));
cpustate->IO_TMDR1L = data & Z180_TMDR1L_WMASK; cpustate->IO_TMDR1L = data & Z180_TMDR1L_WMASK;
cpustate->tmdr_value[1] = (cpustate->tmdr_value[1] & 0xff00) | cpustate->IO_TMDR1L; cpustate->tmdr_value[1] = (cpustate->tmdr_value[1] & 0xff00) | cpustate->IO_TMDR1L;
break; break;
case Z180_TMDR1H: case Z180_TMDR1H:
LOG(("Z180 '%s' TMDR1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_TMDR1H_WMASK)); LOG(("Z180 '%s' TMDR1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_TMDR1H_WMASK));
cpustate->IO_TMDR1H = data & Z180_TMDR1H_WMASK; cpustate->IO_TMDR1H = data & Z180_TMDR1H_WMASK;
cpustate->tmdr_value[1] = (cpustate->tmdr_value[1] & 0x00ff) | cpustate->IO_TMDR1H; cpustate->tmdr_value[1] = (cpustate->tmdr_value[1] & 0x00ff) | cpustate->IO_TMDR1H;
break; break;
case Z180_RLDR1L: case Z180_RLDR1L:
LOG(("Z180 '%s' RLDR1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RLDR1L_WMASK)); LOG(("Z180 '%s' RLDR1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RLDR1L_WMASK));
cpustate->IO_RLDR1L = (cpustate->IO_RLDR1L & ~Z180_RLDR1L_WMASK) | (data & Z180_RLDR1L_WMASK); cpustate->IO_RLDR1L = (cpustate->IO_RLDR1L & ~Z180_RLDR1L_WMASK) | (data & Z180_RLDR1L_WMASK);
break; break;
case Z180_RLDR1H: case Z180_RLDR1H:
LOG(("Z180 '%s' RLDR1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RLDR1H_WMASK)); LOG(("Z180 '%s' RLDR1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RLDR1H_WMASK));
cpustate->IO_RLDR1H = (cpustate->IO_RLDR1H & ~Z180_RLDR1H_WMASK) | (data & Z180_RLDR1H_WMASK); cpustate->IO_RLDR1H = (cpustate->IO_RLDR1H & ~Z180_RLDR1H_WMASK) | (data & Z180_RLDR1H_WMASK);
break; break;
case Z180_FRC: case Z180_FRC:
LOG(("Z180 '%s' FRC wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_FRC_WMASK)); LOG(("Z180 '%s' FRC wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_FRC_WMASK));
cpustate->IO_FRC = (cpustate->IO_FRC & ~Z180_FRC_WMASK) | (data & Z180_FRC_WMASK); cpustate->IO_FRC = (cpustate->IO_FRC & ~Z180_FRC_WMASK) | (data & Z180_FRC_WMASK);
break; break;
case Z180_IO19: case Z180_IO19:
LOG(("Z180 '%s' IO19 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO19_WMASK)); LOG(("Z180 '%s' IO19 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO19_WMASK));
cpustate->IO_IO19 = (cpustate->IO_IO19 & ~Z180_IO19_WMASK) | (data & Z180_IO19_WMASK); cpustate->IO_IO19 = (cpustate->IO_IO19 & ~Z180_IO19_WMASK) | (data & Z180_IO19_WMASK);
break; break;
case Z180_ASTC0L: case Z180_ASTC0L:
LOG(("Z180 '%s' ASTC0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASTC0L_WMASK)); LOG(("Z180 '%s' ASTC0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASTC0L_WMASK));
cpustate->IO_ASTC0L = (cpustate->IO_ASTC0L & ~Z180_ASTC0L_WMASK) | (data & Z180_ASTC0L_WMASK); cpustate->IO_ASTC0L = (cpustate->IO_ASTC0L & ~Z180_ASTC0L_WMASK) | (data & Z180_ASTC0L_WMASK);
break; break;
case Z180_ASTC0H: case Z180_ASTC0H:
LOG(("Z180 '%s' ASTC0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASTC0H_WMASK)); LOG(("Z180 '%s' ASTC0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASTC0H_WMASK));
cpustate->IO_ASTC0H = (cpustate->IO_ASTC0H & ~Z180_ASTC0H_WMASK) | (data & Z180_ASTC0H_WMASK); cpustate->IO_ASTC0H = (cpustate->IO_ASTC0H & ~Z180_ASTC0H_WMASK) | (data & Z180_ASTC0H_WMASK);
break; break;
case Z180_ASTC1L: case Z180_ASTC1L:
LOG(("Z180 '%s' ASTC1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASTC1L_WMASK)); LOG(("Z180 '%s' ASTC1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASTC1L_WMASK));
cpustate->IO_ASTC1L = (cpustate->IO_ASTC1L & ~Z180_ASTC1L_WMASK) | (data & Z180_ASTC1L_WMASK); cpustate->IO_ASTC1L = (cpustate->IO_ASTC1L & ~Z180_ASTC1L_WMASK) | (data & Z180_ASTC1L_WMASK);
break; break;
case Z180_ASTC1H: case Z180_ASTC1H:
LOG(("Z180 '%s' ASTC1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ASTC1H_WMASK)); LOG(("Z180 '%s' ASTC1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ASTC1H_WMASK));
cpustate->IO_ASTC1H = (cpustate->IO_ASTC1H & ~Z180_ASTC1H_WMASK) | (data & Z180_ASTC1H_WMASK); cpustate->IO_ASTC1H = (cpustate->IO_ASTC1H & ~Z180_ASTC1H_WMASK) | (data & Z180_ASTC1H_WMASK);
break; break;
case Z180_CMR: case Z180_CMR:
LOG(("Z180 '%s' CMR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CMR_WMASK)); LOG(("Z180 '%s' CMR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CMR_WMASK));
cpustate->IO_CMR = (cpustate->IO_CMR & ~Z180_CMR_WMASK) | (data & Z180_CMR_WMASK); cpustate->IO_CMR = (cpustate->IO_CMR & ~Z180_CMR_WMASK) | (data & Z180_CMR_WMASK);
break; break;
case Z180_CCR: case Z180_CCR:
LOG(("Z180 '%s' CCR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CCR_WMASK)); LOG(("Z180 '%s' CCR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CCR_WMASK));
cpustate->IO_CCR = (cpustate->IO_CCR & ~Z180_CCR_WMASK) | (data & Z180_CCR_WMASK); cpustate->IO_CCR = (cpustate->IO_CCR & ~Z180_CCR_WMASK) | (data & Z180_CCR_WMASK);
break; break;
case Z180_SAR0L: case Z180_SAR0L:
LOG(("Z180 '%s' SAR0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_SAR0L_WMASK)); LOG(("Z180 '%s' SAR0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_SAR0L_WMASK));
cpustate->IO_SAR0L = (cpustate->IO_SAR0L & ~Z180_SAR0L_WMASK) | (data & Z180_SAR0L_WMASK); cpustate->IO_SAR0L = (cpustate->IO_SAR0L & ~Z180_SAR0L_WMASK) | (data & Z180_SAR0L_WMASK);
break; break;
case Z180_SAR0H: case Z180_SAR0H:
LOG(("Z180 '%s' SAR0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_SAR0H_WMASK)); LOG(("Z180 '%s' SAR0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_SAR0H_WMASK));
cpustate->IO_SAR0H = (cpustate->IO_SAR0H & ~Z180_SAR0H_WMASK) | (data & Z180_SAR0H_WMASK); cpustate->IO_SAR0H = (cpustate->IO_SAR0H & ~Z180_SAR0H_WMASK) | (data & Z180_SAR0H_WMASK);
break; break;
case Z180_SAR0B: case Z180_SAR0B:
LOG(("Z180 '%s' SAR0B wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_SAR0B_WMASK)); LOG(("Z180 '%s' SAR0B wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_SAR0B_WMASK));
cpustate->IO_SAR0B = (cpustate->IO_SAR0B & ~Z180_SAR0B_WMASK) | (data & Z180_SAR0B_WMASK); cpustate->IO_SAR0B = (cpustate->IO_SAR0B & ~Z180_SAR0B_WMASK) | (data & Z180_SAR0B_WMASK);
break; break;
case Z180_DAR0L: case Z180_DAR0L:
LOG(("Z180 '%s' DAR0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DAR0L_WMASK)); LOG(("Z180 '%s' DAR0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DAR0L_WMASK));
cpustate->IO_DAR0L = (cpustate->IO_DAR0L & ~Z180_DAR0L_WMASK) | (data & Z180_DAR0L_WMASK); cpustate->IO_DAR0L = (cpustate->IO_DAR0L & ~Z180_DAR0L_WMASK) | (data & Z180_DAR0L_WMASK);
break; break;
case Z180_DAR0H: case Z180_DAR0H:
LOG(("Z180 '%s' DAR0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DAR0H_WMASK)); LOG(("Z180 '%s' DAR0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DAR0H_WMASK));
cpustate->IO_DAR0H = (cpustate->IO_DAR0H & ~Z180_DAR0H_WMASK) | (data & Z180_DAR0H_WMASK); cpustate->IO_DAR0H = (cpustate->IO_DAR0H & ~Z180_DAR0H_WMASK) | (data & Z180_DAR0H_WMASK);
break; break;
case Z180_DAR0B: case Z180_DAR0B:
LOG(("Z180 '%s' DAR0B wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DAR0B_WMASK)); LOG(("Z180 '%s' DAR0B wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DAR0B_WMASK));
cpustate->IO_DAR0B = (cpustate->IO_DAR0B & ~Z180_DAR0B_WMASK) | (data & Z180_DAR0B_WMASK); cpustate->IO_DAR0B = (cpustate->IO_DAR0B & ~Z180_DAR0B_WMASK) | (data & Z180_DAR0B_WMASK);
break; break;
case Z180_BCR0L: case Z180_BCR0L:
LOG(("Z180 '%s' BCR0L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_BCR0L_WMASK)); LOG(("Z180 '%s' BCR0L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_BCR0L_WMASK));
cpustate->IO_BCR0L = (cpustate->IO_BCR0L & ~Z180_BCR0L_WMASK) | (data & Z180_BCR0L_WMASK); cpustate->IO_BCR0L = (cpustate->IO_BCR0L & ~Z180_BCR0L_WMASK) | (data & Z180_BCR0L_WMASK);
break; break;
case Z180_BCR0H: case Z180_BCR0H:
LOG(("Z180 '%s' BCR0H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_BCR0H_WMASK)); LOG(("Z180 '%s' BCR0H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_BCR0H_WMASK));
cpustate->IO_BCR0H = (cpustate->IO_BCR0H & ~Z180_BCR0H_WMASK) | (data & Z180_BCR0H_WMASK); cpustate->IO_BCR0H = (cpustate->IO_BCR0H & ~Z180_BCR0H_WMASK) | (data & Z180_BCR0H_WMASK);
break; break;
case Z180_MAR1L: case Z180_MAR1L:
LOG(("Z180 '%s' MAR1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_MAR1L_WMASK)); LOG(("Z180 '%s' MAR1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_MAR1L_WMASK));
cpustate->IO_MAR1L = (cpustate->IO_MAR1L & ~Z180_MAR1L_WMASK) | (data & Z180_MAR1L_WMASK); cpustate->IO_MAR1L = (cpustate->IO_MAR1L & ~Z180_MAR1L_WMASK) | (data & Z180_MAR1L_WMASK);
break; break;
case Z180_MAR1H: case Z180_MAR1H:
LOG(("Z180 '%s' MAR1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_MAR1H_WMASK)); LOG(("Z180 '%s' MAR1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_MAR1H_WMASK));
cpustate->IO_MAR1H = (cpustate->IO_MAR1H & ~Z180_MAR1H_WMASK) | (data & Z180_MAR1H_WMASK); cpustate->IO_MAR1H = (cpustate->IO_MAR1H & ~Z180_MAR1H_WMASK) | (data & Z180_MAR1H_WMASK);
break; break;
case Z180_MAR1B: case Z180_MAR1B:
LOG(("Z180 '%s' MAR1B wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_MAR1B_WMASK)); LOG(("Z180 '%s' MAR1B wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_MAR1B_WMASK));
cpustate->IO_MAR1B = (cpustate->IO_MAR1B & ~Z180_MAR1B_WMASK) | (data & Z180_MAR1B_WMASK); cpustate->IO_MAR1B = (cpustate->IO_MAR1B & ~Z180_MAR1B_WMASK) | (data & Z180_MAR1B_WMASK);
break; break;
case Z180_IAR1L: case Z180_IAR1L:
LOG(("Z180 '%s' IAR1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IAR1L_WMASK)); LOG(("Z180 '%s' IAR1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IAR1L_WMASK));
cpustate->IO_IAR1L = (cpustate->IO_IAR1L & ~Z180_IAR1L_WMASK) | (data & Z180_IAR1L_WMASK); cpustate->IO_IAR1L = (cpustate->IO_IAR1L & ~Z180_IAR1L_WMASK) | (data & Z180_IAR1L_WMASK);
break; break;
case Z180_IAR1H: case Z180_IAR1H:
LOG(("Z180 '%s' IAR1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IAR1H_WMASK)); LOG(("Z180 '%s' IAR1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IAR1H_WMASK));
cpustate->IO_IAR1H = (cpustate->IO_IAR1H & ~Z180_IAR1H_WMASK) | (data & Z180_IAR1H_WMASK); cpustate->IO_IAR1H = (cpustate->IO_IAR1H & ~Z180_IAR1H_WMASK) | (data & Z180_IAR1H_WMASK);
break; break;
case Z180_IAR1B: case Z180_IAR1B:
LOG(("Z180 '%s' IAR1B wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IAR1B_WMASK)); LOG(("Z180 '%s' IAR1B wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IAR1B_WMASK));
cpustate->IO_IAR1B = (cpustate->IO_IAR1B & ~Z180_IAR1B_WMASK) | (data & Z180_IAR1B_WMASK); cpustate->IO_IAR1B = (cpustate->IO_IAR1B & ~Z180_IAR1B_WMASK) | (data & Z180_IAR1B_WMASK);
break; break;
case Z180_BCR1L: case Z180_BCR1L:
LOG(("Z180 '%s' BCR1L wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_BCR1L_WMASK)); LOG(("Z180 '%s' BCR1L wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_BCR1L_WMASK));
cpustate->IO_BCR1L = (cpustate->IO_BCR1L & ~Z180_BCR1L_WMASK) | (data & Z180_BCR1L_WMASK); cpustate->IO_BCR1L = (cpustate->IO_BCR1L & ~Z180_BCR1L_WMASK) | (data & Z180_BCR1L_WMASK);
break; break;
case Z180_BCR1H: case Z180_BCR1H:
LOG(("Z180 '%s' BCR1H wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_BCR1H_WMASK)); LOG(("Z180 '%s' BCR1H wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_BCR1H_WMASK));
cpustate->IO_BCR1H = (cpustate->IO_BCR1H & ~Z180_BCR1H_WMASK) | (data & Z180_BCR1H_WMASK); cpustate->IO_BCR1H = (cpustate->IO_BCR1H & ~Z180_BCR1H_WMASK) | (data & Z180_BCR1H_WMASK);
break; break;
case Z180_DSTAT: case Z180_DSTAT:
LOG(("Z180 '%s' DSTAT wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DSTAT_WMASK)); LOG(("Z180 '%s' DSTAT wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DSTAT_WMASK));
cpustate->IO_DSTAT = (cpustate->IO_DSTAT & ~Z180_DSTAT_WMASK) | (data & Z180_DSTAT_WMASK); cpustate->IO_DSTAT = (cpustate->IO_DSTAT & ~Z180_DSTAT_WMASK) | (data & Z180_DSTAT_WMASK);
if ((data & (Z180_DSTAT_DE1 | Z180_DSTAT_DWE1)) == Z180_DSTAT_DE1) if ((data & (Z180_DSTAT_DE1 | Z180_DSTAT_DWE1)) == Z180_DSTAT_DE1)
cpustate->IO_DSTAT |= Z180_DSTAT_DME; /* DMA enable */ cpustate->IO_DSTAT |= Z180_DSTAT_DME; /* DMA enable */
@ -1617,80 +1617,80 @@ static void z180_writecontrol(z180_state *cpustate, offs_t port, UINT8 data)
break; break;
case Z180_DMODE: case Z180_DMODE:
LOG(("Z180 '%s' DMODE wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DMODE_WMASK)); LOG(("Z180 '%s' DMODE wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DMODE_WMASK));
cpustate->IO_DMODE = (cpustate->IO_DMODE & ~Z180_DMODE_WMASK) | (data & Z180_DMODE_WMASK); cpustate->IO_DMODE = (cpustate->IO_DMODE & ~Z180_DMODE_WMASK) | (data & Z180_DMODE_WMASK);
break; break;
case Z180_DCNTL: case Z180_DCNTL:
LOG(("Z180 '%s' DCNTL wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_DCNTL_WMASK)); LOG(("Z180 '%s' DCNTL wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_DCNTL_WMASK));
cpustate->IO_DCNTL = (cpustate->IO_DCNTL & ~Z180_DCNTL_WMASK) | (data & Z180_DCNTL_WMASK); cpustate->IO_DCNTL = (cpustate->IO_DCNTL & ~Z180_DCNTL_WMASK) | (data & Z180_DCNTL_WMASK);
break; break;
case Z180_IL: case Z180_IL:
LOG(("Z180 '%s' IL wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IL_WMASK)); LOG(("Z180 '%s' IL wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IL_WMASK));
cpustate->IO_IL = (cpustate->IO_IL & ~Z180_IL_WMASK) | (data & Z180_IL_WMASK); cpustate->IO_IL = (cpustate->IO_IL & ~Z180_IL_WMASK) | (data & Z180_IL_WMASK);
break; break;
case Z180_ITC: case Z180_ITC:
LOG(("Z180 '%s' ITC wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_ITC_WMASK)); LOG(("Z180 '%s' ITC wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_ITC_WMASK));
cpustate->IO_ITC = (cpustate->IO_ITC & ~Z180_ITC_WMASK) | (data & Z180_ITC_WMASK); cpustate->IO_ITC = (cpustate->IO_ITC & ~Z180_ITC_WMASK) | (data & Z180_ITC_WMASK);
break; break;
case Z180_IO35: case Z180_IO35:
LOG(("Z180 '%s' IO35 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO35_WMASK)); LOG(("Z180 '%s' IO35 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO35_WMASK));
cpustate->IO_IO35 = (cpustate->IO_IO35 & ~Z180_IO35_WMASK) | (data & Z180_IO35_WMASK); cpustate->IO_IO35 = (cpustate->IO_IO35 & ~Z180_IO35_WMASK) | (data & Z180_IO35_WMASK);
break; break;
case Z180_RCR: case Z180_RCR:
LOG(("Z180 '%s' RCR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_RCR_WMASK)); LOG(("Z180 '%s' RCR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_RCR_WMASK));
cpustate->IO_RCR = (cpustate->IO_RCR & ~Z180_RCR_WMASK) | (data & Z180_RCR_WMASK); cpustate->IO_RCR = (cpustate->IO_RCR & ~Z180_RCR_WMASK) | (data & Z180_RCR_WMASK);
break; break;
case Z180_IO37: case Z180_IO37:
LOG(("Z180 '%s' IO37 wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO37_WMASK)); LOG(("Z180 '%s' IO37 wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO37_WMASK));
cpustate->IO_IO37 = (cpustate->IO_IO37 & ~Z180_IO37_WMASK) | (data & Z180_IO37_WMASK); cpustate->IO_IO37 = (cpustate->IO_IO37 & ~Z180_IO37_WMASK) | (data & Z180_IO37_WMASK);
break; break;
case Z180_CBR: case Z180_CBR:
LOG(("Z180 '%s' CBR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CBR_WMASK)); LOG(("Z180 '%s' CBR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CBR_WMASK));
cpustate->IO_CBR = (cpustate->IO_CBR & ~Z180_CBR_WMASK) | (data & Z180_CBR_WMASK); cpustate->IO_CBR = (cpustate->IO_CBR & ~Z180_CBR_WMASK) | (data & Z180_CBR_WMASK);
z180_mmu(cpustate); z180_mmu(cpustate);
break; break;
case Z180_BBR: case Z180_BBR:
LOG(("Z180 '%s' BBR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_BBR_WMASK)); LOG(("Z180 '%s' BBR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_BBR_WMASK));
cpustate->IO_BBR = (cpustate->IO_BBR & ~Z180_BBR_WMASK) | (data & Z180_BBR_WMASK); cpustate->IO_BBR = (cpustate->IO_BBR & ~Z180_BBR_WMASK) | (data & Z180_BBR_WMASK);
z180_mmu(cpustate); z180_mmu(cpustate);
break; break;
case Z180_CBAR: case Z180_CBAR:
LOG(("Z180 '%s' CBAR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_CBAR_WMASK)); LOG(("Z180 '%s' CBAR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_CBAR_WMASK));
cpustate->IO_CBAR = (cpustate->IO_CBAR & ~Z180_CBAR_WMASK) | (data & Z180_CBAR_WMASK); cpustate->IO_CBAR = (cpustate->IO_CBAR & ~Z180_CBAR_WMASK) | (data & Z180_CBAR_WMASK);
z180_mmu(cpustate); z180_mmu(cpustate);
break; break;
case Z180_IO3B: case Z180_IO3B:
LOG(("Z180 '%s' IO3B wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO3B_WMASK)); LOG(("Z180 '%s' IO3B wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO3B_WMASK));
cpustate->IO_IO3B = (cpustate->IO_IO3B & ~Z180_IO3B_WMASK) | (data & Z180_IO3B_WMASK); cpustate->IO_IO3B = (cpustate->IO_IO3B & ~Z180_IO3B_WMASK) | (data & Z180_IO3B_WMASK);
break; break;
case Z180_IO3C: case Z180_IO3C:
LOG(("Z180 '%s' IO3C wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO3C_WMASK)); LOG(("Z180 '%s' IO3C wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO3C_WMASK));
cpustate->IO_IO3C = (cpustate->IO_IO3C & ~Z180_IO3C_WMASK) | (data & Z180_IO3C_WMASK); cpustate->IO_IO3C = (cpustate->IO_IO3C & ~Z180_IO3C_WMASK) | (data & Z180_IO3C_WMASK);
break; break;
case Z180_IO3D: case Z180_IO3D:
LOG(("Z180 '%s' IO3D wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IO3D_WMASK)); LOG(("Z180 '%s' IO3D wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IO3D_WMASK));
cpustate->IO_IO3D = (cpustate->IO_IO3D & ~Z180_IO3D_WMASK) | (data & Z180_IO3D_WMASK); cpustate->IO_IO3D = (cpustate->IO_IO3D & ~Z180_IO3D_WMASK) | (data & Z180_IO3D_WMASK);
break; break;
case Z180_OMCR: case Z180_OMCR:
LOG(("Z180 '%s' OMCR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_OMCR_WMASK)); LOG(("Z180 '%s' OMCR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_OMCR_WMASK));
cpustate->IO_OMCR = (cpustate->IO_OMCR & ~Z180_OMCR_WMASK) | (data & Z180_OMCR_WMASK); cpustate->IO_OMCR = (cpustate->IO_OMCR & ~Z180_OMCR_WMASK) | (data & Z180_OMCR_WMASK);
break; break;
case Z180_IOCR: case Z180_IOCR:
LOG(("Z180 '%s' IOCR wr $%02x ($%02x)\n", cpustate->device->tag.cstr(), data, data & Z180_IOCR_WMASK)); LOG(("Z180 '%s' IOCR wr $%02x ($%02x)\n", cpustate->device->tag(), data, data & Z180_IOCR_WMASK));
cpustate->IO_IOCR = (cpustate->IO_IOCR & ~Z180_IOCR_WMASK) | (data & Z180_IOCR_WMASK); cpustate->IO_IOCR = (cpustate->IO_IOCR & ~Z180_IOCR_WMASK) | (data & Z180_IOCR_WMASK);
break; break;
} }
@ -1893,120 +1893,120 @@ static void z180_write_iolines(z180_state *cpustate, UINT32 data)
/* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */ /* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
if (changes & Z180_CKA0) if (changes & Z180_CKA0)
{ {
LOG(("Z180 '%s' CKA0 %d\n", cpustate->device->tag.cstr(), data & Z180_CKA0 ? 1 : 0)); LOG(("Z180 '%s' CKA0 %d\n", cpustate->device->tag(), data & Z180_CKA0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKA0) | (data & Z180_CKA0); cpustate->iol = (cpustate->iol & ~Z180_CKA0) | (data & Z180_CKA0);
} }
/* I/O asynchronous clock 1 (active high) or TEND1 (mux) */ /* I/O asynchronous clock 1 (active high) or TEND1 (mux) */
if (changes & Z180_CKA1) if (changes & Z180_CKA1)
{ {
LOG(("Z180 '%s' CKA1 %d\n", cpustate->device->tag.cstr(), data & Z180_CKA1 ? 1 : 0)); LOG(("Z180 '%s' CKA1 %d\n", cpustate->device->tag(), data & Z180_CKA1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKA1) | (data & Z180_CKA1); cpustate->iol = (cpustate->iol & ~Z180_CKA1) | (data & Z180_CKA1);
} }
/* I/O serial clock (active high) */ /* I/O serial clock (active high) */
if (changes & Z180_CKS) if (changes & Z180_CKS)
{ {
LOG(("Z180 '%s' CKS %d\n", cpustate->device->tag.cstr(), data & Z180_CKS ? 1 : 0)); LOG(("Z180 '%s' CKS %d\n", cpustate->device->tag(), data & Z180_CKS ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKS) | (data & Z180_CKS); cpustate->iol = (cpustate->iol & ~Z180_CKS) | (data & Z180_CKS);
} }
/* I clear to send 0 (active low) */ /* I clear to send 0 (active low) */
if (changes & Z180_CTS0) if (changes & Z180_CTS0)
{ {
LOG(("Z180 '%s' CTS0 %d\n", cpustate->device->tag.cstr(), data & Z180_CTS0 ? 1 : 0)); LOG(("Z180 '%s' CTS0 %d\n", cpustate->device->tag(), data & Z180_CTS0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CTS0) | (data & Z180_CTS0); cpustate->iol = (cpustate->iol & ~Z180_CTS0) | (data & Z180_CTS0);
} }
/* I clear to send 1 (active low) or RXS (mux) */ /* I clear to send 1 (active low) or RXS (mux) */
if (changes & Z180_CTS1) if (changes & Z180_CTS1)
{ {
LOG(("Z180 '%s' CTS1 %d\n", cpustate->device->tag.cstr(), data & Z180_CTS1 ? 1 : 0)); LOG(("Z180 '%s' CTS1 %d\n", cpustate->device->tag(), data & Z180_CTS1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CTS1) | (data & Z180_CTS1); cpustate->iol = (cpustate->iol & ~Z180_CTS1) | (data & Z180_CTS1);
} }
/* I data carrier detect (active low) */ /* I data carrier detect (active low) */
if (changes & Z180_DCD0) if (changes & Z180_DCD0)
{ {
LOG(("Z180 '%s' DCD0 %d\n", cpustate->device->tag.cstr(), data & Z180_DCD0 ? 1 : 0)); LOG(("Z180 '%s' DCD0 %d\n", cpustate->device->tag(), data & Z180_DCD0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DCD0) | (data & Z180_DCD0); cpustate->iol = (cpustate->iol & ~Z180_DCD0) | (data & Z180_DCD0);
} }
/* I data request DMA ch 0 (active low) or CKA0 (mux) */ /* I data request DMA ch 0 (active low) or CKA0 (mux) */
if (changes & Z180_DREQ0) if (changes & Z180_DREQ0)
{ {
LOG(("Z180 '%s' DREQ0 %d\n", cpustate->device->tag.cstr(), data & Z180_DREQ0 ? 1 : 0)); LOG(("Z180 '%s' DREQ0 %d\n", cpustate->device->tag(), data & Z180_DREQ0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DREQ0) | (data & Z180_DREQ0); cpustate->iol = (cpustate->iol & ~Z180_DREQ0) | (data & Z180_DREQ0);
} }
/* I data request DMA ch 1 (active low) */ /* I data request DMA ch 1 (active low) */
if (changes & Z180_DREQ1) if (changes & Z180_DREQ1)
{ {
LOG(("Z180 '%s' DREQ1 %d\n", cpustate->device->tag.cstr(), data & Z180_DREQ1 ? 1 : 0)); LOG(("Z180 '%s' DREQ1 %d\n", cpustate->device->tag(), data & Z180_DREQ1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DREQ1) | (data & Z180_DREQ1); cpustate->iol = (cpustate->iol & ~Z180_DREQ1) | (data & Z180_DREQ1);
} }
/* I asynchronous receive data 0 (active high) */ /* I asynchronous receive data 0 (active high) */
if (changes & Z180_RXA0) if (changes & Z180_RXA0)
{ {
LOG(("Z180 '%s' RXA0 %d\n", cpustate->device->tag.cstr(), data & Z180_RXA0 ? 1 : 0)); LOG(("Z180 '%s' RXA0 %d\n", cpustate->device->tag(), data & Z180_RXA0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_RXA0) | (data & Z180_RXA0); cpustate->iol = (cpustate->iol & ~Z180_RXA0) | (data & Z180_RXA0);
} }
/* I asynchronous receive data 1 (active high) */ /* I asynchronous receive data 1 (active high) */
if (changes & Z180_RXA1) if (changes & Z180_RXA1)
{ {
LOG(("Z180 '%s' RXA1 %d\n", cpustate->device->tag.cstr(), data & Z180_RXA1 ? 1 : 0)); LOG(("Z180 '%s' RXA1 %d\n", cpustate->device->tag(), data & Z180_RXA1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_RXA1) | (data & Z180_RXA1); cpustate->iol = (cpustate->iol & ~Z180_RXA1) | (data & Z180_RXA1);
} }
/* I clocked serial receive data (active high) or CTS1 (mux) */ /* I clocked serial receive data (active high) or CTS1 (mux) */
if (changes & Z180_RXS) if (changes & Z180_RXS)
{ {
LOG(("Z180 '%s' RXS %d\n", cpustate->device->tag.cstr(), data & Z180_RXS ? 1 : 0)); LOG(("Z180 '%s' RXS %d\n", cpustate->device->tag(), data & Z180_RXS ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_RXS) | (data & Z180_RXS); cpustate->iol = (cpustate->iol & ~Z180_RXS) | (data & Z180_RXS);
} }
/* O request to send (active low) */ /* O request to send (active low) */
if (changes & Z180_RTS0) if (changes & Z180_RTS0)
{ {
LOG(("Z180 '%s' RTS0 won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' RTS0 won't change output\n", cpustate->device->tag()));
} }
/* O transfer end 0 (active low) or CKA1 (mux) */ /* O transfer end 0 (active low) or CKA1 (mux) */
if (changes & Z180_TEND0) if (changes & Z180_TEND0)
{ {
LOG(("Z180 '%s' TEND0 won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TEND0 won't change output\n", cpustate->device->tag()));
} }
/* O transfer end 1 (active low) */ /* O transfer end 1 (active low) */
if (changes & Z180_TEND1) if (changes & Z180_TEND1)
{ {
LOG(("Z180 '%s' TEND1 won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TEND1 won't change output\n", cpustate->device->tag()));
} }
/* O transfer out (PRT channel, active low) or A18 (mux) */ /* O transfer out (PRT channel, active low) or A18 (mux) */
if (changes & Z180_A18_TOUT) if (changes & Z180_A18_TOUT)
{ {
LOG(("Z180 '%s' TOUT won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TOUT won't change output\n", cpustate->device->tag()));
} }
/* O asynchronous transmit data 0 (active high) */ /* O asynchronous transmit data 0 (active high) */
if (changes & Z180_TXA0) if (changes & Z180_TXA0)
{ {
LOG(("Z180 '%s' TXA0 won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TXA0 won't change output\n", cpustate->device->tag()));
} }
/* O asynchronous transmit data 1 (active high) */ /* O asynchronous transmit data 1 (active high) */
if (changes & Z180_TXA1) if (changes & Z180_TXA1)
{ {
LOG(("Z180 '%s' TXA1 won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TXA1 won't change output\n", cpustate->device->tag()));
} }
/* O clocked serial transmit data (active high) */ /* O clocked serial transmit data (active high) */
if (changes & Z180_TXS) if (changes & Z180_TXS)
{ {
LOG(("Z180 '%s' TXS won't change output\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' TXS won't change output\n", cpustate->device->tag()));
} }
} }
@ -2320,7 +2320,7 @@ static CPU_EXECUTE( z180 )
/* to just check here */ /* to just check here */
if (cpustate->nmi_pending) if (cpustate->nmi_pending)
{ {
LOG(("Z180 '%s' take NMI\n", cpustate->device->tag.cstr())); LOG(("Z180 '%s' take NMI\n", cpustate->device->tag()));
cpustate->_PPC = -1; /* there isn't a valid previous program counter */ cpustate->_PPC = -1; /* there isn't a valid previous program counter */
LEAVE_HALT(cpustate); /* Check if processor was halted */ LEAVE_HALT(cpustate); /* Check if processor was halted */
@ -2426,7 +2426,7 @@ static void set_irq_line(z180_state *cpustate, int irqline, int state)
} }
else else
{ {
LOG(("Z180 '%s' set_irq_line %d = %d\n",cpustate->device->tag.cstr() , irqline,state)); LOG(("Z180 '%s' set_irq_line %d = %d\n",cpustate->device->tag() , irqline,state));
/* update the IRQ state */ /* update the IRQ state */
cpustate->irq_state[irqline] = state; cpustate->irq_state[irqline] = state;

2
src/emu/cpu/z180/z180dd.c
View File

@ -1,6 +1,6 @@
OP(illegal,1) { OP(illegal,1) {
logerror("Z180 '%s' ill. opcode $%02x $%02x\n", logerror("Z180 '%s' ill. opcode $%02x $%02x\n",
cpustate->device->tag.cstr(), memory_decrypted_read_byte(cpustate->program, (cpustate->_PCD-1)&0xffff), memory_decrypted_read_byte(cpustate->program, cpustate->_PCD)); cpustate->device->tag(), memory_decrypted_read_byte(cpustate->program, (cpustate->_PCD-1)&0xffff), memory_decrypted_read_byte(cpustate->program, cpustate->_PCD));
} }
/********************************************************** /**********************************************************

2
src/emu/cpu/z180/z180ed.c
View File

@ -1,7 +1,7 @@
OP(illegal,2) OP(illegal,2)
{ {
logerror("Z180 '%s' ill. opcode $ed $%02x\n", logerror("Z180 '%s' ill. opcode $ed $%02x\n",
cpustate->device->tag.cstr(), memory_decrypted_read_byte(cpustate->program, (cpustate->_PCD-1)&0xffff)); cpustate->device->tag(), memory_decrypted_read_byte(cpustate->program, (cpustate->_PCD-1)&0xffff));
} }
/********************************************************** /**********************************************************

10
src/emu/cpu/z180/z180op.c
View File

@ -315,7 +315,7 @@ static void take_interrupt(z180_state *cpustate, int irq)
else else
irq_vector = (*cpustate->irq_callback)(cpustate->device, 0); irq_vector = (*cpustate->irq_callback)(cpustate->device, 0);
LOG(("Z180 '%s' single int. irq_vector $%02x\n", cpustate->device->tag.cstr(), irq_vector)); LOG(("Z180 '%s' single int. irq_vector $%02x\n", cpustate->device->tag(), irq_vector));
/* Interrupt mode 2. Call [cpustate->I:databyte] */ /* Interrupt mode 2. Call [cpustate->I:databyte] */
if( cpustate->IM == 2 ) if( cpustate->IM == 2 )
@ -323,7 +323,7 @@ static void take_interrupt(z180_state *cpustate, int irq)
irq_vector = (irq_vector & 0xff) + (cpustate->I << 8); irq_vector = (irq_vector & 0xff) + (cpustate->I << 8);
PUSH(cpustate, PC ); PUSH(cpustate, PC );
RM16( cpustate, irq_vector, &cpustate->PC ); RM16( cpustate, irq_vector, &cpustate->PC );
LOG(("Z180 '%s' IM2 [$%04x] = $%04x\n",cpustate->device->tag.cstr() , irq_vector, cpustate->_PCD)); LOG(("Z180 '%s' IM2 [$%04x] = $%04x\n",cpustate->device->tag() , irq_vector, cpustate->_PCD));
/* CALL opcode timing */ /* CALL opcode timing */
cpustate->icount -= cpustate->cc[Z180_TABLE_op][0xcd]; cpustate->icount -= cpustate->cc[Z180_TABLE_op][0xcd];
} }
@ -331,7 +331,7 @@ static void take_interrupt(z180_state *cpustate, int irq)
/* Interrupt mode 1. RST 38h */ /* Interrupt mode 1. RST 38h */
if( cpustate->IM == 1 ) if( cpustate->IM == 1 )
{ {
LOG(("Z180 '%s' IM1 $0038\n",cpustate->device->tag.cstr() )); LOG(("Z180 '%s' IM1 $0038\n",cpustate->device->tag() ));
PUSH(cpustate, PC ); PUSH(cpustate, PC );
cpustate->_PCD = 0x0038; cpustate->_PCD = 0x0038;
/* RST $38 + 'interrupt latency' cycles */ /* RST $38 + 'interrupt latency' cycles */
@ -342,7 +342,7 @@ static void take_interrupt(z180_state *cpustate, int irq)
/* Interrupt mode 0. We check for CALL and JP instructions, */ /* Interrupt mode 0. We check for CALL and JP instructions, */
/* if neither of these were found we assume a 1 byte opcode */ /* if neither of these were found we assume a 1 byte opcode */
/* was placed on the databus */ /* was placed on the databus */
LOG(("Z180 '%s' IM0 $%04x\n",cpustate->device->tag.cstr() , irq_vector)); LOG(("Z180 '%s' IM0 $%04x\n",cpustate->device->tag() , irq_vector));
switch (irq_vector & 0xff0000) switch (irq_vector & 0xff0000)
{ {
case 0xcd0000: /* call */ case 0xcd0000: /* call */
@ -371,7 +371,7 @@ static void take_interrupt(z180_state *cpustate, int irq)
irq_vector = (cpustate->I << 8) + (irq_vector & 0xff); irq_vector = (cpustate->I << 8) + (irq_vector & 0xff);
PUSH(cpustate, PC ); PUSH(cpustate, PC );
RM16( cpustate, irq_vector, &cpustate->PC ); RM16( cpustate, irq_vector, &cpustate->PC );
LOG(("Z180 '%s' INT%d [$%04x] = $%04x\n", cpustate->device->tag.cstr(), irq, irq_vector, cpustate->_PCD)); LOG(("Z180 '%s' INT%d [$%04x] = $%04x\n", cpustate->device->tag(), irq, irq_vector, cpustate->_PCD));
/* CALL opcode timing */ /* CALL opcode timing */
cpustate->icount -= cpustate->cc[Z180_TABLE_op][0xcd]; cpustate->icount -= cpustate->cc[Z180_TABLE_op][0xcd];
} }

2
src/emu/cpu/z180/z180ops.h
View File

@ -236,7 +236,7 @@ INLINE UINT32 ARG16(z180_state *cpustate)
* RETN * RETN
***************************************************************/ ***************************************************************/
#define RETN { \ #define RETN { \
LOG(("Z180 '%s' RETN IFF1:%d IFF2:%d\n", cpustate->device->tag.cstr(), cpustate->IFF1, cpustate->IFF2)); \ LOG(("Z180 '%s' RETN IFF1:%d IFF2:%d\n", cpustate->device->tag(), cpustate->IFF1, cpustate->IFF2)); \
POP(cpustate, PC); \ POP(cpustate, PC); \
cpustate->IFF1 = cpustate->IFF2; \ cpustate->IFF1 = cpustate->IFF2; \
} }

16
src/emu/cpu/z80/z80.c
View File

@ -824,7 +824,7 @@ INLINE UINT32 ARG16(z80_state *z80)
***************************************************************/ ***************************************************************/
#define RETN(Z) do { \ #define RETN(Z) do { \
LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \ LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \
(Z)->device->tag.cstr(), (Z)->iff1, (Z)->iff2)); \ (Z)->device->tag(), (Z)->iff1, (Z)->iff2)); \
POP((Z), pc); \ POP((Z), pc); \
(Z)->WZ = (Z)->PC; \ (Z)->WZ = (Z)->PC; \
(Z)->iff1 = (Z)->iff2; \ (Z)->iff1 = (Z)->iff2; \
@ -2093,7 +2093,7 @@ OP(xycb,ff) { z80->A = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /*
OP(illegal,1) { OP(illegal,1) {
logerror("Z80 '%s' ill. opcode $%02x $%02x\n", logerror("Z80 '%s' ill. opcode $%02x $%02x\n",
z80->device->tag.cstr(), memory_decrypted_read_byte(z80->program, (z80->PCD-1)&0xffff), memory_decrypted_read_byte(z80->program, z80->PCD)); z80->device->tag(), memory_decrypted_read_byte(z80->program, (z80->PCD-1)&0xffff), memory_decrypted_read_byte(z80->program, z80->PCD));
} }
/********************************************************** /**********************************************************
@ -2681,7 +2681,7 @@ OP(fd,ff) { illegal_1(z80); op_ff(z80); } /* DB FD */
OP(illegal,2) OP(illegal,2)
{ {
logerror("Z80 '%s' ill. opcode $ed $%02x\n", logerror("Z80 '%s' ill. opcode $ed $%02x\n",
z80->device->tag.cstr(), memory_decrypted_read_byte(z80->program, (z80->PCD-1)&0xffff)); z80->device->tag(), memory_decrypted_read_byte(z80->program, (z80->PCD-1)&0xffff));
} }
/********************************************************** /**********************************************************
@ -3289,7 +3289,7 @@ static void take_interrupt(z80_state *z80)
else else
irq_vector = (*z80->irq_callback)(z80->device, 0); irq_vector = (*z80->irq_callback)(z80->device, 0);
LOG(("Z80 '%s' single int. irq_vector $%02x\n", z80->device->tag.cstr(), irq_vector)); LOG(("Z80 '%s' single int. irq_vector $%02x\n", z80->device->tag(), irq_vector));
/* Interrupt mode 2. Call [i:databyte] */ /* Interrupt mode 2. Call [i:databyte] */
if( z80->im == 2 ) if( z80->im == 2 )
@ -3297,7 +3297,7 @@ static void take_interrupt(z80_state *z80)
irq_vector = (irq_vector & 0xff) | (z80->i << 8); irq_vector = (irq_vector & 0xff) | (z80->i << 8);
PUSH(z80, pc); PUSH(z80, pc);
RM16(z80, irq_vector, &z80->pc); RM16(z80, irq_vector, &z80->pc);
LOG(("Z80 '%s' IM2 [$%04x] = $%04x\n", z80->device->tag.cstr(), irq_vector, z80->PCD)); LOG(("Z80 '%s' IM2 [$%04x] = $%04x\n", z80->device->tag(), irq_vector, z80->PCD));
/* CALL opcode timing + 'interrupt latency' cycles */ /* CALL opcode timing + 'interrupt latency' cycles */
z80->icount -= z80->cc_op[0xcd] + z80->cc_ex[0xff]; z80->icount -= z80->cc_op[0xcd] + z80->cc_ex[0xff];
} }
@ -3305,7 +3305,7 @@ static void take_interrupt(z80_state *z80)
/* Interrupt mode 1. RST 38h */ /* Interrupt mode 1. RST 38h */
if( z80->im == 1 ) if( z80->im == 1 )
{ {
LOG(("Z80 '%s' IM1 $0038\n", z80->device->tag.cstr())); LOG(("Z80 '%s' IM1 $0038\n", z80->device->tag()));
PUSH(z80, pc); PUSH(z80, pc);
z80->PCD = 0x0038; z80->PCD = 0x0038;
/* RST $38 + 'interrupt latency' cycles */ /* RST $38 + 'interrupt latency' cycles */
@ -3316,7 +3316,7 @@ static void take_interrupt(z80_state *z80)
/* Interrupt mode 0. We check for CALL and JP instructions, */ /* Interrupt mode 0. We check for CALL and JP instructions, */
/* if neither of these were found we assume a 1 byte opcode */ /* if neither of these were found we assume a 1 byte opcode */
/* was placed on the databus */ /* was placed on the databus */
LOG(("Z80 '%s' IM0 $%04x\n", z80->device->tag.cstr(), irq_vector)); LOG(("Z80 '%s' IM0 $%04x\n", z80->device->tag(), irq_vector));
/* check for nop */ /* check for nop */
if (irq_vector != 0x00) if (irq_vector != 0x00)
@ -3530,7 +3530,7 @@ static CPU_EXECUTE( z80 )
/* to just check here */ /* to just check here */
if (z80->nmi_pending) if (z80->nmi_pending)
{ {
LOG(("Z80 '%s' take NMI\n", z80->device->tag.cstr())); LOG(("Z80 '%s' take NMI\n", z80->device->tag()));
z80->PRVPC = -1; /* there isn't a valid previous program counter */ z80->PRVPC = -1; /* there isn't a valid previous program counter */
LEAVE_HALT(z80); /* Check if processor was halted */ LEAVE_HALT(z80); /* Check if processor was halted */

14
src/emu/cpu/z8000/z8000.c
View File

@ -233,7 +233,7 @@ INLINE void set_irq(z8000_state *cpustate, int type)
cpustate->irq_req = type; cpustate->irq_req = type;
break; break;
case Z8000_SYSCALL >> 8: case Z8000_SYSCALL >> 8:
LOG(("Z8K '%s' SYSCALL $%02x\n", cpustate->device->tag.cstr(), type & 0xff)); LOG(("Z8K '%s' SYSCALL $%02x\n", cpustate->device->tag(), type & 0xff));
cpustate->irq_req = type; cpustate->irq_req = type;
break; break;
default: default:
@ -271,7 +271,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->irq_srv = cpustate->irq_req; cpustate->irq_srv = cpustate->irq_req;
cpustate->irq_req &= ~Z8000_TRAP; cpustate->irq_req &= ~Z8000_TRAP;
cpustate->pc = TRAP; cpustate->pc = TRAP;
LOG(("Z8K '%s' trap $%04x\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Z8K '%s' trap $%04x\n", cpustate->device->tag(), cpustate->pc));
} }
else else
if (cpustate->irq_req & Z8000_SYSCALL) if (cpustate->irq_req & Z8000_SYSCALL)
@ -283,7 +283,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->irq_srv = cpustate->irq_req; cpustate->irq_srv = cpustate->irq_req;
cpustate->irq_req &= ~Z8000_SYSCALL; cpustate->irq_req &= ~Z8000_SYSCALL;
cpustate->pc = SYSCALL; cpustate->pc = SYSCALL;
LOG(("Z8K '%s' syscall $%04x\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Z8K '%s' syscall $%04x\n", cpustate->device->tag(), cpustate->pc));
} }
else else
if (cpustate->irq_req & Z8000_SEGTRAP) if (cpustate->irq_req & Z8000_SEGTRAP)
@ -295,7 +295,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->irq_srv = cpustate->irq_req; cpustate->irq_srv = cpustate->irq_req;
cpustate->irq_req &= ~Z8000_SEGTRAP; cpustate->irq_req &= ~Z8000_SEGTRAP;
cpustate->pc = SEGTRAP; cpustate->pc = SEGTRAP;
LOG(("Z8K '%s' segtrap $%04x\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Z8K '%s' segtrap $%04x\n", cpustate->device->tag(), cpustate->pc));
} }
else else
if (cpustate->irq_req & Z8000_NMI) if (cpustate->irq_req & Z8000_NMI)
@ -310,7 +310,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->irq_req &= ~Z8000_NMI; cpustate->irq_req &= ~Z8000_NMI;
CHANGE_FCW(cpustate, fcw); CHANGE_FCW(cpustate, fcw);
cpustate->pc = NMI; cpustate->pc = NMI;
LOG(("Z8K '%s' NMI $%04x\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Z8K '%s' NMI $%04x\n", cpustate->device->tag(), cpustate->pc));
} }
else else
if ((cpustate->irq_req & Z8000_NVI) && (cpustate->fcw & F_NVIE)) if ((cpustate->irq_req & Z8000_NVI) && (cpustate->fcw & F_NVIE))
@ -324,7 +324,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->pc = RDMEM_W(cpustate, NVI + 2); cpustate->pc = RDMEM_W(cpustate, NVI + 2);
cpustate->irq_req &= ~Z8000_NVI; cpustate->irq_req &= ~Z8000_NVI;
CHANGE_FCW(cpustate, fcw); CHANGE_FCW(cpustate, fcw);
LOG(("Z8K '%s' NVI $%04x\n", cpustate->device->tag.cstr(), cpustate->pc)); LOG(("Z8K '%s' NVI $%04x\n", cpustate->device->tag(), cpustate->pc));
} }
else else
if ((cpustate->irq_req & Z8000_VI) && (cpustate->fcw & F_VIE)) if ((cpustate->irq_req & Z8000_VI) && (cpustate->fcw & F_VIE))
@ -338,7 +338,7 @@ INLINE void Interrupt(z8000_state *cpustate)
cpustate->pc = RDMEM_W(cpustate, VEC00 + 2 * (cpustate->irq_req & 0xff)); cpustate->pc = RDMEM_W(cpustate, VEC00 + 2 * (cpustate->irq_req & 0xff));
cpustate->irq_req &= ~Z8000_VI; cpustate->irq_req &= ~Z8000_VI;
CHANGE_FCW(cpustate, fcw); CHANGE_FCW(cpustate, fcw);
LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag.cstr(), cpustate->irq_vec, VEC00 + VEC00 + 2 * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc)); LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag(), cpustate->irq_vec, VEC00 + VEC00 + 2 * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc));
} }
} }

30
src/emu/cpu/z8000/z8000ops.c
View File

@ -1530,7 +1530,7 @@ static void Z0D_ddN0_1001_imm16(z8000_state *cpustate)
static void Z0E_imm8(z8000_state *cpustate) static void Z0E_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext0e $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: ext0e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -1544,7 +1544,7 @@ static void Z0E_imm8(z8000_state *cpustate)
static void Z0F_imm8(z8000_state *cpustate) static void Z0F_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext0f $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: ext0f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -2272,7 +2272,7 @@ static void Z36_0000_0000(z8000_state *cpustate)
static void Z36_imm8(z8000_state *cpustate) static void Z36_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd36 $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd36 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -2310,7 +2310,7 @@ static void Z37_ddN0_ssss_imm16(z8000_state *cpustate)
static void Z38_imm8(z8000_state *cpustate) static void Z38_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd38 $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd38 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -4347,7 +4347,7 @@ static void Z77_ddN0_ssss_0000_xxxx_0000_0000(z8000_state *cpustate)
static void Z78_imm8(z8000_state *cpustate) static void Z78_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd78 $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd78 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -4404,7 +4404,7 @@ static void Z7B_0000_0000(z8000_state *cpustate)
cpustate->pc = POPW(cpustate, SP); /* get cpustate->pc */ cpustate->pc = POPW(cpustate, SP); /* get cpustate->pc */
cpustate->irq_srv &= ~tag; /* remove IRQ serviced flag */ cpustate->irq_srv &= ~tag; /* remove IRQ serviced flag */
CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */ CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
LOG(("Z8K '%s' IRET tag $%04x, fcw $%04x, pc $%04x\n", cpustate->device->tag.cstr(), tag, fcw, cpustate->pc)); LOG(("Z8K '%s' IRET tag $%04x, fcw $%04x, pc $%04x\n", cpustate->device->tag(), tag, fcw, cpustate->pc));
} }
/****************************************** /******************************************
@ -4489,7 +4489,7 @@ static void Z7D_dddd_0ccc(z8000_state *cpustate)
cpustate->RW(dst) = cpustate->nsp; cpustate->RW(dst) = cpustate->nsp;
break; break;
default: default:
LOG(("Z8K '%s' LDCTL R%d,%d\n", cpustate->device->tag.cstr(), dst, imm3)); LOG(("Z8K '%s' LDCTL R%d,%d\n", cpustate->device->tag(), dst, imm3));
} }
} }
@ -4519,7 +4519,7 @@ static void Z7D_ssss_1ccc(z8000_state *cpustate)
cpustate->nsp = cpustate->RW(src); cpustate->nsp = cpustate->RW(src);
break; break;
default: default:
LOG(("Z8K '%s' LDCTL %d,R%d\n", cpustate->device->tag.cstr(), imm3, src)); LOG(("Z8K '%s' LDCTL %d,R%d\n", cpustate->device->tag(), imm3, src));
} }
} }
@ -4530,7 +4530,7 @@ static void Z7D_ssss_1ccc(z8000_state *cpustate)
static void Z7E_imm8(z8000_state *cpustate) static void Z7E_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd7e $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd7e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -4826,7 +4826,7 @@ static void Z8D_imm4_0101(z8000_state *cpustate)
static void Z8E_imm8(z8000_state *cpustate) static void Z8E_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext8e $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: ext8e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -4840,7 +4840,7 @@ static void Z8E_imm8(z8000_state *cpustate)
static void Z8F_imm8(z8000_state *cpustate) static void Z8F_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext8f $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: ext8f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -4998,7 +4998,7 @@ static void Z9C_dddd_1000(z8000_state *cpustate)
static void Z9D_imm8(z8000_state *cpustate) static void Z9D_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd9d $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd9d $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -5039,7 +5039,7 @@ static void Z9E_0000_cccc(z8000_state *cpustate)
static void Z9F_imm8(z8000_state *cpustate) static void Z9F_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd9f $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvd9f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -5740,7 +5740,7 @@ static void ZB8_ddN0_1100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
static void ZB9_imm8(z8000_state *cpustate) static void ZB9_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvdb9 $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvdb9 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;
@ -6398,7 +6398,7 @@ static void ZBE_aaaa_bbbb(z8000_state *cpustate)
static void ZBF_imm8(z8000_state *cpustate) static void ZBF_imm8(z8000_state *cpustate)
{ {
GET_IMM8(0); GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvdbf $%02x\n", cpustate->device->tag.cstr(), cpustate->pc, imm8)); LOG(("Z8K '%s' %04x: rsvdbf $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
if (cpustate->fcw & F_EPU) { if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */ /* Z8001 EPU code goes here */
(void)imm8; (void)imm8;

24
src/emu/cpuexec.c
View File

@ -312,7 +312,7 @@ void cpuexec_timeslice(running_machine *machine)
{ {
/* compute how many cycles we want to execute */ /* compute how many cycles we want to execute */
ran = classdata->cycles_running = divu_64x32((UINT64)delta >> classdata->divshift, classdata->divisor); ran = classdata->cycles_running = divu_64x32((UINT64)delta >> classdata->divshift, classdata->divisor);
LOG((" cpu '%s': %d cycles\n", classdata->device->tag.cstr(), classdata->cycles_running)); LOG((" cpu '%s': %d cycles\n", classdata->device->tag(), classdata->cycles_running));
/* if we're not suspended, actually execute */ /* if we're not suspended, actually execute */
if (classdata->suspend == 0) if (classdata->suspend == 0)
@ -423,7 +423,7 @@ const char *cpuexec_describe_context(running_machine *machine)
if (executingcpu != NULL) if (executingcpu != NULL)
{ {
const address_space *space = cpu_get_address_space(executingcpu, ADDRESS_SPACE_PROGRAM); const address_space *space = cpu_get_address_space(executingcpu, ADDRESS_SPACE_PROGRAM);
sprintf(global->statebuf, "'%s' (%s)", executingcpu->tag.cstr(), core_i64_hex_format(cpu_get_pc(executingcpu), space->logaddrchars)); sprintf(global->statebuf, "'%s' (%s)", executingcpu->tag(), core_i64_hex_format(cpu_get_pc(executingcpu), space->logaddrchars));
} }
else else
strcpy(global->statebuf, "(no context)"); strcpy(global->statebuf, "(no context)");
@ -530,9 +530,9 @@ static DEVICE_START( cpu )
/* if no state registered for saving, we can't save */ /* if no state registered for saving, we can't save */
if (num_regs == 0) if (num_regs == 0)
{ {
logerror("CPU '%s' did not register any state to save!\n", device->tag.cstr()); logerror("CPU '%s' did not register any state to save!\n", device->tag());
if (device->machine->gamedrv->flags & GAME_SUPPORTS_SAVE) if (device->machine->gamedrv->flags & GAME_SUPPORTS_SAVE)
fatalerror("CPU '%s' did not register any state to save!", device->tag.cstr()); fatalerror("CPU '%s' did not register any state to save!", device->tag());
} }
/* register some internal states as well */ /* register some internal states as well */
@ -1212,7 +1212,7 @@ void cpu_set_input_line_vector(running_device *device, int line, int vector)
classdata->input[line].vector = vector; classdata->input[line].vector = vector;
return; return;
} }
LOG(("cpu_set_input_line_vector CPU '%s' line %d > max input lines\n", device->tag.cstr(), line)); LOG(("cpu_set_input_line_vector CPU '%s' line %d > max input lines\n", device->tag(), line));
} }
@ -1228,7 +1228,7 @@ void cpu_set_input_line_and_vector(running_device *device, int line, int state,
/* catch errors where people use PULSE_LINE for CPUs that don't support it */ /* catch errors where people use PULSE_LINE for CPUs that don't support it */
if (state == PULSE_LINE && line != INPUT_LINE_NMI && line != INPUT_LINE_RESET) if (state == PULSE_LINE && line != INPUT_LINE_NMI && line != INPUT_LINE_RESET)
fatalerror("CPU %s: PULSE_LINE can only be used for NMI and RESET lines\n", device->tag.cstr()); fatalerror("CPU %s: PULSE_LINE can only be used for NMI and RESET lines\n", device->tag());
if (line >= 0 && line < MAX_INPUT_LINES) if (line >= 0 && line < MAX_INPUT_LINES)
{ {
@ -1236,7 +1236,7 @@ void cpu_set_input_line_and_vector(running_device *device, int line, int state,
INT32 input_event = (state & 0xff) | (vector << 8); INT32 input_event = (state & 0xff) | (vector << 8);
int event_index = inputline->qindex++; int event_index = inputline->qindex++;
LOG(("cpu_set_input_line_and_vector('%s',%d,%d,%02x)\n", device->tag.cstr(), line, state, vector)); LOG(("cpu_set_input_line_and_vector('%s',%d,%d,%02x)\n", device->tag(), line, state, vector));
/* if we're full of events, flush the queue and log a message */ /* if we're full of events, flush the queue and log a message */
if (event_index >= ARRAY_LENGTH(inputline->queue)) if (event_index >= ARRAY_LENGTH(inputline->queue))
@ -1244,7 +1244,7 @@ void cpu_set_input_line_and_vector(running_device *device, int line, int state,
inputline->qindex--; inputline->qindex--;
empty_event_queue(device->machine, (void *)device, line); empty_event_queue(device->machine, (void *)device, line);
event_index = inputline->qindex++; event_index = inputline->qindex++;
logerror("Exceeded pending input line event queue on CPU '%s'!\n", device->tag.cstr()); logerror("Exceeded pending input line event queue on CPU '%s'!\n", device->tag());
} }
/* enqueue the event */ /* enqueue the event */
@ -1391,7 +1391,7 @@ static void on_vblank(running_device *device, void *param, int vblank_state)
/* for new style declaration, we need to compare the tags */ /* for new style declaration, we need to compare the tags */
else if (config->vblank_interrupt_screen != NULL) else if (config->vblank_interrupt_screen != NULL)
cpu_interested = (strcmp(config->vblank_interrupt_screen, device->tag) == 0); cpu_interested = (strcmp(config->vblank_interrupt_screen, device->tag()) == 0);
/* no VBLANK interrupt, not interested */ /* no VBLANK interrupt, not interested */
else else
@ -1541,7 +1541,7 @@ static TIMER_CALLBACK( empty_event_queue )
break; break;
default: default:
logerror("empty_event_queue cpu '%s', line %d, unknown state %d\n", device->tag.cstr(), param, state); logerror("empty_event_queue cpu '%s', line %d, unknown state %d\n", device->tag(), param, state);
break; break;
} }
@ -1568,12 +1568,12 @@ static IRQ_CALLBACK( standard_irq_callback )
cpu_input_data *inputline = &classdata->input[irqline]; cpu_input_data *inputline = &classdata->input[irqline];
int vector = inputline->curvector; int vector = inputline->curvector;
LOG(("standard_irq_callback('%s', %d) $%04x\n", device->tag.cstr(), irqline, vector)); LOG(("standard_irq_callback('%s', %d) $%04x\n", device->tag(), irqline, vector));
/* if the IRQ state is HOLD_LINE, clear it */ /* if the IRQ state is HOLD_LINE, clear it */
if (inputline->curstate == HOLD_LINE) if (inputline->curstate == HOLD_LINE)
{ {
LOG(("->set_irq_line('%s',%d,%d)\n", device->tag.cstr(), irqline, CLEAR_LINE)); LOG(("->set_irq_line('%s',%d,%d)\n", device->tag(), irqline, CLEAR_LINE));
cpu_set_info(device, CPUINFO_INT_INPUT_STATE + irqline, CLEAR_LINE); cpu_set_info(device, CPUINFO_INT_INPUT_STATE + irqline, CLEAR_LINE);
inputline->curstate = CLEAR_LINE; inputline->curstate = CLEAR_LINE;
} }

2
src/emu/cpuintrf.h
View File

@ -212,7 +212,7 @@ enum
#define cpu_count(config) (config)->devicelist.count(CPU) #define cpu_count(config) (config)->devicelist.count(CPU)
#define cpu_first(config) (config)->devicelist.first(CPU) #define cpu_first(config) (config)->devicelist.first(CPU)
#define cpu_next(previous) (previous)->typenext() #define cpu_next(previous) (previous)->typenext()
#define cpu_get_index(cpu) (cpu)->machine->devicelist.index(CPU, (cpu)->tag) #define cpu_get_index(cpu) (cpu)->machine->devicelist.index(CPU, (cpu)->tag())
/* IRQ callback to be called by CPU cores when an IRQ is actually taken */ /* IRQ callback to be called by CPU cores when an IRQ is actually taken */

32
src/emu/debug/debugcmd.c
View File

@ -571,7 +571,7 @@ int debug_command_parameter_cpu_space(running_machine *machine, const char *para
*result = cpu_get_address_space(cpu, spacenum); *result = cpu_get_address_space(cpu, spacenum);
if (*result == NULL) if (*result == NULL)
{ {
debug_console_printf(machine, "No %s memory space found for CPU '%s'\n", address_space_names[spacenum], cpu->tag.cstr()); debug_console_printf(machine, "No %s memory space found for CPU '%s'\n", address_space_names[spacenum], cpu->tag());
return FALSE; return FALSE;
} }
return TRUE; return TRUE;
@ -987,7 +987,7 @@ static void execute_focus(running_machine *machine, int ref, int params, const c
for (scancpu = machine->firstcpu; scancpu != NULL; scancpu = cpu_next(scancpu)) for (scancpu = machine->firstcpu; scancpu != NULL; scancpu = cpu_next(scancpu))
if (scancpu != cpu) if (scancpu != cpu)
debug_cpu_ignore_cpu(scancpu, 1); debug_cpu_ignore_cpu(scancpu, 1);
debug_console_printf(machine, "Now focused on CPU '%s'\n", cpu->tag.cstr()); debug_console_printf(machine, "Now focused on CPU '%s'\n", cpu->tag());
} }
@ -1015,9 +1015,9 @@ static void execute_ignore(running_machine *machine, int ref, int params, const
if ((cpuinfo->flags & DEBUG_FLAG_OBSERVING) == 0) if ((cpuinfo->flags & DEBUG_FLAG_OBSERVING) == 0)
{ {
if (buflen == 0) if (buflen == 0)
buflen += sprintf(&buffer[buflen], "Currently ignoring CPU '%s'", cpu->tag.cstr()); buflen += sprintf(&buffer[buflen], "Currently ignoring CPU '%s'", cpu->tag());
else else
buflen += sprintf(&buffer[buflen], ", '%s'", cpu->tag.cstr()); buflen += sprintf(&buffer[buflen], ", '%s'", cpu->tag());
} }
} }
@ -1049,7 +1049,7 @@ static void execute_ignore(running_machine *machine, int ref, int params, const
} }
debug_cpu_ignore_cpu(cpuwhich[paramnum], 1); debug_cpu_ignore_cpu(cpuwhich[paramnum], 1);
debug_console_printf(machine, "Now ignoring CPU '%s'\n", cpuwhich[paramnum]->tag.cstr()); debug_console_printf(machine, "Now ignoring CPU '%s'\n", cpuwhich[paramnum]->tag());
} }
} }
} }
@ -1079,9 +1079,9 @@ static void execute_observe(running_machine *machine, int ref, int params, const
if ((cpuinfo->flags & DEBUG_FLAG_OBSERVING) != 0) if ((cpuinfo->flags & DEBUG_FLAG_OBSERVING) != 0)
{ {
if (buflen == 0) if (buflen == 0)
buflen += sprintf(&buffer[buflen], "Currently observing CPU '%s'", cpu->tag.cstr()); buflen += sprintf(&buffer[buflen], "Currently observing CPU '%s'", cpu->tag());
else else
buflen += sprintf(&buffer[buflen], ", '%s'", cpu->tag.cstr()); buflen += sprintf(&buffer[buflen], ", '%s'", cpu->tag());
} }
} }
@ -1103,7 +1103,7 @@ static void execute_observe(running_machine *machine, int ref, int params, const
for (paramnum = 0; paramnum < params; paramnum++) for (paramnum = 0; paramnum < params; paramnum++)
{ {
debug_cpu_ignore_cpu(cpuwhich[paramnum], 0); debug_cpu_ignore_cpu(cpuwhich[paramnum], 0);
debug_console_printf(machine, "Now observing CPU '%s'\n", cpuwhich[paramnum]->tag.cstr()); debug_console_printf(machine, "Now observing CPU '%s'\n", cpuwhich[paramnum]->tag());
} }
} }
} }
@ -1309,7 +1309,7 @@ static void execute_bplist(running_machine *machine, int ref, int params, const
{ {
debug_cpu_breakpoint *bp; debug_cpu_breakpoint *bp;
debug_console_printf(machine, "CPU '%s' breakpoints:\n", cpu->tag.cstr()); debug_console_printf(machine, "CPU '%s' breakpoints:\n", cpu->tag());
/* loop over the breakpoints */ /* loop over the breakpoints */
for (bp = cpuinfo->bplist; bp != NULL; bp = bp->next) for (bp = cpuinfo->bplist; bp != NULL; bp = bp->next)
@ -1497,7 +1497,7 @@ static void execute_wplist(running_machine *machine, int ref, int params, const
const address_space *space = cpu_get_address_space(cpu, spacenum); const address_space *space = cpu_get_address_space(cpu, spacenum);
debug_cpu_watchpoint *wp; debug_cpu_watchpoint *wp;
debug_console_printf(machine, "CPU '%s' %s space watchpoints:\n", cpu->tag.cstr(), address_space_names[spacenum]); debug_console_printf(machine, "CPU '%s' %s space watchpoints:\n", cpu->tag(), address_space_names[spacenum]);
/* loop over the watchpoints */ /* loop over the watchpoints */
for (wp = cpuinfo->wplist[spacenum]; wp != NULL; wp = wp->next) for (wp = cpuinfo->wplist[spacenum]; wp != NULL; wp = wp->next)
@ -1546,7 +1546,7 @@ static void execute_hotspot(running_machine *machine, int ref, int params, const
if (cpuinfo->hotspots != NULL) if (cpuinfo->hotspots != NULL)
{ {
debug_cpu_hotspot_track(cpuinfo->device, 0, 0); debug_cpu_hotspot_track(cpuinfo->device, 0, 0);
debug_console_printf(machine, "Cleared hotspot tracking on CPU '%s'\n", cpu->tag.cstr()); debug_console_printf(machine, "Cleared hotspot tracking on CPU '%s'\n", cpu->tag());
cleared = TRUE; cleared = TRUE;
} }
} }
@ -1568,7 +1568,7 @@ static void execute_hotspot(running_machine *machine, int ref, int params, const
/* attempt to install */ /* attempt to install */
if (debug_cpu_hotspot_track(cpu, count, threshhold)) if (debug_cpu_hotspot_track(cpu, count, threshhold))
debug_console_printf(machine, "Now tracking hotspots on CPU '%s' using %d slots with a threshhold of %d\n", cpu->tag.cstr(), (int)count, (int)threshhold); debug_console_printf(machine, "Now tracking hotspots on CPU '%s' using %d slots with a threshhold of %d\n", cpu->tag(), (int)count, (int)threshhold);
else else
debug_console_printf(machine, "Error setting up the hotspot tracking\n"); debug_console_printf(machine, "Error setting up the hotspot tracking\n");
} }
@ -2100,7 +2100,7 @@ static void execute_cheatlist(running_machine *machine, int ref, int params, con
active_cheat++; active_cheat++;
fprintf(f, " <cheat desc=\"Possibility %d : %s (%s)\">\n", active_cheat, core_i64_hex_format(address, space->logaddrchars), core_i64_hex_format(value, cheat.width * 2)); fprintf(f, " <cheat desc=\"Possibility %d : %s (%s)\">\n", active_cheat, core_i64_hex_format(address, space->logaddrchars), core_i64_hex_format(value, cheat.width * 2));
fprintf(f, " <script state=\"run\">\n"); fprintf(f, " <script state=\"run\">\n");
fprintf(f, " <action>%s.p%c%c@%s=%s</action>\n", cpu->tag.cstr(), spaceletter, sizeletter, core_i64_hex_format(address, space->logaddrchars), core_i64_hex_format(cheat_byte_swap(&cheat, cheat.cheatmap[cheatindex].first_value) & sizemask, cheat.width * 2)); fprintf(f, " <action>%s.p%c%c@%s=%s</action>\n", cpu->tag(), spaceletter, sizeletter, core_i64_hex_format(address, space->logaddrchars), core_i64_hex_format(cheat_byte_swap(&cheat, cheat.cheatmap[cheatindex].first_value) & sizemask, cheat.width * 2));
fprintf(f, " </script>\n"); fprintf(f, " </script>\n");
fprintf(f, " </cheat>\n\n"); fprintf(f, " </cheat>\n\n");
} }
@ -2399,9 +2399,9 @@ static void execute_trace_internal(running_machine *machine, int ref, int params
/* do it */ /* do it */
debug_cpu_trace(cpu, f, trace_over, action); debug_cpu_trace(cpu, f, trace_over, action);
if (f) if (f)
debug_console_printf(machine, "Tracing CPU '%s' to file %s\n", cpu->tag.cstr(), filename); debug_console_printf(machine, "Tracing CPU '%s' to file %s\n", cpu->tag(), filename);
else else
debug_console_printf(machine, "Stopped tracing on CPU '%s'\n", cpu->tag.cstr()); debug_console_printf(machine, "Stopped tracing on CPU '%s'\n", cpu->tag());
} }
@ -2622,7 +2622,7 @@ static void execute_symlist(running_machine *machine, int ref, int params, const
if (cpu != NULL) if (cpu != NULL)
{ {
symtable = debug_cpu_get_symtable(cpu); symtable = debug_cpu_get_symtable(cpu);
debug_console_printf(machine, "CPU '%s' symbols:\n", cpu->tag.cstr()); debug_console_printf(machine, "CPU '%s' symbols:\n", cpu->tag());
} }
else else
{ {

2
src/emu/debug/debugcmt.c
View File

@ -393,7 +393,7 @@ int debug_comment_save(running_machine *machine)
xml_data_node *curnode = xml_add_child(systemnode, "cpu", NULL); xml_data_node *curnode = xml_add_child(systemnode, "cpu", NULL);
if (curnode == NULL) if (curnode == NULL)
goto error; goto error;
xml_set_attribute(curnode, "tag", cpu->tag); xml_set_attribute(curnode, "tag", cpu->tag());
for (j = 0; j < comments->comment_count; j++) for (j = 0; j < comments->comment_count; j++)
{ {

8
src/emu/debug/debugcpu.c
View File

@ -554,7 +554,7 @@ void debug_cpu_interrupt_hook(running_device *device, int irqline)
if (info != NULL && (info->flags & DEBUG_FLAG_STOP_INTERRUPT) != 0 && (info->stopirq == -1 || info->stopirq == irqline)) if (info != NULL && (info->flags & DEBUG_FLAG_STOP_INTERRUPT) != 0 && (info->stopirq == -1 || info->stopirq == irqline))
{ {
global->execution_state = EXECUTION_STATE_STOPPED; global->execution_state = EXECUTION_STATE_STOPPED;
debug_console_printf(device->machine, "Stopped on interrupt (CPU '%s', IRQ %d)\n", device->tag.cstr(), irqline); debug_console_printf(device->machine, "Stopped on interrupt (CPU '%s', IRQ %d)\n", device->tag(), irqline);
compute_debug_flags(device); compute_debug_flags(device);
} }
} }
@ -574,7 +574,7 @@ void debug_cpu_exception_hook(running_device *device, int exception)
if ((info->flags & DEBUG_FLAG_STOP_EXCEPTION) != 0 && (info->stopexception == -1 || info->stopexception == exception)) if ((info->flags & DEBUG_FLAG_STOP_EXCEPTION) != 0 && (info->stopexception == -1 || info->stopexception == exception))
{ {
global->execution_state = EXECUTION_STATE_STOPPED; global->execution_state = EXECUTION_STATE_STOPPED;
debug_console_printf(device->machine, "Stopped on exception (CPU '%s', exception %d)\n", device->tag.cstr(), exception); debug_console_printf(device->machine, "Stopped on exception (CPU '%s', exception %d)\n", device->tag(), exception);
compute_debug_flags(device); compute_debug_flags(device);
} }
} }
@ -641,7 +641,7 @@ void debug_cpu_instruction_hook(running_device *device, offs_t curpc)
/* check the temp running breakpoint and break if we hit it */ /* check the temp running breakpoint and break if we hit it */
else if ((info->flags & DEBUG_FLAG_STOP_PC) != 0 && info->stopaddr == curpc) else if ((info->flags & DEBUG_FLAG_STOP_PC) != 0 && info->stopaddr == curpc)
{ {
debug_console_printf(device->machine, "Stopped at temporary breakpoint %X on CPU '%s'\n", info->stopaddr, device->tag.cstr()); debug_console_printf(device->machine, "Stopped at temporary breakpoint %X on CPU '%s'\n", info->stopaddr, device->tag());
global->execution_state = EXECUTION_STATE_STOPPED; global->execution_state = EXECUTION_STATE_STOPPED;
} }
@ -2448,7 +2448,7 @@ static running_device *expression_get_device(running_machine *machine, const cha
running_device *device; running_device *device;
for (device = machine->devicelist.first(); device != NULL; device = device->next) for (device = machine->devicelist.first(); device != NULL; device = device->next)
if (mame_stricmp(device->tag, tag) == 0) if (mame_stricmp(device->tag(), tag) == 0)
return device; return device;
return NULL; return NULL;

8
src/emu/debug/debugvw.c
View File

@ -1036,7 +1036,7 @@ static const registers_subview_item *registers_view_enumerate_subviews(running_m
/* populate the subview */ /* populate the subview */
subview->next = NULL; subview->next = NULL;
subview->index = curindex++; subview->index = curindex++;
subview->name.printf("CPU '%s' (%s)", cpu->tag.cstr(), cpu->name()); subview->name.printf("CPU '%s' (%s)", cpu->tag(), cpu->name());
subview->device = cpu; subview->device = cpu;
/* add to the list */ /* add to the list */
@ -1492,7 +1492,7 @@ static const disasm_subview_item *disasm_view_enumerate_subviews(running_machine
/* populate the subview */ /* populate the subview */
subview->next = NULL; subview->next = NULL;
subview->index = curindex++; subview->index = curindex++;
subview->name.printf("CPU '%s' (%s)", cpu->tag.cstr(), cpu->name()); subview->name.printf("CPU '%s' (%s)", cpu->tag(), cpu->name());
subview->space = space; subview->space = space;
/* add to the list */ /* add to the list */
@ -2365,9 +2365,9 @@ static const memory_subview_item *memory_view_enumerate_subviews(running_machine
subview->next = NULL; subview->next = NULL;
subview->index = curindex++; subview->index = curindex++;
if (device->type == CPU) if (device->type == CPU)
subview->name.printf("CPU '%s' (%s) %s memory", device->tag.cstr(), device->name(), space->name); subview->name.printf("CPU '%s' (%s) %s memory", device->tag(), device->name(), space->name);
else else
subview->name.printf("%s '%s' space #%d memory", device->name(), device->tag.cstr(), spacenum); subview->name.printf("%s '%s' space #%d memory", device->name(), device->tag(), spacenum);
subview->space = space; subview->space = space;
subview->endianness = space->endianness; subview->endianness = space->endianness;
subview->prefsize = space->dbits / 8; subview->prefsize = space->dbits / 8;

34
src/emu/devcb.c
View File

@ -43,7 +43,7 @@ void devcb_resolve_read_line(devcb_resolved_read_line *resolved, const devcb_rea
{ {
resolved->target = device->machine->port(config->tag); resolved->target = device->machine->port(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->read = trampoline_read_port_to_read_line; resolved->read = trampoline_read_port_to_read_line;
} }
@ -59,12 +59,12 @@ void devcb_resolve_read_line(devcb_resolved_read_line *resolved, const devcb_rea
cpu = device->machine->device(config->tag); cpu = device->machine->device(config->tag);
if (cpu == NULL) if (cpu == NULL)
fatalerror("devcb_resolve_read_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->target = resolved; resolved->target = resolved;
resolved->read = trampoline_read8_to_read_line; resolved->read = trampoline_read8_to_read_line;
resolved->realtarget = cpu->space(spacenum); resolved->realtarget = cpu->space(spacenum);
if (resolved->realtarget == NULL) if (resolved->realtarget == NULL)
fatalerror("devcb_resolve_read_line: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read_line: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag());
resolved->real.readspace = config->readspace; resolved->real.readspace = config->readspace;
} }
@ -80,7 +80,7 @@ void devcb_resolve_read_line(devcb_resolved_read_line *resolved, const devcb_rea
resolved->target = device->machine->device(config->tag); resolved->target = device->machine->device(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read_line: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read_line: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
/* read_line to read_line is direct */ /* read_line to read_line is direct */
if (config->readline != NULL) if (config->readline != NULL)
@ -130,7 +130,7 @@ void devcb_resolve_write_line(devcb_resolved_write_line *resolved, const devcb_w
{ {
resolved->target = device->machine->port(config->tag); resolved->target = device->machine->port(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_write_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->write = trampoline_write_port_to_write_line; resolved->write = trampoline_write_port_to_write_line;
} }
@ -146,12 +146,12 @@ void devcb_resolve_write_line(devcb_resolved_write_line *resolved, const devcb_w
cpu = device->machine->device(config->tag); cpu = device->machine->device(config->tag);
if (cpu == NULL) if (cpu == NULL)
fatalerror("devcb_resolve_write_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->target = resolved; resolved->target = resolved;
resolved->write = trampoline_write8_to_write_line; resolved->write = trampoline_write8_to_write_line;
resolved->realtarget = cpu->space(spacenum); resolved->realtarget = cpu->space(spacenum);
if (resolved->realtarget == NULL) if (resolved->realtarget == NULL)
fatalerror("devcb_resolve_write_line: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write_line: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag());
resolved->real.writespace = config->writespace; resolved->real.writespace = config->writespace;
} }
@ -167,7 +167,7 @@ void devcb_resolve_write_line(devcb_resolved_write_line *resolved, const devcb_w
cpu = device->machine->device(config->tag); cpu = device->machine->device(config->tag);
if (cpu == NULL) if (cpu == NULL)
fatalerror("devcb_resolve_write_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write_line: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->target = resolved; resolved->target = resolved;
resolved->write = trampoline_writecpu_to_write_line; resolved->write = trampoline_writecpu_to_write_line;
resolved->realtarget = cpu; resolved->realtarget = cpu;
@ -186,7 +186,7 @@ void devcb_resolve_write_line(devcb_resolved_write_line *resolved, const devcb_w
resolved->target = device->machine->device(config->tag); resolved->target = device->machine->device(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_write_line: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write_line: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
/* write_line to write_line is direct */ /* write_line to write_line is direct */
if (config->writeline != NULL) if (config->writeline != NULL)
@ -230,7 +230,7 @@ void devcb_resolve_read8(devcb_resolved_read8 *resolved, const devcb_read8 *conf
{ {
resolved->target = device->machine->port(config->tag); resolved->target = device->machine->port(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read8: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read8: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->read = trampoline_read_port_to_read8; resolved->read = trampoline_read_port_to_read8;
} }
@ -246,10 +246,10 @@ void devcb_resolve_read8(devcb_resolved_read8 *resolved, const devcb_read8 *conf
cpu = device->machine->device(config->tag); cpu = device->machine->device(config->tag);
if (cpu == NULL) if (cpu == NULL)
fatalerror("devcb_resolve_read8: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read8: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->target = cpu->space(spacenum); resolved->target = cpu->space(spacenum);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read8: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read8: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag());
resolved->read = (read8_device_func)config->readspace; resolved->read = (read8_device_func)config->readspace;
} }
@ -258,7 +258,7 @@ void devcb_resolve_read8(devcb_resolved_read8 *resolved, const devcb_read8 *conf
{ {
resolved->target = (config->type == DEVCB_TYPE_SELF) ? device : device->machine->device(config->tag); resolved->target = (config->type == DEVCB_TYPE_SELF) ? device : device->machine->device(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read8: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read8: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
/* read8 to read8 is direct */ /* read8 to read8 is direct */
if (config->readdevice != NULL) if (config->readdevice != NULL)
@ -301,7 +301,7 @@ void devcb_resolve_write8(devcb_resolved_write8 *resolved, const devcb_write8 *c
{ {
resolved->target = device->machine->port(config->tag); resolved->target = device->machine->port(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_read_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_read_line: unable to find input port '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->write = trampoline_write_port_to_write8; resolved->write = trampoline_write_port_to_write8;
} }
@ -317,10 +317,10 @@ void devcb_resolve_write8(devcb_resolved_write8 *resolved, const devcb_write8 *c
cpu = device->machine->device(config->tag); cpu = device->machine->device(config->tag);
if (cpu == NULL) if (cpu == NULL)
fatalerror("devcb_resolve_write8: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write8: unable to find CPU '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
resolved->target = cpu->space(spacenum); resolved->target = cpu->space(spacenum);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_write8: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write8: unable to find CPU '%s' %s space (requested by %s '%s')", config->tag, address_space_names[spacenum], device->name(), device->tag());
resolved->write = (write8_device_func)config->writespace; resolved->write = (write8_device_func)config->writespace;
} }
@ -329,7 +329,7 @@ void devcb_resolve_write8(devcb_resolved_write8 *resolved, const devcb_write8 *c
{ {
resolved->target = (config->type == DEVCB_TYPE_SELF) ? device : device->machine->device(config->tag); resolved->target = (config->type == DEVCB_TYPE_SELF) ? device : device->machine->device(config->tag);
if (resolved->target == NULL) if (resolved->target == NULL)
fatalerror("devcb_resolve_write8: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag.cstr()); fatalerror("devcb_resolve_write8: unable to find device '%s' (requested by %s '%s')", config->tag, device->name(), device->tag());
/* write8 to write8 is direct */ /* write8 to write8 is direct */
if (config->writedevice != NULL) if (config->writedevice != NULL)

18
src/emu/devintrf.c
View File

@ -76,7 +76,7 @@ void device_list::import_config_list(const device_config_list &list, running_mac
// append each device from the configuration list // append each device from the configuration list
for (const device_config *devconfig = list.first(); devconfig != NULL; devconfig = devconfig->next) for (const device_config *devconfig = list.first(); devconfig != NULL; devconfig = devconfig->next)
append(devconfig->tag, new running_device(_machine, *devconfig)); append(devconfig->tag(), new running_device(_machine, *devconfig));
} }
@ -169,12 +169,12 @@ void device_list::static_reset(running_machine *machine)
device_config::device_config(const device_config *_owner, device_type _type, const char *_tag, UINT32 _clock) device_config::device_config(const device_config *_owner, device_type _type, const char *_tag, UINT32 _clock)
: next(NULL), : next(NULL),
owner(const_cast<device_config *>(_owner)), owner(const_cast<device_config *>(_owner)),
tag(_tag),
type(_type), type(_type),
devclass(DEVICE_CLASS_GENERAL), devclass(DEVICE_CLASS_GENERAL),
clock(_clock), clock(_clock),
static_config(NULL), static_config(NULL),
inline_config(NULL) inline_config(NULL),
m_tag(_tag)
{ {
// initialize remaining members // initialize remaining members
memset(address_map, 0, sizeof(address_map)); memset(address_map, 0, sizeof(address_map));
@ -303,7 +303,7 @@ const char *device_config::get_config_string(UINT32 state) const
astring &device_config::subtag(astring &dest, const char *_tag) const astring &device_config::subtag(astring &dest, const char *_tag) const
{ {
return (this != NULL) ? dest.cpy(tag).cat(":").cat(_tag) : dest.cpy(_tag); return (this != NULL) ? dest.cpy(m_tag).cat(":").cat(_tag) : dest.cpy(_tag);
} }
@ -333,8 +333,7 @@ running_device::running_device(running_machine &_machine, const device_config &_
: m_baseconfig(_config), : m_baseconfig(_config),
machine(&_machine), machine(&_machine),
next(NULL), next(NULL),
owner((_config.owner != NULL) ? _machine.devicelist.find(_config.owner->tag) : NULL), owner((_config.owner != NULL) ? _machine.devicelist.find(_config.owner->tag()) : NULL),
tag(_config.tag),
type(_config.type), type(_config.type),
devclass(_config.devclass), devclass(_config.devclass),
clock(_config.clock), clock(_config.clock),
@ -343,12 +342,13 @@ running_device::running_device(running_machine &_machine, const device_config &_
tokenbytes(_config.get_config_int(DEVINFO_INT_TOKEN_BYTES)), tokenbytes(_config.get_config_int(DEVINFO_INT_TOKEN_BYTES)),
region(NULL), region(NULL),
execute(NULL), execute(NULL),
get_runtime_info(NULL) get_runtime_info(NULL),
m_tag(_config.tag())
{ {
memset(addrspace, 0, sizeof(addrspace)); memset(addrspace, 0, sizeof(addrspace));
if (tokenbytes == 0) if (tokenbytes == 0)
throw emu_fatalerror("Device %s specifies a 0 token length!\n", tag.cstr()); throw emu_fatalerror("Device %s specifies a 0 token length!\n", tag());
// allocate memory for the token // allocate memory for the token
token = auto_alloc_array_clear(machine, UINT8, tokenbytes); token = auto_alloc_array_clear(machine, UINT8, tokenbytes);
@ -433,7 +433,7 @@ void running_device::set_clock(UINT32 _clock)
void running_device::start() void running_device::start()
{ {
// find our region // find our region
region = machine->regionlist.find(baseconfig().tag); region = machine->regionlist.find(baseconfig().tag());
// start functions are required // start functions are required
device_start_func start = (device_start_func)get_config_fct(DEVINFO_FCT_START); device_start_func start = (device_start_func)get_config_fct(DEVINFO_FCT_START);

10
src/emu/devintrf.h
View File

@ -404,6 +404,7 @@ public:
virtual const char *version() const { return get_config_string(DEVINFO_STR_VERSION); } virtual const char *version() const { return get_config_string(DEVINFO_STR_VERSION); }
virtual const char *source_file() const { return get_config_string(DEVINFO_STR_SOURCE_FILE); } virtual const char *source_file() const { return get_config_string(DEVINFO_STR_SOURCE_FILE); }
virtual const char *credits() const { return get_config_string(DEVINFO_STR_CREDITS); } virtual const char *credits() const { return get_config_string(DEVINFO_STR_CREDITS); }
const char *tag() const { return m_tag; }
INT64 get_config_int(UINT32 state) const; INT64 get_config_int(UINT32 state) const;
void *get_config_ptr(UINT32 state) const; void *get_config_ptr(UINT32 state) const;
@ -418,7 +419,6 @@ public:
device_config * owner; // device that owns us, or NULL if nobody device_config * owner; // device that owns us, or NULL if nobody
// device properties // device properties
astring tag; // tag for this instance
device_type type; // device type device_type type; // device type
device_class devclass; // device class device_class devclass; // device class
@ -427,6 +427,9 @@ public:
const addrmap_token * address_map[ADDRESS_SPACES]; // address maps for each address space const addrmap_token * address_map[ADDRESS_SPACES]; // address maps for each address space
const void * static_config; // static device configuration const void * static_config; // static device configuration
void * inline_config; // inline device configuration void * inline_config; // inline device configuration
private:
astring m_tag; // tag for this instance
}; };
@ -490,6 +493,7 @@ public:
const char *version() const { return m_baseconfig.version(); } const char *version() const { return m_baseconfig.version(); }
const char *source_file() const { return m_baseconfig.source_file(); } const char *source_file() const { return m_baseconfig.source_file(); }
const char *credits() const { return m_baseconfig.credits(); } const char *credits() const { return m_baseconfig.credits(); }
const char *tag() const { return m_tag; }
INT64 get_config_int(UINT32 state) const { return m_baseconfig.get_config_int(state); } INT64 get_config_int(UINT32 state) const { return m_baseconfig.get_config_int(state); }
void *get_config_ptr(UINT32 state) const { return m_baseconfig.get_config_ptr(state); } void *get_config_ptr(UINT32 state) const { return m_baseconfig.get_config_ptr(state); }
@ -510,7 +514,6 @@ public:
running_device * owner; // device that owns us, or NULL if nobody running_device * owner; // device that owns us, or NULL if nobody
// device properties // device properties
astring tag; // tag for this instance
device_type type; // device type device_type type; // device type
device_class devclass; // device class device_class devclass; // device class
@ -525,6 +528,9 @@ public:
device_execute_func execute; // quick pointer to execute callback device_execute_func execute; // quick pointer to execute callback
device_get_runtime_info_func get_runtime_info; device_get_runtime_info_func get_runtime_info;
private:
astring m_tag;
}; };

4
src/emu/info.c
View File

@ -633,7 +633,7 @@ static void print_game_chips(FILE *out, const game_driver *game, const machine_c
{ {
fprintf(out, "\t\t<chip"); fprintf(out, "\t\t<chip");
fprintf(out, " type=\"cpu\""); fprintf(out, " type=\"cpu\"");
fprintf(out, " tag=\"%s\"", xml_normalize_string(devconfig->tag)); fprintf(out, " tag=\"%s\"", xml_normalize_string(devconfig->tag()));
fprintf(out, " name=\"%s\"", xml_normalize_string(devconfig->name())); fprintf(out, " name=\"%s\"", xml_normalize_string(devconfig->name()));
fprintf(out, " clock=\"%d\"", devconfig->clock); fprintf(out, " clock=\"%d\"", devconfig->clock);
fprintf(out, "/>\n"); fprintf(out, "/>\n");
@ -644,7 +644,7 @@ static void print_game_chips(FILE *out, const game_driver *game, const machine_c
{ {
fprintf(out, "\t\t<chip"); fprintf(out, "\t\t<chip");
fprintf(out, " type=\"audio\""); fprintf(out, " type=\"audio\"");
fprintf(out, " tag=\"%s\"", xml_normalize_string(devconfig->tag)); fprintf(out, " tag=\"%s\"", xml_normalize_string(devconfig->tag()));
fprintf(out, " name=\"%s\"", xml_normalize_string(devconfig->name())); fprintf(out, " name=\"%s\"", xml_normalize_string(devconfig->name()));
if (devconfig->clock != 0) if (devconfig->clock != 0)
fprintf(out, " clock=\"%d\"", devconfig->clock); fprintf(out, " clock=\"%d\"", devconfig->clock);

18
src/emu/machine/6522via.c
View File

@ -306,7 +306,7 @@ static void via_set_int (running_device *device, int data)
v->ifr |= data; v->ifr |= data;
if (TRACE_VIA) if (TRACE_VIA)
logerror("%s:6522VIA chip %s: IFR = %02X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), v->ifr); logerror("%s:6522VIA chip %s: IFR = %02X\n", cpuexec_describe_context(device->machine), device->tag(), v->ifr);
if (v->ier & v->ifr) if (v->ier & v->ifr)
{ {
@ -327,7 +327,7 @@ static void via_clear_int (running_device *device, int data)
v->ifr = (v->ifr & ~data) & 0x7f; v->ifr = (v->ifr & ~data) & 0x7f;
if (TRACE_VIA) if (TRACE_VIA)
logerror("%s:6522VIA chip %s: IFR = %02X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), v->ifr); logerror("%s:6522VIA chip %s: IFR = %02X\n", cpuexec_describe_context(device->machine), device->tag(), v->ifr);
if (v->ifr & v->ier) if (v->ifr & v->ier)
v->ifr |= INT_ANY; v->ifr |= INT_ANY;
@ -523,7 +523,7 @@ READ8_DEVICE_HANDLER(via_r)
if (v->in_b_func.read != NULL) if (v->in_b_func.read != NULL)
v->in_b = devcb_call_read8(&v->in_b_func, 0); v->in_b = devcb_call_read8(&v->in_b_func, 0);
else else
logerror("%s:6522VIA chip %s: Port B is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s:6522VIA chip %s: Port B is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag());
} }
} }
@ -545,7 +545,7 @@ READ8_DEVICE_HANDLER(via_r)
if (v->in_a_func.read != NULL) if (v->in_a_func.read != NULL)
v->in_a = devcb_call_read8(&v->in_a_func, 0); v->in_a = devcb_call_read8(&v->in_a_func, 0);
else else
logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag());
} }
} }
@ -577,7 +577,7 @@ READ8_DEVICE_HANDLER(via_r)
if (v->in_a_func.read != NULL) if (v->in_a_func.read != NULL)
v->in_a = devcb_call_read8(&v->in_a_func, 0); v->in_a = devcb_call_read8(&v->in_a_func, 0);
else else
logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag());
} }
/* combine input and output values */ /* combine input and output values */
@ -845,7 +845,7 @@ WRITE8_DEVICE_HANDLER(via_w)
v->pcr = data; v->pcr = data;
if (TRACE_VIA) if (TRACE_VIA)
logerror("%s:6522VIA chip %s: PCR = %02X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), data); logerror("%s:6522VIA chip %s: PCR = %02X\n", cpuexec_describe_context(device->machine), device->tag(), data);
if (CA2_FIX_OUTPUT(data) && CA2_OUTPUT_LEVEL(data) ^ v->out_ca2) if (CA2_FIX_OUTPUT(data) && CA2_OUTPUT_LEVEL(data) ^ v->out_ca2)
{ {
@ -957,7 +957,7 @@ WRITE_LINE_DEVICE_HANDLER(via_ca1_w)
if (state != v->in_ca1) if (state != v->in_ca1)
{ {
if (TRACE_VIA) if (TRACE_VIA)
logerror("%s:6522VIA chip %s: CA1 = %02X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), state); logerror("%s:6522VIA chip %s: CA1 = %02X\n", cpuexec_describe_context(device->machine), device->tag(), state);
if ((CA1_LOW_TO_HIGH(v->pcr) && state) || (CA1_HIGH_TO_LOW(v->pcr) && !state)) if ((CA1_LOW_TO_HIGH(v->pcr) && state) || (CA1_HIGH_TO_LOW(v->pcr) && !state))
{ {
@ -966,7 +966,7 @@ WRITE_LINE_DEVICE_HANDLER(via_ca1_w)
if (v->in_a_func.read != NULL) if (v->in_a_func.read != NULL)
v->in_a = devcb_call_read8(&v->in_a_func, 0); v->in_a = devcb_call_read8(&v->in_a_func, 0);
else else
logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s:6522VIA chip %s: Port A is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag());
} }
via_set_int (device, INT_CA1); via_set_int (device, INT_CA1);
@ -1090,7 +1090,7 @@ WRITE_LINE_DEVICE_HANDLER(via_cb1_w)
if (v->in_b_func.read != NULL) if (v->in_b_func.read != NULL)
v->in_b = devcb_call_read8(&v->in_b_func, 0); v->in_b = devcb_call_read8(&v->in_b_func, 0);
else else
logerror("%s:6522VIA chip %s: Port B is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s:6522VIA chip %s: Port B is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag());
} }
if (SO_EXT_CONTROL(v->acr) || SI_EXT_CONTROL(v->acr)) if (SO_EXT_CONTROL(v->acr) || SI_EXT_CONTROL(v->acr))
via_shift (device); via_shift (device);

4
src/emu/machine/6526cia.c
View File

@ -173,8 +173,8 @@ static DEVICE_RESET( cia )
cia->sp = 0; cia->sp = 0;
/* initialize data direction registers */ /* initialize data direction registers */
cia->port[0].ddr = !strcmp(device->tag, "cia_0") ? 0x03 : 0xff; cia->port[0].ddr = !strcmp(device->tag(), "cia_0") ? 0x03 : 0xff;
cia->port[1].ddr = !strcmp(device->tag, "cia_0") ? 0x00 : 0xff; cia->port[1].ddr = !strcmp(device->tag(), "cia_0") ? 0x00 : 0xff;
/* TOD running by default */ /* TOD running by default */
cia->tod_running = TRUE; cia->tod_running = TRUE;

7
src/emu/machine/6532riot.c
View File

@ -262,7 +262,7 @@ WRITE8_DEVICE_HANDLER( riot6532_w )
if (port->out_func.write != NULL) if (port->out_func.write != NULL)
devcb_call_write8(&port->out_func, 0, data); devcb_call_write8(&port->out_func, 0, data);
else else
logerror("%s:6532RIOT chip %s: Port %c is being written to but has no handler. %02X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), 'A' + (offset & 1), data); logerror("%s:6532RIOT chip %s: Port %c is being written to but has no handler. %02X\n", cpuexec_describe_context(device->machine), device->tag(), 'A' + (offset & 1), data);
} }
/* writes to port A need to update the PA7 state */ /* writes to port A need to update the PA7 state */
@ -331,7 +331,7 @@ READ8_DEVICE_HANDLER( riot6532_r )
update_pa7_state(device); update_pa7_state(device);
} }
else else
logerror("%s:6532RIOT chip %s: Port %c is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag.cstr(), 'A' + (offset & 1)); logerror("%s:6532RIOT chip %s: Port %c is being read but has no handler\n", cpuexec_describe_context(device->machine), device->tag(), 'A' + (offset & 1));
/* apply the DDR to the result */ /* apply the DDR to the result */
val = apply_ddr(port); val = apply_ddr(port);
@ -429,12 +429,11 @@ static DEVICE_START( riot6532 )
/* validate arguments */ /* validate arguments */
assert(device != NULL); assert(device != NULL);
assert(strlen(device->tag) < 20);
/* set static values */ /* set static values */
riot->device = device; riot->device = device;
riot->intf = (riot6532_interface *)device->baseconfig().static_config; riot->intf = (riot6532_interface *)device->baseconfig().static_config;
riot->index = device->machine->devicelist.index(RIOT6532, device->tag); riot->index = device->machine->devicelist.index(RIOT6532, device->tag());
/* configure the ports */ /* configure the ports */
devcb_resolve_read8(&riot->port[0].in_func, &riot->intf->in_a_func, device); devcb_resolve_read8(&riot->port[0].in_func, &riot->intf->in_a_func, device);

72
src/emu/machine/6821pia.c
View File

@ -301,7 +301,7 @@ static UINT8 get_in_a_value(running_device *device)
if (!p->logged_port_a_not_connected && (p->ddr_a != 0xff)) if (!p->logged_port_a_not_connected && (p->ddr_a != 0xff))
{ {
logerror("PIA #%s: Warning! No port A read handler. Assuming pins 0x%02X not connected\n", device->tag.cstr(), p->ddr_a ^ 0xff); logerror("PIA #%s: Warning! No port A read handler. Assuming pins 0x%02X not connected\n", device->tag(), p->ddr_a ^ 0xff);
p->logged_port_a_not_connected = TRUE; p->logged_port_a_not_connected = TRUE;
} }
} }
@ -345,7 +345,7 @@ static UINT8 get_in_b_value(running_device *device)
{ {
if (!p->logged_port_b_not_connected && (p->ddr_b != 0xff)) if (!p->logged_port_b_not_connected && (p->ddr_b != 0xff))
{ {
logerror("PIA #%s: Error! No port B read handler. Three-state pins 0x%02X are undefined\n", device->tag.cstr(), p->ddr_b ^ 0xff); logerror("PIA #%s: Error! No port B read handler. Three-state pins 0x%02X are undefined\n", device->tag(), p->ddr_b ^ 0xff);
p->logged_port_b_not_connected = TRUE; p->logged_port_b_not_connected = TRUE;
} }
@ -413,7 +413,7 @@ static void set_out_ca2(running_device *device, int data)
else else
{ {
if (p->out_ca2_needs_pulled) if (p->out_ca2_needs_pulled)
logerror("PIA #%s: Warning! No port CA2 write handler. Previous value has been lost!\n", device->tag.cstr()); logerror("PIA #%s: Warning! No port CA2 write handler. Previous value has been lost!\n", device->tag());
p->out_ca2_needs_pulled = TRUE; p->out_ca2_needs_pulled = TRUE;
} }
@ -442,7 +442,7 @@ static void set_out_cb2(running_device *device, int data)
else else
{ {
if (p->out_cb2_needs_pulled) if (p->out_cb2_needs_pulled)
logerror("PIA #%s: Warning! No port CB2 write handler. Previous value has been lost!\n", device->tag.cstr()); logerror("PIA #%s: Warning! No port CB2 write handler. Previous value has been lost!\n", device->tag());
p->out_cb2_needs_pulled = TRUE; p->out_cb2_needs_pulled = TRUE;
} }
@ -476,7 +476,7 @@ static UINT8 port_a_r(running_device *device)
set_out_ca2(device, TRUE); set_out_ca2(device, TRUE);
} }
LOG(("PIA #%s: port A read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: port A read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -492,7 +492,7 @@ static UINT8 ddr_a_r(running_device *device)
UINT8 ret = p->ddr_a; UINT8 ret = p->ddr_a;
LOG(("PIA #%s: DDR A read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: DDR A read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -520,7 +520,7 @@ static UINT8 port_b_r(running_device *device)
p->irq_b2 = FALSE; p->irq_b2 = FALSE;
update_interrupts(device); update_interrupts(device);
LOG(("PIA #%s: port B read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: port B read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -536,7 +536,7 @@ static UINT8 ddr_b_r(running_device *device)
UINT8 ret = p->ddr_b; UINT8 ret = p->ddr_b;
LOG(("PIA #%s: DDR B read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: DDR B read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -556,7 +556,7 @@ static UINT8 control_a_r(running_device *device)
pia6821_ca1_w(device, 0, devcb_call_read_line(&p->in_ca1_func)); pia6821_ca1_w(device, 0, devcb_call_read_line(&p->in_ca1_func));
else if (!p->logged_ca1_not_connected && (!p->in_ca1_pushed)) else if (!p->logged_ca1_not_connected && (!p->in_ca1_pushed))
{ {
logerror("PIA #%s: Warning! No CA1 read handler. Assuming pin not connected\n", device->tag.cstr()); logerror("PIA #%s: Warning! No CA1 read handler. Assuming pin not connected\n", device->tag());
p->logged_ca1_not_connected = TRUE; p->logged_ca1_not_connected = TRUE;
} }
@ -564,7 +564,7 @@ static UINT8 control_a_r(running_device *device)
pia6821_ca2_w(device, 0, devcb_call_read_line(&p->in_ca2_func)); pia6821_ca2_w(device, 0, devcb_call_read_line(&p->in_ca2_func));
else if ( !p->logged_ca2_not_connected && C2_INPUT(p->ctl_a) && !p->in_ca2_pushed) else if ( !p->logged_ca2_not_connected && C2_INPUT(p->ctl_a) && !p->in_ca2_pushed)
{ {
logerror("PIA #%s: Warning! No CA2 read handler. Assuming pin not connected\n", device->tag.cstr()); logerror("PIA #%s: Warning! No CA2 read handler. Assuming pin not connected\n", device->tag());
p->logged_ca2_not_connected = TRUE; p->logged_ca2_not_connected = TRUE;
} }
@ -578,7 +578,7 @@ static UINT8 control_a_r(running_device *device)
if (p->irq_a2 && C2_INPUT(p->ctl_a)) if (p->irq_a2 && C2_INPUT(p->ctl_a))
ret |= PIA_IRQ2; ret |= PIA_IRQ2;
LOG(("PIA #%s: control A read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: control A read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -598,7 +598,7 @@ static UINT8 control_b_r(running_device *device)
pia6821_cb1_w(device, 0, devcb_call_read_line(&p->in_cb1_func)); pia6821_cb1_w(device, 0, devcb_call_read_line(&p->in_cb1_func));
else if (!p->logged_cb1_not_connected && !p->in_cb1_pushed) else if (!p->logged_cb1_not_connected && !p->in_cb1_pushed)
{ {
logerror("PIA #%s: Error! no CB1 read handler. Three-state pin is undefined\n", device->tag.cstr()); logerror("PIA #%s: Error! no CB1 read handler. Three-state pin is undefined\n", device->tag());
p->logged_cb1_not_connected = TRUE; p->logged_cb1_not_connected = TRUE;
} }
@ -606,7 +606,7 @@ static UINT8 control_b_r(running_device *device)
pia6821_cb2_w(device, 0, devcb_call_read_line(&p->in_cb2_func)); pia6821_cb2_w(device, 0, devcb_call_read_line(&p->in_cb2_func));
else if (!p->logged_cb2_not_connected && C2_INPUT(p->ctl_b) && !p->in_cb2_pushed) else if (!p->logged_cb2_not_connected && C2_INPUT(p->ctl_b) && !p->in_cb2_pushed)
{ {
logerror("PIA #%s: Error! No CB2 read handler. Three-state pin is undefined\n", device->tag.cstr()); logerror("PIA #%s: Error! No CB2 read handler. Three-state pin is undefined\n", device->tag());
p->logged_cb2_not_connected = TRUE; p->logged_cb2_not_connected = TRUE;
} }
@ -620,7 +620,7 @@ static UINT8 control_b_r(running_device *device)
if (p->irq_b2 && C2_INPUT(p->ctl_b)) if (p->irq_b2 && C2_INPUT(p->ctl_b))
ret |= PIA_IRQ2; ret |= PIA_IRQ2;
LOG(("PIA #%s: control B read = %02X\n", device->tag.cstr(), ret)); LOG(("PIA #%s: control B read = %02X\n", device->tag(), ret));
return ret; return ret;
} }
@ -697,14 +697,14 @@ static void send_to_out_a_func(running_device *device, const char* message)
/* input pins are pulled high */ /* input pins are pulled high */
UINT8 data = get_out_a_value(device); UINT8 data = get_out_a_value(device);
LOG(("PIA #%s: %s = %02X\n", device->tag.cstr(), message, data)); LOG(("PIA #%s: %s = %02X\n", device->tag(), message, data));
if (p->out_a_func.write != NULL) if (p->out_a_func.write != NULL)
devcb_call_write8(&p->out_a_func, 0, data); devcb_call_write8(&p->out_a_func, 0, data);
else else
{ {
if (p->out_a_needs_pulled) if (p->out_a_needs_pulled)
logerror("PIA #%s: Warning! No port A write handler. Previous value has been lost!\n", device->tag.cstr()); logerror("PIA #%s: Warning! No port A write handler. Previous value has been lost!\n", device->tag());
p->out_a_needs_pulled = TRUE; p->out_a_needs_pulled = TRUE;
} }
@ -722,14 +722,14 @@ static void send_to_out_b_func(running_device *device, const char* message)
/* input pins are high-impedance - we just send them as zeros for backwards compatibility */ /* input pins are high-impedance - we just send them as zeros for backwards compatibility */
UINT8 data = get_out_b_value(device); UINT8 data = get_out_b_value(device);
LOG(("PIA #%s: %s = %02X\n", device->tag.cstr(), message, data)); LOG(("PIA #%s: %s = %02X\n", device->tag(), message, data));
if (p->out_b_func.write != NULL) if (p->out_b_func.write != NULL)
devcb_call_write8(&p->out_b_func, 0, data); devcb_call_write8(&p->out_b_func, 0, data);
else else
{ {
if (p->out_b_needs_pulled) if (p->out_b_needs_pulled)
logerror("PIA #%s: Warning! No port B write handler. Previous value has been lost!\n", device->tag.cstr()); logerror("PIA #%s: Warning! No port B write handler. Previous value has been lost!\n", device->tag());
p->out_b_needs_pulled = TRUE; p->out_b_needs_pulled = TRUE;
} }
@ -760,11 +760,11 @@ static void ddr_a_w(running_device *device, UINT8 data)
pia6821_state *p = get_token(device); pia6821_state *p = get_token(device);
if (data == 0x00) if (data == 0x00)
LOG(("PIA #%s: DDR A write = %02X (input mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR A write = %02X (input mode)\n", device->tag(), data));
else if (data == 0xff) else if (data == 0xff)
LOG(("PIA #%s: DDR A write = %02X (output mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR A write = %02X (output mode)\n", device->tag(), data));
else else
LOG(("PIA #%s: DDR A write = %02X (mixed mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR A write = %02X (mixed mode)\n", device->tag(), data));
if (p->ddr_a != data) if (p->ddr_a != data)
{ {
@ -811,11 +811,11 @@ static void ddr_b_w(running_device *device, UINT8 data)
pia6821_state *p = get_token(device); pia6821_state *p = get_token(device);
if (data == 0x00) if (data == 0x00)
LOG(("PIA #%s: DDR B write = %02X (input mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR B write = %02X (input mode)\n", device->tag(), data));
else if (data == 0xff) else if (data == 0xff)
LOG(("PIA #%s: DDR B write = %02X (output mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR B write = %02X (output mode)\n", device->tag(), data));
else else
LOG(("PIA #%s: DDR B write = %02X (mixed mode)\n", device->tag.cstr(), data)); LOG(("PIA #%s: DDR B write = %02X (mixed mode)\n", device->tag(), data));
if (p->ddr_b != data) if (p->ddr_b != data)
{ {
@ -838,7 +838,7 @@ static void control_a_w(running_device *device, UINT8 data)
/* bit 7 and 6 are read only */ /* bit 7 and 6 are read only */
data &= 0x3f; data &= 0x3f;
LOG(("PIA #%s: control A write = %02X\n", device->tag.cstr(), data)); LOG(("PIA #%s: control A write = %02X\n", device->tag(), data));
/* update the control register */ /* update the control register */
p->ctl_a = data; p->ctl_a = data;
@ -875,7 +875,7 @@ static void control_b_w(running_device *device, UINT8 data)
/* bit 7 and 6 are read only */ /* bit 7 and 6 are read only */
data &= 0x3f; data &= 0x3f;
LOG(("PIA #%s: control B write = %02X\n", device->tag.cstr(), data)); LOG(("PIA #%s: control B write = %02X\n", device->tag(), data));
/* update the control register */ /* update the control register */
p->ctl_b = data; p->ctl_b = data;
@ -974,7 +974,7 @@ void pia6821_set_input_a(running_device *device, UINT8 data, UINT8 z_mask)
assert_always(p->in_a_func.read == NULL, "pia6821_porta_w() called when in_a_func implemented"); assert_always(p->in_a_func.read == NULL, "pia6821_porta_w() called when in_a_func implemented");
LOG(("PIA #%s: set input port A = %02X\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input port A = %02X\n", device->tag(), data));
p->in_a = data; p->in_a = data;
p->port_a_z_mask = z_mask; p->port_a_z_mask = z_mask;
@ -1029,13 +1029,13 @@ WRITE8_DEVICE_HANDLER( pia6821_ca1_w )
/* limit the data to 0 or 1 */ /* limit the data to 0 or 1 */
data = data ? TRUE : FALSE; data = data ? TRUE : FALSE;
LOG(("PIA #%s: set input CA1 = %d\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input CA1 = %d\n", device->tag(), data));
/* the new state has caused a transition */ /* the new state has caused a transition */
if ((p->in_ca1 != data) && if ((p->in_ca1 != data) &&
((data && C1_LOW_TO_HIGH(p->ctl_a)) || (!data && C1_HIGH_TO_LOW(p->ctl_a)))) ((data && C1_LOW_TO_HIGH(p->ctl_a)) || (!data && C1_HIGH_TO_LOW(p->ctl_a))))
{ {
LOG(("PIA #%s: CA1 triggering\n", device->tag.cstr())); LOG(("PIA #%s: CA1 triggering\n", device->tag()));
/* mark the IRQ */ /* mark the IRQ */
p->irq_a1 = TRUE; p->irq_a1 = TRUE;
@ -1077,14 +1077,14 @@ WRITE8_DEVICE_HANDLER( pia6821_ca2_w )
/* limit the data to 0 or 1 */ /* limit the data to 0 or 1 */
data = data ? 1 : 0; data = data ? 1 : 0;
LOG(("PIA #%s: set input CA2 = %d\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input CA2 = %d\n", device->tag(), data));
/* if input mode and the new state has caused a transition */ /* if input mode and the new state has caused a transition */
if (C2_INPUT(p->ctl_a) && if (C2_INPUT(p->ctl_a) &&
(p->in_ca2 != data) && (p->in_ca2 != data) &&
((data && C2_LOW_TO_HIGH(p->ctl_a)) || (!data && C2_HIGH_TO_LOW(p->ctl_a)))) ((data && C2_LOW_TO_HIGH(p->ctl_a)) || (!data && C2_HIGH_TO_LOW(p->ctl_a))))
{ {
LOG(("PIA #%s: CA2 triggering\n", device->tag.cstr())); LOG(("PIA #%s: CA2 triggering\n", device->tag()));
/* mark the IRQ */ /* mark the IRQ */
p->irq_a2 = TRUE; p->irq_a2 = TRUE;
@ -1154,7 +1154,7 @@ WRITE8_DEVICE_HANDLER( pia6821_portb_w )
assert_always(p->in_b_func.read == NULL, "pia_set_input_b() called when in_b_func implemented"); assert_always(p->in_b_func.read == NULL, "pia_set_input_b() called when in_b_func implemented");
LOG(("PIA #%s: set input port B = %02X\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input port B = %02X\n", device->tag(), data));
p->in_b = data; p->in_b = data;
p->in_b_pushed = TRUE; p->in_b_pushed = TRUE;
@ -1198,13 +1198,13 @@ WRITE8_DEVICE_HANDLER( pia6821_cb1_w )
/* limit the data to 0 or 1 */ /* limit the data to 0 or 1 */
data = data ? 1 : 0; data = data ? 1 : 0;
LOG(("PIA #%s: set input CB1 = %d\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input CB1 = %d\n", device->tag(), data));
/* the new state has caused a transition */ /* the new state has caused a transition */
if ((p->in_cb1 != data) && if ((p->in_cb1 != data) &&
((data && C1_LOW_TO_HIGH(p->ctl_b)) || (!data && C1_HIGH_TO_LOW(p->ctl_b)))) ((data && C1_LOW_TO_HIGH(p->ctl_b)) || (!data && C1_HIGH_TO_LOW(p->ctl_b))))
{ {
LOG(("PIA #%s: CB1 triggering\n", device->tag.cstr())); LOG(("PIA #%s: CB1 triggering\n", device->tag()));
/* mark the IRQ */ /* mark the IRQ */
p->irq_b1 = 1; p->irq_b1 = 1;
@ -1247,14 +1247,14 @@ WRITE8_DEVICE_HANDLER( pia6821_cb2_w )
/* limit the data to 0 or 1 */ /* limit the data to 0 or 1 */
data = data ? 1 : 0; data = data ? 1 : 0;
LOG(("PIA #%s: set input CB2 = %d\n", device->tag.cstr(), data)); LOG(("PIA #%s: set input CB2 = %d\n", device->tag(), data));
/* if input mode and the new state has caused a transition */ /* if input mode and the new state has caused a transition */
if (C2_INPUT(p->ctl_b) && if (C2_INPUT(p->ctl_b) &&
(p->in_cb2 != data) && (p->in_cb2 != data) &&
((data && C2_LOW_TO_HIGH(p->ctl_b)) || (!data && C2_HIGH_TO_LOW(p->ctl_b)))) ((data && C2_LOW_TO_HIGH(p->ctl_b)) || (!data && C2_HIGH_TO_LOW(p->ctl_b))))
{ {
LOG(("PIA #%s: CB2 triggering\n", device->tag.cstr())); LOG(("PIA #%s: CB2 triggering\n", device->tag()));
/* mark the IRQ */ /* mark the IRQ */
p->irq_b2 = 1; p->irq_b2 = 1;

34
src/emu/machine/6840ptm.c
View File

@ -290,7 +290,7 @@ static UINT16 compute_counter( running_device *device, int counter )
/* If there's no timer, return the count */ /* If there's no timer, return the count */
if (!ptm6840->enabled[counter]) if (!ptm6840->enabled[counter])
{ {
PLOG(("MC6840 #%s: read counter(%d): %d\n", device->tag.cstr(), counter, ptm6840->counter[counter])); PLOG(("MC6840 #%s: read counter(%d): %d\n", device->tag(), counter, ptm6840->counter[counter]));
return ptm6840->counter[counter]; return ptm6840->counter[counter];
} }
@ -298,12 +298,12 @@ static UINT16 compute_counter( running_device *device, int counter )
if (ptm6840->control_reg[counter] & 0x02) if (ptm6840->control_reg[counter] & 0x02)
{ {
clock = ptm6840->internal_clock; clock = ptm6840->internal_clock;
PLOG(("MC6840 #%s: %d internal clock freq %d \n", device->tag.cstr(), counter, clock)); PLOG(("MC6840 #%s: %d internal clock freq %d \n", device->tag(), counter, clock));
} }
else else
{ {
clock = ptm6840->external_clock[counter]; clock = ptm6840->external_clock[counter];
PLOG(("MC6840 #%s: %d external clock freq %d \n", device->tag.cstr(), counter, clock)); PLOG(("MC6840 #%s: %d external clock freq %d \n", device->tag(), counter, clock));
} }
/* See how many are left */ /* See how many are left */
remaining = attotime_to_double(attotime_mul(timer_timeleft(ptm6840->timer[counter]), clock)); remaining = attotime_to_double(attotime_mul(timer_timeleft(ptm6840->timer[counter]), clock));
@ -316,7 +316,7 @@ static UINT16 compute_counter( running_device *device, int counter )
int lsb = remaining % divisor; int lsb = remaining % divisor;
remaining = (msb << 8) | lsb; remaining = (msb << 8) | lsb;
} }
PLOG(("MC6840 #%s: read counter(%d): %d\n", device->tag.cstr(), counter, remaining)); PLOG(("MC6840 #%s: read counter(%d): %d\n", device->tag(), counter, remaining));
return remaining; return remaining;
} }
@ -338,12 +338,12 @@ static void reload_count( running_device *device, int idx )
if (ptm6840->control_reg[idx] & 0x02) if (ptm6840->control_reg[idx] & 0x02)
{ {
clock = ptm6840->internal_clock; clock = ptm6840->internal_clock;
PLOG(("MC6840 #%s: %d internal clock freq %d \n", device->tag.cstr(), idx, clock)); PLOG(("MC6840 #%s: %d internal clock freq %d \n", device->tag(), idx, clock));
} }
else else
{ {
clock = ptm6840->external_clock[idx]; clock = ptm6840->external_clock[idx];
PLOG(("MC6840 #%s: %d external clock freq %d \n", device->tag.cstr(), idx, clock)); PLOG(("MC6840 #%s: %d external clock freq %d \n", device->tag(), idx, clock));
} }
/* Determine the number of clock periods before we expire */ /* Determine the number of clock periods before we expire */
@ -363,13 +363,13 @@ static void reload_count( running_device *device, int idx )
} }
/* Set the timer */ /* Set the timer */
PLOG(("MC6840 #%s: reload_count(%d): clock = %d count = %d\n", device->tag.cstr(), idx, clock, count)); PLOG(("MC6840 #%s: reload_count(%d): clock = %d count = %d\n", device->tag(), idx, clock, count));
duration = attotime_mul(ATTOTIME_IN_HZ(clock), count); duration = attotime_mul(ATTOTIME_IN_HZ(clock), count);
if (idx == 2) if (idx == 2)
duration = attotime_mul(duration, ptm6840->t3_divisor); duration = attotime_mul(duration, ptm6840->t3_divisor);
PLOG(("MC6840 #%s: reload_count(%d): output = %lf\n", device->tag.cstr(), idx, attotime_to_double(duration))); PLOG(("MC6840 #%s: reload_count(%d): output = %lf\n", device->tag(), idx, attotime_to_double(duration)));
if (!(ptm6840->control_reg[idx] & 0x02)) if (!(ptm6840->control_reg[idx] & 0x02))
{ {
@ -407,7 +407,7 @@ READ8_DEVICE_HANDLER( ptm6840_read )
case PTM_6840_STATUS: case PTM_6840_STATUS:
{ {
PLOG(("%s: MC6840 #%s: Status read = %04X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), ptm6840->status_reg)); PLOG(("%s: MC6840 #%s: Status read = %04X\n", cpuexec_describe_context(device->machine), device->tag(), ptm6840->status_reg));
ptm6840->status_read_since_int |= ptm6840->status_reg & 0x07; ptm6840->status_read_since_int |= ptm6840->status_reg & 0x07;
val = ptm6840->status_reg; val = ptm6840->status_reg;
break; break;
@ -429,7 +429,7 @@ READ8_DEVICE_HANDLER( ptm6840_read )
ptm6840->lsb_buffer = result & 0xff; ptm6840->lsb_buffer = result & 0xff;
PLOG(("%s: MC6840 #%s: Counter %d read = %04X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), idx, result >> 8)); PLOG(("%s: MC6840 #%s: Counter %d read = %04X\n", cpuexec_describe_context(device->machine), device->tag(), idx, result >> 8));
val = result >> 8; val = result >> 8;
break; break;
} }
@ -474,7 +474,7 @@ WRITE8_DEVICE_HANDLER( ptm6840_write )
ptm6840->mode[idx] = (data >> 3) & 0x07; ptm6840->mode[idx] = (data >> 3) & 0x07;
ptm6840->control_reg[idx] = data; ptm6840->control_reg[idx] = data;
PLOG(("MC6840 #%s : Control register %d selected\n", device->tag.cstr(), idx)); PLOG(("MC6840 #%s : Control register %d selected\n", device->tag(), idx));
PLOG(("operation mode = %s\n", opmode[ ptm6840->mode[idx] ])); PLOG(("operation mode = %s\n", opmode[ ptm6840->mode[idx] ]));
PLOG(("value = %04X\n", ptm6840->control_reg[idx])); PLOG(("value = %04X\n", ptm6840->control_reg[idx]));
PLOG(("t3divisor = %d\n", ptm6840->t3_divisor)); PLOG(("t3divisor = %d\n", ptm6840->t3_divisor));
@ -491,7 +491,7 @@ WRITE8_DEVICE_HANDLER( ptm6840_write )
/* Holding reset down */ /* Holding reset down */
if (data & 0x01) if (data & 0x01)
{ {
PLOG(("MC6840 #%s : Timer reset\n", device->tag.cstr())); PLOG(("MC6840 #%s : Timer reset\n", device->tag()));
for (i = 0; i < 3; i++) for (i = 0; i < 3; i++)
{ {
timer_enable(ptm6840->timer[i], FALSE); timer_enable(ptm6840->timer[i], FALSE);
@ -519,7 +519,7 @@ WRITE8_DEVICE_HANDLER( ptm6840_write )
case PTM_6840_MSBBUF2: case PTM_6840_MSBBUF2:
case PTM_6840_MSBBUF3: case PTM_6840_MSBBUF3:
{ {
PLOG(("MC6840 #%s msbbuf%d = %02X\n", device->tag.cstr(), offset / 2, data)); PLOG(("MC6840 #%s msbbuf%d = %02X\n", device->tag(), offset / 2, data));
ptm6840->msb_buffer = data; ptm6840->msb_buffer = data;
break; break;
} }
@ -539,7 +539,7 @@ WRITE8_DEVICE_HANDLER( ptm6840_write )
if (!(ptm6840->control_reg[idx] & 0x10)) if (!(ptm6840->control_reg[idx] & 0x10))
reload_count(device,idx); reload_count(device,idx);
PLOG(("%s:MC6840 #%s: Counter %d latch = %04X\n", cpuexec_describe_context(device->machine), device->tag.cstr(), idx, ptm6840->latch[idx])); PLOG(("%s:MC6840 #%s: Counter %d latch = %04X\n", cpuexec_describe_context(device->machine), device->tag(), idx, ptm6840->latch[idx]));
break; break;
} }
} }
@ -553,7 +553,7 @@ static void ptm6840_timeout( running_device *device, int idx )
{ {
ptm6840_state *ptm6840 = get_safe_token(device); ptm6840_state *ptm6840 = get_safe_token(device);
PLOG(("**ptm6840 %s t%d timeout**\n", device->tag.cstr(), idx + 1)); PLOG(("**ptm6840 %s t%d timeout**\n", device->tag(), idx + 1));
if ( ptm6840->control_reg[idx] & 0x40 ) if ( ptm6840->control_reg[idx] & 0x40 )
{ {
@ -568,7 +568,7 @@ static void ptm6840_timeout( running_device *device, int idx )
if ((ptm6840->mode[idx] == 0)||(ptm6840->mode[idx] == 2)) if ((ptm6840->mode[idx] == 0)||(ptm6840->mode[idx] == 2))
{ {
ptm6840->output[idx] = ptm6840->output[idx] ? 0 : 1; ptm6840->output[idx] = ptm6840->output[idx] ? 0 : 1;
PLOG(("**ptm6840 %s t%d output %d **\n", device->tag.cstr(), idx + 1, ptm6840->output[idx])); PLOG(("**ptm6840 %s t%d output %d **\n", device->tag(), idx + 1, ptm6840->output[idx]));
if (ptm6840->out_func[idx].write != NULL) if (ptm6840->out_func[idx].write != NULL)
devcb_call_write8(&ptm6840->out_func[idx], 0, ptm6840->output[idx]); devcb_call_write8(&ptm6840->out_func[idx], 0, ptm6840->output[idx]);
@ -578,7 +578,7 @@ static void ptm6840_timeout( running_device *device, int idx )
if (!ptm6840->fired[idx]) if (!ptm6840->fired[idx])
{ {
ptm6840->output[idx] = 1; ptm6840->output[idx] = 1;
PLOG(("**ptm6840 %s t%d output %d **\n", device->tag.cstr(), idx + 1, ptm6840->output[idx])); PLOG(("**ptm6840 %s t%d output %d **\n", device->tag(), idx + 1, ptm6840->output[idx]));
if (ptm6840->out_func[idx].write != NULL) if (ptm6840->out_func[idx].write != NULL)
devcb_call_write8(&ptm6840->out_func[idx], 0, ptm6840->output[idx]); devcb_call_write8(&ptm6840->out_func[idx], 0, ptm6840->output[idx]);

8
src/emu/machine/68681.c
View File

@ -462,7 +462,7 @@ READ8_DEVICE_HANDLER(duart68681_r)
offset &= 0xf; offset &= 0xf;
LOG(( "Reading 68681 (%s) reg %x (%s) ", device->tag.cstr(), offset, duart68681_reg_read_names[offset] )); LOG(( "Reading 68681 (%s) reg %x (%s) ", device->tag(), offset, duart68681_reg_read_names[offset] ));
switch (offset) switch (offset)
{ {
@ -582,7 +582,7 @@ WRITE8_DEVICE_HANDLER(duart68681_w)
duart68681_state* duart68681 = get_safe_token(device); duart68681_state* duart68681 = get_safe_token(device);
offset &= 0x0f; offset &= 0x0f;
LOG(( "Writing 68681 (%s) reg %x (%s) with %04x\n", device->tag.cstr(), offset, duart68681_reg_write_names[offset], data )); LOG(( "Writing 68681 (%s) reg %x (%s) with %04x\n", device->tag(), offset, duart68681_reg_write_names[offset], data ));
switch(offset) switch(offset)
{ {
@ -605,7 +605,7 @@ WRITE8_DEVICE_HANDLER(duart68681_w)
switch ((data >> 4) & 0x07) switch ((data >> 4) & 0x07)
{ {
case 0: case 1: case 2: case 4: case 5: // TODO: handle these cases! case 0: case 1: case 2: case 4: case 5: // TODO: handle these cases!
logerror( "68681 (%s): Unhandled timer/counter mode %d\n", device->tag.cstr(), (data >> 4) & 0x07); logerror( "68681 (%s): Unhandled timer/counter mode %d\n", device->tag(), (data >> 4) & 0x07);
break; break;
case 3: case 6: case 7: case 3: case 6: case 7:
break; break;
@ -641,7 +641,7 @@ WRITE8_DEVICE_HANDLER(duart68681_w)
break; break;
case 0x0d: /* OPCR */ case 0x0d: /* OPCR */
if (data != 0x00) if (data != 0x00)
logerror( "68681 (%s): Unhandled OPCR value: %02x\n", device->tag.cstr(), data); logerror( "68681 (%s): Unhandled OPCR value: %02x\n", device->tag(), data);
duart68681->OPCR = data; duart68681->OPCR = data;
break; break;
case 0x0e: /* Set Output Port Bits */ case 0x0e: /* Set Output Port Bits */

10
src/emu/machine/74123.c
View File

@ -87,7 +87,7 @@ static void set_output(running_device *device)
timer_set( device->machine, attotime_zero, (void *) device, output, output_callback ); timer_set( device->machine, attotime_zero, (void *) device, output, output_callback );
if (LOG) logerror("74123 %s: Output: %d\n", device->tag.cstr(), output); if (LOG) logerror("74123 %s: Output: %d\n", device->tag(), output);
} }
@ -118,11 +118,11 @@ static void start_pulse(running_device *device)
{ {
timer_adjust_oneshot(chip->timer, duration, 0); timer_adjust_oneshot(chip->timer, duration, 0);
if (LOG) logerror("74123 %s: Retriggering pulse. Duration: %f\n", device->tag.cstr(), attotime_to_double(duration)); if (LOG) logerror("74123 %s: Retriggering pulse. Duration: %f\n", device->tag(), attotime_to_double(duration));
} }
else else
{ {
if (LOG) logerror("74123 %s: Retriggering failed.\n", device->tag.cstr()); if (LOG) logerror("74123 %s: Retriggering failed.\n", device->tag());
} }
} }
else else
@ -132,7 +132,7 @@ static void start_pulse(running_device *device)
set_output(device); set_output(device);
if (LOG) logerror("74123 %s: Starting pulse. Duration: %f\n", device->tag.cstr(), attotime_to_double(duration)); if (LOG) logerror("74123 %s: Starting pulse. Duration: %f\n", device->tag(), attotime_to_double(duration));
} }
} }
@ -172,7 +172,7 @@ WRITE8_DEVICE_HANDLER( ttl74123_clear_w )
{ {
timer_adjust_oneshot(chip->timer, attotime_zero, 0); timer_adjust_oneshot(chip->timer, attotime_zero, 0);
if (LOG) logerror("74123 #%s: Cleared\n", device->tag.cstr() ); if (LOG) logerror("74123 #%s: Cleared\n", device->tag() );
} }
chip->clear = data; chip->clear = data;
} }

34
src/emu/machine/adc083x.c
View File

@ -117,7 +117,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_cs_write )
if( adc083x->cs != state ) if( adc083x->cs != state )
{ {
verboselog( 2, device->machine, "adc083x_cs_write( %s, %d )\n", device->tag.cstr(), state ); verboselog( 2, device->machine, "adc083x_cs_write( %s, %d )\n", device->tag(), state );
} }
if( adc083x->cs == 0 && state != 0 ) if( adc083x->cs == 0 && state != 0 )
@ -235,7 +235,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
if( adc083x->clk != state ) if( adc083x->clk != state )
{ {
verboselog( 2, device->machine, "adc083x_clk_write( %s, %d )\n", device->tag.cstr(), state ); verboselog( 2, device->machine, "adc083x_clk_write( %s, %d )\n", device->tag(), state );
} }
if( adc083x->cs == 0 ) if( adc083x->cs == 0 )
@ -247,7 +247,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
case STATE_WAIT_FOR_START: case STATE_WAIT_FOR_START:
if( adc083x->di != 0 ) if( adc083x->di != 0 )
{ {
verboselog( 1, device->machine, "adc083x %s got start bit\n", device->tag.cstr() ); verboselog( 1, device->machine, "adc083x %s got start bit\n", device->tag() );
adc083x->state = STATE_SHIFT_MUX; adc083x->state = STATE_SHIFT_MUX;
adc083x->sars = 0; adc083x->sars = 0;
adc083x->sgl = 0; adc083x->sgl = 0;
@ -258,7 +258,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
} }
else else
{ {
verboselog( 1, device->machine, "adc083x %s not start bit\n", device->tag.cstr() ); verboselog( 1, device->machine, "adc083x %s not start bit\n", device->tag() );
} }
break; break;
@ -270,7 +270,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
{ {
adc083x->sgl = 1; adc083x->sgl = 1;
} }
verboselog( 1, device->machine, "adc083x %s sgl <- %d\n", device->tag.cstr(), adc083x->sgl ); verboselog( 1, device->machine, "adc083x %s sgl <- %d\n", device->tag(), adc083x->sgl );
break; break;
case 1: case 1:
@ -278,7 +278,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
{ {
adc083x->odd = 1; adc083x->odd = 1;
} }
verboselog( 1, device->machine, "adc083x %s odd <- %d\n", device->tag.cstr(), adc083x->odd ); verboselog( 1, device->machine, "adc083x %s odd <- %d\n", device->tag(), adc083x->odd );
break; break;
case 2: case 2:
@ -286,7 +286,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
{ {
adc083x->sel1 = 1; adc083x->sel1 = 1;
} }
verboselog( 1, device->machine, "adc083x %s sel1 <- %d\n", device->tag.cstr(), adc083x->sel1 ); verboselog( 1, device->machine, "adc083x %s sel1 <- %d\n", device->tag(), adc083x->sel1 );
break; break;
case 3: case 3:
@ -294,7 +294,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
{ {
adc083x->sel0 = 1; adc083x->sel0 = 1;
} }
verboselog( 1, device->machine, "adc083x %s sel0 <- %d\n", device->tag.cstr(), adc083x->sel0 ); verboselog( 1, device->machine, "adc083x %s sel0 <- %d\n", device->tag(), adc083x->sel0 );
break; break;
} }
@ -310,11 +310,11 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
adc083x->sars = 0; adc083x->sars = 0;
if( device->type == ADC0838 && adc083x->se != 0 ) if( device->type == ADC0838 && adc083x->se != 0 )
{ {
verboselog( 1, device->machine, "adc083x %s not se\n", device->tag.cstr() ); verboselog( 1, device->machine, "adc083x %s not se\n", device->tag() );
} }
else else
{ {
verboselog( 1, device->machine, "adc083x %s got se\n", device->tag.cstr() ); verboselog( 1, device->machine, "adc083x %s got se\n", device->tag() );
adc083x->state = STATE_OUTPUT_LSB_FIRST; adc083x->state = STATE_OUTPUT_LSB_FIRST;
adc083x->bit = 1; adc083x->bit = 1;
} }
@ -327,7 +327,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
switch( adc083x->state ) switch( adc083x->state )
{ {
case STATE_MUX_SETTLE: case STATE_MUX_SETTLE:
verboselog( 1, device->machine, "adc083x %s mux settle\n", device->tag.cstr() ); verboselog( 1, device->machine, "adc083x %s mux settle\n", device->tag() );
adc083x->output = adc083x_conversion( device ); adc083x->output = adc083x_conversion( device );
adc083x->state = STATE_OUTPUT_MSB_FIRST; adc083x->state = STATE_OUTPUT_MSB_FIRST;
adc083x->bit = 7; adc083x->bit = 7;
@ -337,7 +337,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
case STATE_OUTPUT_MSB_FIRST: case STATE_OUTPUT_MSB_FIRST:
adc083x->_do = ( adc083x->output >> adc083x->bit ) & 1; adc083x->_do = ( adc083x->output >> adc083x->bit ) & 1;
verboselog( 1, device->machine, "adc083x %s msb %d -> %d\n", device->tag.cstr(), adc083x->bit, adc083x->_do ); verboselog( 1, device->machine, "adc083x %s msb %d -> %d\n", device->tag(), adc083x->bit, adc083x->_do );
adc083x->bit--; adc083x->bit--;
if( adc083x->bit < 0 ) if( adc083x->bit < 0 )
@ -355,7 +355,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_clk_write )
case STATE_OUTPUT_LSB_FIRST: case STATE_OUTPUT_LSB_FIRST:
adc083x->_do = ( adc083x->output >> adc083x->bit ) & 1; adc083x->_do = ( adc083x->output >> adc083x->bit ) & 1;
verboselog( 1, device->machine, "adc083x %s lsb %d -> %d\n", device->tag.cstr(), adc083x->bit, adc083x->_do ); verboselog( 1, device->machine, "adc083x %s lsb %d -> %d\n", device->tag(), adc083x->bit, adc083x->_do );
adc083x->bit++; adc083x->bit++;
if( adc083x->bit == 8 ) if( adc083x->bit == 8 )
@ -385,7 +385,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_di_write )
if( adc083x->di != state ) if( adc083x->di != state )
{ {
verboselog( 2, device->machine, "adc083x_di_write( %s, %d )\n", device->tag.cstr(), state ); verboselog( 2, device->machine, "adc083x_di_write( %s, %d )\n", device->tag(), state );
} }
adc083x->di = state; adc083x->di = state;
@ -401,7 +401,7 @@ WRITE_LINE_DEVICE_HANDLER( adc083x_se_write )
if( adc083x->se != state ) if( adc083x->se != state )
{ {
verboselog( 2, device->machine, "adc083x_se_write( %s, %d )\n", device->tag.cstr(), state ); verboselog( 2, device->machine, "adc083x_se_write( %s, %d )\n", device->tag(), state );
} }
adc083x->se = state; adc083x->se = state;
@ -415,7 +415,7 @@ READ_LINE_DEVICE_HANDLER( adc083x_sars_read )
{ {
adc0831_state *adc083x = get_safe_token( device ); adc0831_state *adc083x = get_safe_token( device );
verboselog( 1, device->machine, "adc083x_sars_read( %s ) %d\n", device->tag.cstr(), adc083x->sars ); verboselog( 1, device->machine, "adc083x_sars_read( %s ) %d\n", device->tag(), adc083x->sars );
return adc083x->sars; return adc083x->sars;
} }
@ -427,7 +427,7 @@ READ_LINE_DEVICE_HANDLER( adc083x_do_read )
{ {
adc0831_state *adc083x = get_safe_token( device ); adc0831_state *adc083x = get_safe_token( device );
verboselog( 1, device->machine, "adc083x_do_read( %s ) %d\n", device->tag.cstr(), adc083x->_do ); verboselog( 1, device->machine, "adc083x_do_read( %s ) %d\n", device->tag(), adc083x->_do );
return adc083x->_do; return adc083x->_do;
} }

6
src/emu/machine/eeprom.c
View File

@ -361,11 +361,11 @@ static DEVICE_NVRAM( eeprom )
if (device->region != NULL) if (device->region != NULL)
{ {
if (device->region->length != eeprom_bytes) if (device->region->length != eeprom_bytes)
fatalerror("eeprom region '%s' wrong size (expected size = 0x%X)", device->tag.cstr(), eeprom_bytes); fatalerror("eeprom region '%s' wrong size (expected size = 0x%X)", device->tag(), eeprom_bytes);
if (eestate->intf->data_bits == 8 && (device->region->flags & ROMREGION_WIDTHMASK) != ROMREGION_8BIT) if (eestate->intf->data_bits == 8 && (device->region->flags & ROMREGION_WIDTHMASK) != ROMREGION_8BIT)
fatalerror("eeprom region '%s' needs to be an 8-bit region", device->tag.cstr()); fatalerror("eeprom region '%s' needs to be an 8-bit region", device->tag());
if (eestate->intf->data_bits == 16 && ((device->region->flags & ROMREGION_WIDTHMASK) != ROMREGION_16BIT || (device->region->flags & ROMREGION_ENDIANMASK) != ROMREGION_BE)) if (eestate->intf->data_bits == 16 && ((device->region->flags & ROMREGION_WIDTHMASK) != ROMREGION_16BIT || (device->region->flags & ROMREGION_ENDIANMASK) != ROMREGION_BE))
fatalerror("eeprom region '%s' needs to be a 16-bit big-endian region (flags=%08x)", device->tag.cstr(), device->region->flags); fatalerror("eeprom region '%s' needs to be a 16-bit big-endian region (flags=%08x)", device->tag(), device->region->flags);
for (offs = 0; offs < eeprom_length; offs++) for (offs = 0; offs < eeprom_length; offs++)
if (eestate->intf->data_bits == 8) if (eestate->intf->data_bits == 8)

38
src/emu/machine/i8255a.c
View File

@ -476,7 +476,7 @@ READ8_DEVICE_HANDLER( i8255a_r )
case MODE_1: data = read_mode1(i8255a, PORT_A); break; case MODE_1: data = read_mode1(i8255a, PORT_A); break;
case MODE_2: data = read_mode2(i8255a); break; case MODE_2: data = read_mode2(i8255a); break;
} }
if (LOG) logerror("8255A '%s' Port A Read: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Port A Read: %02x\n", device->tag(), data);
break; break;
case PORT_B: case PORT_B:
@ -485,17 +485,17 @@ READ8_DEVICE_HANDLER( i8255a_r )
case MODE_0: data = read_mode0(i8255a, PORT_B); break; case MODE_0: data = read_mode0(i8255a, PORT_B); break;
case MODE_1: data = read_mode1(i8255a, PORT_B); break; case MODE_1: data = read_mode1(i8255a, PORT_B); break;
} }
if (LOG) logerror("8255A '%s' Port B Read: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Port B Read: %02x\n", device->tag(), data);
break; break;
case PORT_C: case PORT_C:
data = read_pc(i8255a); data = read_pc(i8255a);
//if (LOG) logerror("8255A '%s' Port C Read: %02x\n", device->tag.cstr(), data); //if (LOG) logerror("8255A '%s' Port C Read: %02x\n", device->tag(), data);
break; break;
case CONTROL: case CONTROL:
data = i8255a->control; data = i8255a->control;
if (LOG) logerror("8255A '%s' Mode Control Word Read: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Mode Control Word Read: %02x\n", device->tag(), data);
break; break;
} }
@ -599,12 +599,12 @@ static void set_mode(running_device *device, UINT8 data)
devcb_call_write8(&i8255a->out_port_func[PORT_A], 0, 0xff); devcb_call_write8(&i8255a->out_port_func[PORT_A], 0, 0xff);
} }
if (LOG) logerror("8255A '%s' Group A Mode: %u\n", device->tag.cstr(), group_mode(i8255a, GROUP_A)); if (LOG) logerror("8255A '%s' Group A Mode: %u\n", device->tag(), group_mode(i8255a, GROUP_A));
if (LOG) logerror("8255A '%s' Port A Mode: %s\n", device->tag.cstr(), (port_mode(i8255a, PORT_A) == MODE_OUTPUT) ? "output" : "input"); if (LOG) logerror("8255A '%s' Port A Mode: %s\n", device->tag(), (port_mode(i8255a, PORT_A) == MODE_OUTPUT) ? "output" : "input");
if (LOG) logerror("8255A '%s' Port C Upper Mode: %s\n", device->tag.cstr(), (port_c_upper_mode(i8255a) == MODE_OUTPUT) ? "output" : "input"); if (LOG) logerror("8255A '%s' Port C Upper Mode: %s\n", device->tag(), (port_c_upper_mode(i8255a) == MODE_OUTPUT) ? "output" : "input");
if (LOG) logerror("8255A '%s' Group B Mode: %u\n", device->tag.cstr(), group_mode(i8255a, GROUP_B)); if (LOG) logerror("8255A '%s' Group B Mode: %u\n", device->tag(), group_mode(i8255a, GROUP_B));
if (LOG) logerror("8255A '%s' Port B Mode: %s\n", device->tag.cstr(), (port_mode(i8255a, PORT_B) == MODE_OUTPUT) ? "output" : "input"); if (LOG) logerror("8255A '%s' Port B Mode: %s\n", device->tag(), (port_mode(i8255a, PORT_B) == MODE_OUTPUT) ? "output" : "input");
if (LOG) logerror("8255A '%s' Port C Lower Mode: %s\n", device->tag.cstr(), (port_c_lower_mode(i8255a) == MODE_OUTPUT) ? "output" : "input"); if (LOG) logerror("8255A '%s' Port C Lower Mode: %s\n", device->tag(), (port_c_lower_mode(i8255a) == MODE_OUTPUT) ? "output" : "input");
/* group B */ /* group B */
i8255a->output[PORT_B] = 0; i8255a->output[PORT_B] = 0;
@ -697,7 +697,7 @@ WRITE8_DEVICE_HANDLER( i8255a_w )
switch (offset & 0x03) switch (offset & 0x03)
{ {
case PORT_A: case PORT_A:
if (LOG) logerror("8255A '%s' Port A Write: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Port A Write: %02x\n", device->tag(), data);
switch (group_mode(i8255a, GROUP_A)) switch (group_mode(i8255a, GROUP_A))
{ {
@ -708,7 +708,7 @@ WRITE8_DEVICE_HANDLER( i8255a_w )
break; break;
case PORT_B: case PORT_B:
if (LOG) logerror("8255A '%s' Port B Write: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Port B Write: %02x\n", device->tag(), data);
switch (group_mode(i8255a, GROUP_B)) switch (group_mode(i8255a, GROUP_B))
{ {
@ -718,7 +718,7 @@ WRITE8_DEVICE_HANDLER( i8255a_w )
break; break;
case PORT_C: case PORT_C:
if (LOG) logerror("8255A '%s' Port C Write: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Port C Write: %02x\n", device->tag(), data);
write_pc(i8255a, data); write_pc(i8255a, data);
break; break;
@ -726,7 +726,7 @@ WRITE8_DEVICE_HANDLER( i8255a_w )
case CONTROL: case CONTROL:
if (data & I8255A_CONTROL_MODE_SET) if (data & I8255A_CONTROL_MODE_SET)
{ {
if (LOG) logerror("8255A '%s' Mode Control Word: %02x\n", device->tag.cstr(), data); if (LOG) logerror("8255A '%s' Mode Control Word: %02x\n", device->tag(), data);
set_mode(device, data); set_mode(device, data);
} }
@ -735,7 +735,7 @@ WRITE8_DEVICE_HANDLER( i8255a_w )
int bit = (data >> 1) & 0x07; int bit = (data >> 1) & 0x07;
int state = BIT(data, 0); int state = BIT(data, 0);
if (LOG) logerror("8255A '%s' %s Bit %u\n", device->tag.cstr(), state ? "Set" : "Reset", bit); if (LOG) logerror("8255A '%s' %s Bit %u\n", device->tag(), state ? "Set" : "Reset", bit);
set_pc_bit(device, bit, state); set_pc_bit(device, bit, state);
} }
@ -782,7 +782,7 @@ WRITE_LINE_DEVICE_HANDLER( i8255a_pc2_w )
/* port B acknowledge */ /* port B acknowledge */
if (!i8255a->obf[PORT_B] && !state) if (!i8255a->obf[PORT_B] && !state)
{ {
if (LOG) logerror("8255A '%s' Port B Acknowledge\n", device->tag.cstr()); if (LOG) logerror("8255A '%s' Port B Acknowledge\n", device->tag());
/* clear output buffer flag */ /* clear output buffer flag */
set_obf(i8255a, PORT_B, 1); set_obf(i8255a, PORT_B, 1);
@ -793,7 +793,7 @@ WRITE_LINE_DEVICE_HANDLER( i8255a_pc2_w )
/* port B strobe */ /* port B strobe */
if (!i8255a->ibf[PORT_B] && !state) if (!i8255a->ibf[PORT_B] && !state)
{ {
if (LOG) logerror("8255A '%s' Port B Strobe\n", device->tag.cstr()); if (LOG) logerror("8255A '%s' Port B Strobe\n", device->tag());
/* read port into latch */ /* read port into latch */
i8255a->input[PORT_B] = devcb_call_read8(&i8255a->in_port_func[PORT_B], 0); i8255a->input[PORT_B] = devcb_call_read8(&i8255a->in_port_func[PORT_B], 0);
@ -814,7 +814,7 @@ WRITE_LINE_DEVICE_HANDLER( i8255a_pc4_w )
/* port A strobe */ /* port A strobe */
if (!i8255a->ibf[PORT_A] && !state) if (!i8255a->ibf[PORT_A] && !state)
{ {
if (LOG) logerror("8255A '%s' Port A Strobe\n", device->tag.cstr()); if (LOG) logerror("8255A '%s' Port A Strobe\n", device->tag());
/* read port into latch */ /* read port into latch */
i8255a->input[PORT_A] = devcb_call_read8(&i8255a->in_port_func[PORT_A], 0); i8255a->input[PORT_A] = devcb_call_read8(&i8255a->in_port_func[PORT_A], 0);
@ -834,7 +834,7 @@ WRITE_LINE_DEVICE_HANDLER( i8255a_pc6_w )
/* port A acknowledge */ /* port A acknowledge */
if (!i8255a->obf[PORT_A] && !state) if (!i8255a->obf[PORT_A] && !state)
{ {
if (LOG) logerror("8255A '%s' Port A Acknowledge\n", device->tag.cstr()); if (LOG) logerror("8255A '%s' Port A Acknowledge\n", device->tag());
/* clear output buffer flag */ /* clear output buffer flag */
set_obf(i8255a, PORT_A, 1); set_obf(i8255a, PORT_A, 1);

2
src/emu/machine/idectrl.c
View File

@ -1801,7 +1801,7 @@ static DEVICE_START( ide_controller )
/* set MAME harddisk handle */ /* set MAME harddisk handle */
config = (const ide_config *)device->baseconfig().inline_config; config = (const ide_config *)device->baseconfig().inline_config;
ide->handle = get_disk_handle(device->machine, (config->master != NULL) ? config->master : device->tag.cstr()); ide->handle = get_disk_handle(device->machine, (config->master != NULL) ? config->master : device->tag());
ide->disk = hard_disk_open(ide->handle); ide->disk = hard_disk_open(ide->handle);
assert_always(config->slave == NULL, "IDE controller does not yet support slave drives\n"); assert_always(config->slave == NULL, "IDE controller does not yet support slave drives\n");

24
src/emu/machine/ins8154.c
View File

@ -80,7 +80,7 @@ READ8_DEVICE_HANDLER( ins8154_r )
if (offset > 0x24) if (offset > 0x24)
{ {
if (VERBOSE) if (VERBOSE)
logerror("%s: INS8154 '%s' Read from invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag.cstr(), offset); logerror("%s: INS8154 '%s' Read from invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag(), offset);
return 0xff; return 0xff;
} }
@ -146,7 +146,7 @@ WRITE8_DEVICE_HANDLER( ins8154_w )
if (offset > 0x24) if (offset > 0x24)
{ {
if (VERBOSE) if (VERBOSE)
logerror("%s: INS8154 '%s' Write %02x to invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag.cstr(), data, offset); logerror("%s: INS8154 '%s' Write %02x to invalid offset %02x!\n", cpuexec_describe_context(device->machine), device->tag(), data, offset);
return; return;
} }
@ -162,21 +162,21 @@ WRITE8_DEVICE_HANDLER( ins8154_w )
case 0x22: case 0x22:
if (VERBOSE) if (VERBOSE)
logerror("%s: INS8154 '%s' ODRA set to %02x\n", cpuexec_describe_context(device->machine), device->tag.cstr(), data); logerror("%s: INS8154 '%s' ODRA set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
ins8154->odra = data; ins8154->odra = data;
break; break;
case 0x23: case 0x23:
if (VERBOSE) if (VERBOSE)
logerror("%s: INS8154 '%s' ODRB set to %02x\n", cpuexec_describe_context(device->machine), device->tag.cstr(), data); logerror("%s: INS8154 '%s' ODRB set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
ins8154->odrb = data; ins8154->odrb = data;
break; break;
case 0x24: case 0x24:
if (VERBOSE) if (VERBOSE)
logerror("%s: INS8154 '%s' MDR set to %02x\n", cpuexec_describe_context(device->machine), device->tag.cstr(), data); logerror("%s: INS8154 '%s' MDR set to %02x\n", cpuexec_describe_context(device->machine), device->tag(), data);
ins8154->mdr = data; ins8154->mdr = data;
break; break;
@ -232,13 +232,13 @@ static DEVICE_START( ins8154 )
devcb_resolve_write_line(&ins8154->out_irq_func, &intf->out_irq_func, device); devcb_resolve_write_line(&ins8154->out_irq_func, &intf->out_irq_func, device);
/* register for state saving */ /* register for state saving */
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->in_a); state_save_register_device_item(device, 0, ins8154->in_a);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->in_b); state_save_register_device_item(device, 0, ins8154->in_b);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->out_a); state_save_register_device_item(device, 0, ins8154->out_a);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->out_b); state_save_register_device_item(device, 0, ins8154->out_b);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->mdr); state_save_register_device_item(device, 0, ins8154->mdr);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->odra); state_save_register_device_item(device, 0, ins8154->odra);
state_save_register_item(device->machine, "ins8154", device->tag, 0, ins8154->odrb); state_save_register_device_item(device, 0, ins8154->odrb);
} }
static DEVICE_RESET( ins8154 ) static DEVICE_RESET( ins8154 )

8
src/emu/machine/latch8.c
View File

@ -197,7 +197,7 @@ static DEVICE_START( latch8 )
if (latch8->intf->node_map[i] ) if (latch8->intf->node_map[i] )
{ {
if (!latch8->intf->node_device[i]) if (!latch8->intf->node_device[i])
fatalerror("Device %s: Bit %d has invalid discrete device\n", device->tag.cstr(), i); fatalerror("Device %s: Bit %d has invalid discrete device\n", device->tag(), i);
latch8->has_node_map = 1; latch8->has_node_map = 1;
} }
@ -206,10 +206,10 @@ static DEVICE_START( latch8 )
if (latch8->intf->devread[i].tag != NULL) if (latch8->intf->devread[i].tag != NULL)
{ {
if (latch8->devices[i] != NULL) if (latch8->devices[i] != NULL)
fatalerror("Device %s: Bit %d already has a handler.\n", device->tag.cstr(), i); fatalerror("Device %s: Bit %d already has a handler.\n", device->tag(), i);
latch8->devices[i] = device->machine->device(latch8->intf->devread[i].tag); latch8->devices[i] = device->machine->device(latch8->intf->devread[i].tag);
if (latch8->devices[i] == NULL) if (latch8->devices[i] == NULL)
fatalerror("Device %s: Unable to find device %s\n", device->tag.cstr(), latch8->intf->devread[i].tag); fatalerror("Device %s: Unable to find device %s\n", device->tag(), latch8->intf->devread[i].tag);
latch8->has_devread = 1; latch8->has_devread = 1;
} }
@ -218,7 +218,7 @@ static DEVICE_START( latch8 )
if (latch8->intf->devread[i].read_handler != NULL) if (latch8->intf->devread[i].read_handler != NULL)
{ {
if (latch8->devices[i] != NULL) if (latch8->devices[i] != NULL)
fatalerror("Device %s: Bit %d already has a handler.\n", device->tag.cstr(), i); fatalerror("Device %s: Bit %d already has a handler.\n", device->tag(), i);
latch8->has_read = 1; latch8->has_read = 1;
} }

4
src/emu/machine/ldcore.c
View File

@ -1141,7 +1141,7 @@ static void configuration_save(running_machine *machine, int config_type, xml_da
int changed = FALSE; int changed = FALSE;
/* output the basics */ /* output the basics */
xml_set_attribute(ldnode, "tag", device->tag); xml_set_attribute(ldnode, "tag", device->tag());
/* add an overlay node */ /* add an overlay node */
overnode = xml_add_child(ldnode, "overlay", NULL); overnode = xml_add_child(ldnode, "overlay", NULL);
@ -1333,7 +1333,7 @@ static void init_disc(running_device *device)
if (config->getdisc != NULL) if (config->getdisc != NULL)
ldcore->disc = (*config->getdisc)(device); ldcore->disc = (*config->getdisc)(device);
else else
ldcore->disc = get_disk_handle(device->machine, device->tag); ldcore->disc = get_disk_handle(device->machine, device->tag());
/* set default parameters */ /* set default parameters */
ldcore->width = 720; ldcore->width = 720;

4
src/emu/machine/pci.c
View File

@ -136,7 +136,7 @@ READ32_DEVICE_HANDLER( pci_32le_r )
} }
if (LOG_PCI) if (LOG_PCI)
logerror("pci_32le_r('%s'): offset=%d result=0x%08X\n", device->tag.cstr(), offset, result); logerror("pci_32le_r('%s'): offset=%d result=0x%08X\n", device->tag(), offset, result);
return result; return result;
} }
@ -150,7 +150,7 @@ WRITE32_DEVICE_HANDLER( pci_32le_w )
offset %= 2; offset %= 2;
if (LOG_PCI) if (LOG_PCI)
logerror("pci_32le_w('%s'): offset=%d data=0x%08X\n", device->tag.cstr(), offset, data); logerror("pci_32le_w('%s'): offset=%d data=0x%08X\n", device->tag(), offset, data);
switch (offset) switch (offset)
{ {

90
src/emu/machine/z80dart.c
View File

@ -242,7 +242,7 @@ static void take_interrupt(running_device *device, int channel, int level)
UINT8 vector = ch->wr[2]; UINT8 vector = ch->wr[2];
int priority = (channel << 2) | level; int priority = (channel << 2) | level;
LOG(("Z80DART \"%s\" Channel %c : Interrupt Request %u\n", device->tag.cstr(), 'A' + channel, level)); LOG(("Z80DART \"%s\" Channel %c : Interrupt Request %u\n", device->tag(), 'A' + channel, level));
if ((channel == Z80DART_CH_B) && (ch->wr[1] & Z80DART_WR1_STATUS_VECTOR)) if ((channel == Z80DART_CH_B) && (ch->wr[1] & Z80DART_WR1_STATUS_VECTOR))
{ {
@ -696,7 +696,7 @@ READ8_DEVICE_HANDLER( z80dart_c_r )
break; break;
} }
LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Control Register Read '%02x'\n", device->tag(), 'A' + channel, data));
return data; return data;
} }
@ -713,7 +713,7 @@ WRITE8_DEVICE_HANDLER( z80dart_c_w )
int reg = ch->wr[0] & Z80DART_WR0_REGISTER_MASK; int reg = ch->wr[0] & Z80DART_WR0_REGISTER_MASK;
LOG(("Z80DART \"%s\" Channel %c : Control Register Write '%02x'\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Control Register Write '%02x'\n", device->tag(), 'A' + channel, data));
/* write data to selected register */ /* write data to selected register */
ch->wr[reg] = data; ch->wr[reg] = data;
@ -739,62 +739,62 @@ WRITE8_DEVICE_HANDLER( z80dart_c_w )
ch->rx_rr0_latch = 0; ch->rx_rr0_latch = 0;
LOG(("Z80DART \"%s\" Channel %c : Reset External/Status Interrupt\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Reset External/Status Interrupt\n", device->tag(), 'A' + channel));
break; break;
case Z80DART_WR0_CHANNEL_RESET: case Z80DART_WR0_CHANNEL_RESET:
/* channel reset */ /* channel reset */
LOG(("Z80DART \"%s\" Channel %c : Channel Reset\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Channel Reset\n", device->tag(), 'A' + channel));
reset_channel(device, channel); reset_channel(device, channel);
break; break;
case Z80DART_WR0_ENABLE_INT_NEXT_RX: case Z80DART_WR0_ENABLE_INT_NEXT_RX:
/* enable interrupt on next receive character */ /* enable interrupt on next receive character */
LOG(("Z80DART \"%s\" Channel %c : Enable Interrupt on Next Received Character\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Enable Interrupt on Next Received Character\n", device->tag(), 'A' + channel));
ch->rx_first = 1; ch->rx_first = 1;
break; break;
case Z80DART_WR0_RESET_TX_INT: case Z80DART_WR0_RESET_TX_INT:
/* reset transmitter interrupt pending */ /* reset transmitter interrupt pending */
LOG(("Z80DART \"%s\" Channel %c : Reset Transmitter Interrupt Pending\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Reset Transmitter Interrupt Pending\n", device->tag(), 'A' + channel));
break; break;
case Z80DART_WR0_ERROR_RESET: case Z80DART_WR0_ERROR_RESET:
/* error reset */ /* error reset */
LOG(("Z80DART \"%s\" Channel %c : Error Reset\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Error Reset\n", device->tag(), 'A' + channel));
ch->rr[1] &= ~(Z80DART_RR1_FRAMING_ERROR | Z80DART_RR1_RX_OVERRUN_ERROR | Z80DART_RR1_PARITY_ERROR); ch->rr[1] &= ~(Z80DART_RR1_FRAMING_ERROR | Z80DART_RR1_RX_OVERRUN_ERROR | Z80DART_RR1_PARITY_ERROR);
break; break;
case Z80DART_WR0_RETURN_FROM_INT: case Z80DART_WR0_RETURN_FROM_INT:
/* return from interrupt */ /* return from interrupt */
LOG(("Z80DART \"%s\" Channel %c : Return from Interrupt\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Return from Interrupt\n", device->tag(), 'A' + channel));
z80dart_irq_reti(device); z80dart_irq_reti(device);
break; break;
} }
break; break;
case 1: case 1:
LOG(("Z80DART \"%s\" Channel %c : External Interrupt Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR1_EXT_INT_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : External Interrupt Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR1_EXT_INT_ENABLE) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Transmit Interrupt Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR1_TX_INT_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Transmit Interrupt Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR1_TX_INT_ENABLE) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Status Affects Vector %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR1_STATUS_VECTOR) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Status Affects Vector %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR1_STATUS_VECTOR) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Wait/Ready Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR1_WRDY_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Wait/Ready Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR1_WRDY_ENABLE) ? 1 : 0));
switch (data & Z80DART_WR1_RX_INT_ENABLE_MASK) switch (data & Z80DART_WR1_RX_INT_ENABLE_MASK)
{ {
case Z80DART_WR1_RX_INT_DISABLE: case Z80DART_WR1_RX_INT_DISABLE:
LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt Disabled\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt Disabled\n", device->tag(), 'A' + channel));
break; break;
case Z80DART_WR1_RX_INT_FIRST: case Z80DART_WR1_RX_INT_FIRST:
LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on First Character\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on First Character\n", device->tag(), 'A' + channel));
break; break;
case Z80DART_WR1_RX_INT_ALL_PARITY: case Z80DART_WR1_RX_INT_ALL_PARITY:
LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on All Characters, Parity Affects Vector\n", device->tag(), 'A' + channel));
break; break;
case Z80DART_WR1_RX_INT_ALL: case Z80DART_WR1_RX_INT_ALL:
LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on All Characters\n", device->tag.cstr(), 'A' + channel)); LOG(("Z80DART \"%s\" Channel %c : Receiver Interrupt on All Characters\n", device->tag(), 'A' + channel));
break; break;
} }
@ -804,28 +804,28 @@ WRITE8_DEVICE_HANDLER( z80dart_c_w )
case 2: case 2:
/* interrupt vector */ /* interrupt vector */
check_interrupts(device); check_interrupts(device);
LOG(("Z80DART \"%s\" Channel %c : Interrupt Vector %02x\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Interrupt Vector %02x\n", device->tag(), 'A' + channel, data));
break; break;
case 3: case 3:
LOG(("Z80DART \"%s\" Channel %c : Receiver Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR3_RX_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Receiver Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR3_RX_ENABLE) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Auto Enables %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR3_AUTO_ENABLES) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Auto Enables %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR3_AUTO_ENABLES) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Receiver Bits/Character %u\n", device->tag.cstr(), 'A' + channel, get_rx_word_length(ch))); LOG(("Z80DART \"%s\" Channel %c : Receiver Bits/Character %u\n", device->tag(), 'A' + channel, get_rx_word_length(ch)));
break; break;
case 4: case 4:
LOG(("Z80DART \"%s\" Channel %c : Parity Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR4_PARITY_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Parity Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR4_PARITY_ENABLE) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Parity %s\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR4_PARITY_EVEN) ? "Even" : "Odd")); LOG(("Z80DART \"%s\" Channel %c : Parity %s\n", device->tag(), 'A' + channel, (data & Z80DART_WR4_PARITY_EVEN) ? "Even" : "Odd"));
LOG(("Z80DART \"%s\" Channel %c : Stop Bits %f\n", device->tag.cstr(), 'A' + channel, get_stop_bits(ch))); LOG(("Z80DART \"%s\" Channel %c : Stop Bits %f\n", device->tag(), 'A' + channel, get_stop_bits(ch)));
LOG(("Z80DART \"%s\" Channel %c : Clock Mode %uX\n", device->tag.cstr(), 'A' + channel, get_clock_mode(ch))); LOG(("Z80DART \"%s\" Channel %c : Clock Mode %uX\n", device->tag(), 'A' + channel, get_clock_mode(ch)));
break; break;
case 5: case 5:
LOG(("Z80DART \"%s\" Channel %c : Transmitter Enable %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR5_TX_ENABLE) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Transmitter Enable %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR5_TX_ENABLE) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Transmitter Bits/Character %u\n", device->tag.cstr(), 'A' + channel, get_tx_word_length(ch))); LOG(("Z80DART \"%s\" Channel %c : Transmitter Bits/Character %u\n", device->tag(), 'A' + channel, get_tx_word_length(ch)));
LOG(("Z80DART \"%s\" Channel %c : Send Break %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR5_SEND_BREAK) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Send Break %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR5_SEND_BREAK) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Request to Send %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR5_RTS) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Request to Send %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR5_RTS) ? 1 : 0));
LOG(("Z80DART \"%s\" Channel %c : Data Terminal Ready %u\n", device->tag.cstr(), 'A' + channel, (data & Z80DART_WR5_DTR) ? 1 : 0)); LOG(("Z80DART \"%s\" Channel %c : Data Terminal Ready %u\n", device->tag(), 'A' + channel, (data & Z80DART_WR5_DTR) ? 1 : 0));
if (data & Z80DART_WR5_RTS) if (data & Z80DART_WR5_RTS)
{ {
@ -876,7 +876,7 @@ READ8_DEVICE_HANDLER( z80dart_d_r )
} }
} }
LOG(("Z80DART \"%s\" Channel %c : Data Register Read '%02x'\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Data Register Read '%02x'\n", device->tag(), 'A' + channel, data));
return data; return data;
} }
@ -896,7 +896,7 @@ WRITE8_DEVICE_HANDLER( z80dart_d_w )
ch->rr[0] &= ~Z80DART_RR0_TX_BUFFER_EMPTY; ch->rr[0] &= ~Z80DART_RR0_TX_BUFFER_EMPTY;
ch->rr[1] &= ~Z80DART_RR1_ALL_SENT; ch->rr[1] &= ~Z80DART_RR1_ALL_SENT;
LOG(("Z80DART \"%s\" Channel %c : Data Register Write '%02x'\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Data Register Write '%02x'\n", device->tag(), 'A' + channel, data));
} }
/*------------------------------------------------- /*-------------------------------------------------
@ -908,7 +908,7 @@ void z80dart_receive_data(running_device *device, int channel, UINT8 data)
z80dart_t *z80dart = get_safe_token(device); z80dart_t *z80dart = get_safe_token(device);
dart_channel *ch = &z80dart->channel[channel]; dart_channel *ch = &z80dart->channel[channel];
LOG(("Z80DART \"%s\" Channel %c : Receive Data Byte '%02x'\n", device->tag.cstr(), 'A' + channel, data)); LOG(("Z80DART \"%s\" Channel %c : Receive Data Byte '%02x'\n", device->tag(), 'A' + channel, data));
if (ch->rx_fifo == 2) if (ch->rx_fifo == 2)
{ {
@ -969,7 +969,7 @@ static void cts_w(running_device *device, int channel, int state)
z80dart_t *z80dart = get_safe_token(device); z80dart_t *z80dart = get_safe_token(device);
dart_channel *ch = &z80dart->channel[channel]; dart_channel *ch = &z80dart->channel[channel];
LOG(("Z80DART \"%s\" Channel %c : CTS %u\n", device->tag.cstr(), 'A' + channel, state)); LOG(("Z80DART \"%s\" Channel %c : CTS %u\n", device->tag(), 'A' + channel, state));
if (ch->cts != state) if (ch->cts != state)
{ {
@ -1028,7 +1028,7 @@ static void dcd_w(running_device *device, int channel, int state)
z80dart_t *z80dart = get_safe_token(device); z80dart_t *z80dart = get_safe_token(device);
dart_channel *ch = &z80dart->channel[channel]; dart_channel *ch = &z80dart->channel[channel];
LOG(("Z80DART \"%s\" Channel %c : DCD %u\n", device->tag.cstr(), 'A' + channel, state)); LOG(("Z80DART \"%s\" Channel %c : DCD %u\n", device->tag(), 'A' + channel, state));
if (ch->dcd != state) if (ch->dcd != state)
{ {
@ -1088,7 +1088,7 @@ static void ri_w(running_device *device, int channel, int state)
z80dart_t *z80dart = get_safe_token(device); z80dart_t *z80dart = get_safe_token(device);
dart_channel *ch = &z80dart->channel[channel]; dart_channel *ch = &z80dart->channel[channel];
LOG(("Z80DART \"%s\" Channel %c : RI %u\n", device->tag.cstr(), 'A' + channel, state)); LOG(("Z80DART \"%s\" Channel %c : RI %u\n", device->tag(), 'A' + channel, state));
if (ch->ri != state) if (ch->ri != state)
{ {
@ -1145,7 +1145,7 @@ WRITE_LINE_DEVICE_HANDLER( z80dart_rxca_w )
if (!state) return; if (!state) return;
LOG(("Z80DART \"%s\" Channel A : Receiver Clock Pulse\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Channel A : Receiver Clock Pulse\n", device->tag()));
ch->rx_clock++; ch->rx_clock++;
@ -1171,7 +1171,7 @@ WRITE_LINE_DEVICE_HANDLER( z80dart_txca_w )
if (!state) return; if (!state) return;
LOG(("Z80DART \"%s\" Channel A : Transmitter Clock Pulse\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Channel A : Transmitter Clock Pulse\n", device->tag()));
ch->tx_clock++; ch->tx_clock++;
@ -1198,7 +1198,7 @@ WRITE_LINE_DEVICE_HANDLER( z80dart_rxtxcb_w )
if (!state) return; if (!state) return;
LOG(("Z80DART \"%s\" Channel A : Receiver/Transmitter Clock Pulse\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Channel A : Receiver/Transmitter Clock Pulse\n", device->tag()));
ch->rx_clock++; ch->rx_clock++;
ch->tx_clock++; ch->tx_clock++;
@ -1251,7 +1251,7 @@ static int z80dart_irq_state(running_device *device)
int state = 0; int state = 0;
int i; int i;
LOG(("Z80DART \"%s\" : Interrupt State B:%d%d%d%d A:%d%d%d%d\n", device->tag.cstr(), LOG(("Z80DART \"%s\" : Interrupt State B:%d%d%d%d A:%d%d%d%d\n", device->tag(),
z80dart->int_state[0], z80dart->int_state[1], z80dart->int_state[2], z80dart->int_state[3], z80dart->int_state[0], z80dart->int_state[1], z80dart->int_state[2], z80dart->int_state[3],
z80dart->int_state[4], z80dart->int_state[5], z80dart->int_state[6], z80dart->int_state[7])); z80dart->int_state[4], z80dart->int_state[5], z80dart->int_state[6], z80dart->int_state[7]));
@ -1267,7 +1267,7 @@ static int z80dart_irq_state(running_device *device)
state |= z80dart->int_state[i]; state |= z80dart->int_state[i];
} }
LOG(("Z80DART \"%s\" : Interrupt State %u\n", device->tag.cstr(), state)); LOG(("Z80DART \"%s\" : Interrupt State %u\n", device->tag(), state));
return state; return state;
} }
@ -1281,7 +1281,7 @@ static int z80dart_irq_ack(running_device *device)
z80dart_t *z80dart = get_safe_token( device ); z80dart_t *z80dart = get_safe_token( device );
int i; int i;
LOG(("Z80DART \"%s\" Interrupt Acknowledge\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Interrupt Acknowledge\n", device->tag()));
/* loop over all interrupt sources */ /* loop over all interrupt sources */
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
@ -1294,7 +1294,7 @@ static int z80dart_irq_ack(running_device *device)
z80dart->channel[Z80DART_CH_A].rr[0] &= ~Z80DART_RR0_INTERRUPT_PENDING; z80dart->channel[Z80DART_CH_A].rr[0] &= ~Z80DART_RR0_INTERRUPT_PENDING;
check_interrupts(device); check_interrupts(device);
LOG(("Z80DART \"%s\" : Interrupt Acknowledge Vector %02x\n", device->tag.cstr(), z80dart->channel[Z80DART_CH_B].rr[2])); LOG(("Z80DART \"%s\" : Interrupt Acknowledge Vector %02x\n", device->tag(), z80dart->channel[Z80DART_CH_B].rr[2]));
return z80dart->channel[Z80DART_CH_B].rr[2]; return z80dart->channel[Z80DART_CH_B].rr[2];
} }
@ -1314,7 +1314,7 @@ static void z80dart_irq_reti(running_device *device)
z80dart_t *z80dart = get_safe_token( device ); z80dart_t *z80dart = get_safe_token( device );
int i; int i;
LOG(("Z80DART \"%s\" Return from Interrupt\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Return from Interrupt\n", device->tag()));
/* loop over all interrupt sources */ /* loop over all interrupt sources */
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
@ -1463,7 +1463,7 @@ static DEVICE_RESET( z80dart )
{ {
int channel; int channel;
LOG(("Z80DART \"%s\" Reset\n", device->tag.cstr())); LOG(("Z80DART \"%s\" Reset\n", device->tag()));
for (channel = Z80DART_CH_A; channel <= Z80DART_CH_B; channel++) for (channel = Z80DART_CH_A; channel <= Z80DART_CH_B; channel++)
{ {

10
src/emu/machine/z80dma.c
View File

@ -222,7 +222,7 @@ static void trigger_interrupt(running_device *device, int level)
z80dma->status &= ~0x08; z80dma->status &= ~0x08;
if (LOG) logerror("Z80DMA '%s' Interrupt Pending\n", device->tag.cstr()); if (LOG) logerror("Z80DMA '%s' Interrupt Pending\n", device->tag());
interrupt_check(z80dma); interrupt_check(z80dma);
} }
@ -390,7 +390,7 @@ static TIMER_CALLBACK( z80dma_timerproc )
if(TRANSFER_MODE(z80dma) == TM_TRANSFER) z80dma->status |= 0x10; // no match found if(TRANSFER_MODE(z80dma) == TM_TRANSFER) z80dma->status |= 0x10; // no match found
z80dma_update_status(device); z80dma_update_status(device);
if (LOG) logerror("Z80DMA '%s' End of Block\n", device->tag.cstr()); if (LOG) logerror("Z80DMA '%s' End of Block\n", device->tag());
if (INT_ON_END_OF_BLOCK(z80dma)) if (INT_ON_END_OF_BLOCK(z80dma))
{ {
@ -711,7 +711,7 @@ static int z80dma_irq_state(running_device *device)
state = Z80_DAISY_IEO; state = Z80_DAISY_IEO;
} }
if (LOG) logerror("Z80DMA '%s' Interrupt State: %u\n", device->tag.cstr(), state); if (LOG) logerror("Z80DMA '%s' Interrupt State: %u\n", device->tag(), state);
return state; return state;
} }
@ -726,7 +726,7 @@ static int z80dma_irq_ack(running_device *device)
if (z80dma->ip) if (z80dma->ip)
{ {
if (LOG) logerror("Z80DMA '%s' Interrupt Acknowledge\n", device->tag.cstr()); if (LOG) logerror("Z80DMA '%s' Interrupt Acknowledge\n", device->tag());
/* clear interrupt pending flag */ /* clear interrupt pending flag */
z80dma->ip = 0; z80dma->ip = 0;
@ -756,7 +756,7 @@ static void z80dma_irq_reti(running_device *device)
if (z80dma->ius) if (z80dma->ius)
{ {
if (LOG) logerror("Z80DMA '%s' Return from Interrupt\n", device->tag.cstr()); if (LOG) logerror("Z80DMA '%s' Return from Interrupt\n", device->tag());
/* clear interrupt under service flag */ /* clear interrupt under service flag */
z80dma->ius = 0; z80dma->ius = 0;

34
src/emu/machine/z80pio.c
View File

@ -129,7 +129,7 @@ static void check_interrupts(running_device *device)
{ {
/* trigger interrupt */ /* trigger interrupt */
port->ip = 1; port->ip = 1;
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Pending\n", device->tag.cstr(), 'A' + index); if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Pending\n", device->tag(), 'A' + index);
} }
port->match = match; port->match = match;
@ -150,7 +150,7 @@ static void trigger_interrupt(running_device *device, int index)
pio_port *port = &z80pio->port[index]; pio_port *port = &z80pio->port[index];
port->ip = 1; port->ip = 1;
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Pending\n", device->tag.cstr(), 'A' + index); if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Pending\n", device->tag(), 'A' + index);
check_interrupts(device); check_interrupts(device);
} }
@ -162,7 +162,7 @@ static void set_rdy(running_device *device, int index, int state)
if (port->rdy == state) return; if (port->rdy == state) return;
if (LOG) logerror("Z80PIO '%s' Port %c Ready: %u\n", device->tag.cstr(), 'A' + index, state); if (LOG) logerror("Z80PIO '%s' Port %c Ready: %u\n", device->tag(), 'A' + index, state);
port->rdy = state; port->rdy = state;
devcb_call_write_line(&port->out_rdy_func, state); devcb_call_write_line(&port->out_rdy_func, state);
@ -188,7 +188,7 @@ static void set_mode(running_device *device, int index, int mode)
z80pio_t *z80pio = get_safe_token(device); z80pio_t *z80pio = get_safe_token(device);
pio_port *port = &z80pio->port[index]; pio_port *port = &z80pio->port[index];
if (LOG) logerror("Z80PIO '%s' Port %c Mode: %u\n", device->tag.cstr(), 'A' + index, mode); if (LOG) logerror("Z80PIO '%s' Port %c Mode: %u\n", device->tag(), 'A' + index, mode);
switch (mode) switch (mode)
{ {
@ -211,7 +211,7 @@ static void set_mode(running_device *device, int index, int mode)
case MODE_BIDIRECTIONAL: case MODE_BIDIRECTIONAL:
if (index == PORT_B) if (index == PORT_B)
{ {
logerror("Z80PIO '%s' Port %c Invalid Mode: %u!\n", device->tag.cstr(), 'A' + index, mode); logerror("Z80PIO '%s' Port %c Invalid Mode: %u!\n", device->tag(), 'A' + index, mode);
} }
else else
{ {
@ -260,7 +260,7 @@ WRITE8_DEVICE_HANDLER( z80pio_c_w )
{ {
/* load interrupt vector */ /* load interrupt vector */
port->vector = data; port->vector = data;
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Vector: %02x\n", device->tag.cstr(), 'A' + index, data); if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Vector: %02x\n", device->tag(), 'A' + index, data);
/* set interrupt enable */ /* set interrupt enable */
port->icw |= ICW_ENABLE_INT; port->icw |= ICW_ENABLE_INT;
@ -280,10 +280,10 @@ WRITE8_DEVICE_HANDLER( z80pio_c_w )
if (LOG) if (LOG)
{ {
logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", device->tag.cstr(), 'A' + index, BIT(data, 7)); logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", device->tag(), 'A' + index, BIT(data, 7));
logerror("Z80PIO '%s' Port %c Logic: %s\n", device->tag.cstr(), 'A' + index, BIT(data, 6) ? "AND" : "OR"); logerror("Z80PIO '%s' Port %c Logic: %s\n", device->tag(), 'A' + index, BIT(data, 6) ? "AND" : "OR");
logerror("Z80PIO '%s' Port %c Active %s\n", device->tag.cstr(), 'A' + index, BIT(data, 5) ? "High" : "Low"); logerror("Z80PIO '%s' Port %c Active %s\n", device->tag(), 'A' + index, BIT(data, 5) ? "High" : "Low");
logerror("Z80PIO '%s' Port %c Mask Follows: %u\n", device->tag.cstr(), 'A' + index, BIT(data, 4)); logerror("Z80PIO '%s' Port %c Mask Follows: %u\n", device->tag(), 'A' + index, BIT(data, 4));
} }
if (port->icw & ICW_MASK_FOLLOWS) if (port->icw & ICW_MASK_FOLLOWS)
@ -305,7 +305,7 @@ WRITE8_DEVICE_HANDLER( z80pio_c_w )
case 0x03: /* set interrupt enable flip-flop */ case 0x03: /* set interrupt enable flip-flop */
port->icw = (data & 0x80) | (port->icw & 0x7f); port->icw = (data & 0x80) | (port->icw & 0x7f);
if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", device->tag.cstr(), 'A' + index, BIT(data, 7)); if (LOG) logerror("Z80PIO '%s' Port %c Interrupt Enable: %u\n", device->tag(), 'A' + index, BIT(data, 7));
/* set interrupt enable */ /* set interrupt enable */
port->ie = BIT(port->icw, 7); port->ie = BIT(port->icw, 7);
@ -313,14 +313,14 @@ WRITE8_DEVICE_HANDLER( z80pio_c_w )
break; break;
default: default:
logerror("Z80PIO '%s' Port %c Invalid Control Word: %02x!\n", device->tag.cstr(), 'A' + index, data); logerror("Z80PIO '%s' Port %c Invalid Control Word: %02x!\n", device->tag(), 'A' + index, data);
} }
} }
break; break;
case IOR: /* data direction register */ case IOR: /* data direction register */
port->ior = data; port->ior = data;
if (LOG) logerror("Z80PIO '%s' Port %c IOR: %02x\n", device->tag.cstr(), 'A' + index, data); if (LOG) logerror("Z80PIO '%s' Port %c IOR: %02x\n", device->tag(), 'A' + index, data);
/* set interrupt enable */ /* set interrupt enable */
port->ie = BIT(port->icw, 7); port->ie = BIT(port->icw, 7);
@ -332,7 +332,7 @@ WRITE8_DEVICE_HANDLER( z80pio_c_w )
case MASK: /* interrupt mask */ case MASK: /* interrupt mask */
port->mask = data; port->mask = data;
if (LOG) logerror("Z80PIO '%s' Port %c Mask: %02x\n", device->tag.cstr(), 'A' + index, data); if (LOG) logerror("Z80PIO '%s' Port %c Mask: %02x\n", device->tag(), 'A' + index, data);
/* set interrupt enable */ /* set interrupt enable */
port->ie = BIT(port->icw, 7); port->ie = BIT(port->icw, 7);
@ -622,7 +622,7 @@ static void strobe(running_device *device, int index, int state)
z80pio_t *z80pio = get_safe_token(device); z80pio_t *z80pio = get_safe_token(device);
pio_port *port = &z80pio->port[index]; pio_port *port = &z80pio->port[index];
if (LOG) logerror("Z80PIO '%s' Port %c Strobe: %u\n", device->tag.cstr(), 'A' + index, state); if (LOG) logerror("Z80PIO '%s' Port %c Strobe: %u\n", device->tag(), 'A' + index, state);
if (z80pio->port[PORT_A].mode == MODE_BIDIRECTIONAL) if (z80pio->port[PORT_A].mode == MODE_BIDIRECTIONAL)
{ {
@ -763,7 +763,7 @@ static int z80pio_irq_ack(running_device *device)
if (port->ip) if (port->ip)
{ {
if (LOG) logerror("Z80PIO '%s' Interrupt Acknowledge\n", device->tag.cstr()); if (LOG) logerror("Z80PIO '%s' Interrupt Acknowledge\n", device->tag());
/* clear interrupt pending flag */ /* clear interrupt pending flag */
port->ip = 0; port->ip = 0;
@ -796,7 +796,7 @@ static void z80pio_irq_reti(running_device *device)
if (port->ius) if (port->ius)
{ {
if (LOG) logerror("Z80PIO '%s' Return from Interrupt\n", device->tag.cstr()); if (LOG) logerror("Z80PIO '%s' Return from Interrupt\n", device->tag());
/* clear interrupt under service flag */ /* clear interrupt under service flag */
port->ius = 0; port->ius = 0;

62
src/emu/machine/z80sti.c
View File

@ -336,39 +336,39 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
switch (z80sti->pvr & 0x07) switch (z80sti->pvr & 0x07)
{ {
case Z80STI_REGISTER_IR_SCR: case Z80STI_REGISTER_IR_SCR:
LOG(("Z80STI '%s' Sync Character Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Sync Character Register: %x\n", device->tag(), data));
z80sti->scr = data; z80sti->scr = data;
break; break;
case Z80STI_REGISTER_IR_TDDR: case Z80STI_REGISTER_IR_TDDR:
LOG(("Z80STI '%s' Timer D Data Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Timer D Data Register: %x\n", device->tag(), data));
z80sti->tdr[TIMER_D] = data; z80sti->tdr[TIMER_D] = data;
break; break;
case Z80STI_REGISTER_IR_TCDR: case Z80STI_REGISTER_IR_TCDR:
LOG(("Z80STI '%s' Timer C Data Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Timer C Data Register: %x\n", device->tag(), data));
z80sti->tdr[TIMER_C] = data; z80sti->tdr[TIMER_C] = data;
break; break;
case Z80STI_REGISTER_IR_AER: case Z80STI_REGISTER_IR_AER:
LOG(("Z80STI '%s' Active Edge Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Active Edge Register: %x\n", device->tag(), data));
z80sti->aer = data; z80sti->aer = data;
break; break;
case Z80STI_REGISTER_IR_IERB: case Z80STI_REGISTER_IR_IERB:
LOG(("Z80STI '%s' Interrupt Enable Register B: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Enable Register B: %x\n", device->tag(), data));
z80sti->ier = (z80sti->ier & 0xff00) | data; z80sti->ier = (z80sti->ier & 0xff00) | data;
check_interrupts(z80sti); check_interrupts(z80sti);
break; break;
case Z80STI_REGISTER_IR_IERA: case Z80STI_REGISTER_IR_IERA:
LOG(("Z80STI '%s' Interrupt Enable Register A: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Enable Register A: %x\n", device->tag(), data));
z80sti->ier = (data << 8) | (z80sti->ier & 0xff); z80sti->ier = (data << 8) | (z80sti->ier & 0xff);
check_interrupts(z80sti); check_interrupts(z80sti);
break; break;
case Z80STI_REGISTER_IR_DDR: case Z80STI_REGISTER_IR_DDR:
LOG(("Z80STI '%s' Data Direction Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Data Direction Register: %x\n", device->tag(), data));
z80sti->ddr = data; z80sti->ddr = data;
break; break;
@ -379,8 +379,8 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
z80sti->tcdc = data; z80sti->tcdc = data;
LOG(("Z80STI '%s' Timer C Prescaler: %u\n", device->tag.cstr(), tcc)); LOG(("Z80STI '%s' Timer C Prescaler: %u\n", device->tag(), tcc));
LOG(("Z80STI '%s' Timer D Prescaler: %u\n", device->tag.cstr(), tdc)); LOG(("Z80STI '%s' Timer D Prescaler: %u\n", device->tag(), tdc));
if (tcc) if (tcc)
timer_adjust_periodic(z80sti->timer[TIMER_C], ATTOTIME_IN_HZ(device->clock / tcc), 0, ATTOTIME_IN_HZ(device->clock / tcc)); timer_adjust_periodic(z80sti->timer[TIMER_C], ATTOTIME_IN_HZ(device->clock / tcc), 0, ATTOTIME_IN_HZ(device->clock / tcc));
@ -394,7 +394,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
if (BIT(data, 7)) if (BIT(data, 7))
{ {
LOG(("Z80STI '%s' Timer A Reset\n", device->tag.cstr())); LOG(("Z80STI '%s' Timer A Reset\n", device->tag()));
z80sti->to[TIMER_A] = 0; z80sti->to[TIMER_A] = 0;
devcb_call_write_line(&z80sti->out_tao_func, z80sti->to[TIMER_A]); devcb_call_write_line(&z80sti->out_tao_func, z80sti->to[TIMER_A]);
@ -402,7 +402,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
if (BIT(data, 3)) if (BIT(data, 3))
{ {
LOG(("Z80STI '%s' Timer B Reset\n", device->tag.cstr())); LOG(("Z80STI '%s' Timer B Reset\n", device->tag()));
z80sti->to[TIMER_B] = 0; z80sti->to[TIMER_B] = 0;
devcb_call_write_line(&z80sti->out_tbo_func, z80sti->to[TIMER_B]); devcb_call_write_line(&z80sti->out_tbo_func, z80sti->to[TIMER_B]);
@ -413,7 +413,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
break; break;
case Z80STI_REGISTER_GPIP: case Z80STI_REGISTER_GPIP:
LOG(("Z80STI '%s' General Purpose I/O Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' General Purpose I/O Register: %x\n", device->tag(), data));
z80sti->gpip = data & z80sti->ddr; z80sti->gpip = data & z80sti->ddr;
devcb_call_write8(&z80sti->out_gpio_func, 0, z80sti->gpip); devcb_call_write8(&z80sti->out_gpio_func, 0, z80sti->gpip);
break; break;
@ -421,7 +421,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
case Z80STI_REGISTER_IPRB: case Z80STI_REGISTER_IPRB:
{ {
int i; int i;
LOG(("Z80STI '%s' Interrupt Pending Register B: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Pending Register B: %x\n", device->tag(), data));
z80sti->ipr &= (z80sti->ipr & 0xff00) | data; z80sti->ipr &= (z80sti->ipr & 0xff00) | data;
for (i = 0; i < 16; i++) for (i = 0; i < 16; i++)
@ -436,7 +436,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
case Z80STI_REGISTER_IPRA: case Z80STI_REGISTER_IPRA:
{ {
int i; int i;
LOG(("Z80STI '%s' Interrupt Pending Register A: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Pending Register A: %x\n", device->tag(), data));
z80sti->ipr &= (data << 8) | (z80sti->ipr & 0xff); z80sti->ipr &= (data << 8) | (z80sti->ipr & 0xff);
for (i = 0; i < 16; i++) for (i = 0; i < 16; i++)
@ -449,32 +449,32 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
break; break;
case Z80STI_REGISTER_ISRB: case Z80STI_REGISTER_ISRB:
LOG(("Z80STI '%s' Interrupt In-Service Register B: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt In-Service Register B: %x\n", device->tag(), data));
z80sti->isr &= (z80sti->isr & 0xff00) | data; z80sti->isr &= (z80sti->isr & 0xff00) | data;
break; break;
case Z80STI_REGISTER_ISRA: case Z80STI_REGISTER_ISRA:
LOG(("Z80STI '%s' Interrupt In-Service Register A: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt In-Service Register A: %x\n", device->tag(), data));
z80sti->isr &= (data << 8) | (z80sti->isr & 0xff); z80sti->isr &= (data << 8) | (z80sti->isr & 0xff);
break; break;
case Z80STI_REGISTER_IMRB: case Z80STI_REGISTER_IMRB:
LOG(("Z80STI '%s' Interrupt Mask Register B: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Mask Register B: %x\n", device->tag(), data));
z80sti->imr = (z80sti->imr & 0xff00) | data; z80sti->imr = (z80sti->imr & 0xff00) | data;
z80sti->isr &= z80sti->imr; z80sti->isr &= z80sti->imr;
check_interrupts(z80sti); check_interrupts(z80sti);
break; break;
case Z80STI_REGISTER_IMRA: case Z80STI_REGISTER_IMRA:
LOG(("Z80STI '%s' Interrupt Mask Register A: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Interrupt Mask Register A: %x\n", device->tag(), data));
z80sti->imr = (data << 8) | (z80sti->imr & 0xff); z80sti->imr = (data << 8) | (z80sti->imr & 0xff);
z80sti->isr &= z80sti->imr; z80sti->isr &= z80sti->imr;
check_interrupts(z80sti); check_interrupts(z80sti);
break; break;
case Z80STI_REGISTER_PVR: case Z80STI_REGISTER_PVR:
LOG(("Z80STI '%s' Interrupt Vector: %02x\n", device->tag.cstr(), data & 0xe0)); LOG(("Z80STI '%s' Interrupt Vector: %02x\n", device->tag(), data & 0xe0));
LOG(("Z80STI '%s' IR Address: %01x\n", device->tag.cstr(), data & 0x07)); LOG(("Z80STI '%s' IR Address: %01x\n", device->tag(), data & 0x07));
z80sti->pvr = data; z80sti->pvr = data;
break; break;
@ -485,8 +485,8 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
z80sti->tabc = data; z80sti->tabc = data;
LOG(("Z80STI '%s' Timer A Prescaler: %u\n", device->tag.cstr(), tac)); LOG(("Z80STI '%s' Timer A Prescaler: %u\n", device->tag(), tac));
LOG(("Z80STI '%s' Timer B Prescaler: %u\n", device->tag.cstr(), tbc)); LOG(("Z80STI '%s' Timer B Prescaler: %u\n", device->tag(), tbc));
if (tac) if (tac)
timer_adjust_periodic(z80sti->timer[TIMER_A], ATTOTIME_IN_HZ(device->clock / tac), 0, ATTOTIME_IN_HZ(device->clock / tac)); timer_adjust_periodic(z80sti->timer[TIMER_A], ATTOTIME_IN_HZ(device->clock / tac), 0, ATTOTIME_IN_HZ(device->clock / tac));
@ -501,12 +501,12 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
break; break;
case Z80STI_REGISTER_TBDR: case Z80STI_REGISTER_TBDR:
LOG(("Z80STI '%s' Timer B Data Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Timer B Data Register: %x\n", device->tag(), data));
z80sti->tdr[TIMER_B] = data; z80sti->tdr[TIMER_B] = data;
break; break;
case Z80STI_REGISTER_TADR: case Z80STI_REGISTER_TADR:
LOG(("Z80STI '%s' Timer A Data Register: %x\n", device->tag.cstr(), data)); LOG(("Z80STI '%s' Timer A Data Register: %x\n", device->tag(), data));
z80sti->tdr[TIMER_A] = data; z80sti->tdr[TIMER_A] = data;
break; break;
#if 0 #if 0
@ -527,7 +527,7 @@ WRITE8_DEVICE_HANDLER( z80sti_w )
break; break;
#endif #endif
default: default:
LOG(("Z80STI '%s' Unsupported Register %x\n", device->tag.cstr(), offset & 0x0f)); LOG(("Z80STI '%s' Unsupported Register %x\n", device->tag(), offset & 0x0f));
} }
} }
@ -584,7 +584,7 @@ static void timer_count(running_device *device, int index)
if (z80sti->ier & (1 << INT_LEVEL_TIMER[index])) if (z80sti->ier & (1 << INT_LEVEL_TIMER[index]))
{ {
LOG(("Z80STI '%s' Interrupt Pending for Timer %c\n", device->tag.cstr(), 'A' + index)); LOG(("Z80STI '%s' Interrupt Pending for Timer %c\n", device->tag(), 'A' + index));
/* signal timer elapsed interrupt */ /* signal timer elapsed interrupt */
take_interrupt(z80sti, INT_LEVEL_TIMER[index]); take_interrupt(z80sti, INT_LEVEL_TIMER[index]);
@ -622,11 +622,11 @@ static void gpip_input(running_device *device, int bit, int state)
if ((old_state ^ aer) && !(state ^ aer)) if ((old_state ^ aer) && !(state ^ aer))
{ {
LOG(("Z80STI '%s' Edge Transition Detected on Bit: %u\n", device->tag.cstr(), bit)); LOG(("Z80STI '%s' Edge Transition Detected on Bit: %u\n", device->tag(), bit));
if (z80sti->ier & (1 << INT_LEVEL_GPIP[bit])) if (z80sti->ier & (1 << INT_LEVEL_GPIP[bit]))
{ {
LOG(("Z80STI '%s' Interrupt Pending for P%u\n", device->tag.cstr(), bit)); LOG(("Z80STI '%s' Interrupt Pending for P%u\n", device->tag(), bit));
take_interrupt(z80sti, INT_LEVEL_GPIP[bit]); take_interrupt(z80sti, INT_LEVEL_GPIP[bit]);
} }
@ -673,7 +673,7 @@ static int z80sti_irq_state(running_device *device)
} }
} }
LOG(("Z80STI '%s' Interrupt State: %u\n", device->tag.cstr(), state)); LOG(("Z80STI '%s' Interrupt State: %u\n", device->tag(), state));
return state; return state;
} }
@ -706,7 +706,7 @@ static int z80sti_irq_ack(running_device *device)
check_interrupts(z80sti); check_interrupts(z80sti);
LOG(("Z80STI '%s' Interrupt Acknowledge Vector: %02x\n", device->tag.cstr(), vector)); LOG(("Z80STI '%s' Interrupt Acknowledge Vector: %02x\n", device->tag(), vector));
return vector; return vector;
} }
@ -726,7 +726,7 @@ static void z80sti_irq_reti(running_device *device)
z80sti_t *z80sti = get_safe_token(device); z80sti_t *z80sti = get_safe_token(device);
int i; int i;
LOG(("Z80STI '%s' Return from Interrupt\n", device->tag.cstr())); LOG(("Z80STI '%s' Return from Interrupt\n", device->tag()));
/* loop over all interrupt sources */ /* loop over all interrupt sources */
for (i = 15; i >= 0; i--) for (i = 15; i >= 0; i--)

68
src/emu/memory.c
View File

@ -913,13 +913,13 @@ void memory_set_decrypted_region(const address_space *space, offs_t addrstart, o
/* fatal error if the decrypted region straddles the bank */ /* fatal error if the decrypted region straddles the bank */
else if (bank->bytestart < byteend && bank->byteend > bytestart) else if (bank->bytestart < byteend && bank->byteend > bytestart)
fatalerror("memory_set_decrypted_region found straddled region %08X-%08X for device '%s'", bytestart, byteend, space->cpu->tag.cstr()); fatalerror("memory_set_decrypted_region found straddled region %08X-%08X for device '%s'", bytestart, byteend, space->cpu->tag());
} }
} }
/* fatal error as well if we didn't find any relevant memory banks */ /* fatal error as well if we didn't find any relevant memory banks */
if (!found) if (!found)
fatalerror("memory_set_decrypted_region unable to find matching region %08X-%08X for device '%s'", bytestart, byteend, space->cpu->tag.cstr()); fatalerror("memory_set_decrypted_region unable to find matching region %08X-%08X for device '%s'", bytestart, byteend, space->cpu->tag());
} }
@ -981,7 +981,7 @@ int memory_set_direct_region(const address_space *space, offs_t *byteaddress)
spacerw->direct.byteend = 0; spacerw->direct.byteend = 0;
spacerw->direct.bytestart = 1; spacerw->direct.bytestart = 1;
if (!spacerw->debugger_access) if (!spacerw->debugger_access)
logerror("Device '%s': warning - attempt to direct-map address %s in %s space\n", space->cpu->tag.cstr(), core_i64_hex_format(overrideaddress, space->addrchars), space->name); logerror("Device '%s': warning - attempt to direct-map address %s in %s space\n", space->cpu->tag(), core_i64_hex_format(overrideaddress, space->addrchars), space->name);
return FALSE; return FALSE;
} }
@ -1210,9 +1210,9 @@ void *_memory_install_handler(const address_space *space, offs_t addrstart, offs
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler >= STATIC_COUNT) if (rhandler >= STATIC_COUNT)
fatalerror("Attempted to install non-static read handler via memory_install_handler() in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install non-static read handler via memory_install_handler() in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler >= STATIC_COUNT) if (whandler >= STATIC_COUNT)
fatalerror("Attempted to install non-static write handler via memory_install_handler() in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install non-static write handler via memory_install_handler() in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != 0) if (rhandler != 0)
space_map_range(spacerw, ROW_READ, spacerw->dbits, 0, addrstart, addrend, addrmask, addrmirror, (genf *)(FPTR)rhandler, spacerw, NULL); space_map_range(spacerw, ROW_READ, spacerw->dbits, 0, addrstart, addrend, addrmask, addrmirror, (genf *)(FPTR)rhandler, spacerw, NULL);
if (whandler != 0) if (whandler != 0)
@ -1231,9 +1231,9 @@ UINT8 *_memory_install_handler8(const address_space *space, offs_t addrstart, of
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 8, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name); space_map_range(spacerw, ROW_READ, 8, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1252,9 +1252,9 @@ UINT16 *_memory_install_handler16(const address_space *space, offs_t addrstart,
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 16, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name); space_map_range(spacerw, ROW_READ, 16, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1273,9 +1273,9 @@ UINT32 *_memory_install_handler32(const address_space *space, offs_t addrstart,
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 32, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name); space_map_range(spacerw, ROW_READ, 32, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1294,9 +1294,9 @@ UINT64 *_memory_install_handler64(const address_space *space, offs_t addrstart,
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler in space %s of device '%s'\n", space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 64, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name); space_map_range(spacerw, ROW_READ, 64, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, spacerw, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1315,9 +1315,9 @@ UINT8 *_memory_install_device_handler8(const address_space *space, running_devic
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 8, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name); space_map_range(spacerw, ROW_READ, 8, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1336,9 +1336,9 @@ UINT16 *_memory_install_device_handler16(const address_space *space, running_dev
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 16, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name); space_map_range(spacerw, ROW_READ, 16, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1357,9 +1357,9 @@ UINT32 *_memory_install_device_handler32(const address_space *space, running_dev
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 32, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name); space_map_range(spacerw, ROW_READ, 32, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1378,9 +1378,9 @@ UINT64 *_memory_install_device_handler64(const address_space *space, running_dev
{ {
address_space *spacerw = (address_space *)space; address_space *spacerw = (address_space *)space;
if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT) if (rhandler != NULL && (FPTR)rhandler < STATIC_COUNT)
fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid read handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (whandler != NULL && (FPTR)whandler < STATIC_COUNT) if (whandler != NULL && (FPTR)whandler < STATIC_COUNT)
fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag.cstr(), space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to install invalid write handler for device '%s' in space %s of device '%s'\n", device->tag(), space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
if (rhandler != NULL) if (rhandler != NULL)
space_map_range(spacerw, ROW_READ, 64, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name); space_map_range(spacerw, ROW_READ, 64, handlerunitmask, addrstart, addrend, addrmask, addrmirror, (genf *)rhandler, (void *)device, rhandler_name);
if (whandler != NULL) if (whandler != NULL)
@ -1415,7 +1415,7 @@ void _memory_install_port(const address_space *space, offs_t addrstart, offs_t a
{ {
const input_port_config *port = space->machine->port(rtag); const input_port_config *port = space->machine->port(rtag);
if (port == NULL) if (port == NULL)
fatalerror("Attempted to map non-existent port '%s' for read in space %s of device '%s'\n", rtag, space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to map non-existent port '%s' for read in space %s of device '%s'\n", rtag, space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
space_map_range(spacerw, ROW_READ, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, rhandler, (void *)port, rtag); space_map_range(spacerw, ROW_READ, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, rhandler, (void *)port, rtag);
} }
@ -1424,7 +1424,7 @@ void _memory_install_port(const address_space *space, offs_t addrstart, offs_t a
{ {
const input_port_config *port = space->machine->port(wtag); const input_port_config *port = space->machine->port(wtag);
if (port == NULL) if (port == NULL)
fatalerror("Attempted to map non-existent port '%s' for write in space %s of device '%s'\n", wtag, space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to map non-existent port '%s' for write in space %s of device '%s'\n", wtag, space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
space_map_range(spacerw, ROW_WRITE, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, whandler, (void *)port, wtag); space_map_range(spacerw, ROW_WRITE, space->dbits, 0, addrstart, addrend, addrmask, addrmirror, whandler, (void *)port, wtag);
} }
@ -1655,13 +1655,13 @@ void memory_dump(running_machine *machine, FILE *file)
fprintf(file, "\n\n" fprintf(file, "\n\n"
"====================================================\n" "====================================================\n"
"Device '%s' %s address space read handler dump\n" "Device '%s' %s address space read handler dump\n"
"====================================================\n", space->cpu->tag.cstr(), space->name); "====================================================\n", space->cpu->tag(), space->name);
dump_map(file, space, &space->read); dump_map(file, space, &space->read);
fprintf(file, "\n\n" fprintf(file, "\n\n"
"====================================================\n" "====================================================\n"
"Device '%s' %s address space write handler dump\n" "Device '%s' %s address space write handler dump\n"
"====================================================\n", space->cpu->tag.cstr(), space->name); "====================================================\n", space->cpu->tag(), space->name);
dump_map(file, space, &space->write); dump_map(file, space, &space->write);
} }
} }
@ -1800,7 +1800,7 @@ static void memory_init_preflight(running_machine *machine)
/* loop over valid address spaces */ /* loop over valid address spaces */
for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next) for (space = (address_space *)memdata->spacelist; space != NULL; space = (address_space *)space->next)
{ {
int regionsize = (space->spacenum == ADDRESS_SPACE_0) ? memory_region_length(space->machine, space->cpu->tag) : 0; int regionsize = (space->spacenum == ADDRESS_SPACE_0) ? memory_region_length(space->machine, space->cpu->tag()) : 0;
address_map_entry *entry; address_map_entry *entry;
int entrynum; int entrynum;
@ -1831,7 +1831,7 @@ static void memory_init_preflight(running_machine *machine)
/* make sure it fits within the memory region before doing so, however */ /* make sure it fits within the memory region before doing so, however */
if (entry->byteend < regionsize) if (entry->byteend < regionsize)
{ {
entry->region = space->cpu->tag; entry->region = space->cpu->tag();
entry->rgnoffs = entry->bytestart; entry->rgnoffs = entry->bytestart;
} }
} }
@ -1844,9 +1844,9 @@ static void memory_init_preflight(running_machine *machine)
/* validate the region */ /* validate the region */
if (base == NULL) if (base == NULL)
fatalerror("Error: device '%s' %s space memory map entry %X-%X references non-existant region \"%s\"", space->cpu->tag.cstr(), space->name, entry->addrstart, entry->addrend, entry->region); fatalerror("Error: device '%s' %s space memory map entry %X-%X references non-existant region \"%s\"", space->cpu->tag(), space->name, entry->addrstart, entry->addrend, entry->region);
if (entry->rgnoffs + (entry->byteend - entry->bytestart + 1) > length) if (entry->rgnoffs + (entry->byteend - entry->bytestart + 1) > length)
fatalerror("Error: device '%s' %s space memory map entry %X-%X extends beyond region \"%s\" size (%X)", space->cpu->tag.cstr(), space->name, entry->addrstart, entry->addrend, entry->region, length); fatalerror("Error: device '%s' %s space memory map entry %X-%X extends beyond region \"%s\" size (%X)", space->cpu->tag(), space->name, entry->addrstart, entry->addrend, entry->region, length);
} }
/* convert any region-relative entries to their memory pointers */ /* convert any region-relative entries to their memory pointers */
@ -1971,7 +1971,7 @@ static void memory_init_map_entry(address_space *space, const address_map_entry
case AMH_DEVICE_HANDLER: case AMH_DEVICE_HANDLER:
device = space->machine->device(handler->tag); device = space->machine->device(handler->tag);
if (device == NULL) if (device == NULL)
fatalerror("Attempted to map a non-existent device '%s' in space %s of device '%s'\n", handler->tag, space->name, (space->cpu != NULL) ? space->cpu->tag.cstr() : "??"); fatalerror("Attempted to map a non-existent device '%s' in space %s of device '%s'\n", handler->tag, space->name, (space->cpu != NULL) ? space->cpu->tag() : "??");
switch ((handler->bits != 0) ? handler->bits : space->dbits) switch ((handler->bits != 0) ? handler->bits : space->dbits)
{ {
case 8: case 8:
@ -2490,7 +2490,7 @@ static void *space_find_backing_memory(const address_space *space, offs_t addrst
address_map_entry *entry; address_map_entry *entry;
memory_block *block; memory_block *block;
VPRINTF(("space_find_backing_memory('%s',%s,%08X-%08X) -> ", space->cpu->tag.cstr(), space->name, bytestart, byteend)); VPRINTF(("space_find_backing_memory('%s',%s,%08X-%08X) -> ", space->cpu->tag(), space->name, bytestart, byteend));
/* look in the address map first */ /* look in the address map first */
for (entry = space->map->entrylist; entry != NULL; entry = entry->next) for (entry = space->map->entrylist; entry != NULL; entry = entry->next)
@ -2535,7 +2535,7 @@ static int space_needs_backing_store(const address_space *space, const address_m
/* if we're reading from RAM or from ROM outside of address space 0 or its region, then yes, we do need backing */ /* if we're reading from RAM or from ROM outside of address space 0 or its region, then yes, we do need backing */
if (entry->read.type == AMH_RAM || if (entry->read.type == AMH_RAM ||
(entry->read.type == AMH_ROM && (space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag)))) (entry->read.type == AMH_ROM && (space->spacenum != ADDRESS_SPACE_0 || entry->addrstart >= memory_region_length(space->machine, space->cpu->tag()))))
return TRUE; return TRUE;
/* all other cases don't need backing */ /* all other cases don't need backing */
@ -3320,7 +3320,7 @@ static void *block_allocate(const address_space *space, offs_t bytestart, offs_t
size_t bytestoalloc; size_t bytestoalloc;
const char *region; const char *region;
VPRINTF(("block_allocate('%s',%s,%08X,%08X,%p)\n", space->cpu->tag.cstr(), space->name, bytestart, byteend, memory)); VPRINTF(("block_allocate('%s',%s,%08X,%08X,%p)\n", space->cpu->tag(), space->name, bytestart, byteend, memory));
/* determine how much memory to allocate for this */ /* determine how much memory to allocate for this */
bytestoalloc = sizeof(*block); bytestoalloc = sizeof(*block);
@ -3351,7 +3351,7 @@ static void *block_allocate(const address_space *space, offs_t bytestart, offs_t
char name[256]; char name[256];
sprintf(name, "%08x-%08x", bytestart, byteend); sprintf(name, "%08x-%08x", bytestart, byteend);
state_save_register_memory(space->machine, "memory", space->cpu->tag, space->spacenum, name, memory, bytes_per_element, (UINT32)(byteend - bytestart + 1) / bytes_per_element, __FILE__, __LINE__); state_save_register_memory(space->machine, "memory", space->cpu->tag(), space->spacenum, name, memory, bytes_per_element, (UINT32)(byteend - bytestart + 1) / bytes_per_element, __FILE__, __LINE__);
} }
/* fill in the tracking block */ /* fill in the tracking block */

2
src/emu/profiler.c
View File

@ -186,7 +186,7 @@ astring &_profiler_get_text(running_machine *machine, astring &string)
/* and then the text */ /* and then the text */
if (curtype >= PROFILER_CPU_FIRST && curtype <= PROFILER_CPU_MAX) if (curtype >= PROFILER_CPU_FIRST && curtype <= PROFILER_CPU_MAX)
string.catprintf("CPU '%s'", machine->devicelist.find(CPU, curtype - PROFILER_CPU_FIRST)->tag.cstr()); string.catprintf("CPU '%s'", machine->devicelist.find(CPU, curtype - PROFILER_CPU_FIRST)->tag());
else else
for (nameindex = 0; nameindex < ARRAY_LENGTH(names); nameindex++) for (nameindex = 0; nameindex < ARRAY_LENGTH(names); nameindex++)
if (names[nameindex].type == curtype) if (names[nameindex].type == curtype)

5
src/emu/render.c
View File

@ -963,9 +963,8 @@ int render_is_live_screen(running_device *screen)
assert(screen != NULL); assert(screen != NULL);
assert(screen->machine != NULL); assert(screen->machine != NULL);
assert(screen->machine->config != NULL); assert(screen->machine->config != NULL);
assert(screen->tag != NULL);
screen_index = screen->machine->devicelist.index(VIDEO_SCREEN, screen->tag); screen_index = screen->machine->devicelist.index(VIDEO_SCREEN, screen->tag());
assert(screen_index != -1); assert(screen_index != -1);
@ -1470,7 +1469,7 @@ void render_target_get_minimum_size(render_target *target, INT32 *minwidth, INT3
{ {
const device_config *screen = target->machine->config->devicelist.find(VIDEO_SCREEN, item->index); const device_config *screen = target->machine->config->devicelist.find(VIDEO_SCREEN, item->index);
const screen_config *scrconfig = (const screen_config *)screen->inline_config; const screen_config *scrconfig = (const screen_config *)screen->inline_config;
running_device *screendev = target->machine->device(screen->tag); running_device *screendev = target->machine->device(screen->tag());
const rectangle vectorvis = { 0, 639, 0, 479 }; const rectangle vectorvis = { 0, 639, 0, 479 };
const rectangle *visarea = NULL; const rectangle *visarea = NULL;
render_container *container = get_screen_container_by_index(item->index); render_container *container = get_screen_container_by_index(item->index);

2
src/emu/rendlay.c
View File

@ -1342,7 +1342,7 @@ static int get_variable_value(const machine_config *config, const char *string,
/* screen 0 parameters */ /* screen 0 parameters */
for (devconfig = video_screen_first(config); devconfig != NULL; devconfig = video_screen_next(devconfig)) for (devconfig = video_screen_first(config); devconfig != NULL; devconfig = video_screen_next(devconfig))
{ {
int scrnum = config->devicelist.index(VIDEO_SCREEN, devconfig->tag); int scrnum = config->devicelist.index(VIDEO_SCREEN, devconfig->tag());
const screen_config *scrconfig = (const screen_config *)devconfig->inline_config; const screen_config *scrconfig = (const screen_config *)devconfig->inline_config;
/* native X aspect factor */ /* native X aspect factor */

2
src/emu/romload.c
View File

@ -272,7 +272,7 @@ astring &rom_region_name(astring &result, const game_driver *drv, const rom_sour
else else
{ {
const device_config *devconfig = (const device_config *)source; const device_config *devconfig = (const device_config *)source;
result.printf("%s:%s", devconfig->tag.cstr(), ROMREGION_GETTAG(romp)); result.printf("%s:%s", devconfig->tag(), ROMREGION_GETTAG(romp));
} }
return result; return result;
} }

8
src/emu/sound.c
View File

@ -315,9 +315,9 @@ static DEVICE_START( sound )
/* if no state registered for saving, we can't save */ /* if no state registered for saving, we can't save */
if (num_regs == 0) if (num_regs == 0)
{ {
logerror("Sound chip '%s' did not register any state to save!\n", device->tag.cstr()); logerror("Sound chip '%s' did not register any state to save!\n", device->tag());
if (device->machine->gamedrv->flags & GAME_SUPPORTS_SAVE) if (device->machine->gamedrv->flags & GAME_SUPPORTS_SAVE)
fatalerror("Sound chip '%s' did not register any state to save!", device->tag.cstr()); fatalerror("Sound chip '%s' did not register any state to save!", device->tag());
} }
} }
@ -488,7 +488,7 @@ static void route_sound(running_machine *machine)
speaker_info *speakerinfo = get_safe_token(target_device); speaker_info *speakerinfo = get_safe_token(target_device);
/* generate text for the UI */ /* generate text for the UI */
tempstring.printf("Speaker '%s': %s '%s'", target_device->tag.cstr(), sound->name(), sound->tag.cstr()); tempstring.printf("Speaker '%s': %s '%s'", target_device->tag(), sound->name(), sound->tag());
if (numoutputs > 1) if (numoutputs > 1)
tempstring.catprintf(" Ch.%d", outputnum); tempstring.catprintf(" Ch.%d", outputnum);
@ -864,7 +864,7 @@ static DEVICE_START( speaker_output )
/* copy in all the relevant info */ /* copy in all the relevant info */
info->speaker = (const speaker_config *)device->baseconfig().inline_config; info->speaker = (const speaker_config *)device->baseconfig().inline_config;
info->tag = device->tag; info->tag = device->tag();
} }

2
src/emu/sound/2610intf.c
View File

@ -167,7 +167,7 @@ static DEVICE_START( ym2610 )
/* setup adpcm buffers */ /* setup adpcm buffers */
pcmbufa = *device->region; pcmbufa = *device->region;
pcmsizea = device->region->bytes(); pcmsizea = device->region->bytes();
name.printf("%s.deltat", device->tag.cstr()); name.printf("%s.deltat", device->tag());
pcmbufb = (void *)(memory_region(device->machine, name)); pcmbufb = (void *)(memory_region(device->machine, name));
pcmsizeb = memory_region_length(device->machine, name); pcmsizeb = memory_region_length(device->machine, name);
if (pcmbufb == NULL || pcmsizeb == 0) if (pcmbufb == NULL || pcmsizeb == 0)

16
src/emu/sound/ay8910.c
View File

@ -527,11 +527,11 @@ static void ay8910_write_reg(ay8910_context *psg, int r, int v)
if (psg->portAwrite.write) if (psg->portAwrite.write)
devcb_call_write8(&psg->portAwrite, 0, psg->regs[AY_PORTA]); devcb_call_write8(&psg->portAwrite, 0, psg->regs[AY_PORTA]);
else else
logerror("warning - write %02x to 8910 '%s' Port A\n",psg->regs[AY_PORTA],psg->device->tag.cstr()); logerror("warning - write %02x to 8910 '%s' Port A\n",psg->regs[AY_PORTA],psg->device->tag());
} }
else else
{ {
logerror("warning: write to 8910 '%s' Port A set as input - ignored\n",psg->device->tag.cstr()); logerror("warning: write to 8910 '%s' Port A set as input - ignored\n",psg->device->tag());
} }
break; break;
case AY_PORTB: case AY_PORTB:
@ -540,11 +540,11 @@ static void ay8910_write_reg(ay8910_context *psg, int r, int v)
if (psg->portBwrite.write) if (psg->portBwrite.write)
devcb_call_write8(&psg->portBwrite, 0, psg->regs[AY_PORTB]); devcb_call_write8(&psg->portBwrite, 0, psg->regs[AY_PORTB]);
else else
logerror("warning - write %02x to 8910 '%s' Port B\n",psg->regs[AY_PORTB],psg->device->tag.cstr()); logerror("warning - write %02x to 8910 '%s' Port B\n",psg->regs[AY_PORTB],psg->device->tag());
} }
else else
{ {
logerror("warning: write to 8910 '%s' Port B set as input - ignored\n",psg->device->tag.cstr()); logerror("warning: write to 8910 '%s' Port B set as input - ignored\n",psg->device->tag());
} }
break; break;
} }
@ -881,7 +881,7 @@ int ay8910_read_ym(void *chip)
{ {
case AY_PORTA: case AY_PORTA:
if ((psg->regs[AY_ENABLE] & 0x40) != 0) if ((psg->regs[AY_ENABLE] & 0x40) != 0)
logerror("warning: read from 8910 '%s' Port A set as output\n",psg->device->tag.cstr()); logerror("warning: read from 8910 '%s' Port A set as output\n",psg->device->tag());
/* /*
even if the port is set as output, we still need to return the external even if the port is set as output, we still need to return the external
data. Some games, like kidniki, need this to work. data. Some games, like kidniki, need this to work.
@ -889,15 +889,15 @@ int ay8910_read_ym(void *chip)
if (psg->portAread.read) if (psg->portAread.read)
psg->regs[AY_PORTA] = devcb_call_read8(&psg->portAread, 0); psg->regs[AY_PORTA] = devcb_call_read8(&psg->portAread, 0);
else else
logerror("%s: warning - read 8910 '%s' Port A\n",cpuexec_describe_context(psg->device->machine),psg->device->tag.cstr()); logerror("%s: warning - read 8910 '%s' Port A\n",cpuexec_describe_context(psg->device->machine),psg->device->tag());
break; break;
case AY_PORTB: case AY_PORTB:
if ((psg->regs[AY_ENABLE] & 0x80) != 0) if ((psg->regs[AY_ENABLE] & 0x80) != 0)
logerror("warning: read from 8910 '%s' Port B set as output\n",psg->device->tag.cstr()); logerror("warning: read from 8910 '%s' Port B set as output\n",psg->device->tag());
if (psg->portBread.read) if (psg->portBread.read)
psg->regs[AY_PORTB] = devcb_call_read8(&psg->portBread, 0); psg->regs[AY_PORTB] = devcb_call_read8(&psg->portBread, 0);
else else
logerror("%s: warning - read 8910 '%s' Port B\n",cpuexec_describe_context(psg->device->machine),psg->device->tag.cstr()); logerror("%s: warning - read 8910 '%s' Port B\n",cpuexec_describe_context(psg->device->machine),psg->device->tag());
break; break;
} }
return psg->regs[r]; return psg->regs[r];

2
src/emu/sound/c6280.c
View File

@ -112,7 +112,7 @@ static void c6280_init(running_device *device, c6280_t *p, double clk, double ra
p->device = device; p->device = device;
p->cpudevice = device->machine->device(intf->cpu); p->cpudevice = device->machine->device(intf->cpu);
if (p->cpudevice == NULL) if (p->cpudevice == NULL)
fatalerror("c6280_init: no CPU found with tag of '%s'\n", device->tag.cstr()); fatalerror("c6280_init: no CPU found with tag of '%s'\n", device->tag());
/* Make waveform frequency table */ /* Make waveform frequency table */
for(i = 0; i < 4096; i += 1) for(i = 0; i < 4096; i += 1)

2
src/emu/sound/digitalk.c
View File

@ -651,7 +651,7 @@ static DEVICE_START(digitalker)
{ {
digitalker *dg = get_safe_token(device); digitalker *dg = get_safe_token(device);
dg->device = device; dg->device = device;
dg->rom = memory_region(device->machine, device->tag); dg->rom = memory_region(device->machine, device->tag());
dg->stream = stream_create(device, 0, 1, device->clock/4, dg, digitalker_update); dg->stream = stream_create(device, 0, 1, device->clock/4, dg, digitalker_update);
dg->dac_index = 128; dg->dac_index = 128;
dg->data = 0xff; dg->data = 0xff;

4
src/emu/sound/disc_sys.c
View File

@ -176,7 +176,7 @@ static DISCRETE_START( dso_csvlog )
log_num = node_module_index(node); log_num = node_module_index(node);
context->sample_num = 0; context->sample_num = 0;
sprintf(context->name, "discrete_%s_%d.csv", node->info->device->tag.cstr(), log_num); sprintf(context->name, "discrete_%s_%d.csv", node->info->device->tag(), log_num);
context->csv_file = fopen(context->name, "w"); context->csv_file = fopen(context->name, "w");
/* Output some header info */ /* Output some header info */
fprintf(context->csv_file, "\"MAME Discrete System Node Log\"\n"); fprintf(context->csv_file, "\"MAME Discrete System Node Log\"\n");
@ -220,7 +220,7 @@ static DISCRETE_START( dso_wavelog )
int log_num; int log_num;
log_num = node_module_index(node); log_num = node_module_index(node);
sprintf(context->name, "discrete_%s_%d.wav", node->info->device->tag.cstr(), log_num); sprintf(context->name, "discrete_%s_%d.wav", node->info->device->tag(), log_num);
context->wavfile = wav_open(context->name, node->info->sample_rate, node->active_inputs/2); context->wavfile = wav_open(context->name, node->info->sample_rate, node->active_inputs/2);
} }

2
src/emu/sound/discrete.c
View File

@ -496,7 +496,7 @@ static DEVICE_START( discrete )
info->total_stream_updates = 0; info->total_stream_updates = 0;
/* create the logfile */ /* create the logfile */
sprintf(name, "discrete%s.log", device->tag.cstr()); sprintf(name, "discrete%s.log", device->tag());
if (DISCRETE_DEBUGLOG) if (DISCRETE_DEBUGLOG)
info->disclogfile = fopen(name, "w"); info->disclogfile = fopen(name, "w");

2
src/emu/sound/es8712.c
View File

@ -320,7 +320,7 @@ void es8712_play(running_device *device)
/* invalid samples go here */ /* invalid samples go here */
else else
{ {
logerror("ES871295:'%s' requested to play invalid sample range %06x-%06x\n",device->tag.cstr(),chip->start,chip->end); logerror("ES871295:'%s' requested to play invalid sample range %06x-%06x\n",device->tag(),chip->start,chip->end);
if (chip->playing) if (chip->playing)
{ {

2
src/emu/sound/msm5205.c
View File

@ -217,7 +217,7 @@ void msm5205_vclk_w (running_device *device, int vclk)
if( voice->prescaler != 0 ) if( voice->prescaler != 0 )
{ {
logerror("error: msm5205_vclk_w() called with chip = '%s', but VCLK selected master mode\n", device->tag.cstr()); logerror("error: msm5205_vclk_w() called with chip = '%s', but VCLK selected master mode\n", device->tag());
} }
else else
{ {

8
src/emu/sound/okim6295.c
View File

@ -405,7 +405,7 @@ void okim6295_set_bank_base(running_device *device, int base)
if (!info->bank_installed && base != 0) if (!info->bank_installed && base != 0)
{ {
/* override our memory map with a bank */ /* override our memory map with a bank */
memory_install_read_bank(device->space(), 0x00000, 0x3ffff, 0, 0, device->tag); memory_install_read_bank(device->space(), 0x00000, 0x3ffff, 0, 0, device->tag());
info->bank_installed = TRUE; info->bank_installed = TRUE;
} }
@ -413,7 +413,7 @@ void okim6295_set_bank_base(running_device *device, int base)
if (info->bank_installed) if (info->bank_installed)
{ {
info->bank_offs = base; info->bank_offs = base;
memory_set_bankptr(device->machine, device->tag, device->region->base.u8 + base); memory_set_bankptr(device->machine, device->tag(), device->region->base.u8 + base);
} }
} }
@ -522,13 +522,13 @@ WRITE8_DEVICE_HANDLER( okim6295_w )
} }
else else
{ {
logerror("OKIM6295:'%s' requested to play sample %02x on non-stopped voice\n",device->tag.cstr(),info->command); logerror("OKIM6295:'%s' requested to play sample %02x on non-stopped voice\n",device->tag(),info->command);
} }
} }
/* invalid samples go here */ /* invalid samples go here */
else else
{ {
logerror("OKIM6295:'%s' requested to play invalid sample %02x\n",device->tag.cstr(),info->command); logerror("OKIM6295:'%s' requested to play invalid sample %02x\n",device->tag(),info->command);
voice->playing = 0; voice->playing = 0;
} }
} }

2
src/emu/sound/okim6376.c
View File

@ -429,7 +429,7 @@ WRITE8_DEVICE_HANDLER( okim6376_w )
} }
else else
{ {
logerror("OKIM6376:'%s' requested to play sample %02x on non-stopped voice\n",device->tag.cstr(),info->command); logerror("OKIM6376:'%s' requested to play sample %02x on non-stopped voice\n",device->tag(),info->command);
} }
} }
} }

80
src/emu/sound/pokey.c
View File

@ -805,7 +805,7 @@ static void pokey_potgo(pokey_state *p)
{ {
int r = devcb_call_read8(&p->pot_r[pot], pot); int r = devcb_call_read8(&p->pot_r[pot], pot);
LOG(("POKEY %s pot_r(%d) returned $%02x\n", p->device->tag.cstr(), pot, r)); LOG(("POKEY %s pot_r(%d) returned $%02x\n", p->device->tag(), pot, r));
if( r != -1 ) if( r != -1 )
{ {
if (r > 228) if (r > 228)
@ -840,16 +840,16 @@ READ8_DEVICE_HANDLER( pokey_r )
if( p->ALLPOT & (1 << pot) ) if( p->ALLPOT & (1 << pot) )
{ {
data = timer_timeelapsed(p->ptimer[pot]).attoseconds / AD_TIME.attoseconds; data = timer_timeelapsed(p->ptimer[pot]).attoseconds / AD_TIME.attoseconds;
LOG(("POKEY '%s' read POT%d (interpolated) $%02x\n", p->device->tag.cstr(), pot, data)); LOG(("POKEY '%s' read POT%d (interpolated) $%02x\n", p->device->tag(), pot, data));
} }
else else
{ {
data = p->POTx[pot]; data = p->POTx[pot];
LOG(("POKEY '%s' read POT%d (final value) $%02x\n", p->device->tag.cstr(), pot, data)); LOG(("POKEY '%s' read POT%d (final value) $%02x\n", p->device->tag(), pot, data));
} }
} }
else else
logerror("%s: warning - read '%s' POT%d\n", cpuexec_describe_context(p->device->machine), p->device->tag.cstr(), pot); logerror("%s: warning - read '%s' POT%d\n", cpuexec_describe_context(p->device->machine), p->device->tag(), pot);
break; break;
case ALLPOT_C: case ALLPOT_C:
@ -860,17 +860,17 @@ READ8_DEVICE_HANDLER( pokey_r )
if( (p->SKCTL & SK_RESET) == 0) if( (p->SKCTL & SK_RESET) == 0)
{ {
data = 0; data = 0;
LOG(("POKEY '%s' ALLPOT internal $%02x (reset)\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' ALLPOT internal $%02x (reset)\n", p->device->tag(), data));
} }
else if( p->allpot_r.read ) else if( p->allpot_r.read )
{ {
data = devcb_call_read8(&p->allpot_r, offset); data = devcb_call_read8(&p->allpot_r, offset);
LOG(("POKEY '%s' ALLPOT callback $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' ALLPOT callback $%02x\n", p->device->tag(), data));
} }
else else
{ {
data = p->ALLPOT; data = p->ALLPOT;
LOG(("POKEY '%s' ALLPOT internal $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' ALLPOT internal $%02x\n", p->device->tag(), data));
} }
break; break;
@ -898,17 +898,17 @@ READ8_DEVICE_HANDLER( pokey_r )
adjust = 1; adjust = 1;
p->r9 = 0; p->r9 = 0;
p->r17 = 0; p->r17 = 0;
LOG_RAND(("POKEY '%s' rand17 frozen (SKCTL): $%02x\n", p->device->tag.cstr(), p->RANDOM)); LOG_RAND(("POKEY '%s' rand17 frozen (SKCTL): $%02x\n", p->device->tag(), p->RANDOM));
} }
if( p->AUDCTL & POLY9 ) if( p->AUDCTL & POLY9 )
{ {
p->RANDOM = p->rand9[p->r9]; p->RANDOM = p->rand9[p->r9];
LOG_RAND(("POKEY '%s' adjust %u rand9[$%05x]: $%02x\n", p->device->tag.cstr(), adjust, p->r9, p->RANDOM)); LOG_RAND(("POKEY '%s' adjust %u rand9[$%05x]: $%02x\n", p->device->tag(), adjust, p->r9, p->RANDOM));
} }
else else
{ {
p->RANDOM = p->rand17[p->r17]; p->RANDOM = p->rand17[p->r17];
LOG_RAND(("POKEY '%s' adjust %u rand17[$%05x]: $%02x\n", p->device->tag.cstr(), adjust, p->r17, p->RANDOM)); LOG_RAND(("POKEY '%s' adjust %u rand17[$%05x]: $%02x\n", p->device->tag(), adjust, p->r17, p->RANDOM));
} }
if (adjust > 0) if (adjust > 0)
timer_adjust_oneshot(p->rtimer, attotime_never, 0); timer_adjust_oneshot(p->rtimer, attotime_never, 0);
@ -919,24 +919,24 @@ READ8_DEVICE_HANDLER( pokey_r )
if( p->serin_r.read ) if( p->serin_r.read )
p->SERIN = devcb_call_read8(&p->serin_r, offset); p->SERIN = devcb_call_read8(&p->serin_r, offset);
data = p->SERIN; data = p->SERIN;
LOG(("POKEY '%s' SERIN $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' SERIN $%02x\n", p->device->tag(), data));
break; break;
case IRQST_C: case IRQST_C:
/* IRQST is an active low input port; we keep it active high */ /* IRQST is an active low input port; we keep it active high */
/* internally to ease the (un-)masking of bits */ /* internally to ease the (un-)masking of bits */
data = p->IRQST ^ 0xff; data = p->IRQST ^ 0xff;
LOG(("POKEY '%s' IRQST $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' IRQST $%02x\n", p->device->tag(), data));
break; break;
case SKSTAT_C: case SKSTAT_C:
/* SKSTAT is also an active low input port */ /* SKSTAT is also an active low input port */
data = p->SKSTAT ^ 0xff; data = p->SKSTAT ^ 0xff;
LOG(("POKEY '%s' SKSTAT $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' SKSTAT $%02x\n", p->device->tag(), data));
break; break;
default: default:
LOG(("POKEY '%s' register $%02x\n", p->device->tag.cstr(), offset)); LOG(("POKEY '%s' register $%02x\n", p->device->tag(), offset));
break; break;
} }
return data; return data;
@ -966,7 +966,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDF1_C: case AUDF1_C:
if( data == p->AUDF[CHAN1] ) if( data == p->AUDF[CHAN1] )
return; return;
LOG_SOUND(("POKEY '%s' AUDF1 $%02x\n", p->device->tag.cstr(), data)); LOG_SOUND(("POKEY '%s' AUDF1 $%02x\n", p->device->tag(), data));
p->AUDF[CHAN1] = data; p->AUDF[CHAN1] = data;
ch_mask = 1 << CHAN1; ch_mask = 1 << CHAN1;
if( p->AUDCTL & CH12_JOINED ) /* if ch 1&2 tied together */ if( p->AUDCTL & CH12_JOINED ) /* if ch 1&2 tied together */
@ -976,7 +976,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDC1_C: case AUDC1_C:
if( data == p->AUDC[CHAN1] ) if( data == p->AUDC[CHAN1] )
return; return;
LOG_SOUND(("POKEY '%s' AUDC1 $%02x (%s)\n", p->device->tag.cstr(), data, audc2str(data))); LOG_SOUND(("POKEY '%s' AUDC1 $%02x (%s)\n", p->device->tag(), data, audc2str(data)));
p->AUDC[CHAN1] = data; p->AUDC[CHAN1] = data;
ch_mask = 1 << CHAN1; ch_mask = 1 << CHAN1;
break; break;
@ -984,7 +984,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDF2_C: case AUDF2_C:
if( data == p->AUDF[CHAN2] ) if( data == p->AUDF[CHAN2] )
return; return;
LOG_SOUND(("POKEY '%s' AUDF2 $%02x\n", p->device->tag.cstr(), data)); LOG_SOUND(("POKEY '%s' AUDF2 $%02x\n", p->device->tag(), data));
p->AUDF[CHAN2] = data; p->AUDF[CHAN2] = data;
ch_mask = 1 << CHAN2; ch_mask = 1 << CHAN2;
break; break;
@ -992,7 +992,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDC2_C: case AUDC2_C:
if( data == p->AUDC[CHAN2] ) if( data == p->AUDC[CHAN2] )
return; return;
LOG_SOUND(("POKEY '%s' AUDC2 $%02x (%s)\n", p->device->tag.cstr(), data, audc2str(data))); LOG_SOUND(("POKEY '%s' AUDC2 $%02x (%s)\n", p->device->tag(), data, audc2str(data)));
p->AUDC[CHAN2] = data; p->AUDC[CHAN2] = data;
ch_mask = 1 << CHAN2; ch_mask = 1 << CHAN2;
break; break;
@ -1000,7 +1000,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDF3_C: case AUDF3_C:
if( data == p->AUDF[CHAN3] ) if( data == p->AUDF[CHAN3] )
return; return;
LOG_SOUND(("POKEY '%s' AUDF3 $%02x\n", p->device->tag.cstr(), data)); LOG_SOUND(("POKEY '%s' AUDF3 $%02x\n", p->device->tag(), data));
p->AUDF[CHAN3] = data; p->AUDF[CHAN3] = data;
ch_mask = 1 << CHAN3; ch_mask = 1 << CHAN3;
@ -1011,7 +1011,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDC3_C: case AUDC3_C:
if( data == p->AUDC[CHAN3] ) if( data == p->AUDC[CHAN3] )
return; return;
LOG_SOUND(("POKEY '%s' AUDC3 $%02x (%s)\n", p->device->tag.cstr(), data, audc2str(data))); LOG_SOUND(("POKEY '%s' AUDC3 $%02x (%s)\n", p->device->tag(), data, audc2str(data)));
p->AUDC[CHAN3] = data; p->AUDC[CHAN3] = data;
ch_mask = 1 << CHAN3; ch_mask = 1 << CHAN3;
break; break;
@ -1019,7 +1019,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDF4_C: case AUDF4_C:
if( data == p->AUDF[CHAN4] ) if( data == p->AUDF[CHAN4] )
return; return;
LOG_SOUND(("POKEY '%s' AUDF4 $%02x\n", p->device->tag.cstr(), data)); LOG_SOUND(("POKEY '%s' AUDF4 $%02x\n", p->device->tag(), data));
p->AUDF[CHAN4] = data; p->AUDF[CHAN4] = data;
ch_mask = 1 << CHAN4; ch_mask = 1 << CHAN4;
break; break;
@ -1027,7 +1027,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDC4_C: case AUDC4_C:
if( data == p->AUDC[CHAN4] ) if( data == p->AUDC[CHAN4] )
return; return;
LOG_SOUND(("POKEY '%s' AUDC4 $%02x (%s)\n", p->device->tag.cstr(), data, audc2str(data))); LOG_SOUND(("POKEY '%s' AUDC4 $%02x (%s)\n", p->device->tag(), data, audc2str(data)));
p->AUDC[CHAN4] = data; p->AUDC[CHAN4] = data;
ch_mask = 1 << CHAN4; ch_mask = 1 << CHAN4;
break; break;
@ -1035,7 +1035,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case AUDCTL_C: case AUDCTL_C:
if( data == p->AUDCTL ) if( data == p->AUDCTL )
return; return;
LOG_SOUND(("POKEY '%s' AUDCTL $%02x (%s)\n", p->device->tag.cstr(), data, audctl2str(data))); LOG_SOUND(("POKEY '%s' AUDCTL $%02x (%s)\n", p->device->tag(), data, audctl2str(data)));
p->AUDCTL = data; p->AUDCTL = data;
ch_mask = 15; /* all channels */ ch_mask = 15; /* all channels */
/* determine the base multiplier for the 'div by n' calculations */ /* determine the base multiplier for the 'div by n' calculations */
@ -1044,7 +1044,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case STIMER_C: case STIMER_C:
/* first remove any existing timers */ /* first remove any existing timers */
LOG_TIMER(("POKEY '%s' STIMER $%02x\n", p->device->tag.cstr(), data)); LOG_TIMER(("POKEY '%s' STIMER $%02x\n", p->device->tag(), data));
timer_adjust_oneshot(p->timer[TIMER1], attotime_never, p->timer_param[TIMER1]); timer_adjust_oneshot(p->timer[TIMER1], attotime_never, p->timer_param[TIMER1]);
timer_adjust_oneshot(p->timer[TIMER2], attotime_never, p->timer_param[TIMER2]); timer_adjust_oneshot(p->timer[TIMER2], attotime_never, p->timer_param[TIMER2]);
@ -1062,7 +1062,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
{ {
if( p->divisor[CHAN2] > 4 ) if( p->divisor[CHAN2] > 4 )
{ {
LOG_TIMER(("POKEY '%s' timer1+2 after %d clocks\n", p->device->tag.cstr(), p->divisor[CHAN2])); LOG_TIMER(("POKEY '%s' timer1+2 after %d clocks\n", p->device->tag(), p->divisor[CHAN2]));
/* set timer #1 _and_ #2 event after timer_div clocks of joined CHAN1+CHAN2 */ /* set timer #1 _and_ #2 event after timer_div clocks of joined CHAN1+CHAN2 */
p->timer_period[TIMER2] = attotime_mul(p->clock_period, p->divisor[CHAN2]); p->timer_period[TIMER2] = attotime_mul(p->clock_period, p->divisor[CHAN2]);
p->timer_param[TIMER2] = IRQ_TIMR2|IRQ_TIMR1; p->timer_param[TIMER2] = IRQ_TIMR2|IRQ_TIMR1;
@ -1073,7 +1073,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
{ {
if( p->divisor[CHAN1] > 4 ) if( p->divisor[CHAN1] > 4 )
{ {
LOG_TIMER(("POKEY '%s' timer1 after %d clocks\n", p->device->tag.cstr(), p->divisor[CHAN1])); LOG_TIMER(("POKEY '%s' timer1 after %d clocks\n", p->device->tag(), p->divisor[CHAN1]));
/* set timer #1 event after timer_div clocks of CHAN1 */ /* set timer #1 event after timer_div clocks of CHAN1 */
p->timer_period[TIMER1] = attotime_mul(p->clock_period, p->divisor[CHAN1]); p->timer_period[TIMER1] = attotime_mul(p->clock_period, p->divisor[CHAN1]);
p->timer_param[TIMER1] = IRQ_TIMR1; p->timer_param[TIMER1] = IRQ_TIMR1;
@ -1082,7 +1082,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
if( p->divisor[CHAN2] > 4 ) if( p->divisor[CHAN2] > 4 )
{ {
LOG_TIMER(("POKEY '%s' timer2 after %d clocks\n", p->device->tag.cstr(), p->divisor[CHAN2])); LOG_TIMER(("POKEY '%s' timer2 after %d clocks\n", p->device->tag(), p->divisor[CHAN2]));
/* set timer #2 event after timer_div clocks of CHAN2 */ /* set timer #2 event after timer_div clocks of CHAN2 */
p->timer_period[TIMER2] = attotime_mul(p->clock_period, p->divisor[CHAN2]); p->timer_period[TIMER2] = attotime_mul(p->clock_period, p->divisor[CHAN2]);
p->timer_param[TIMER2] = IRQ_TIMR2; p->timer_param[TIMER2] = IRQ_TIMR2;
@ -1099,7 +1099,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
{ {
if( p->divisor[CHAN4] > 4 ) if( p->divisor[CHAN4] > 4 )
{ {
LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag.cstr(), p->divisor[CHAN4])); LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag(), p->divisor[CHAN4]));
/* set timer #4 event after timer_div clocks of CHAN4 */ /* set timer #4 event after timer_div clocks of CHAN4 */
p->timer_period[TIMER4] = attotime_mul(p->clock_period, p->divisor[CHAN4]); p->timer_period[TIMER4] = attotime_mul(p->clock_period, p->divisor[CHAN4]);
p->timer_param[TIMER4] = IRQ_TIMR4; p->timer_param[TIMER4] = IRQ_TIMR4;
@ -1111,7 +1111,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
{ {
if( p->divisor[CHAN4] > 4 ) if( p->divisor[CHAN4] > 4 )
{ {
LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag.cstr(), p->divisor[CHAN4])); LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag(), p->divisor[CHAN4]));
/* set timer #4 event after timer_div clocks of CHAN4 */ /* set timer #4 event after timer_div clocks of CHAN4 */
p->timer_period[TIMER4] = attotime_mul(p->clock_period, p->divisor[CHAN4]); p->timer_period[TIMER4] = attotime_mul(p->clock_period, p->divisor[CHAN4]);
p->timer_param[TIMER4] = IRQ_TIMR4; p->timer_param[TIMER4] = IRQ_TIMR4;
@ -1126,17 +1126,17 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case SKREST_C: case SKREST_C:
/* reset SKSTAT */ /* reset SKSTAT */
LOG(("POKEY '%s' SKREST $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' SKREST $%02x\n", p->device->tag(), data));
p->SKSTAT &= ~(SK_FRAME|SK_OVERRUN|SK_KBERR); p->SKSTAT &= ~(SK_FRAME|SK_OVERRUN|SK_KBERR);
break; break;
case POTGO_C: case POTGO_C:
LOG(("POKEY '%s' POTGO $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' POTGO $%02x\n", p->device->tag(), data));
pokey_potgo(p); pokey_potgo(p);
break; break;
case SEROUT_C: case SEROUT_C:
LOG(("POKEY '%s' SEROUT $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' SEROUT $%02x\n", p->device->tag(), data));
devcb_call_write8(&p->serout_w, offset, data); devcb_call_write8(&p->serout_w, offset, data);
p->SKSTAT |= SK_SEROUT; p->SKSTAT |= SK_SEROUT;
/* /*
@ -1150,7 +1150,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
break; break;
case IRQEN_C: case IRQEN_C:
LOG(("POKEY '%s' IRQEN $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' IRQEN $%02x\n", p->device->tag(), data));
/* acknowledge one or more IRQST bits ? */ /* acknowledge one or more IRQST bits ? */
if( p->IRQST & ~data ) if( p->IRQST & ~data )
@ -1176,7 +1176,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
case SKCTL_C: case SKCTL_C:
if( data == p->SKCTL ) if( data == p->SKCTL )
return; return;
LOG(("POKEY '%s' SKCTL $%02x\n", p->device->tag.cstr(), data)); LOG(("POKEY '%s' SKCTL $%02x\n", p->device->tag(), data));
p->SKCTL = data; p->SKCTL = data;
if( !(data & SK_RESET) ) if( !(data & SK_RESET) )
{ {
@ -1204,7 +1204,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
else else
new_val = (p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan1 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan1 %d\n", p->device->tag(), new_val));
p->volume[CHAN1] = (p->AUDC[CHAN1] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; p->volume[CHAN1] = (p->AUDC[CHAN1] & VOLUME_MASK) * POKEY_DEFAULT_GAIN;
p->divisor[CHAN1] = new_val; p->divisor[CHAN1] = new_val;
@ -1234,12 +1234,12 @@ WRITE8_DEVICE_HANDLER( pokey_w )
new_val = p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_HICLK_JOINED; new_val = p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_HICLK_JOINED;
else else
new_val = (p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan1+2 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan1+2 %d\n", p->device->tag(), new_val));
} }
else else
{ {
new_val = (p->AUDF[CHAN2] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN2] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan2 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan2 %d\n", p->device->tag(), new_val));
} }
p->volume[CHAN2] = (p->AUDC[CHAN2] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; p->volume[CHAN2] = (p->AUDC[CHAN2] & VOLUME_MASK) * POKEY_DEFAULT_GAIN;
@ -1269,7 +1269,7 @@ WRITE8_DEVICE_HANDLER( pokey_w )
else else
new_val = (p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan3 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan3 %d\n", p->device->tag(), new_val));
p->volume[CHAN3] = (p->AUDC[CHAN3] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; p->volume[CHAN3] = (p->AUDC[CHAN3] & VOLUME_MASK) * POKEY_DEFAULT_GAIN;
p->divisor[CHAN3] = new_val; p->divisor[CHAN3] = new_val;
@ -1299,12 +1299,12 @@ WRITE8_DEVICE_HANDLER( pokey_w )
new_val = p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_HICLK_JOINED; new_val = p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_HICLK_JOINED;
else else
new_val = (p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan3+4 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan3+4 %d\n", p->device->tag(), new_val));
} }
else else
{ {
new_val = (p->AUDF[CHAN4] + DIVADD_LOCLK) * p->clockmult; new_val = (p->AUDF[CHAN4] + DIVADD_LOCLK) * p->clockmult;
LOG_SOUND(("POKEY '%s' chan4 %d\n", p->device->tag.cstr(), new_val)); LOG_SOUND(("POKEY '%s' chan4 %d\n", p->device->tag(), new_val));
} }
p->volume[CHAN4] = (p->AUDC[CHAN4] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; p->volume[CHAN4] = (p->AUDC[CHAN4] & VOLUME_MASK) * POKEY_DEFAULT_GAIN;

6
src/emu/sound/saa1099.c
View File

@ -340,7 +340,7 @@ WRITE8_DEVICE_HANDLER( saa1099_control_w )
if ((data & 0xff) > 0x1c) if ((data & 0xff) > 0x1c)
{ {
/* Error! */ /* Error! */
logerror("%s: (SAA1099 '%s') Unknown register selected\n",cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s: (SAA1099 '%s') Unknown register selected\n",cpuexec_describe_context(device->machine), device->tag());
} }
saa->selected_reg = data & 0x1f; saa->selected_reg = data & 0x1f;
@ -426,7 +426,7 @@ WRITE8_DEVICE_HANDLER( saa1099_data_w )
int i; int i;
/* Synch & Reset generators */ /* Synch & Reset generators */
logerror("%s: (SAA1099 '%s') -reg 0x1c- Chip reset\n",cpuexec_describe_context(device->machine), device->tag.cstr()); logerror("%s: (SAA1099 '%s') -reg 0x1c- Chip reset\n",cpuexec_describe_context(device->machine), device->tag());
for (i = 0; i < 6; i++) for (i = 0; i < 6; i++)
{ {
saa->channels[i].level = 0; saa->channels[i].level = 0;
@ -435,7 +435,7 @@ WRITE8_DEVICE_HANDLER( saa1099_data_w )
} }
break; break;
default: /* Error! */ default: /* Error! */
logerror("%s: (SAA1099 '%s') Unknown operation (reg:%02x, data:%02x)\n",cpuexec_describe_context(device->machine), device->tag.cstr(), reg, data); logerror("%s: (SAA1099 '%s') Unknown operation (reg:%02x, data:%02x)\n",cpuexec_describe_context(device->machine), device->tag(), reg, data);
} }
} }

2
src/emu/sound/scsp.c
View File

@ -528,7 +528,7 @@ static void SCSP_Init(running_device *device, struct _SCSP *SCSP, const scsp_int
SCSP->MidiOutR=SCSP->MidiOutW=0; SCSP->MidiOutR=SCSP->MidiOutW=0;
// get SCSP RAM // get SCSP RAM
if (strcmp(device->tag, "scsp") == 0 || strcmp(device->tag, "scsp1") == 0) if (strcmp(device->tag(), "scsp") == 0 || strcmp(device->tag(), "scsp1") == 0)
{ {
SCSP->Master=1; SCSP->Master=1;
} }

66
src/emu/sound/sn76477.c
View File

@ -650,7 +650,7 @@ static void log_enable_line(sn76477_state *sn)
"Enabled", "Inhibited" "Enabled", "Inhibited"
}; };
LOG(1, ("SN76477 '%s': Enable line (9): %d [%s]\n", sn->device->tag.cstr(), sn->enable, desc[sn->enable])); LOG(1, ("SN76477 '%s': Enable line (9): %d [%s]\n", sn->device->tag(), sn->enable, desc[sn->enable]));
} }
@ -662,7 +662,7 @@ static void log_mixer_mode(sn76477_state *sn)
"SLF/Noise", "SLF/VCO/Noise", "SLF/VCO", "Inhibit" "SLF/Noise", "SLF/VCO/Noise", "SLF/VCO", "Inhibit"
}; };
LOG(1, ("SN76477 '%s': Mixer mode (25-27): %d [%s]\n", sn->device->tag.cstr(), sn->mixer_mode, desc[sn->mixer_mode])); LOG(1, ("SN76477 '%s': Mixer mode (25-27): %d [%s]\n", sn->device->tag(), sn->mixer_mode, desc[sn->mixer_mode]));
} }
@ -673,7 +673,7 @@ static void log_envelope_mode(sn76477_state *sn)
"VCO", "One-Shot", "Mixer Only", "VCO with Alternating Polarity" "VCO", "One-Shot", "Mixer Only", "VCO with Alternating Polarity"
}; };
LOG(1, ("SN76477 '%s': Envelope mode (1,28): %d [%s]\n", sn->device->tag.cstr(), sn->envelope_mode, desc[sn->envelope_mode])); LOG(1, ("SN76477 '%s': Envelope mode (1,28): %d [%s]\n", sn->device->tag(), sn->envelope_mode, desc[sn->envelope_mode]));
} }
@ -684,7 +684,7 @@ static void log_vco_mode(sn76477_state *sn)
"External (Pin 16)", "Internal (SLF)" "External (Pin 16)", "Internal (SLF)"
}; };
LOG(1, ("SN76477 '%s': VCO mode (22): %d [%s]\n", sn->device->tag.cstr(), sn->vco_mode, desc[sn->vco_mode])); LOG(1, ("SN76477 '%s': VCO mode (22): %d [%s]\n", sn->device->tag(), sn->vco_mode, desc[sn->vco_mode]));
} }
@ -694,16 +694,16 @@ static void log_one_shot_time(sn76477_state *sn)
{ {
if (compute_one_shot_cap_charging_rate(sn) > 0) if (compute_one_shot_cap_charging_rate(sn) > 0)
{ {
LOG(1, ("SN76477 '%s': One-shot time (23,24): %.4f sec\n", sn->device->tag.cstr(), ONE_SHOT_CAP_VOLTAGE_RANGE * (1 / compute_one_shot_cap_charging_rate(sn)))); LOG(1, ("SN76477 '%s': One-shot time (23,24): %.4f sec\n", sn->device->tag(), ONE_SHOT_CAP_VOLTAGE_RANGE * (1 / compute_one_shot_cap_charging_rate(sn))));
} }
else else
{ {
LOG(1, ("SN76477 '%s': One-shot time (23,24): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': One-shot time (23,24): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': One-shot time (23,24): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->one_shot_cap_voltage)); LOG(1, ("SN76477 '%s': One-shot time (23,24): External (cap = %.2fV)\n", sn->device->tag(), sn->one_shot_cap_voltage));
} }
} }
@ -717,29 +717,29 @@ static void log_slf_freq(sn76477_state *sn)
double charging_time = (1 / compute_slf_cap_charging_rate(sn)) * SLF_CAP_VOLTAGE_RANGE; double charging_time = (1 / compute_slf_cap_charging_rate(sn)) * SLF_CAP_VOLTAGE_RANGE;
double discharging_time = (1 / compute_slf_cap_discharging_rate(sn)) * SLF_CAP_VOLTAGE_RANGE; double discharging_time = (1 / compute_slf_cap_discharging_rate(sn)) * SLF_CAP_VOLTAGE_RANGE;
LOG(1, ("SN76477 '%s': SLF frequency (20,21): %.2f Hz\n", sn->device->tag.cstr(), 1 / (charging_time + discharging_time))); LOG(1, ("SN76477 '%s': SLF frequency (20,21): %.2f Hz\n", sn->device->tag(), 1 / (charging_time + discharging_time)));
} }
else else
{ {
LOG(1, ("SN76477 '%s': SLF frequency (20,21): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': SLF frequency (20,21): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': SLF frequency (20,21): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->slf_cap_voltage)); LOG(1, ("SN76477 '%s': SLF frequency (20,21): External (cap = %.2fV)\n", sn->device->tag(), sn->slf_cap_voltage));
} }
} }
static void log_vco_pitch_voltage(sn76477_state *sn) static void log_vco_pitch_voltage(sn76477_state *sn)
{ {
LOG(1, ("SN76477 '%s': VCO pitch voltage (19): %.2fV\n", sn->device->tag.cstr(), sn->pitch_voltage)); LOG(1, ("SN76477 '%s': VCO pitch voltage (19): %.2fV\n", sn->device->tag(), sn->pitch_voltage));
} }
static void log_vco_duty_cycle(sn76477_state *sn) static void log_vco_duty_cycle(sn76477_state *sn)
{ {
LOG(1, ("SN76477 '%s': VCO duty cycle (16,19): %.0f%%\n", sn->device->tag.cstr(), compute_vco_duty_cycle(sn) * 100.0)); LOG(1, ("SN76477 '%s': VCO duty cycle (16,19): %.0f%%\n", sn->device->tag(), compute_vco_duty_cycle(sn) * 100.0));
} }
@ -752,16 +752,16 @@ static void log_vco_freq(sn76477_state *sn)
double min_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_CAP_VOLTAGE_RANGE); double min_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_CAP_VOLTAGE_RANGE);
double max_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_TO_SLF_VOLTAGE_DIFF); double max_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_TO_SLF_VOLTAGE_DIFF);
LOG(1, ("SN76477 '%s': VCO frequency (17,18): %.2f Hz - %.1f Hz\n", sn->device->tag.cstr(), min_freq, max_freq)); LOG(1, ("SN76477 '%s': VCO frequency (17,18): %.2f Hz - %.1f Hz\n", sn->device->tag(), min_freq, max_freq));
} }
else else
{ {
LOG(1, ("SN76477 '%s': VCO frequency (17,18): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': VCO frequency (17,18): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': VCO frequency (17,18): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->vco_cap_voltage)); LOG(1, ("SN76477 '%s': VCO frequency (17,18): External (cap = %.2fV)\n", sn->device->tag(), sn->vco_cap_voltage));
} }
} }
@ -773,13 +773,13 @@ static void log_vco_ext_voltage(sn76477_state *sn)
double min_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_CAP_VOLTAGE_RANGE); double min_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_CAP_VOLTAGE_RANGE);
double max_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_TO_SLF_VOLTAGE_DIFF); double max_freq = compute_vco_cap_charging_discharging_rate(sn) / (2 * VCO_TO_SLF_VOLTAGE_DIFF);
LOG(1, ("SN76477 '%s': VCO ext. voltage (16): %.2fV (%.2f Hz)\n", sn->device->tag.cstr(), LOG(1, ("SN76477 '%s': VCO ext. voltage (16): %.2fV (%.2f Hz)\n", sn->device->tag(),
sn->vco_voltage, sn->vco_voltage,
min_freq + ((max_freq - min_freq) * sn->vco_voltage / VCO_MAX_EXT_VOLTAGE))); min_freq + ((max_freq - min_freq) * sn->vco_voltage / VCO_MAX_EXT_VOLTAGE)));
} }
else else
{ {
LOG(1, ("SN76477 '%s': VCO ext. voltage (16): %.2fV (saturated, no output)\n", sn->device->tag.cstr(), sn->vco_voltage)); LOG(1, ("SN76477 '%s': VCO ext. voltage (16): %.2fV (saturated, no output)\n", sn->device->tag(), sn->vco_voltage));
} }
} }
@ -788,17 +788,17 @@ static void log_noise_gen_freq(sn76477_state *sn)
{ {
if (sn->noise_clock_ext) if (sn->noise_clock_ext)
{ {
LOG(1, ("SN76477 '%s': Noise gen frequency (4): External\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Noise gen frequency (4): External\n", sn->device->tag()));
} }
else else
{ {
if (compute_noise_gen_freq(sn) > 0) if (compute_noise_gen_freq(sn) > 0)
{ {
LOG(1, ("SN76477 '%s': Noise gen frequency (4): %d Hz\n", sn->device->tag.cstr(), compute_noise_gen_freq(sn))); LOG(1, ("SN76477 '%s': Noise gen frequency (4): %d Hz\n", sn->device->tag(), compute_noise_gen_freq(sn)));
} }
else else
{ {
LOG(1, ("SN76477 '%s': Noise gen frequency (4): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Noise gen frequency (4): N/A\n", sn->device->tag()));
} }
} }
} }
@ -817,21 +817,21 @@ static void log_noise_filter_freq(sn76477_state *sn)
double charging_time = (1 / charging_rate) * NOISE_CAP_VOLTAGE_RANGE; double charging_time = (1 / charging_rate) * NOISE_CAP_VOLTAGE_RANGE;
double discharging_time = (1 / charging_rate) * NOISE_CAP_VOLTAGE_RANGE; double discharging_time = (1 / charging_rate) * NOISE_CAP_VOLTAGE_RANGE;
LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): %.0f Hz\n", sn->device->tag.cstr(), 1 / (charging_time + discharging_time))); LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): %.0f Hz\n", sn->device->tag(), 1 / (charging_time + discharging_time)));
} }
else else
{ {
LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): Very Large (Filtering Disabled)\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): Very Large (Filtering Disabled)\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->noise_filter_cap)); LOG(1, ("SN76477 '%s': Noise filter frequency (5,6): External (cap = %.2fV)\n", sn->device->tag(), sn->noise_filter_cap));
} }
} }
@ -842,16 +842,16 @@ static void log_attack_time(sn76477_state *sn)
{ {
if (compute_attack_decay_cap_charging_rate(sn) > 0) if (compute_attack_decay_cap_charging_rate(sn) > 0)
{ {
LOG(1, ("SN76477 '%s': Attack time (8,10): %.4f sec\n", sn->device->tag.cstr(), AD_CAP_VOLTAGE_RANGE * (1 / compute_attack_decay_cap_charging_rate(sn)))); LOG(1, ("SN76477 '%s': Attack time (8,10): %.4f sec\n", sn->device->tag(), AD_CAP_VOLTAGE_RANGE * (1 / compute_attack_decay_cap_charging_rate(sn))));
} }
else else
{ {
LOG(1, ("SN76477 '%s': Attack time (8,10): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Attack time (8,10): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': Attack time (8,10): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->attack_decay_cap_voltage)); LOG(1, ("SN76477 '%s': Attack time (8,10): External (cap = %.2fV)\n", sn->device->tag(), sn->attack_decay_cap_voltage));
} }
} }
@ -862,16 +862,16 @@ static void log_decay_time(sn76477_state *sn)
{ {
if (compute_attack_decay_cap_discharging_rate(sn) > 0) if (compute_attack_decay_cap_discharging_rate(sn) > 0)
{ {
LOG(1, ("SN76477 '%s': Decay time (7,8): %.4f sec\n", sn->device->tag.cstr(), AD_CAP_VOLTAGE_RANGE * (1 / compute_attack_decay_cap_discharging_rate(sn)))); LOG(1, ("SN76477 '%s': Decay time (7,8): %.4f sec\n", sn->device->tag(), AD_CAP_VOLTAGE_RANGE * (1 / compute_attack_decay_cap_discharging_rate(sn))));
} }
else else
{ {
LOG(1, ("SN76477 '%s': Decay time (8,10): N/A\n", sn->device->tag.cstr())); LOG(1, ("SN76477 '%s': Decay time (8,10): N/A\n", sn->device->tag()));
} }
} }
else else
{ {
LOG(1, ("SN76477 '%s': Decay time (7, 8): External (cap = %.2fV)\n", sn->device->tag.cstr(), sn->attack_decay_cap_voltage)); LOG(1, ("SN76477 '%s': Decay time (7, 8): External (cap = %.2fV)\n", sn->device->tag(), sn->attack_decay_cap_voltage));
} }
} }
@ -879,7 +879,7 @@ static void log_decay_time(sn76477_state *sn)
static void log_voltage_out(sn76477_state *sn) static void log_voltage_out(sn76477_state *sn)
{ {
LOG(1, ("SN76477 '%s': Voltage OUT range (11,12): %.2fV - %.2fV (clips above %.2fV)\n", LOG(1, ("SN76477 '%s': Voltage OUT range (11,12): %.2fV - %.2fV (clips above %.2fV)\n",
sn->device->tag.cstr(), sn->device->tag(),
OUT_CENTER_LEVEL_VOLTAGE + compute_center_to_peak_voltage_out(sn) * out_neg_gain[(int)(AD_CAP_VOLTAGE_MAX * 10)], OUT_CENTER_LEVEL_VOLTAGE + compute_center_to_peak_voltage_out(sn) * out_neg_gain[(int)(AD_CAP_VOLTAGE_MAX * 10)],
OUT_CENTER_LEVEL_VOLTAGE + compute_center_to_peak_voltage_out(sn) * out_pos_gain[(int)(AD_CAP_VOLTAGE_MAX * 10)], OUT_CENTER_LEVEL_VOLTAGE + compute_center_to_peak_voltage_out(sn) * out_pos_gain[(int)(AD_CAP_VOLTAGE_MAX * 10)],
OUT_HIGH_CLIP_THRESHOLD)); OUT_HIGH_CLIP_THRESHOLD));
@ -918,10 +918,10 @@ static void open_wav_file(sn76477_state *sn)
{ {
char wav_file_name[30]; char wav_file_name[30];
sprintf(wav_file_name, LOG_WAV_FILE_NAME, sn->device->tag.cstr()); sprintf(wav_file_name, LOG_WAV_FILE_NAME, sn->device->tag());
sn->file = wav_open(wav_file_name, sn->sample_rate, 2); sn->file = wav_open(wav_file_name, sn->sample_rate, 2);
LOG(1, ("SN76477 '%s': Logging output: %s\n", sn->device->tag.cstr(), wav_file_name)); LOG(1, ("SN76477 '%s': Logging output: %s\n", sn->device->tag(), wav_file_name));
} }

10
src/emu/state.h
View File

@ -94,19 +94,19 @@ do { \
/* register device items */ /* register device items */
#define state_save_register_device_item(_dev, _index, _val) \ #define state_save_register_device_item(_dev, _index, _val) \
state_save_register_generic((_dev)->machine, (_dev)->name(), (_dev)->tag, _index, #_val, &_val, _val, 1) state_save_register_generic((_dev)->machine, (_dev)->name(), (_dev)->tag(), _index, #_val, &_val, _val, 1)
#define state_save_register_device_item_pointer(_dev, _index, _val, _count) \ #define state_save_register_device_item_pointer(_dev, _index, _val, _count) \
state_save_register_generic((_dev)->machine, (_dev)->name(), (_dev)->tag, _index, #_val, &_val[0], _val[0], _count) state_save_register_generic((_dev)->machine, (_dev)->name(), (_dev)->tag(), _index, #_val, &_val[0], _val[0], _count)
#define state_save_register_device_item_array(_dev, _index, _val) \ #define state_save_register_device_item_array(_dev, _index, _val) \
state_save_register_item_pointer((_dev)->machine, (_dev)->name(), (_dev)->tag, _index, _val, sizeof(_val)/sizeof(_val[0])) state_save_register_item_pointer((_dev)->machine, (_dev)->name(), (_dev)->tag(), _index, _val, sizeof(_val)/sizeof(_val[0]))
#define state_save_register_device_item_2d_array(_dev, _index, _val) \ #define state_save_register_device_item_2d_array(_dev, _index, _val) \
state_save_register_item_pointer((_dev)->machine, (_dev)->name(), (_dev)->tag, _index, _val[0], sizeof(_val)/sizeof(_val[0][0])) state_save_register_item_pointer((_dev)->machine, (_dev)->name(), (_dev)->tag(), _index, _val[0], sizeof(_val)/sizeof(_val[0][0]))
#define state_save_register_device_item_bitmap(_dev, _index, _val) \ #define state_save_register_device_item_bitmap(_dev, _index, _val) \
state_save_register_bitmap((_dev)->machine, (_dev)->name(), (_dev)->tag, _index, #_val, _val, __FILE__, __LINE__) state_save_register_bitmap((_dev)->machine, (_dev)->name(), (_dev)->tag(), _index, #_val, _val, __FILE__, __LINE__)

6
src/emu/ui.c
View File

@ -1618,7 +1618,7 @@ static slider_state *slider_init(running_machine *machine)
for (device = machine->firstcpu; device != NULL; device = cpu_next(device)) for (device = machine->firstcpu; device != NULL; device = cpu_next(device))
{ {
void *param = (void *)device; void *param = (void *)device;
string.printf("Overclock CPU %s", device->tag.cstr()); string.printf("Overclock CPU %s", device->tag());
*tailptr = slider_alloc(machine, string, 10, 1000, 2000, 1, slider_overclock, param); *tailptr = slider_alloc(machine, string, 10, 1000, 2000, 1, slider_overclock, param);
tailptr = &(*tailptr)->next; tailptr = &(*tailptr)->next;
} }
@ -2112,7 +2112,7 @@ static char *slider_get_screen_desc(running_device *screen)
static char descbuf[256]; static char descbuf[256];
if (screen_count > 1) if (screen_count > 1)
sprintf(descbuf, "Screen '%s'", screen->tag.cstr()); sprintf(descbuf, "Screen '%s'", screen->tag());
else else
strcpy(descbuf, "Screen"); strcpy(descbuf, "Screen");
@ -2131,7 +2131,7 @@ static char *slider_get_laserdisc_desc(running_device *laserdisc)
static char descbuf[256]; static char descbuf[256];
if (ldcount > 1) if (ldcount > 1)
sprintf(descbuf, "Laserdisc '%s'", laserdisc->tag.cstr()); sprintf(descbuf, "Laserdisc '%s'", laserdisc->tag());
else else
strcpy(descbuf, "Laserdisc"); strcpy(descbuf, "Laserdisc");

56
src/emu/validity.c
View File

@ -620,39 +620,39 @@ static int validate_cpu(int drivnum, const machine_config *config)
{ {
if (video_screen_count(config) == 0) if (video_screen_count(config) == 0)
{ {
mame_printf_error("%s: %s cpu '%s' has a VBLANK interrupt, but the driver is screenless !\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has a VBLANK interrupt, but the driver is screenless !\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
else if (cpuconfig->vblank_interrupt_screen != NULL && cpuconfig->vblank_interrupts_per_frame != 0) else if (cpuconfig->vblank_interrupt_screen != NULL && cpuconfig->vblank_interrupts_per_frame != 0)
{ {
mame_printf_error("%s: %s cpu '%s' has a new VBLANK interrupt handler with >1 interrupts!\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has a new VBLANK interrupt handler with >1 interrupts!\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
else if (cpuconfig->vblank_interrupt_screen != NULL && config->devicelist.find(cpuconfig->vblank_interrupt_screen) == NULL) else if (cpuconfig->vblank_interrupt_screen != NULL && config->devicelist.find(cpuconfig->vblank_interrupt_screen) == NULL)
{ {
mame_printf_error("%s: %s cpu '%s' VBLANK interrupt with a non-existant screen tag (%s)!\n", driver->source_file, driver->name, devconfig->tag.cstr(), cpuconfig->vblank_interrupt_screen); mame_printf_error("%s: %s cpu '%s' VBLANK interrupt with a non-existant screen tag (%s)!\n", driver->source_file, driver->name, devconfig->tag(), cpuconfig->vblank_interrupt_screen);
error = TRUE; error = TRUE;
} }
else if (cpuconfig->vblank_interrupt_screen == NULL && cpuconfig->vblank_interrupts_per_frame == 0) else if (cpuconfig->vblank_interrupt_screen == NULL && cpuconfig->vblank_interrupts_per_frame == 0)
{ {
mame_printf_error("%s: %s cpu '%s' has a VBLANK interrupt handler with 0 interrupts!\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has a VBLANK interrupt handler with 0 interrupts!\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
} }
else if (cpuconfig->vblank_interrupts_per_frame != 0) else if (cpuconfig->vblank_interrupts_per_frame != 0)
{ {
mame_printf_error("%s: %s cpu '%s' has no VBLANK interrupt handler but a non-0 interrupt count is given!\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has no VBLANK interrupt handler but a non-0 interrupt count is given!\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
if (cpuconfig->timed_interrupt != NULL && cpuconfig->timed_interrupt_period == 0) if (cpuconfig->timed_interrupt != NULL && cpuconfig->timed_interrupt_period == 0)
{ {
mame_printf_error("%s: %s cpu '%s' has a timer interrupt handler with 0 period!\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has a timer interrupt handler with 0 period!\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
else if (cpuconfig->timed_interrupt == NULL && cpuconfig->timed_interrupt_period != 0) else if (cpuconfig->timed_interrupt == NULL && cpuconfig->timed_interrupt_period != 0)
{ {
mame_printf_error("%s: %s cpu '%s' has a no timer interrupt handler but has a non-0 period given!\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s cpu '%s' has a no timer interrupt handler but has a non-0 period given!\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
} }
@ -681,7 +681,7 @@ static int validate_display(int drivnum, const machine_config *config)
/* sanity check dimensions */ /* sanity check dimensions */
if ((scrconfig->width <= 0) || (scrconfig->height <= 0)) if ((scrconfig->width <= 0) || (scrconfig->height <= 0))
{ {
mame_printf_error("%s: %s screen '%s' has invalid display dimensions\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s screen '%s' has invalid display dimensions\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
@ -693,7 +693,7 @@ static int validate_display(int drivnum, const machine_config *config)
(scrconfig->visarea.max_x >= scrconfig->width) || (scrconfig->visarea.max_x >= scrconfig->width) ||
(scrconfig->visarea.max_y >= scrconfig->height)) (scrconfig->visarea.max_y >= scrconfig->height))
{ {
mame_printf_error("%s: %s screen '%s' has an invalid display area\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s screen '%s' has an invalid display area\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
@ -702,7 +702,7 @@ static int validate_display(int drivnum, const machine_config *config)
scrconfig->format != BITMAP_FORMAT_RGB15 && scrconfig->format != BITMAP_FORMAT_RGB15 &&
scrconfig->format != BITMAP_FORMAT_RGB32) scrconfig->format != BITMAP_FORMAT_RGB32)
{ {
mame_printf_error("%s: %s screen '%s' has unsupported format\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s screen '%s' has unsupported format\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
if (scrconfig->format == BITMAP_FORMAT_INDEXED16) if (scrconfig->format == BITMAP_FORMAT_INDEXED16)
@ -712,7 +712,7 @@ static int validate_display(int drivnum, const machine_config *config)
/* check for zero frame rate */ /* check for zero frame rate */
if (scrconfig->refresh == 0) if (scrconfig->refresh == 0)
{ {
mame_printf_error("%s: %s screen '%s' has a zero refresh rate\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_error("%s: %s screen '%s' has a zero refresh rate\n", driver->source_file, driver->name, devconfig->tag());
error = TRUE; error = TRUE;
} }
} }
@ -1216,17 +1216,17 @@ static int validate_sound(int drivnum, const machine_config *config)
{ {
/* check for duplicate tags */ /* check for duplicate tags */
for (checkspeak = speaker_output_first(config); checkspeak != NULL; checkspeak = speaker_output_next(checkspeak)) for (checkspeak = speaker_output_first(config); checkspeak != NULL; checkspeak = speaker_output_next(checkspeak))
if (checkspeak != curspeak && strcmp(checkspeak->tag, curspeak->tag) == 0) if (checkspeak != curspeak && strcmp(checkspeak->tag(), curspeak->tag()) == 0)
{ {
mame_printf_error("%s: %s has multiple speakers tagged as '%s'\n", driver->source_file, driver->name, checkspeak->tag.cstr()); mame_printf_error("%s: %s has multiple speakers tagged as '%s'\n", driver->source_file, driver->name, checkspeak->tag());
error = TRUE; error = TRUE;
} }
/* make sure there are no sound chips with the same tag */ /* make sure there are no sound chips with the same tag */
for (checksound = sound_first(config); checksound != NULL; checksound = sound_next(checksound)) for (checksound = sound_first(config); checksound != NULL; checksound = sound_next(checksound))
if (strcmp(curspeak->tag, checksound->tag) == 0) if (strcmp(curspeak->tag(), checksound->tag()) == 0)
{ {
mame_printf_error("%s: %s has both a speaker and a sound chip tagged as '%s'\n", driver->source_file, driver->name, curspeak->tag.cstr()); mame_printf_error("%s: %s has both a speaker and a sound chip tagged as '%s'\n", driver->source_file, driver->name, curspeak->tag());
error = TRUE; error = TRUE;
} }
} }
@ -1242,14 +1242,14 @@ static int validate_sound(int drivnum, const machine_config *config)
{ {
/* find a speaker with the requested tag */ /* find a speaker with the requested tag */
for (checkspeak = speaker_output_first(config); checkspeak != NULL; checkspeak = speaker_output_next(checkspeak)) for (checkspeak = speaker_output_first(config); checkspeak != NULL; checkspeak = speaker_output_next(checkspeak))
if (strcmp(route->target, checkspeak->tag) == 0) if (strcmp(route->target, checkspeak->tag()) == 0)
break; break;
/* if we didn't find one, look for another sound chip with the tag */ /* if we didn't find one, look for another sound chip with the tag */
if (checkspeak == NULL) if (checkspeak == NULL)
{ {
for (checksound = sound_first(config); checksound != NULL; checksound = sound_next(checksound)) for (checksound = sound_first(config); checksound != NULL; checksound = sound_next(checksound))
if (checksound != cursound && strcmp(route->target, checksound->tag) == 0) if (checksound != cursound && strcmp(route->target, checksound->tag()) == 0)
break; break;
/* if we didn't find one, it's an error */ /* if we didn't find one, it's an error */
@ -1284,13 +1284,13 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
int spacenum; int spacenum;
/* validate the device tag */ /* validate the device tag */
error |= validate_tag(driver, devconfig->get_config_string(DEVINFO_STR_NAME), devconfig->tag); error |= validate_tag(driver, devconfig->get_config_string(DEVINFO_STR_NAME), devconfig->tag());
/* look for duplicates */ /* look for duplicates */
for (scanconfig = config->devicelist.first(); scanconfig != devconfig; scanconfig = scanconfig->next) for (scanconfig = config->devicelist.first(); scanconfig != devconfig; scanconfig = scanconfig->next)
if (strcmp(scanconfig->tag, devconfig->tag) == 0) if (strcmp(scanconfig->tag(), devconfig->tag()) == 0)
{ {
mame_printf_warning("%s: %s has multiple devices with the tag '%s'\n", driver->source_file, driver->name, devconfig->tag.cstr()); mame_printf_warning("%s: %s has multiple devices with the tag '%s'\n", driver->source_file, driver->name, devconfig->tag());
break; break;
} }
@ -1322,12 +1322,12 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
/* validate the global map parameters */ /* validate the global map parameters */
if (map->spacenum != spacenum) if (map->spacenum != spacenum)
{ {
mame_printf_error("%s: %s device '%s' space %d has address space %d handlers!\n", driver->source_file, driver->name, devconfig->tag.cstr(), spacenum, map->spacenum); mame_printf_error("%s: %s device '%s' space %d has address space %d handlers!\n", driver->source_file, driver->name, devconfig->tag(), spacenum, map->spacenum);
error = TRUE; error = TRUE;
} }
if (map->databits != databus_width) if (map->databits != databus_width)
{ {
mame_printf_error("%s: %s device '%s' uses wrong memory handlers for %s space! (width = %d, memory = %08x)\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], databus_width, map->databits); mame_printf_error("%s: %s device '%s' uses wrong memory handlers for %s space! (width = %d, memory = %08x)\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], databus_width, map->databits);
error = TRUE; error = TRUE;
} }
@ -1346,7 +1346,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
((entry->read.type != AMH_NONE && scan->read.type != AMH_NONE) || ((entry->read.type != AMH_NONE && scan->read.type != AMH_NONE) ||
(entry->write.type != AMH_NONE && scan->write.type != AMH_NONE))) (entry->write.type != AMH_NONE && scan->write.type != AMH_NONE)))
{ {
mame_printf_warning("%s: %s '%s' %s space has overlapping memory (%X-%X,%d,%d) vs (%X-%X,%d,%d)\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->read.type, entry->write.type, scan->addrstart, scan->addrend, scan->read.type, scan->write.type); mame_printf_warning("%s: %s '%s' %s space has overlapping memory (%X-%X,%d,%d) vs (%X-%X,%d,%d)\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->read.type, entry->write.type, scan->addrstart, scan->addrend, scan->read.type, scan->write.type);
detected_overlap = TRUE; detected_overlap = TRUE;
break; break;
} }
@ -1369,7 +1369,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
/* if this is a program space, auto-assign implicit ROM entries */ /* if this is a program space, auto-assign implicit ROM entries */
if (entry->read.type == AMH_ROM && entry->region == NULL) if (entry->read.type == AMH_ROM && entry->region == NULL)
{ {
entry->region = devconfig->tag; entry->region = devconfig->tag();
entry->rgnoffs = entry->addrstart; entry->rgnoffs = entry->addrstart;
} }
@ -1384,7 +1384,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
/* stop if we hit an empty */ /* stop if we hit an empty */
if (rgninfo->entries[rgnnum].tag == NULL) if (rgninfo->entries[rgnnum].tag == NULL)
{ {
mame_printf_error("%s: %s device '%s' %s space memory map entry %X-%X references non-existant region '%s'\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->region); mame_printf_error("%s: %s device '%s' %s space memory map entry %X-%X references non-existant region '%s'\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->region);
error = TRUE; error = TRUE;
break; break;
} }
@ -1395,7 +1395,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
offs_t length = rgninfo->entries[rgnnum].length; offs_t length = rgninfo->entries[rgnnum].length;
if (entry->rgnoffs + (byteend - bytestart + 1) > length) if (entry->rgnoffs + (byteend - bytestart + 1) > length)
{ {
mame_printf_error("%s: %s device '%s' %s space memory map entry %X-%X extends beyond region '%s' size (%X)\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->region, length); mame_printf_error("%s: %s device '%s' %s space memory map entry %X-%X extends beyond region '%s' size (%X)\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], entry->addrstart, entry->addrend, entry->region, length);
error = TRUE; error = TRUE;
} }
break; break;
@ -1407,7 +1407,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
if ((entry->read.type == AMH_DEVICE_HANDLER && entry->read.tag != NULL && config->devicelist.find(entry->read.tag) == NULL) || if ((entry->read.type == AMH_DEVICE_HANDLER && entry->read.tag != NULL && config->devicelist.find(entry->read.tag) == NULL) ||
(entry->write.type == AMH_DEVICE_HANDLER && entry->write.tag != NULL && config->devicelist.find(entry->write.tag) == NULL)) (entry->write.type == AMH_DEVICE_HANDLER && entry->write.tag != NULL && config->devicelist.find(entry->write.tag) == NULL))
{ {
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant device '%s'\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], entry->write.tag); mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant device '%s'\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], entry->write.tag);
error = TRUE; error = TRUE;
} }
@ -1415,7 +1415,7 @@ static int validate_devices(int drivnum, const machine_config *config, const iop
if ((entry->read.type == AMH_PORT && entry->read.tag != NULL && portlist.find(entry->read.tag) == NULL) || if ((entry->read.type == AMH_PORT && entry->read.tag != NULL && portlist.find(entry->read.tag) == NULL) ||
(entry->write.type == AMH_PORT && entry->write.tag != NULL && portlist.find(entry->write.tag) == NULL)) (entry->write.type == AMH_PORT && entry->write.tag != NULL && portlist.find(entry->write.tag) == NULL))
{ {
mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant port tag '%s'\n", driver->source_file, driver->name, devconfig->tag.cstr(), address_space_names[spacenum], entry->read.tag); mame_printf_error("%s: %s device '%s' %s space memory map entry references nonexistant port tag '%s'\n", driver->source_file, driver->name, devconfig->tag(), address_space_names[spacenum], entry->read.tag);
error = TRUE; error = TRUE;
} }

6
src/emu/video.c
View File

@ -610,7 +610,7 @@ int video_screen_update_partial(running_device *screen, int scanline)
/* validate arguments */ /* validate arguments */
assert(scanline >= 0); assert(scanline >= 0);
LOG_PARTIAL_UPDATES(("Partial: video_screen_update_partial(%s, %d): ", screen->tag.cstr(), scanline)); LOG_PARTIAL_UPDATES(("Partial: video_screen_update_partial(%s, %d): ", screen->tag(), scanline));
/* these two checks only apply if we're allowed to skip frames */ /* these two checks only apply if we're allowed to skip frames */
if (!(screen->machine->config->video_attributes & VIDEO_ALWAYS_UPDATE)) if (!(screen->machine->config->video_attributes & VIDEO_ALWAYS_UPDATE))
@ -2078,7 +2078,7 @@ static void create_snapshot_bitmap(running_device *screen)
/* select the appropriate view in our dummy target */ /* select the appropriate view in our dummy target */
if (global.snap_native && screen != NULL) if (global.snap_native && screen != NULL)
{ {
view_index = screen->machine->devicelist.index(VIDEO_SCREEN, screen->tag.cstr()); view_index = screen->machine->devicelist.index(VIDEO_SCREEN, screen->tag());
assert(view_index != -1); assert(view_index != -1);
render_target_set_view(global.snap_target, view_index); render_target_set_view(global.snap_target, view_index);
} }
@ -2587,7 +2587,7 @@ static void video_finalize_burnin(running_device *screen)
/* write the final PNG */ /* write the final PNG */
/* compute the name and create the file */ /* compute the name and create the file */
fname.printf("%s" PATH_SEPARATOR "burnin-%s.png", screen->machine->basename, screen->tag.cstr()); fname.printf("%s" PATH_SEPARATOR "burnin-%s.png", screen->machine->basename, screen->tag());
filerr = mame_fopen(SEARCHPATH_SCREENSHOT, fname, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &file); filerr = mame_fopen(SEARCHPATH_SCREENSHOT, fname, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &file);
if (filerr == FILERR_NONE) if (filerr == FILERR_NONE)
{ {

2
src/emu/video/voodoo.c
View File

@ -4538,7 +4538,7 @@ static DEVICE_START( voodoo )
} }
/* set the type, and initialize the chip mask */ /* set the type, and initialize the chip mask */
v->index = device->machine->devicelist.index(device->type, device->tag); v->index = device->machine->devicelist.index(device->type, device->tag());
v->screen = device->machine->device(config->screen); v->screen = device->machine->device(config->screen);
assert_always(v->screen != NULL, "Unable to find screen attached to voodoo"); assert_always(v->screen != NULL, "Unable to find screen attached to voodoo");
v->cpu = device->machine->device(config->cputag); v->cpu = device->machine->device(config->cputag);

12
src/mame/drivers/btime.c
View File

@ -250,7 +250,7 @@ static WRITE8_HANDLER( lnc_w )
else if (offset == 0x9000) { return; } /* AM_NOP */ else if (offset == 0x9000) { return; } /* AM_NOP */
else if (offset == 0x9002) { audio_command_w(space, 0, data); return; } else if (offset == 0x9002) { audio_command_w(space, 0, data); return; }
else if (offset >= 0xb000 && offset <= 0xb1ff) ; else if (offset >= 0xb000 && offset <= 0xb1ff) ;
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;
@ -270,7 +270,7 @@ static WRITE8_HANDLER( mmonkey_w )
else if (offset == 0x9000) { return; } /* AM_NOP */ else if (offset == 0x9000) { return; } /* AM_NOP */
else if (offset == 0x9002) { audio_command_w(space, 0, data); return; } else if (offset == 0x9002) { audio_command_w(space, 0, data); return; }
else if (offset >= 0xb000 && offset <= 0xbfff) { mmonkey_protection_w(space, offset - 0xb000, data); return; } else if (offset >= 0xb000 && offset <= 0xbfff) { mmonkey_protection_w(space, offset - 0xb000, data); return; }
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;
@ -290,7 +290,7 @@ static WRITE8_HANDLER( btime_w )
else if (offset == 0x4002) btime_video_control_w(space, 0, data); else if (offset == 0x4002) btime_video_control_w(space, 0, data);
else if (offset == 0x4003) audio_command_w(space, 0, data); else if (offset == 0x4003) audio_command_w(space, 0, data);
else if (offset == 0x4004) bnj_scroll1_w(space, 0, data); else if (offset == 0x4004) bnj_scroll1_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;
@ -311,7 +311,7 @@ static WRITE8_HANDLER( tisland_w )
else if (offset == 0x4004) bnj_scroll1_w(space, 0, data); else if (offset == 0x4004) bnj_scroll1_w(space, 0, data);
else if (offset == 0x4005) bnj_scroll2_w(space, 0, data); else if (offset == 0x4005) bnj_scroll2_w(space, 0, data);
// else if (offset == 0x8000) btime_video_control_w(space,0,data); // else if (offset == 0x8000) btime_video_control_w(space,0,data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;
@ -331,7 +331,7 @@ static WRITE8_HANDLER( zoar_w )
else if (offset == 0x9804) bnj_scroll2_w(space, 0, data); else if (offset == 0x9804) bnj_scroll2_w(space, 0, data);
else if (offset == 0x9805) bnj_scroll1_w(space, 0, data); else if (offset == 0x9805) bnj_scroll1_w(space, 0, data);
else if (offset == 0x9806) audio_command_w(space, 0, data); else if (offset == 0x9806) audio_command_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;
@ -347,7 +347,7 @@ static WRITE8_HANDLER( disco_w )
else if (offset >= 0x8000 && offset <= 0x881f) ; else if (offset >= 0x8000 && offset <= 0x881f) ;
else if (offset == 0x9a00) audio_command_w(space, 0, data); else if (offset == 0x9a00) audio_command_w(space, 0, data);
else if (offset == 0x9c00) disco_video_control_w(space, 0, data); else if (offset == 0x9c00) disco_video_control_w(space, 0, data);
else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, offset); else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, offset);
state->rambase[offset] = data; state->rambase[offset] = data;

2
src/mame/drivers/cybertnk.c
View File

@ -187,7 +187,7 @@ static tilemap_t *tx_tilemap;
static UINT16 *tx_vram,*bg_vram,*fg_vram,*spr_ram; static UINT16 *tx_vram,*bg_vram,*fg_vram,*spr_ram;
static UINT16 *io_ram; static UINT16 *io_ram;
#define LOG_UNKNOWN_WRITE logerror("unknown io write CPU '%s':%08x 0x%08x 0x%04x & 0x%04x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), offset*2, data, mem_mask); #define LOG_UNKNOWN_WRITE logerror("unknown io write CPU '%s':%08x 0x%08x 0x%04x & 0x%04x\n", space->cpu->tag(), cpu_get_pc(space->cpu), offset*2, data, mem_mask);
static TILE_GET_INFO( get_tx_tile_info ) static TILE_GET_INFO( get_tx_tile_info )
{ {

4
src/mame/drivers/galpani2.c
View File

@ -276,14 +276,14 @@ static WRITE8_HANDLER( galpani2_coin_lockout_w )
static WRITE8_DEVICE_HANDLER( galpani2_oki1_bank_w ) static WRITE8_DEVICE_HANDLER( galpani2_oki1_bank_w )
{ {
UINT8 *ROM = memory_region(device->machine, "oki1"); UINT8 *ROM = memory_region(device->machine, "oki1");
logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag.cstr(),data); logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag(),data);
memcpy(ROM + 0x30000, ROM + 0x40000 + 0x10000 * (~data & 0xf), 0x10000); memcpy(ROM + 0x30000, ROM + 0x40000 + 0x10000 * (~data & 0xf), 0x10000);
} }
static WRITE8_DEVICE_HANDLER( galpani2_oki2_bank_w ) static WRITE8_DEVICE_HANDLER( galpani2_oki2_bank_w )
{ {
okim6295_set_bank_base(device, 0x40000 * (data & 0xf) ); okim6295_set_bank_base(device, 0x40000 * (data & 0xf) );
logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag.cstr(),data); logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag(),data);
} }

8
src/mame/drivers/galpani3.c
View File

@ -527,7 +527,7 @@ GALPANI3_MCU_COM_W(3)
static READ16_HANDLER( galpani3_mcu_status_r ) static READ16_HANDLER( galpani3_mcu_status_r )
{ {
logerror("cpu '%s' (PC=%06X): read mcu status\n", space->cpu->tag.cstr(), cpu_get_previouspc(space->cpu)); logerror("cpu '%s' (PC=%06X): read mcu status\n", space->cpu->tag(), cpu_get_previouspc(space->cpu));
return 0; return 0;
} }
@ -549,7 +549,7 @@ static READ16_HANDLER( galpani3_regs1_r )
} }
default: default:
logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space->cpu->tag.cstr(), cpu_get_previouspc(space->cpu), offset, mem_mask); logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space->cpu->tag(), cpu_get_previouspc(space->cpu), offset, mem_mask);
break; break;
} }
@ -574,7 +574,7 @@ static READ16_HANDLER( galpani3_regs2_r )
} }
default: default:
logerror("cpu '%s' (PC=%06X): galpani3_regs2_r %02x %04x\n", space->cpu->tag.cstr(), cpu_get_previouspc(space->cpu), offset, mem_mask); logerror("cpu '%s' (PC=%06X): galpani3_regs2_r %02x %04x\n", space->cpu->tag(), cpu_get_previouspc(space->cpu), offset, mem_mask);
break; break;
} }
@ -599,7 +599,7 @@ static READ16_HANDLER( galpani3_regs3_r )
} }
default: default:
logerror("cpu '%s' (PC=%06X): galpani3_regs3_r %02x %04x\n", space->cpu->tag.cstr(), cpu_get_previouspc(space->cpu), offset, mem_mask); logerror("cpu '%s' (PC=%06X): galpani3_regs3_r %02x %04x\n", space->cpu->tag(), cpu_get_previouspc(space->cpu), offset, mem_mask);
break; break;
} }

4
src/mame/drivers/gticlub.c
View File

@ -262,7 +262,7 @@ static VIDEO_UPDATE( hangplt )
{ {
bitmap_fill(bitmap, cliprect, screen->machine->pens[0]); bitmap_fill(bitmap, cliprect, screen->machine->pens[0]);
if (strcmp(screen->tag, "lscreen") == 0) if (strcmp(screen->tag(), "lscreen") == 0)
{ {
running_device *k001604 = devtag_get_device(screen->machine, "k001604_1"); running_device *k001604 = devtag_get_device(screen->machine, "k001604_1");
running_device *voodoo = devtag_get_device(screen->machine, "voodoo0"); running_device *voodoo = devtag_get_device(screen->machine, "voodoo0");
@ -273,7 +273,7 @@ static VIDEO_UPDATE( hangplt )
k001604_draw_front_layer(k001604, bitmap, cliprect); k001604_draw_front_layer(k001604, bitmap, cliprect);
} }
else if (strcmp(screen->tag, "rscreen") == 0) else if (strcmp(screen->tag(), "rscreen") == 0)
{ {
running_device *k001604 = devtag_get_device(screen->machine, "k001604_2"); running_device *k001604 = devtag_get_device(screen->machine, "k001604_2");
running_device *voodoo = devtag_get_device(screen->machine, "voodoo1"); running_device *voodoo = devtag_get_device(screen->machine, "voodoo1");

4
src/mame/drivers/hornet.c
View File

@ -392,7 +392,7 @@ static VIDEO_UPDATE( hornet )
static VIDEO_UPDATE( hornet_2board ) static VIDEO_UPDATE( hornet_2board )
{ {
if (strcmp(screen->tag, "lscreen") == 0) if (strcmp(screen->tag(), "lscreen") == 0)
{ {
running_device *k037122 = devtag_get_device(screen->machine, "k037122_1"); running_device *k037122 = devtag_get_device(screen->machine, "k037122_1");
running_device *voodoo = devtag_get_device(screen->machine, "voodoo0"); running_device *voodoo = devtag_get_device(screen->machine, "voodoo0");
@ -401,7 +401,7 @@ static VIDEO_UPDATE( hornet_2board )
/* TODO: tilemaps per screen */ /* TODO: tilemaps per screen */
k037122_tile_draw(k037122, bitmap, cliprect); k037122_tile_draw(k037122, bitmap, cliprect);
} }
else if (strcmp(screen->tag, "rscreen") == 0) else if (strcmp(screen->tag(), "rscreen") == 0)
{ {
running_device *k037122 = devtag_get_device(screen->machine, "k037122_2"); running_device *k037122 = devtag_get_device(screen->machine, "k037122_2");
running_device *voodoo = devtag_get_device(screen->machine, "voodoo1"); running_device *voodoo = devtag_get_device(screen->machine, "voodoo1");

2
src/mame/drivers/jchan.c
View File

@ -286,7 +286,7 @@ JCHAN_MCU_COM_W(3)
static READ16_HANDLER( jchan_mcu_status_r ) static READ16_HANDLER( jchan_mcu_status_r )
{ {
logerror("cpu '%s' (PC=%06X): read mcu status\n", space->cpu->tag.cstr(), cpu_get_previouspc(space->cpu)); logerror("cpu '%s' (PC=%06X): read mcu status\n", space->cpu->tag(), cpu_get_previouspc(space->cpu));
return 0; return 0;
} }

2
src/mame/drivers/konamim2.c
View File

@ -317,7 +317,7 @@ static WRITE64_HANDLER(unk4_w)
{ {
if (data & 0x800000) if (data & 0x800000)
{ {
mame_printf_debug("CPU '%s': CPU1 IRQ at %08X\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); mame_printf_debug("CPU '%s': CPU1 IRQ at %08X\n", space->cpu->tag(), cpu_get_pc(space->cpu));
cputag_set_input_line(space->machine, "sub", INPUT_LINE_IRQ0, ASSERT_LINE); cputag_set_input_line(space->machine, "sub", INPUT_LINE_IRQ0, ASSERT_LINE);
} }

2
src/mame/drivers/opwolf.c
View File

@ -469,7 +469,7 @@ static MACHINE_RESET( opwolf )
static void opwolf_msm5205_vck( running_device *device ) static void opwolf_msm5205_vck( running_device *device )
{ {
opwolf_state *state = (opwolf_state *)device->machine->driver_data; opwolf_state *state = (opwolf_state *)device->machine->driver_data;
int chip = (strcmp(device->tag, "msm1") == 0) ? 0 : 1; int chip = (strcmp(device->tag(), "msm1") == 0) ? 0 : 1;
if (state->adpcm_data[chip] != -1) if (state->adpcm_data[chip] != -1)
{ {
msm5205_data_w(device, state->adpcm_data[chip] & 0x0f); msm5205_data_w(device, state->adpcm_data[chip] & 0x0f);

2
src/mame/drivers/route16.c
View File

@ -943,7 +943,7 @@ static READ8_HANDLER( routex_prot_read )
{ {
if (cpu_get_pc(space->cpu) == 0x2f) return 0xfb; if (cpu_get_pc(space->cpu) == 0x2f) return 0xfb;
logerror ("cpu '%s' (PC=%08X): unmapped prot read\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); logerror ("cpu '%s' (PC=%08X): unmapped prot read\n", space->cpu->tag(), cpu_get_pc(space->cpu));
return 0x00; return 0x00;
} }

8
src/mame/drivers/segas24.c
View File

@ -699,7 +699,7 @@ static void reset_reset(running_machine *machine)
static void resetcontrol_w(const address_space *space, UINT8 data) static void resetcontrol_w(const address_space *space, UINT8 data)
{ {
resetcontrol = data; resetcontrol = data;
logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu->tag(), cpu_get_pc(space->cpu));
reset_reset(space->machine); reset_reset(space->machine);
} }
@ -756,7 +756,7 @@ static WRITE16_HANDLER( mlatch_w )
int i; int i;
UINT8 mxor = 0; UINT8 mxor = 0;
if(!mlatch_table) { if(!mlatch_table) {
logerror("Protection: magic latch accessed but no table loaded (%s:%x)\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); logerror("Protection: magic latch accessed but no table loaded (%s:%x)\n", space->cpu->tag(), cpu_get_pc(space->cpu));
return; return;
} }
@ -767,9 +767,9 @@ static WRITE16_HANDLER( mlatch_w )
if(mlatch & (1<<i)) if(mlatch & (1<<i))
mxor |= 1 << mlatch_table[i]; mxor |= 1 << mlatch_table[i];
mlatch = data ^ mxor; mlatch = data ^ mxor;
logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, mlatch, space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, mlatch, space->cpu->tag(), cpu_get_pc(space->cpu));
} else { } else {
logerror("Magic latch reset (%s:%x)\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); logerror("Magic latch reset (%s:%x)\n", space->cpu->tag(), cpu_get_pc(space->cpu));
mlatch = 0x00; mlatch = 0x00;
} }
} }

2
src/mame/drivers/spdodgeb.c
View File

@ -87,7 +87,7 @@ static WRITE8_HANDLER( spd_adpcm_w )
static void spd_adpcm_int(running_device *device) static void spd_adpcm_int(running_device *device)
{ {
int chip = (strcmp(device->tag, "msm1") == 0) ? 0 : 1; int chip = (strcmp(device->tag(), "msm1") == 0) ? 0 : 1;
if (adpcm_pos[chip] >= adpcm_end[chip] || adpcm_pos[chip] >= 0x10000) if (adpcm_pos[chip] >= adpcm_end[chip] || adpcm_pos[chip] >= 0x10000)
{ {
adpcm_idle[chip] = 1; adpcm_idle[chip] = 1;

16
src/mame/drivers/stv.c
View File

@ -481,7 +481,7 @@ static UINT8 stv_SMPC_r8 (const address_space *space, int offset)
if (cpu_get_pc(space->cpu)==0x060020E6) return_data = 0x10;//??? if (cpu_get_pc(space->cpu)==0x060020E6) return_data = 0x10;//???
//if(LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x Returns %02x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), offset, return_data); //if(LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x Returns %02x\n", space->cpu->tag(), cpu_get_pc(space->cpu), offset, return_data);
return return_data; return return_data;
@ -705,7 +705,7 @@ static void stv_SMPC_w8 (const address_space *space, int offset, UINT8 data)
smpc_ram[0x21] = (0x80) | ((NMI_reset & 1) << 6); smpc_ram[0x21] = (0x80) | ((NMI_reset & 1) << 6);
break; break;
default: default:
if(LOG_SMPC) logerror ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data); if(LOG_SMPC) logerror ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->cpu->tag(), cpu_get_pc(space->cpu), data);
} }
// we've processed the command, clear status flag // we've processed the command, clear status flag
@ -895,7 +895,7 @@ static READ32_HANDLER ( stv_io_r32 )
return 0xffffffff; return 0xffffffff;
} }
case 0x1c/4: case 0x1c/4:
if(LOG_IOGA) logerror("(PC %s=%06x) Warning: READ from PORT_AD\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu)); if(LOG_IOGA) logerror("(PC %s=%06x) Warning: READ from PORT_AD\n", space->cpu->tag(), cpu_get_pc(space->cpu));
popmessage("Read from PORT_AD"); popmessage("Read from PORT_AD");
port_i++; port_i++;
return port_ad[port_i & 7]; return port_ad[port_i & 7];
@ -1357,7 +1357,7 @@ static WRITE32_HANDLER( stv_scu_w32 )
stv_scu[40] != 0xffffffff) stv_scu[40] != 0xffffffff)
{ {
if(LOG_SCU) logerror("cpu %s (PC=%08X) IRQ mask reg set %08x = %d%d%d%d|%d%d%d%d|%d%d%d%d|%d%d%d%d\n", if(LOG_SCU) logerror("cpu %s (PC=%08X) IRQ mask reg set %08x = %d%d%d%d|%d%d%d%d|%d%d%d%d|%d%d%d%d\n",
space->cpu->tag.cstr(), cpu_get_pc(space->cpu), space->cpu->tag(), cpu_get_pc(space->cpu),
stv_scu[offset], stv_scu[offset],
stv_scu[offset] & 0x8000 ? 1 : 0, /*A-Bus irq*/ stv_scu[offset] & 0x8000 ? 1 : 0, /*A-Bus irq*/
stv_scu[offset] & 0x4000 ? 1 : 0, /*<reserved>*/ stv_scu[offset] & 0x4000 ? 1 : 0, /*<reserved>*/
@ -1965,7 +1965,7 @@ static READ32_HANDLER( stv_sh2_soundram_r )
* Enter into Radiant Silver Gun specific menu for a test... */ * Enter into Radiant Silver Gun specific menu for a test... */
static WRITE32_HANDLER( minit_w ) static WRITE32_HANDLER( minit_w )
{ {
logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu),data); logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->cpu->tag(), cpu_get_pc(space->cpu),data);
cpuexec_boost_interleave(space->machine, minit_boost_timeslice, ATTOTIME_IN_USEC(minit_boost)); cpuexec_boost_interleave(space->machine, minit_boost_timeslice, ATTOTIME_IN_USEC(minit_boost));
cpuexec_trigger(space->machine, 1000); cpuexec_trigger(space->machine, 1000);
sh2_set_frt_input(devtag_get_device(space->machine, "slave"), PULSE_LINE); sh2_set_frt_input(devtag_get_device(space->machine, "slave"), PULSE_LINE);
@ -1973,7 +1973,7 @@ static WRITE32_HANDLER( minit_w )
static WRITE32_HANDLER( sinit_w ) static WRITE32_HANDLER( sinit_w )
{ {
logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu),data); logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->cpu->tag(), cpu_get_pc(space->cpu),data);
cpuexec_boost_interleave(space->machine, sinit_boost_timeslice, ATTOTIME_IN_USEC(sinit_boost)); cpuexec_boost_interleave(space->machine, sinit_boost_timeslice, ATTOTIME_IN_USEC(sinit_boost));
sh2_set_frt_input(devtag_get_device(space->machine, "maincpu"), PULSE_LINE); sh2_set_frt_input(devtag_get_device(space->machine, "maincpu"), PULSE_LINE);
} }
@ -2315,7 +2315,7 @@ static WRITE32_HANDLER ( w60ffc44_write )
{ {
COMBINE_DATA(&stv_workram_h[0xffc44/4]); COMBINE_DATA(&stv_workram_h[0xffc44/4]);
logerror("cpu %s (PC=%08X): 60ffc44_write write = %08X & %08X\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, mem_mask); logerror("cpu %s (PC=%08X): 60ffc44_write write = %08X & %08X\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, mem_mask);
//sinit_w(offset,data,mem_mask); //sinit_w(offset,data,mem_mask);
} }
@ -2323,7 +2323,7 @@ static WRITE32_HANDLER ( w60ffc48_write )
{ {
COMBINE_DATA(&stv_workram_h[0xffc48/4]); COMBINE_DATA(&stv_workram_h[0xffc48/4]);
logerror("cpu %s (PC=%08X): 60ffc48_write write = %08X & %08X\n", space->cpu->tag.cstr(), cpu_get_pc(space->cpu), data, mem_mask); logerror("cpu %s (PC=%08X): 60ffc48_write write = %08X & %08X\n", space->cpu->tag(), cpu_get_pc(space->cpu), data, mem_mask);
//minit_w(offset,data,mem_mask); //minit_w(offset,data,mem_mask);
} }

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