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Merge pull request #2722 from DavidHaywood/master

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sh3/4 regression fixes
This commit is contained in:
R. Belmont 2017-10-17 17:45:31 -04:00 committed by GitHub
commit ecd3f93207
2 changed files with 8 additions and 6 deletions
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5
src/devices/cpu/sh/sh.cpp
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@ -758,7 +758,7 @@ void sh_common_execution::EXTUW(uint32_t m, uint32_t n)
void sh_common_execution::JMP(uint32_t m) void sh_common_execution::JMP(uint32_t m)
{ {
m_sh2_state->m_delay = m_sh2_state->ea = m_sh2_state->r[m]; m_sh2_state->m_delay = m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->icount--; // not in SH4 implementation? //m_sh2_state->icount--; // not in SH4 implementation?
} }
/* JSR @Rm */ /* JSR @Rm */
@ -1303,6 +1303,7 @@ void sh_common_execution::OR(uint32_t m, uint32_t n)
void sh_common_execution::ORI(uint32_t i) void sh_common_execution::ORI(uint32_t i)
{ {
m_sh2_state->r[0] |= i; m_sh2_state->r[0] |= i;
m_sh2_state->icount -= 2; // not in SH2 implementation?
} }
/* OR.B #imm,@(R0,GBR) */ /* OR.B #imm,@(R0,GBR) */
@ -1314,7 +1315,7 @@ void sh_common_execution::ORM(uint32_t i)
temp = RB( m_sh2_state->ea ); temp = RB( m_sh2_state->ea );
temp |= i; temp |= i;
WB( m_sh2_state->ea, temp ); WB( m_sh2_state->ea, temp );
m_sh2_state->icount -= 2; //m_sh2_state->icount -= 2; // not in SH4 implementation?
} }
/* ROTCL Rn */ /* ROTCL Rn */

9
src/devices/cpu/sh/sh4.cpp
View File

@ -463,15 +463,16 @@ inline void sh34_base_device::SETS(const uint16_t opcode)
/* LDC Rm,SR */ /* LDC Rm,SR */
inline void sh34_base_device::LDCSR(const uint16_t opcode) inline void sh34_base_device::LDCSR(const uint16_t opcode)
{ {
// copy current registers to banked version of current register set // important to store the value now so that it doesn't get affected by the bank change
uint32_t reg = m_sh2_state->r[Rn];
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29); sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29);
// if the register bank in the new differs from the one already in SR
if ((m_sh2_state->r[Rn] & sRB) != (m_sh2_state->sr & sRB)) if ((m_sh2_state->r[Rn] & sRB) != (m_sh2_state->sr & sRB))
sh4_change_register_bank(m_sh2_state->r[Rn] & sRB ? 1 : 0); sh4_change_register_bank(m_sh2_state->r[Rn] & sRB ? 1 : 0);
m_sh2_state->sr = m_sh2_state->r[Rn] & SH34_FLAGS; m_sh2_state->sr = reg & SH34_FLAGS;
sh4_exception_recompute(); sh4_exception_recompute();
} }