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Duh

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This commit is contained in:
Angelo Salese 2010-05-12 02:26:00 +00:00
parent 1e0f3da2e0
commit ed087d2be6
3 changed files with 37 additions and 2 deletions
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1
src/emu/cpu/z8000/z8000.c
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@ -43,6 +43,7 @@
*
* TODO:
* - make the z8001 opcodes to be dynamic (i.e. to take segmented mode flag into account and use the non-segmented mode)
* - dissassembler doesn't work at all with the z8001
*
*****************************************************************************/

34
src/emu/cpu/z8000/z8000ops.c
View File

@ -2733,6 +2733,14 @@ static void Z3E_dddd_ssss(z8000_state *cpustate)
WRPORT_B(cpustate, 0, RDMEM_W(cpustate, cpustate->RW(dst)), cpustate->RB(src));
}
/* FIXME: aforementioned opcode looks bugged. */
static void Z3E_dddd_ssss_seg(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
GET_SRC(OP0,NIB3);
WRPORT_B(cpustate, 0, cpustate->RW(dst), cpustate->RB(src));
}
/******************************************
out @rd,rs
flags: ---V--
@ -3267,6 +3275,32 @@ static void Z4D_0000_0101_addr_imm16(z8000_state *cpustate)
WRMEM_W(cpustate, addr, imm16);
}
static void Z4D_0000_0101_addr_imm16_seg(z8000_state *cpustate)
{
static UINT32 offset;
UINT16 operand1 = fetch(cpustate);
if(operand1 & 0x8000)
{
UINT16 operand2 = fetch(cpustate);
UINT16 imm16 = fetch(cpustate);
offset = (operand1 & 0x0700) << 8;
offset|= (operand2 & 0xffff);
WRMEM_W(cpustate, offset, imm16);
cycles(cpustate, 17);
}
else
{
UINT16 imm16 = fetch(cpustate);
offset = (operand1 & 0x0700) << 8;
offset|= (operand1 & 0x00ff);
WRMEM_W(cpustate, offset, imm16);
cycles(cpustate, 15);
}
}
/******************************************
tset addr
flags: --S---

4
src/emu/cpu/z8000/z8000tbl.c
View File

@ -677,7 +677,7 @@ static const Z8000_init seg_table[] = {
{0x3b0b,0x3bfb,16,2, 21,Z3B_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
{0x3c00,0x3cff, 1,1, 10,Z3C_ssss_dddd, "inb %rb3,@%rw2", 0},
{0x3d00,0x3dff, 1,1, 10,Z3D_ssss_dddd, "in %rw3,@%rw2", 0},
{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss, "outb @%rw2,%rb3", 0},
{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss_seg, "outb @%rw2,%rb3", 0},
{0x3f00,0x3fff, 1,1, 12,Z3F_dddd_ssss, "out @%rw2,%rw3", 0},
{0x4000,0x400f, 1,2, 9,Z40_0000_dddd_addr, "addb %rb3,%a1", 0},
{0x4010,0x40ff, 1,2, 10,Z40_ssN0_dddd_addr, "addb %rb3,%a1(%rw2)", 0},
@ -721,7 +721,7 @@ static const Z8000_init seg_table[] = {
{0x4d01,0x4d01, 1,3, 14,Z4D_0000_0001_addr_imm16, "cp %a1,%#w2", 0},
{0x4d02,0x4d02, 1,2, 15,Z4D_0000_0010_addr, "neg %a1", 0},
{0x4d04,0x4d04, 1,2, 11,Z4D_0000_0100_addr, "test %a1", 0},
{0x4d05,0x4d05, 1,3, 14,Z4D_0000_0101_addr_imm16, "ld %a1,%#w2", 0},
{0x4d05,0x4d05, 1,1, 0, Z4D_0000_0101_addr_imm16_seg, "ld %a1,%#w2", 0},
{0x4d06,0x4d06, 1,2, 14,Z4D_0000_0110_addr, "tset %a1", 0},
{0x4d08,0x4d08, 1,1, 0, Z4D_0000_1000_addr_seg, "clr %a1", 0},
{0x4d10,0x4df0,16,2, 16,Z4D_ddN0_0000_addr, "com %a1(%rw2)", 0},