mirror of
https://github.com/holub/mame
synced 2025-05-22 21:58:57 +03:00
new not working
---------------- Cycle Mahbou [Angelo Salese, Chack'n, Team Japump, Dumping Union] (Just reorganized things to support a MCU sim inside the tait8741.c file, will modify it accordingly now...)
This commit is contained in:
parent
73c86ac3bf
commit
ed372ac9d6
@ -71,6 +71,7 @@ Dumped by Chack'n
|
|||||||
#include "driver.h"
|
#include "driver.h"
|
||||||
#include "cpu/z80/z80.h"
|
#include "cpu/z80/z80.h"
|
||||||
#include "sound/ay8910.h"
|
#include "sound/ay8910.h"
|
||||||
|
#include "machine/tait8741.h"
|
||||||
|
|
||||||
static UINT8 *cyclemb_vram,*cyclemb_cram;
|
static UINT8 *cyclemb_vram,*cyclemb_cram;
|
||||||
static UINT8 *cyclemb_obj1_ram,*cyclemb_obj2_ram,*cyclemb_obj3_ram;
|
static UINT8 *cyclemb_obj1_ram,*cyclemb_obj2_ram,*cyclemb_obj3_ram;
|
||||||
@ -197,6 +198,7 @@ static WRITE8_HANDLER( sound_cmd_w )
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if 0
|
||||||
static READ8_HANDLER( mcu_status_r )
|
static READ8_HANDLER( mcu_status_r )
|
||||||
{
|
{
|
||||||
return 1;
|
return 1;
|
||||||
@ -208,6 +210,7 @@ static WRITE8_HANDLER( sound_cmd_w ) //actually ciom
|
|||||||
soundlatch_w(space, 0, data & 0xff);
|
soundlatch_w(space, 0, data & 0xff);
|
||||||
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
static ADDRESS_MAP_START( cyclemb_map, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( cyclemb_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||||
@ -223,8 +226,7 @@ ADDRESS_MAP_END
|
|||||||
static ADDRESS_MAP_START( cyclemb_io, ADDRESS_SPACE_IO, 8 )
|
static ADDRESS_MAP_START( cyclemb_io, ADDRESS_SPACE_IO, 8 )
|
||||||
// ADDRESS_MAP_GLOBAL_MASK(0xff)
|
// ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||||
AM_RANGE(0xc000, 0xc000) AM_WRITE(cyclemb_bankswitch_w)
|
AM_RANGE(0xc000, 0xc000) AM_WRITE(cyclemb_bankswitch_w)
|
||||||
AM_RANGE(0xc09e, 0xc09e) AM_READ(soundlatch2_r)
|
AM_RANGE(0xc09e, 0xc09f) AM_READWRITE(cyclemb_8741_0_r, cyclemb_8741_0_w)
|
||||||
AM_RANGE(0xc09f, 0xc09f) AM_READ(mcu_status_r) AM_WRITE(sound_cmd_w)
|
|
||||||
AM_RANGE(0xc0bf, 0xc0bf) AM_WRITENOP //flip screen
|
AM_RANGE(0xc0bf, 0xc0bf) AM_WRITENOP //flip screen
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
|
@ -11,7 +11,7 @@ Taito 8741 emulation
|
|||||||
#include "tait8741.h"
|
#include "tait8741.h"
|
||||||
|
|
||||||
#define VERBOSE 0
|
#define VERBOSE 0
|
||||||
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
|
#define LOG(x) do { if (VERBOSE) printf x; } while (0)
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
|
|
||||||
@ -533,3 +533,93 @@ WRITE8_HANDLER( josvolly_8741_0_w ){ josvolly_8741_w(space,0,offset,data); }
|
|||||||
READ8_HANDLER( josvolly_8741_0_r ) { return josvolly_8741_r(space,0,offset); }
|
READ8_HANDLER( josvolly_8741_0_r ) { return josvolly_8741_r(space,0,offset); }
|
||||||
WRITE8_HANDLER( josvolly_8741_1_w ) { josvolly_8741_w(space,1,offset,data); }
|
WRITE8_HANDLER( josvolly_8741_1_w ) { josvolly_8741_w(space,1,offset,data); }
|
||||||
READ8_HANDLER( josvolly_8741_1_r ) { return josvolly_8741_r(space,1,offset); }
|
READ8_HANDLER( josvolly_8741_1_r ) { return josvolly_8741_r(space,1,offset); }
|
||||||
|
|
||||||
|
static void cyclemb_8741_w(const address_space *space, int num, int offset, int data)
|
||||||
|
{
|
||||||
|
JV8741 *mcu = &i8741[num];
|
||||||
|
|
||||||
|
if(offset==1)
|
||||||
|
{
|
||||||
|
LOG(("%s:8741[%d] CW %02X\n", cpuexec_describe_context(space->machine), num, data));
|
||||||
|
|
||||||
|
/* read pointer */
|
||||||
|
mcu->cmd = data;
|
||||||
|
/* CMD */
|
||||||
|
switch(data)
|
||||||
|
{
|
||||||
|
case 0:
|
||||||
|
mcu->txd = data ^ 0x40;
|
||||||
|
mcu->sts |= 0x02;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
mcu->txd = data ^ 0x40;
|
||||||
|
mcu->sts |= 0x02;
|
||||||
|
#if 1
|
||||||
|
/* ?? */
|
||||||
|
mcu->rxd = 0; /* SBSTS ( DIAG ) , killed */
|
||||||
|
mcu->sts |= 0x01; /* RD ready */
|
||||||
|
#endif
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
#if 1
|
||||||
|
mcu->rxd = input_port_read(space->machine, "DSW2");
|
||||||
|
mcu->sts |= 0x01; /* RD ready */
|
||||||
|
#endif
|
||||||
|
break;
|
||||||
|
case 3: /* normal mode ? */
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0xf0: /* clear main sts ? */
|
||||||
|
mcu->txd = data ^ 0x40;
|
||||||
|
mcu->sts |= 0x02;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* data */
|
||||||
|
LOG(("%s:8741[%d] DW %02X\n", cpuexec_describe_context(space->machine), num, data));
|
||||||
|
|
||||||
|
mcu->txd = data ^ 0x40; /* parity reverce ? */
|
||||||
|
mcu->sts |= 0x02; /* TXD busy */
|
||||||
|
#if 1
|
||||||
|
/* interrupt ? */
|
||||||
|
if(num == 0)
|
||||||
|
{
|
||||||
|
if(josvolly_nmi_enable)
|
||||||
|
{
|
||||||
|
cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||||
|
josvolly_nmi_enable = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
josvolly_8741_do(space->machine, num);
|
||||||
|
}
|
||||||
|
|
||||||
|
static INT8 cyclemb_8741_r(const address_space *space,int num,int offset)
|
||||||
|
{
|
||||||
|
JV8741 *mcu = &i8741[num];
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
if(offset==1)
|
||||||
|
{
|
||||||
|
if(mcu->rst)
|
||||||
|
mcu->rxd = input_port_read(space->machine, mcu->initReadPort); /* port in */
|
||||||
|
ret = mcu->sts;
|
||||||
|
LOG(("%s:8741[%d] SR %02X\n",cpuexec_describe_context(space->machine),num,ret));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* clear status port */
|
||||||
|
mcu->sts &= ~0x01; /* RD ready */
|
||||||
|
ret = mcu->rxd;
|
||||||
|
LOG(("%s:8741[%d] DR %02X\n",cpuexec_describe_context(space->machine),num,ret));
|
||||||
|
mcu->rst = 0;
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
WRITE8_HANDLER( cyclemb_8741_0_w ){ cyclemb_8741_w(space,0,offset,data); }
|
||||||
|
READ8_HANDLER( cyclemb_8741_0_r ) { return cyclemb_8741_r(space,0,offset); }
|
||||||
|
@ -39,7 +39,7 @@ READ8_HANDLER( TAITO8741_2_r );
|
|||||||
READ8_HANDLER( TAITO8741_3_r );
|
READ8_HANDLER( TAITO8741_3_r );
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
joshi Vollyball set.
|
joshi Volleyball set.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
extern int josvolly_nmi_enable;
|
extern int josvolly_nmi_enable;
|
||||||
@ -50,4 +50,15 @@ WRITE8_HANDLER( josvolly_8741_1_w );
|
|||||||
READ8_HANDLER( josvolly_8741_0_r );
|
READ8_HANDLER( josvolly_8741_0_r );
|
||||||
READ8_HANDLER( josvolly_8741_1_r );
|
READ8_HANDLER( josvolly_8741_1_r );
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
Cycle Mahbou set.
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
WRITE8_HANDLER( cyclemb_8741_0_w );
|
||||||
|
//WRITE8_HANDLER( cyclemb_8741_1_w );
|
||||||
|
READ8_HANDLER( cyclemb_8741_0_r );
|
||||||
|
//READ8_HANDLER( cyclemb_8741_1_r );
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user