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i386: Fixed BSR/BSF and CMPS based on test-i386 output.

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This commit is contained in:
mahlemiut 2012-01-19 23:02:50 +00:00
parent 3b305c1800
commit ed6ede2535
3 changed files with 8 additions and 8 deletions
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4
src/emu/cpu/i386/i386.c
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@ -1060,7 +1060,7 @@ static void i286_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested
CHANGE_PC(cpustate,cpustate->eip);
cpustate->CPL = cpustate->sreg[CS].selector & 0x03;
printf("286 Task Switch from selector %04x to %04x\n",old_task,selector);
// printf("286 Task Switch from selector %04x to %04x\n",old_task,selector);
}
static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested)
@ -1175,7 +1175,7 @@ static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested
CHANGE_PC(cpustate,cpustate->eip);
cpustate->CPL = cpustate->sreg[CS].selector & 0x03;
printf("386 Task Switch from selector %04x to %04x\n",old_task,selector);
// printf("386 Task Switch from selector %04x to %04x\n",old_task,selector);
}
static void i386_check_irq_line(i386_state *cpustate)

6
src/emu/cpu/i386/i386op16.c
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@ -287,9 +287,9 @@ static void I386OP(bsf_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bc
dst = temp;
CYCLES(cpustate,CYCLES_BSF);
}
STORE_REG16(modrm, dst);
}
CYCLES(cpustate,CYCLES_BSF_BASE);
STORE_REG16(modrm, dst);
}
static void I386OP(bsr_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bd
@ -316,9 +316,9 @@ static void I386OP(bsr_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bd
dst = temp;
CYCLES(cpustate,CYCLES_BSR);
}
STORE_REG16(modrm, dst);
}
CYCLES(cpustate,CYCLES_BSR_BASE);
STORE_REG16(modrm, dst);
}
@ -552,7 +552,7 @@ static void I386OP(cmpsw)(i386_state *cpustate) // Opcode 0xa7
ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI) );
src = READ16(cpustate,eas);
dst = READ16(cpustate,ead);
SUB16(cpustate,dst, src);
SUB16(cpustate,src,dst);
BUMP_SI(cpustate,2);
BUMP_DI(cpustate,2);
CYCLES(cpustate,CYCLES_CMPS);

6
src/emu/cpu/i386/i386op32.c
View File

@ -289,9 +289,9 @@ static void I386OP(bsf_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bc
dst = temp;
CYCLES(cpustate,CYCLES_BSF);
}
STORE_REG32(modrm, dst);
}
CYCLES(cpustate,CYCLES_BSF_BASE);
STORE_REG32(modrm, dst);
}
static void I386OP(bsr_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bd
@ -318,9 +318,9 @@ static void I386OP(bsr_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bd
dst = temp;
CYCLES(cpustate,CYCLES_BSR);
}
STORE_REG32(modrm, dst);
}
CYCLES(cpustate,CYCLES_BSR_BASE);
STORE_REG32(modrm, dst);
}
static void I386OP(bt_rm32_r32)(i386_state *cpustate) // Opcode 0x0f a3
@ -548,7 +548,7 @@ static void I386OP(cmpsd)(i386_state *cpustate) // Opcode 0xa7
ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI) );
src = READ32(cpustate,eas);
dst = READ32(cpustate,ead);
SUB32(cpustate,dst, src);
SUB32(cpustate,src,dst);
BUMP_SI(cpustate,4);
BUMP_DI(cpustate,4);
CYCLES(cpustate,CYCLES_CMPS);