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https://github.com/holub/mame
synced 2025-04-25 17:56:43 +03:00
segas32.cpp: ACCESSING_BITS cleanup (nw)
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bd37173bf6
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@ -713,7 +713,25 @@ TIMER_DEVICE_CALLBACK_MEMBER(segas32_state::signal_v60_irq_callback)
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}
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void segas32_state::int_control_w(int offset, uint8_t data)
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READ8_MEMBER(segas32_state::int_control_r)
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{
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switch (offset)
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{
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case 8:
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/* fix me - should return timer count down value */
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break;
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case 10:
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/* fix me - should return timer count down value */
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break;
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}
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/* return all F's for everything except timer values */
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return 0xff;
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}
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WRITE8_MEMBER(segas32_state::int_control_w)
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{
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int duration;
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@ -774,60 +792,6 @@ void segas32_state::int_control_w(int offset, uint8_t data)
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}
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READ16_MEMBER(segas32_state::interrupt_control_16_r)
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{
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switch (offset)
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{
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case 8/2:
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/* fix me - should return timer count down value */
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break;
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case 10/2:
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/* fix me - should return timer count down value */
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break;
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}
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/* return all F's for everything except timer values */
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return 0xffff;
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}
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WRITE16_MEMBER(segas32_state::interrupt_control_16_w)
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{
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if (ACCESSING_BITS_0_7)
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int_control_w(offset*2+0, data);
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if (ACCESSING_BITS_8_15)
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int_control_w(offset*2+1, data >> 8);
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}
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READ32_MEMBER(segas32_state::interrupt_control_32_r)
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{
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switch (offset)
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{
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case 8/4:
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/* fix me - should return timer count down value */
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break;
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}
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/* return all F's for everything except timer values */
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return 0xffffffff;
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}
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WRITE32_MEMBER(segas32_state::interrupt_control_32_w)
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{
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if (ACCESSING_BITS_0_7)
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int_control_w(offset*4+0, data);
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if (ACCESSING_BITS_8_15)
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int_control_w(offset*4+1, data >> 8);
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if (ACCESSING_BITS_16_23)
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int_control_w(offset*4+2, data >> 16);
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if (ACCESSING_BITS_24_31)
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int_control_w(offset*4+3, data >> 24);
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}
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TIMER_CALLBACK_MEMBER(segas32_state::end_of_vblank_int)
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{
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signal_v60_irq(MAIN_IRQ_VBSTOP);
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@ -918,26 +882,16 @@ WRITE_LINE_MEMBER(segas32_state::display_enable_1_w)
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*
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*************************************/
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WRITE16_MEMBER(segas32_state::random_number_16_w)
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WRITE16_MEMBER(segas32_state::random_number_w)
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{
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// osd_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", m_maincpu->pc(), offset*2, data, mem_mask);
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}
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READ16_MEMBER(segas32_state::random_number_16_r)
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READ16_MEMBER(segas32_state::random_number_r)
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{
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return machine().rand();
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}
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WRITE32_MEMBER(segas32_state::random_number_32_w)
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{
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// osd_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", m_maincpu->pc(), offset*2, data, mem_mask);
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}
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READ32_MEMBER(segas32_state::random_number_32_r)
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{
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return machine().rand() ^ (machine().rand() << 16);
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}
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/*************************************
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@ -946,38 +900,15 @@ READ32_MEMBER(segas32_state::random_number_32_r)
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*
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*************************************/
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READ16_MEMBER(segas32_state::shared_ram_16_r)
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READ8_MEMBER(segas32_state::shared_ram_r)
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{
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return m_z80_shared_ram[offset*2+0] | (m_z80_shared_ram[offset*2+1] << 8);
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return m_z80_shared_ram[offset];
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}
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WRITE16_MEMBER(segas32_state::shared_ram_16_w)
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WRITE8_MEMBER(segas32_state::shared_ram_w)
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{
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if (ACCESSING_BITS_0_7)
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m_z80_shared_ram[offset*2+0] = data;
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if (ACCESSING_BITS_8_15)
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m_z80_shared_ram[offset*2+1] = data >> 8;
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}
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READ32_MEMBER(segas32_state::shared_ram_32_r)
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{
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return m_z80_shared_ram[offset*4+0] | (m_z80_shared_ram[offset*4+1] << 8) |
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(m_z80_shared_ram[offset*4+2] << 16) | (m_z80_shared_ram[offset*4+3] << 24);
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}
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WRITE32_MEMBER(segas32_state::shared_ram_32_w)
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{
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if (ACCESSING_BITS_0_7)
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m_z80_shared_ram[offset*4+0] = data;
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if (ACCESSING_BITS_8_15)
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m_z80_shared_ram[offset*4+1] = data >> 8;
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if (ACCESSING_BITS_16_23)
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m_z80_shared_ram[offset*4+2] = data >> 16;
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if (ACCESSING_BITS_24_31)
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m_z80_shared_ram[offset*4+3] = data >> 24;
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m_z80_shared_ram[offset] = data;
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}
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@ -1128,14 +1059,14 @@ ADDRESS_MAP_START(segas32_state::system32_map)
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AM_RANGE(0x500000, 0x50000f) AM_MIRROR(0x0ffff0) AM_READWRITE(system32_sprite_control_r, system32_sprite_control_w)
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AM_RANGE(0x600000, 0x60ffff) AM_MIRROR(0x0e0000) AM_READWRITE(system32_paletteram_r, system32_paletteram_w) AM_SHARE("paletteram.0")
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AM_RANGE(0x610000, 0x61007f) AM_MIRROR(0x0eff80) AM_READWRITE(system32_mixer_r, system32_mixer_w)
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AM_RANGE(0x700000, 0x701fff) AM_MIRROR(0x0fe000) AM_READWRITE(shared_ram_16_r, shared_ram_16_w)
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AM_RANGE(0x700000, 0x701fff) AM_MIRROR(0x0fe000) AM_READWRITE8(shared_ram_r, shared_ram_w, 0xffff)
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AM_RANGE(0x800000, 0x800fff) AM_DEVREADWRITE8("s32comm", s32comm_device, share_r, share_w, 0x00ff)
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AM_RANGE(0x801000, 0x801001) AM_DEVREADWRITE8("s32comm", s32comm_device, cn_r, cn_w, 0x00ff)
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AM_RANGE(0x801002, 0x801003) AM_DEVREADWRITE8("s32comm", s32comm_device, fg_r, fg_w, 0x00ff)
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AM_RANGE(0xc00000, 0xc0001f) AM_MIRROR(0x0fff80) AM_DEVREADWRITE8("io_chip", sega_315_5296_device, read, write, 0x00ff)
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// 0xc00040-0xc0007f - I/O expansion area
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AM_RANGE(0xd00000, 0xd0000f) AM_MIRROR(0x07fff0) AM_READWRITE(interrupt_control_16_r, interrupt_control_16_w)
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AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE(random_number_16_r, random_number_16_w)
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AM_RANGE(0xd00000, 0xd0000f) AM_MIRROR(0x07fff0) AM_READWRITE8(int_control_r, int_control_w, 0xffff)
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AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE(random_number_r, random_number_w)
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AM_RANGE(0xf00000, 0xffffff) AM_ROM AM_REGION("maincpu", 0)
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ADDRESS_MAP_END
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@ -1152,7 +1083,7 @@ ADDRESS_MAP_START(segas32_state::multi32_map)
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AM_RANGE(0x610000, 0x61007f) AM_MIRROR(0x06ff80) AM_WRITE(multi32_mixer_0_w)
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AM_RANGE(0x680000, 0x68ffff) AM_MIRROR(0x060000) AM_READWRITE(multi32_paletteram_1_r, multi32_paletteram_1_w) AM_SHARE("paletteram.1")
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AM_RANGE(0x690000, 0x69007f) AM_MIRROR(0x06ff80) AM_WRITE(multi32_mixer_1_w)
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AM_RANGE(0x700000, 0x701fff) AM_MIRROR(0x0fe000) AM_READWRITE(shared_ram_32_r, shared_ram_32_w)
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AM_RANGE(0x700000, 0x701fff) AM_MIRROR(0x0fe000) AM_READWRITE8(shared_ram_r, shared_ram_w, 0xffffffff)
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AM_RANGE(0x800000, 0x800fff) AM_DEVREADWRITE8("s32comm", s32comm_device, share_r, share_w, 0x00ff00ff)
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AM_RANGE(0x801000, 0x801003) AM_DEVREADWRITE8("s32comm", s32comm_device, cn_r, cn_w, 0x000000ff)
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AM_RANGE(0x801000, 0x801003) AM_DEVREADWRITE8("s32comm", s32comm_device, fg_r, fg_w, 0x00ff0000)
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@ -1160,8 +1091,8 @@ ADDRESS_MAP_START(segas32_state::multi32_map)
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// 0xc00040-0xc0007f - I/O expansion area 0
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AM_RANGE(0xc80000, 0xc8001f) AM_MIRROR(0x07ff80) AM_DEVREADWRITE8("io_chip_1", sega_315_5296_device, read, write, 0x00ff00ff)
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// 0xc80040-0xc8007f - I/O expansion area 1
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AM_RANGE(0xd00000, 0xd0000f) AM_MIRROR(0x07fff0) AM_READWRITE(interrupt_control_32_r, interrupt_control_32_w)
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AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE(random_number_32_r, random_number_32_w)
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AM_RANGE(0xd00000, 0xd0000f) AM_MIRROR(0x07fff0) AM_READWRITE8(int_control_r, int_control_w, 0xffffffff)
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AM_RANGE(0xd80000, 0xdfffff) AM_READWRITE16(random_number_r, random_number_w, 0xffffffff)
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AM_RANGE(0xf00000, 0xffffff) AM_ROM AM_REGION("maincpu", 0)
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ADDRESS_MAP_END
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@ -124,10 +124,8 @@ public:
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DECLARE_WRITE16_MEMBER(system32_mixer_w);
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DECLARE_WRITE32_MEMBER(multi32_mixer_0_w);
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DECLARE_WRITE32_MEMBER(multi32_mixer_1_w);
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DECLARE_READ16_MEMBER(interrupt_control_16_r);
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DECLARE_WRITE16_MEMBER(interrupt_control_16_w);
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DECLARE_READ32_MEMBER(interrupt_control_32_r);
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DECLARE_WRITE32_MEMBER(interrupt_control_32_w);
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DECLARE_READ8_MEMBER(int_control_r);
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DECLARE_WRITE8_MEMBER(int_control_w);
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DECLARE_WRITE8_MEMBER(misc_output_0_w);
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DECLARE_WRITE8_MEMBER(misc_output_1_w);
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DECLARE_WRITE8_MEMBER(sw2_output_0_w);
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@ -135,14 +133,10 @@ public:
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DECLARE_WRITE8_MEMBER(tilebank_external_w);
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DECLARE_WRITE_LINE_MEMBER(display_enable_0_w);
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DECLARE_WRITE_LINE_MEMBER(display_enable_1_w);
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DECLARE_WRITE16_MEMBER(random_number_16_w);
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DECLARE_READ16_MEMBER(random_number_16_r);
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DECLARE_WRITE32_MEMBER(random_number_32_w);
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DECLARE_READ32_MEMBER(random_number_32_r);
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DECLARE_READ16_MEMBER(shared_ram_16_r);
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DECLARE_WRITE16_MEMBER(shared_ram_16_w);
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DECLARE_READ32_MEMBER(shared_ram_32_r);
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DECLARE_WRITE32_MEMBER(shared_ram_32_w);
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DECLARE_WRITE16_MEMBER(random_number_w);
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DECLARE_READ16_MEMBER(random_number_r);
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DECLARE_READ8_MEMBER(shared_ram_r);
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DECLARE_WRITE8_MEMBER(shared_ram_w);
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DECLARE_WRITE8_MEMBER(sound_int_control_lo_w);
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DECLARE_WRITE8_MEMBER(sound_int_control_hi_w);
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DECLARE_WRITE8_MEMBER(sound_bank_lo_w);
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@ -183,7 +177,6 @@ public:
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uint32_t multi32_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int index);
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void update_irq_state();
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void signal_v60_irq(int which);
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void int_control_w(int offset, uint8_t data);
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void update_sound_irq_state();
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void segas32_common_init();
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void multi32_common_init();
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