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e132xs: removed some of my needlessly wordy changelog entries from 14 years past, nw
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@ -32,7 +32,7 @@
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TODO:
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- some wrong cycle counts
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- verify register wrapping with sregf/dregf on hardware
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CHANGELOG:
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Pierpaolo Prazzoli
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@ -101,10 +101,6 @@
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Pierpaolo Prazzoli
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- Same fix in get_const
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Ryan Holtz - 02/27/04
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- Fixed delayed branching
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- const_val for CALL should always have bit 0 clear
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Pierpaolo Prazzoli - 02/25/04
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- Fixed some wrong addresses to address local registers instead of memory
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- Fixed FRAME and RET instruction
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@ -133,84 +129,16 @@
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(From the doc: A Call, Trap or Software instruction increments the FP and sets FL
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to 6, thus creating a new stack frame with the length of 6 registers).
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Ryan Holtz - 10/25/03
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- Fixed CALL enough that it at least jumps to the right address, no word
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yet as to whether or not it's working enough to return.
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- Added get_lrconst() to get the const value for the CALL operand, since
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apparently using immediate_value() was wrong. The code is ugly, but it
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works properly. Vampire 1/2 now gets far enough to try to test its RAM.
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- Just from looking at it, CALL apparently doesn't frame properly. I'm not
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sure about FRAME, but perhaps it doesn't work properly - I'm not entirely
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positive. The return address when vamphalf's memory check routine is
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called at FFFFFD7E is stored in register L8, and then the RET instruction
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at the end of the routine uses L1 as the return address, so that might
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provide some clues as to how it works.
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- I'd almost be willing to bet money that there's no framing at all since
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the values in L0 - L15 as displayed by the debugger would change during a
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CALL or FRAME operation. I'll look when I'm in the mood.
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- The mood struck me, and I took a look at set_local_register and GET_L_REG.
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Apparently no matter what the current frame pointer is they'll always use
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local_regs[0] through local_regs[15].
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Ryan Holtz - 08/20/03
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- Added H flag support for MOV and MOVI
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- Changed init routine to set S flag on boot. Apparently the CPU defaults to
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supervisor mode as opposed to user mode when it powers on, as shown by the
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vamphalf power-on routines. Makes sense, too, since if the machine booted
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in user mode, it would be impossible to get into supervisor mode.
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Pierpaolo Prazzoli - 08/19/03
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- Added check for D_BIT and S_BIT where PC or SR must or must not be denoted.
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(movd, divu, divs, ldxx1, ldxx2, stxx1, stxx2, mulu, muls, set, mul
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call, chk)
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Ryan Holtz - 08/17/03
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- Working on support for H flag, nothing quite done yet
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- Added trap Range Error for CHK PC, PC
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- Fixed relative jumps, they have to be taken from the opcode following the
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jump instead of the jump opcode itself.
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Pierpaolo Prazzoli - 08/17/03
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- Fixed get_pcrel() when OP & 0x80 is set.
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- Decremented PC by 2 also in MOV, ADD, ADDI, SUM, SUB and added the check if
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D_BIT is not set. (when pc is changed they are implicit branch)
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Ryan Holtz - 08/17/03
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- Implemented a crude hack to set FL in the SR to 6, since according to the docs
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that's supposed to happen each time a trap occurs, apparently including when
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the processor starts up. The 3rd opcode executed in vamphalf checks to see if
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the FL flag in SR 6, so it's apparently the "correct" behaviour despite the
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docs not saying anything on it. If FL is not 6, the branch falls through and
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encounters a CHK PC, L2, which at that point will always throw a range trap.
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The range trap vector contains 00000000 (CHK PC, PC), which according to the
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docs will always throw a range trap (which would effectively lock the system).
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This revealed a bug: CHK PC, PC apparently does not throw a range trap, which
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needs to be fixed. Now that the "correct" behaviour is hacked in with the FL
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flags, it reveals yet another bug in that the branch is interpreted as being
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+0x8700. This means that the PC then wraps around to 000082B0, give or take
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a few bytes. While it does indeed branch to valid code, I highly doubt that
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this is the desired effect. Check for signed/unsigned relative branch, maybe?
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Ryan Holtz - 08/16/03
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- Fixed the debugger at least somewhat so that it displays hex instead of decimal,
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and so that it disassembles opcodes properly.
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- Fixed hyperstone_execute() to increment PC *after* executing the opcode instead of
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before. This is probably why vamphalf was booting to fffffff8, but executing at
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fffffffa instead.
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- Changed execute_trap to decrement PC by 2 so that the next opcode isn't skipped
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after a trap
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- Changed execute_br to decrement PC by 2 so that the next opcode isn't skipped
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after a branch
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- Changed hyperstone_movi to decrement PC by 2 when G0 (PC) is modified so that the
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next opcode isn't skipped after a branch
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- Changed hyperstone_movi to default to a uint32_t being moved into the register
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as opposed to a uint8_t. This is wrong, the bit width is quite likely to be
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dependent on the n field in the Rimm instruction type. However, vamphalf uses
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MOVI G0,[FFFF]FBAC (n=$13) since there's apparently no absolute branch opcode.
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What kind of CPU is this that it doesn't have an absolute jump in its branch
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instructions and you have to use an immediate MOV to do an abs. jump!?
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- Replaced usage of logerror() with smf's verboselog()
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*********************************************************************/
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#include "emu.h"
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