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https://github.com/holub/mame
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i8085: correct some variable types
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4f1ab340b2
commit
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@ -274,21 +274,13 @@ void i8085a_cpu_device::init_tables()
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/* flags */
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u8 zs = 0;
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if (i==0) zs |= ZF;
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if (i&128) zs |= SF;
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if (i == 0) zs |= ZF;
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if (i & 0x80) zs |= SF;
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u8 p = 0;
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if (i&1) ++p;
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if (i&2) ++p;
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if (i&4) ++p;
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if (i&8) ++p;
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if (i&16) ++p;
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if (i&32) ++p;
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if (i&64) ++p;
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if (i&128) ++p;
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u8 p = (population_count_32(i) & 1) ? 0 : PF;
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lut_zs[i] = zs;
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lut_zsp[i] = zs | ((p&1) ? 0 : PF);
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lut_zsp[i] = zs | p;
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}
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}
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@ -307,11 +299,11 @@ void i8085a_cpu_device::device_start()
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m_after_ei = 0;
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m_nmi_state = 0;
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m_irq_state[3] = m_irq_state[2] = m_irq_state[1] = m_irq_state[0] = 0;
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m_trap_pending = 0;
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m_trap_pending = false;
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m_trap_im_copy = 0;
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m_sod_state = true; // SOD will go low at reset
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m_sod_state = 1; // SOD will go low at reset
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m_in_acknowledge = false;
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m_ietemp = false;
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m_ietemp = 0;
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init_tables();
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@ -382,7 +374,7 @@ void i8085a_cpu_device::device_reset()
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m_halt = 0;
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m_im &= ~IM_I75;
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m_im |= IM_M55 | IM_M65 | IM_M75;
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m_after_ei = false;
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m_after_ei = 0;
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m_trap_pending = false;
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m_trap_im_copy = 0;
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set_inte(0);
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@ -430,11 +422,11 @@ void i8085a_cpu_device::state_export(const device_state_entry &entry)
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switch (entry.index())
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{
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case I8085_SID:
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m_ietemp = ((m_im & IM_SID) != 0) && m_in_sid_func() != 0;
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m_ietemp = ((m_im & IM_SID) && m_in_sid_func()) ? 1 : 0;
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break;
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case I8085_INTE:
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m_ietemp = ((m_im & IM_IE) != 0);
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m_ietemp = (m_im & IM_IE) ? 1 : 0;
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break;
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default:
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@ -103,29 +103,30 @@ protected:
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PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
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u8 m_halt;
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u8 m_im; /* interrupt mask (8085A only) */
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u8 m_status; /* status word */
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u8 m_im; // interrupt mask (8085A only)
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u8 m_status; // status word
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u8 m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
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u8 m_nmi_state; /* raw NMI line state */
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u8 m_irq_state[4]; /* raw IRQ line states */
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u8 m_trap_pending; /* TRAP interrupt latched? */
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u8 m_trap_im_copy; /* copy of IM register when TRAP was taken */
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u8 m_sod_state; /* state of the SOD line */
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u8 m_after_ei; // post-EI processing; starts at 2, check for ints at 0
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u8 m_nmi_state; // raw NMI line state
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u8 m_irq_state[4]; // raw IRQ line states
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bool m_trap_pending; // TRAP interrupt latched?
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u8 m_trap_im_copy; // copy of IM register when TRAP was taken
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u8 m_sod_state; // state of the SOD line
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bool m_in_acknowledge;
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bool m_ietemp; /* import/export temp space */
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u8 m_ietemp; // import/export temp space
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memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cprogram, m_copcodes;
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memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_program;
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memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
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int m_icount;
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/* cycles lookup */
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// cycles lookup
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static const u8 lut_cycles_8080[256];
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static const u8 lut_cycles_8085[256];
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u8 lut_cycles[256];
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/* flags lookup */
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// flags lookup
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u8 lut_zs[256];
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u8 lut_zsp[256];
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@ -450,6 +450,7 @@ private:
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void ozmawars_port04_w(uint8_t data);
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void ozmawars_port05_w(uint8_t data);
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void ozmawars_io_map(address_map &map) ATTR_COLD;
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uint8_t m_port03 = 0;
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uint8_t m_port05 = 0;
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bool m_sound_enable = 0;
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@ -480,8 +481,8 @@ private:
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void main_map(address_map &map) ATTR_COLD;
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void io_map(address_map &map) ATTR_COLD;
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uint8_t m_port_1_last;
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uint8_t m_port_2_last;
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uint8_t m_port_1_last = 0;
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uint8_t m_port_2_last = 0;
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};
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