mirror of
https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
drivers starting with y and z: further removal of READ and WRITE macros (nw)
This commit is contained in:
Ivan Vangelista
parent
0b50073fa5
commit
ee1c53fadf
@ -107,7 +107,7 @@ Sound: VLM5030 at 7B
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READ8_MEMBER(yiear_state::yiear_speech_r)
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uint8_t yiear_state::speech_r()
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{
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if (m_vlm->bsy())
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return 1;
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@ -115,7 +115,7 @@ READ8_MEMBER(yiear_state::yiear_speech_r)
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return 0;
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}
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WRITE8_MEMBER(yiear_state::yiear_VLM5030_control_w)
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void yiear_state::VLM5030_control_w(uint8_t data)
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{
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/* bit 0 is latch direction */
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m_vlm->st((data >> 1) & 1);
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@ -124,25 +124,25 @@ WRITE8_MEMBER(yiear_state::yiear_VLM5030_control_w)
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WRITE_LINE_MEMBER(yiear_state::vblank_irq)
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{
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if (state && m_yiear_irq_enable)
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if (state && m_irq_enable)
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m_maincpu->set_input_line(0, HOLD_LINE);
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}
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INTERRUPT_GEN_MEMBER(yiear_state::yiear_nmi_interrupt)
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INTERRUPT_GEN_MEMBER(yiear_state::nmi_interrupt)
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{
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if (m_yiear_nmi_enable)
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if (m_nmi_enable)
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device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero);
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}
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void yiear_state::main_map(address_map &map)
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{
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map(0x0000, 0x0000).r(FUNC(yiear_state::yiear_speech_r));
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map(0x4000, 0x4000).w(FUNC(yiear_state::yiear_control_w));
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map(0x0000, 0x0000).r(FUNC(yiear_state::speech_r));
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map(0x4000, 0x4000).w(FUNC(yiear_state::control_w));
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map(0x4800, 0x4800).w(FUNC(yiear_state::konami_SN76496_latch_w));
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map(0x4900, 0x4900).w(FUNC(yiear_state::konami_SN76496_w));
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map(0x4a00, 0x4a00).w(FUNC(yiear_state::yiear_VLM5030_control_w));
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map(0x4a00, 0x4a00).w(FUNC(yiear_state::VLM5030_control_w));
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map(0x4b00, 0x4b00).w(m_vlm, FUNC(vlm5030_device::data_w));
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map(0x4c00, 0x4c00).portr("DSW2");
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map(0x4d00, 0x4d00).portr("DSW3");
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@ -155,7 +155,7 @@ void yiear_state::main_map(address_map &map)
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map(0x5030, 0x53ff).ram();
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map(0x5400, 0x542f).ram().share("spriteram2");
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map(0x5430, 0x57ff).ram();
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map(0x5800, 0x5fff).ram().w(FUNC(yiear_state::yiear_videoram_w)).share("videoram");
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map(0x5800, 0x5fff).ram().w(FUNC(yiear_state::videoram_w)).share("videoram");
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map(0x8000, 0xffff).rom();
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}
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@ -271,12 +271,12 @@ GFXDECODE_END
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void yiear_state::machine_start()
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{
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save_item(NAME(m_yiear_nmi_enable));
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save_item(NAME(m_nmi_enable));
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}
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void yiear_state::machine_reset()
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{
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m_yiear_nmi_enable = 0;
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m_nmi_enable = 0;
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}
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void yiear_state::yiear(machine_config &config)
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@ -284,7 +284,7 @@ void yiear_state::yiear(machine_config &config)
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/* basic machine hardware */
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MC6809E(config, m_maincpu, XTAL(18'432'000)/12); /* verified on pcb */
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m_maincpu->set_addrmap(AS_PROGRAM, &yiear_state::main_map);
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m_maincpu->set_periodic_int(FUNC(yiear_state::yiear_nmi_interrupt), attotime::from_hz(480)); /* music tempo (correct frequency unknown) */
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m_maincpu->set_periodic_int(FUNC(yiear_state::nmi_interrupt), attotime::from_hz(480)); /* music tempo (correct frequency unknown) */
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WATCHDOG_TIMER(config, "watchdog");
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@ -294,12 +294,12 @@ void yiear_state::yiear(machine_config &config)
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m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
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m_screen->set_size(32*8, 32*8);
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m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1);
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m_screen->set_screen_update(FUNC(yiear_state::screen_update_yiear));
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m_screen->set_screen_update(FUNC(yiear_state::screen_update));
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m_screen->set_palette(m_palette);
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m_screen->screen_vblank().set(FUNC(yiear_state::vblank_irq));
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GFXDECODE(config, m_gfxdecode, m_palette, gfx_yiear);
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PALETTE(config, m_palette, FUNC(yiear_state::yiear_palette), 32);
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PALETTE(config, m_palette, FUNC(yiear_state::palette), 32);
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/* sound hardware */
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SPEAKER(config, "mono").front_center();
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@ -105,13 +105,13 @@ Stephh's notes (based on the games M68000 code and some tests) :
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***************************************************************************/
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WRITE8_MEMBER(shocking_state::sound_bank_w)
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void shocking_state::sound_bank_w(uint8_t data)
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{
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m_okibank->set_entry(data & 3);
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}
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template<int Layer>
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WRITE16_MEMBER(yunsun16_state::vram_w)
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void yunsun16_state::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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COMBINE_DATA(&m_vram[Layer][offset]);
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m_tilemap[Layer]->mark_tile_dirty(offset / 2);
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@ -159,7 +159,7 @@ void shocking_state::main_map(address_map &map)
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}
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WRITE8_MEMBER(magicbub_state::magicbub_sound_command_w)
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void magicbub_state::magicbub_sound_command_w(uint8_t data)
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{
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// HACK: the game continuously sends this. It'll play the oki sample number 0 on each voice. That sample is 00000-00000.
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if ((data & 0xff) != 0x3a)
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@ -46,7 +46,7 @@ Notes:
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***************************************************************************/
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WRITE8_MEMBER(yunsung8_state::bankswitch_w)
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void yunsung8_state::bankswitch_w(uint8_t data)
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{
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m_layers_ctrl = data & 0x30; // Layers enable
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@ -56,7 +56,7 @@ WRITE8_MEMBER(yunsung8_state::bankswitch_w)
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logerror("CPU #0 - PC %04X: Bank %02X\n", m_maincpu->pc(), data);
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}
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WRITE8_MEMBER(yunsung8_state::main_irq_ack_w)
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void yunsung8_state::main_irq_ack_w(uint8_t data)
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{
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m_maincpu->set_input_line(0, CLEAR_LINE);
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}
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@ -102,7 +102,7 @@ void yunsung8_state::port_map(address_map &map)
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***************************************************************************/
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WRITE8_MEMBER(yunsung8_state::sound_bankswitch_w)
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void yunsung8_state::sound_bankswitch_w(uint8_t data)
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{
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m_msm->reset_w(data & 0x20);
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@ -201,14 +201,14 @@ private:
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void ram_w(offs_t offset, uint8_t data);
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void memory_ctrl_w(uint8_t data);
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offs_t vram_map(offs_t offset) const;
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DECLARE_READ8_MEMBER(z100_vram_r);
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DECLARE_WRITE8_MEMBER(z100_vram_w);
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uint8_t z100_vram_r(offs_t offset);
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void z100_vram_w(offs_t offset, uint8_t data);
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void kbd_col_w(uint8_t data);
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uint8_t kbd_rows_r();
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DECLARE_READ_LINE_MEMBER(kbd_shift_row_r);
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DECLARE_WRITE_LINE_MEMBER(beep_update);
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DECLARE_WRITE8_MEMBER(floppy_select_w);
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DECLARE_WRITE8_MEMBER(floppy_motor_w);
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void floppy_select_w(uint8_t data);
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void floppy_motor_w(uint8_t data);
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uint8_t tmr_status_r();
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void tmr_status_w(uint8_t data);
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DECLARE_WRITE_LINE_MEMBER(timer_flipflop0_w);
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@ -344,12 +344,12 @@ offs_t z100_state::vram_map(offs_t offset) const
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| ((m_vrmm[(offset & 0xf800) >> 8 | (offset & 0x0070) >> 4] + m_start_addr) & (m_vram_config->read() ? 0xff : 0x7f)) << 8;
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}
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READ8_MEMBER( z100_state::z100_vram_r )
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uint8_t z100_state::z100_vram_r(offs_t offset)
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{
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return m_gvram[vram_map(offset)];
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}
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WRITE8_MEMBER( z100_state::z100_vram_w )
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void z100_state::z100_vram_w(offs_t offset, uint8_t data)
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{
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if(m_vram_enable)
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{
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@ -407,13 +407,13 @@ WRITE_LINE_MEMBER(z100_state::beep_update)
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// todo: side select?
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WRITE8_MEMBER( z100_state::floppy_select_w )
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void z100_state::floppy_select_w(uint8_t data)
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{
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m_floppy = m_floppies[data & 0x03]->get_device();
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m_fdc->set_floppy(m_floppy);
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}
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WRITE8_MEMBER( z100_state::floppy_motor_w )
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void z100_state::floppy_motor_w(uint8_t data)
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{
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if (m_floppy)
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m_floppy->mon_w(!BIT(data, 1));
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@ -37,8 +37,8 @@ public:
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void z80dev(machine_config &config);
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private:
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DECLARE_WRITE8_MEMBER( display_w );
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DECLARE_READ8_MEMBER( test_r );
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void display_w(offs_t offset, uint8_t data);
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uint8_t test_r();
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virtual void machine_start() override;
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@ -49,7 +49,7 @@ private:
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output_finder<6> m_digits;
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};
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WRITE8_MEMBER( z80dev_state::display_w )
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void z80dev_state::display_w(offs_t offset, uint8_t data)
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{
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// ---- xxxx digit
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// xxxx ---- ???
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@ -58,7 +58,7 @@ WRITE8_MEMBER( z80dev_state::display_w )
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m_digits[offset] = hex_7seg[data & 0x0f];
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}
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READ8_MEMBER( z80dev_state::test_r )
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uint8_t z80dev_state::test_r()
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{
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return machine().rand();
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}
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@ -255,7 +255,7 @@ void zac2650_state::tinvader(machine_config &config)
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S2636(config, m_s2636, 0).add_route(ALL_OUTPUTS, "mono", 0.25);
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}
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WRITE8_MEMBER(zac2650_state::tinvader_sound_w)
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void zac2650_state::tinvader_sound_w(uint8_t data)
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{
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/* sounds are NOT the same as space invaders */
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@ -50,12 +50,12 @@ public:
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void zac_1(machine_config &config);
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private:
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DECLARE_READ8_MEMBER(ctrl_r);
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DECLARE_WRITE8_MEMBER(ctrl_w);
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uint8_t ctrl_r();
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void ctrl_w(uint8_t data);
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DECLARE_READ_LINE_MEMBER(serial_r);
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DECLARE_WRITE_LINE_MEMBER(serial_w);
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DECLARE_READ8_MEMBER(reset_int_r);
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DECLARE_WRITE8_MEMBER(reset_int_w);
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uint8_t reset_int_r();
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void reset_int_w(uint8_t data);
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TIMER_DEVICE_CALLBACK_MEMBER(zac_1_inttimer);
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TIMER_DEVICE_CALLBACK_MEMBER(zac_1_outtimer);
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@ -159,7 +159,7 @@ static INPUT_PORTS_START( zac_1 )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("RH Bank Target 4") PORT_CODE(KEYCODE_COLON)
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INPUT_PORTS_END
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READ8_MEMBER( zac_1_state::ctrl_r )
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uint8_t zac_1_state::ctrl_r()
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{
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// reads inputs
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if (m_input_line == 0xfe)
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@ -183,12 +183,12 @@ READ8_MEMBER( zac_1_state::ctrl_r )
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return 0xff;
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}
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WRITE8_MEMBER( zac_1_state::ctrl_w )
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void zac_1_state::ctrl_w(uint8_t data)
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{
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m_input_line = data;
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}
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WRITE8_MEMBER( zac_1_state::reset_int_w )
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void zac_1_state::reset_int_w(uint8_t data)
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{
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m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
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}
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@ -300,7 +300,7 @@ void zac_1_state::locomotp_data(address_map &map)
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map(S2650_DATA_PORT, S2650_DATA_PORT).r(FUNC(zac_1_state::reset_int_r));
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}
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READ8_MEMBER( zac_1_state::reset_int_r )
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uint8_t zac_1_state::reset_int_r()
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{
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m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
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return 0;
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@ -28,10 +28,9 @@ public:
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void zac_2(machine_config &config);
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private:
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DECLARE_READ8_MEMBER(ctrl_r);
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DECLARE_WRITE8_MEMBER(ctrl_w);
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DECLARE_READ8_MEMBER(data_r);
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DECLARE_WRITE8_MEMBER(data_w);
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uint8_t ctrl_r();
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void ctrl_w(uint8_t data);
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void data_w(uint8_t data);
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DECLARE_READ_LINE_MEMBER(serial_r);
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DECLARE_WRITE_LINE_MEMBER(serial_w);
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TIMER_DEVICE_CALLBACK_MEMBER(zac_2_inttimer);
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@ -71,7 +70,7 @@ void zac_2_state::zac_2_io(address_map &map)
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void zac_2_state::zac_2_data(address_map &map)
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{
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map(S2650_CTRL_PORT, S2650_CTRL_PORT).rw(FUNC(zac_2_state::ctrl_r), FUNC(zac_2_state::ctrl_w));
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map(S2650_DATA_PORT, S2650_DATA_PORT).rw(FUNC(zac_2_state::data_r), FUNC(zac_2_state::data_w));
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map(S2650_DATA_PORT, S2650_DATA_PORT).portr("DSW").w(FUNC(zac_2_state::data_w));
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}
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static INPUT_PORTS_START( zac_2 )
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@ -149,7 +148,7 @@ static INPUT_PORTS_START( zac_2 )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("RH Bank Target 4") PORT_CODE(KEYCODE_COLON)
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INPUT_PORTS_END
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READ8_MEMBER( zac_2_state::ctrl_r )
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uint8_t zac_2_state::ctrl_r()
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{
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if (m_input_line < 6)
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return m_row[m_input_line]->read();
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@ -157,17 +156,12 @@ READ8_MEMBER( zac_2_state::ctrl_r )
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return 0xff;
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}
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WRITE8_MEMBER( zac_2_state::ctrl_w )
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void zac_2_state::ctrl_w(uint8_t data)
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{
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m_input_line = data & 7;
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}
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READ8_MEMBER( zac_2_state::data_r )
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{
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return ioport("DSW")->read();
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}
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WRITE8_MEMBER( zac_2_state::data_w )
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void zac_2_state::data_w(uint8_t data)
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{
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// writes to lines HS0-7, no idea what they do
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}
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@ -37,10 +37,10 @@ public:
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void zac_proto(machine_config &config);
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private:
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DECLARE_WRITE8_MEMBER(out0_w);
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DECLARE_WRITE8_MEMBER(out1_w);
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DECLARE_WRITE8_MEMBER(digit_w);
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DECLARE_WRITE8_MEMBER(sound_w);
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void out0_w(offs_t offset, uint8_t data);
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void out1_w(uint8_t data);
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void digit_w(offs_t offset, uint8_t data);
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void sound_w(uint8_t data);
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void zac_proto_map(address_map &map);
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virtual void machine_reset() override;
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@ -194,7 +194,7 @@ static INPUT_PORTS_START( zac_proto )
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INPUT_PORTS_END
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// solenoids (not knocker)
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WRITE8_MEMBER( zac_proto_state::out0_w )
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void zac_proto_state::out0_w(offs_t offset, uint8_t data)
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{
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uint16_t t = data | (offset << 8);
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@ -215,13 +215,13 @@ WRITE8_MEMBER( zac_proto_state::out0_w )
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}
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}
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WRITE8_MEMBER( zac_proto_state::out1_w )
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void zac_proto_state::out1_w(uint8_t data)
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{
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// lamps
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}
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// need to implement blanking of leading zeroes
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WRITE8_MEMBER( zac_proto_state::digit_w )
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void zac_proto_state::digit_w(offs_t offset, uint8_t data)
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{
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static const uint8_t patterns[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71 }; // 9368 (outputs 0-9,A-F)
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static const uint8_t decimals[10] = { 0, 0, 0x80, 0, 0, 0x80, 0, 0, 0, 0 };
|
||||
@ -231,7 +231,7 @@ WRITE8_MEMBER( zac_proto_state::digit_w )
|
||||
m_digits[offset] = patterns[data>>4] | decimals[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zac_proto_state::sound_w )
|
||||
void zac_proto_state::sound_w(uint8_t data)
|
||||
{
|
||||
// to unknown sound board
|
||||
}
|
||||
|
||||
@ -83,7 +83,7 @@ void zaccaria_state::dsw_sel_w(uint8_t data)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(zaccaria_state::dsw_r)
|
||||
uint8_t zaccaria_state::dsw_r()
|
||||
{
|
||||
return m_dsw_port[m_dsw_sel]->read();
|
||||
}
|
||||
@ -91,7 +91,7 @@ READ8_MEMBER(zaccaria_state::dsw_r)
|
||||
|
||||
GAME_EXTERN(monymony);
|
||||
|
||||
READ8_MEMBER(zaccaria_state::prot1_r)
|
||||
uint8_t zaccaria_state::prot1_r(offs_t offset)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -111,7 +111,7 @@ READ8_MEMBER(zaccaria_state::prot1_r)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(zaccaria_state::prot2_r)
|
||||
uint8_t zaccaria_state::prot2_r(offs_t offset)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
||||
@ -47,8 +47,8 @@ public:
|
||||
void zapcomp(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_WRITE8_MEMBER(display_7seg_w);
|
||||
uint8_t keyboard_r();
|
||||
void display_7seg_w(offs_t offset, uint8_t data);
|
||||
|
||||
void zapcomp_io(address_map &map);
|
||||
void zapcomp_mem(address_map &map);
|
||||
@ -77,7 +77,7 @@ uint8_t zapcomp_state::decode7seg(uint8_t data)
|
||||
return bitswap<8>(patterns[data & 0x0F], 7, 3, 4, 2, 1, 0, 6, 5);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zapcomp_state::display_7seg_w )
|
||||
void zapcomp_state::display_7seg_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
//Port 0x05 : address HI
|
||||
//Port 0x06 : address LOW
|
||||
@ -86,7 +86,7 @@ WRITE8_MEMBER( zapcomp_state::display_7seg_w )
|
||||
m_digits[offset*2+1] = decode7seg(data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( zapcomp_state::keyboard_r )
|
||||
uint8_t zapcomp_state::keyboard_r()
|
||||
{
|
||||
uint8_t retval = 0x00;
|
||||
uint8_t special = ioport("X1")->read();
|
||||
|
||||
@ -1447,20 +1447,20 @@ private:
|
||||
required_shared_ptr<uint32_t> m_ram;
|
||||
|
||||
uint8_t m_rtc_tick;
|
||||
DECLARE_READ32_MEMBER(rtc_r);
|
||||
DECLARE_WRITE32_MEMBER(rtc_w);
|
||||
uint32_t rtc_r(offs_t offset);
|
||||
void rtc_w(offs_t offset, uint32_t data);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(rtc_irq_callback);
|
||||
};
|
||||
|
||||
|
||||
READ32_MEMBER(zaurus_state::rtc_r)
|
||||
uint32_t zaurus_state::rtc_r(offs_t offset)
|
||||
{
|
||||
osd_printf_debug("%08x\n", offset << 2);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zaurus_state::rtc_w)
|
||||
void zaurus_state::rtc_w(offs_t offset, uint32_t data)
|
||||
{
|
||||
osd_printf_debug("%08x %08x\n", offset << 2, data);
|
||||
}
|
||||
|
||||
@ -340,7 +340,7 @@ void zaxxon_state::machine_start()
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ8_MEMBER(zaxxon_state::razmataz_counter_r)
|
||||
uint8_t zaxxon_state::razmataz_counter_r()
|
||||
{
|
||||
/* this behavior is really unknown; however, the code is using this */
|
||||
/* counter as a sort of timeout when talking to the sound board */
|
||||
@ -381,13 +381,13 @@ CUSTOM_INPUT_MEMBER(zaxxon_state::razmataz_dial_r)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(zaxxon_state::zaxxon_control_w)
|
||||
void zaxxon_state::zaxxon_control_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// address decode for E0F8/E0F9 (74LS138 @ U57) has its G2B enable input in common with this latch
|
||||
bool a3 = BIT(offset, 3);
|
||||
m_mainlatch[1]->write_bit((a3 ? 4 : 0) | (offset & 3), BIT(data, 0));
|
||||
if (a3 && !BIT(offset, 1))
|
||||
bg_position_w(space, offset & 1, data);
|
||||
bg_position_w(offset & 1, data);
|
||||
}
|
||||
|
||||
|
||||
@ -1584,7 +1584,7 @@ void zaxxon_state::init_razmataz()
|
||||
pgmspace.install_read_port(0xc00c, 0xc00c, 0x18f3, "SW0C");
|
||||
|
||||
/* unknown behavior expected here */
|
||||
pgmspace.install_read_handler(0xc80a, 0xc80a, read8_delegate(*this, FUNC(zaxxon_state::razmataz_counter_r)));
|
||||
pgmspace.install_read_handler(0xc80a, 0xc80a, read8smo_delegate(*this, FUNC(zaxxon_state::razmataz_counter_r)));
|
||||
|
||||
/* additional state saving */
|
||||
save_item(NAME(m_razmataz_dial_pos));
|
||||
|
||||
@ -40,7 +40,7 @@
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
WRITE16_MEMBER( zerozone_state::sound_w )
|
||||
void zerozone_state::sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
|
||||
@ -41,12 +41,12 @@ public:
|
||||
void zexall(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER( output_ack_r );
|
||||
DECLARE_READ8_MEMBER( output_req_r );
|
||||
DECLARE_READ8_MEMBER( output_data_r );
|
||||
DECLARE_WRITE8_MEMBER( output_ack_w );
|
||||
DECLARE_WRITE8_MEMBER( output_req_w );
|
||||
DECLARE_WRITE8_MEMBER( output_data_w );
|
||||
uint8_t output_ack_r();
|
||||
uint8_t output_req_r();
|
||||
uint8_t output_data_r();
|
||||
void output_ack_w(uint8_t data);
|
||||
void output_req_w(uint8_t data);
|
||||
void output_data_w(uint8_t data);
|
||||
|
||||
void mem_map(address_map &map);
|
||||
|
||||
@ -94,7 +94,7 @@ void zexall_state::machine_reset()
|
||||
I/O Handlers
|
||||
******************************************************************************/
|
||||
|
||||
READ8_MEMBER( zexall_state::output_ack_r )
|
||||
uint8_t zexall_state::output_ack_r()
|
||||
{
|
||||
// spit out the byte in out_byte if out_req is not equal to out_req_last
|
||||
if (m_out_req != m_out_req_last)
|
||||
@ -106,28 +106,28 @@ READ8_MEMBER( zexall_state::output_ack_r )
|
||||
return m_out_ack;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zexall_state::output_ack_w )
|
||||
void zexall_state::output_ack_w(uint8_t data)
|
||||
{
|
||||
m_out_ack = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( zexall_state::output_req_r )
|
||||
uint8_t zexall_state::output_req_r()
|
||||
{
|
||||
return m_out_req;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zexall_state::output_req_w )
|
||||
void zexall_state::output_req_w(uint8_t data)
|
||||
{
|
||||
m_out_req_last = m_out_req;
|
||||
m_out_req = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( zexall_state::output_data_r )
|
||||
uint8_t zexall_state::output_data_r()
|
||||
{
|
||||
return m_out_data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zexall_state::output_data_w )
|
||||
void zexall_state::output_data_w(uint8_t data)
|
||||
{
|
||||
m_out_data = data;
|
||||
}
|
||||
|
||||
@ -48,13 +48,13 @@ inline void zn_state::psxwriteword( uint32_t *p_n_psxram, uint32_t n_address, ui
|
||||
*( (uint16_t *)( (uint8_t *)p_n_psxram + WORD_XOR_LE( n_address ) ) ) = n_data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(zn_state::znsecsel_r)
|
||||
uint8_t zn_state::znsecsel_r(offs_t offset, uint8_t mem_mask)
|
||||
{
|
||||
verboselog(2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return m_n_znsecsel;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zn_state::znsecsel_w)
|
||||
void zn_state::znsecsel_w(offs_t offset, uint8_t data, uint8_t mem_mask)
|
||||
{
|
||||
verboselog(2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
@ -66,7 +66,7 @@ WRITE8_MEMBER(zn_state::znsecsel_w)
|
||||
m_n_znsecsel = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(zn_state::boardconfig_r)
|
||||
uint8_t zn_state::boardconfig_r()
|
||||
{
|
||||
/*
|
||||
------00 mem=4M
|
||||
@ -112,13 +112,13 @@ READ8_MEMBER(zn_state::boardconfig_r)
|
||||
return boardconfig;
|
||||
}
|
||||
|
||||
READ16_MEMBER(zn_state::unknown_r)
|
||||
uint16_t zn_state::unknown_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
verboselog(0, "unknown_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zn_state::coin_w)
|
||||
void zn_state::coin_w(uint8_t data)
|
||||
{
|
||||
/* 0x01=counter
|
||||
0x02=coin lock 1
|
||||
@ -363,19 +363,19 @@ Notes:
|
||||
Unpopulated sockets - 1.3B, 2.2E, 3.3E, 8.2K, 9.3K, 10.4K, 11.5K, 12.6K & 13.7K
|
||||
*/
|
||||
|
||||
READ16_MEMBER(capcom_zn_state::kickharness_r)
|
||||
uint16_t capcom_zn_state::kickharness_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
/* required for buttons 4,5&6 */
|
||||
verboselog(2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(capcom_zn_state::bank_w)
|
||||
void capcom_zn_state::bank_w(uint8_t data)
|
||||
{
|
||||
m_rombank->set_entry( data & 0x0f);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(capcom_zn_state::qsound_bankswitch_w)
|
||||
void capcom_zn_state::qsound_bankswitch_w(uint8_t data)
|
||||
{
|
||||
m_soundbank->set_entry( data & 0x0f );
|
||||
}
|
||||
@ -831,7 +831,7 @@ Notes:
|
||||
FM1208S - RAMTRON 4096bit Nonvolatile Ferroelectric RAM (512w x 8b)
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(taito_fx_state::bank_w)
|
||||
void taito_fx_state::bank_w(offs_t offset, uint8_t data, uint8_t mem_mask)
|
||||
{
|
||||
verboselog(1, "bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
@ -840,7 +840,7 @@ WRITE8_MEMBER(taito_fx_state::bank_w)
|
||||
m_rombank->set_entry( data & 3 );
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(taito_fx1a_state::sound_bankswitch_w)
|
||||
void taito_fx1a_state::sound_bankswitch_w(uint8_t data)
|
||||
{
|
||||
m_soundbank->set_entry( data & 0x07 );
|
||||
}
|
||||
@ -919,12 +919,12 @@ void taito_fx1a_state::coh1000ta(machine_config &config)
|
||||
tc0140syt.set_slave_tag(m_audiocpu);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(taito_fx1b_state::fram_w)
|
||||
void taito_fx1b_state::fram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fram[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(taito_fx1b_state::fram_r)
|
||||
uint8_t taito_fx1b_state::fram_r(offs_t offset)
|
||||
{
|
||||
return m_fram[offset];
|
||||
}
|
||||
@ -1127,7 +1127,7 @@ void primrag2_state::dma_write( uint32_t *p_n_psxram, uint32_t n_address, int32_
|
||||
logerror("DMA write from %08x for %d bytes\n", n_address, n_size<<2);
|
||||
}
|
||||
|
||||
READ16_MEMBER(primrag2_state::vt83c461_16_r)
|
||||
uint16_t primrag2_state::vt83c461_16_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
int shift = (16 * (offset & 1));
|
||||
|
||||
@ -1150,7 +1150,7 @@ READ16_MEMBER(primrag2_state::vt83c461_16_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(primrag2_state::vt83c461_16_w)
|
||||
void primrag2_state::vt83c461_16_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
int shift = (16 * (offset & 1));
|
||||
|
||||
@ -1172,7 +1172,7 @@ WRITE16_MEMBER(primrag2_state::vt83c461_16_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(primrag2_state::vt83c461_32_r)
|
||||
uint16_t primrag2_state::vt83c461_32_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
if( offset == 0x1f0/2 )
|
||||
{
|
||||
@ -1191,7 +1191,7 @@ READ16_MEMBER(primrag2_state::vt83c461_32_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(primrag2_state::vt83c461_32_w)
|
||||
void primrag2_state::vt83c461_32_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
logerror( "unhandled 32 bit write %04x %04x %04x\n", offset, data, mem_mask );
|
||||
}
|
||||
@ -1375,14 +1375,14 @@ Notes:
|
||||
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(raizing_zn_state::bank_w)
|
||||
void raizing_zn_state::bank_w(offs_t offset, uint8_t data, uint8_t mem_mask)
|
||||
{
|
||||
znsecsel_w( space, offset, data, mem_mask );
|
||||
znsecsel_w( offset, data, mem_mask );
|
||||
|
||||
m_rombank->set_entry( data & 3 );
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(raizing_zn_state::sound_irq_w)
|
||||
void raizing_zn_state::sound_irq_w(uint8_t data)
|
||||
{
|
||||
m_audiocpu->set_input_line(2, HOLD_LINE); // irq 2 on the 68k
|
||||
}
|
||||
@ -1530,7 +1530,7 @@ MTR-BAM* - DIP42 32MBit maskROMs
|
||||
*/
|
||||
|
||||
|
||||
WRITE16_MEMBER(bam2_state::mcu_w)
|
||||
void bam2_state::mcu_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
switch( offset )
|
||||
{
|
||||
@ -1545,7 +1545,7 @@ WRITE16_MEMBER(bam2_state::mcu_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(bam2_state::mcu_r)
|
||||
uint16_t bam2_state::mcu_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -1569,7 +1569,7 @@ READ16_MEMBER(bam2_state::mcu_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ16_MEMBER(bam2_state::unk_r)
|
||||
uint16_t bam2_state::unk_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@ -1808,12 +1808,12 @@ WRITE_LINE_MEMBER(jdredd_state::vblank)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(acclaim_zn_state::acpsx_00_w)
|
||||
void acclaim_zn_state::acpsx_00_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
verboselog(0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(nbajamex_state::bank_w)
|
||||
void nbajamex_state::bank_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
verboselog(0, "bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
@ -1850,31 +1850,31 @@ WRITE16_MEMBER(nbajamex_state::bank_w)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(acclaim_zn_state::acpsx_10_w)
|
||||
void acclaim_zn_state::acpsx_10_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
verboselog(0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
// all 16 bits goes to the external soundboard's latch (see sound test menu)
|
||||
WRITE16_MEMBER(nbajamex_state::sound_80_w)
|
||||
void nbajamex_state::sound_80_w(uint16_t data)
|
||||
{
|
||||
m_rax->data_w(data);
|
||||
}
|
||||
|
||||
READ16_MEMBER(nbajamex_state::sound_08_r)
|
||||
uint16_t nbajamex_state::sound_08_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
// Sound related
|
||||
verboselog(0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, 0, mem_mask );
|
||||
return 0x400;
|
||||
}
|
||||
|
||||
READ16_MEMBER(nbajamex_state::sound_80_r)
|
||||
uint16_t nbajamex_state::sound_80_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
verboselog(0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, 0, mem_mask );
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(nbajamex_state::backup_w)
|
||||
void nbajamex_state::backup_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_sram[offset] = data;
|
||||
}
|
||||
@ -2097,13 +2097,13 @@ Notes:
|
||||
VSync - 60Hz
|
||||
*/
|
||||
|
||||
WRITE16_MEMBER(atlus_zn_state::sound_unk_w)
|
||||
void atlus_zn_state::sound_unk_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
// irq ack maybe?
|
||||
logerror("coh1001l_sound_unk_w: %04x %04x\n", data, mem_mask);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(atlus_zn_state::bank_w)
|
||||
void atlus_zn_state::bank_w(uint8_t data)
|
||||
{
|
||||
m_rombank->set_entry( data & 3 );
|
||||
}
|
||||
@ -2168,7 +2168,7 @@ Key: Mother KN01
|
||||
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(visco_zn_state::bank_w)
|
||||
void visco_zn_state::bank_w(uint8_t data)
|
||||
{
|
||||
m_rombank->set_entry( data );
|
||||
}
|
||||
@ -2358,7 +2358,7 @@ Notes:
|
||||
for 11 more 32MBit smt SOP44 mask ROMs.
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(tecmo_zn_state::bank_w)
|
||||
void tecmo_zn_state::bank_w(offs_t offset, uint8_t data, uint8_t mem_mask)
|
||||
{
|
||||
verboselog(1, "bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
m_rombank->set_entry( data );
|
||||
@ -2409,7 +2409,7 @@ void tecmo_zn_state::coh1002ml(machine_config &config)
|
||||
link.set_addrmap(AS_IO, &tecmo_zn_state::link_port_map);
|
||||
}
|
||||
|
||||
READ8_MEMBER(cbaj_state::sound_main_status_r)
|
||||
uint8_t cbaj_state::sound_main_status_r()
|
||||
{
|
||||
// d1: fifo empty flag, other bits: unused(?)
|
||||
return m_fifo[1]->ef_r() << 1;
|
||||
@ -2423,7 +2423,7 @@ void cbaj_state::main_map(address_map &map)
|
||||
map(0x1fb00003, 0x1fb00003).r(FUNC(cbaj_state::sound_main_status_r));
|
||||
}
|
||||
|
||||
READ8_MEMBER(cbaj_state::sound_z80_status_r)
|
||||
uint8_t cbaj_state::sound_z80_status_r()
|
||||
{
|
||||
// d1: fifo empty flag, other bits: unused
|
||||
return m_fifo[0]->ef_r() << 1;
|
||||
|
||||
@ -104,12 +104,12 @@ Bounty2:
|
||||
#include "speaker.h"
|
||||
|
||||
|
||||
WRITE8_MEMBER( zodiack_state::nmi_mask_w )
|
||||
void zodiack_state::nmi_mask_w(uint8_t data)
|
||||
{
|
||||
m_main_nmi_enabled = (data & 1) ^ 1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zodiack_state::sound_nmi_enable_w )
|
||||
void zodiack_state::sound_nmi_enable_w(uint8_t data)
|
||||
{
|
||||
m_sound_nmi_enabled = data & 1;
|
||||
}
|
||||
@ -127,13 +127,13 @@ INTERRUPT_GEN_MEMBER(zodiack_state::zodiack_sound_nmi_gen)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( zodiack_state::master_soundlatch_w )
|
||||
void zodiack_state::master_soundlatch_w(uint8_t data)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->set_input_line(0, HOLD_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zodiack_state::control_w )
|
||||
void zodiack_state::control_w(uint8_t data)
|
||||
{
|
||||
/* Bit 0-1 - coin counters */
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x02);
|
||||
|
||||
@ -309,26 +309,26 @@ void zorba_state::machine_reset()
|
||||
// Memory banking control
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( zorba_state::ram_r )
|
||||
uint8_t zorba_state::ram_r()
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
m_read_bank->set_entry(0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zorba_state::ram_w )
|
||||
void zorba_state::ram_w(uint8_t data)
|
||||
{
|
||||
m_read_bank->set_entry(0);
|
||||
}
|
||||
|
||||
READ8_MEMBER( zorba_state::rom_r )
|
||||
uint8_t zorba_state::rom_r()
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
m_read_bank->set_entry(1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zorba_state::rom_w )
|
||||
void zorba_state::rom_w(uint8_t data)
|
||||
{
|
||||
m_read_bank->set_entry(1);
|
||||
}
|
||||
@ -338,7 +338,7 @@ WRITE8_MEMBER( zorba_state::rom_w )
|
||||
// Interrupt vectoring glue
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( zorba_state::intmask_w )
|
||||
void zorba_state::intmask_w(uint8_t data)
|
||||
{
|
||||
m_intmask = data & 0x3f; // only six lines physically present
|
||||
irq_w<3>(BIT(m_intmask & m_tx_rx_rdy, 0) | BIT(m_intmask & m_tx_rx_rdy, 1));
|
||||
|
||||
@ -240,14 +240,14 @@ protected:
|
||||
uint8_t m_sound_ctrl;
|
||||
uint8_t m_sound_intck;
|
||||
|
||||
DECLARE_WRITE32_MEMBER(paletteram32_w);
|
||||
DECLARE_READ8_MEMBER(sysreg_r);
|
||||
DECLARE_WRITE8_MEMBER(sysreg_w);
|
||||
DECLARE_READ32_MEMBER(ccu_r);
|
||||
DECLARE_WRITE32_MEMBER(ccu_w);
|
||||
DECLARE_READ32_MEMBER(dsp_dataram_r);
|
||||
DECLARE_WRITE32_MEMBER(dsp_dataram_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_ctrl_w);
|
||||
void paletteram32_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint8_t sysreg_r(offs_t offset);
|
||||
void sysreg_w(offs_t offset, uint8_t data);
|
||||
uint32_t ccu_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void ccu_w(uint32_t data);
|
||||
uint32_t dsp_dataram_r(offs_t offset);
|
||||
void dsp_dataram_w(offs_t offset, uint32_t data);
|
||||
void sound_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
WRITE_LINE_MEMBER(vblank);
|
||||
WRITE_LINE_MEMBER(k054539_irq_gen);
|
||||
@ -294,7 +294,7 @@ public:
|
||||
void jetwave(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE32_MEMBER(palette_w);
|
||||
void palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
void main_memmap(address_map &map);
|
||||
|
||||
@ -320,7 +320,7 @@ uint32_t jetwave_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
WRITE32_MEMBER(zr107_state::paletteram32_w)
|
||||
void zr107_state::paletteram32_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_generic_paletteram_32[offset]);
|
||||
data = m_generic_paletteram_32[offset];
|
||||
@ -360,7 +360,7 @@ uint32_t midnrun_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
|
||||
|
||||
/******************************************************************/
|
||||
|
||||
READ8_MEMBER(zr107_state::sysreg_r)
|
||||
uint8_t zr107_state::sysreg_r(offs_t offset)
|
||||
{
|
||||
uint32_t r = 0;
|
||||
|
||||
@ -387,7 +387,7 @@ READ8_MEMBER(zr107_state::sysreg_r)
|
||||
return r;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zr107_state::sysreg_w)
|
||||
void zr107_state::sysreg_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -450,7 +450,7 @@ WRITE8_MEMBER(zr107_state::sysreg_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER(zr107_state::ccu_r)
|
||||
uint32_t zr107_state::ccu_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
uint32_t r = 0;
|
||||
switch (offset)
|
||||
@ -475,7 +475,7 @@ READ32_MEMBER(zr107_state::ccu_r)
|
||||
return r;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zr107_state::ccu_w)
|
||||
void zr107_state::ccu_w(uint32_t data)
|
||||
{
|
||||
}
|
||||
|
||||
@ -511,7 +511,7 @@ void midnrun_state::main_memmap(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(jetwave_state::palette_w)
|
||||
void jetwave_state::palette_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_generic_paletteram_32[offset]);
|
||||
data = m_generic_paletteram_32[offset];
|
||||
@ -543,7 +543,7 @@ void jetwave_state::main_memmap(address_map &map)
|
||||
|
||||
/**********************************************************************/
|
||||
|
||||
WRITE16_MEMBER(zr107_state::sound_ctrl_w)
|
||||
void zr107_state::sound_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
@ -568,12 +568,12 @@ void zr107_state::sound_memmap(address_map &map)
|
||||
/*****************************************************************************/
|
||||
|
||||
|
||||
READ32_MEMBER(zr107_state::dsp_dataram_r)
|
||||
uint32_t zr107_state::dsp_dataram_r(offs_t offset)
|
||||
{
|
||||
return m_sharc_dataram[offset] & 0xffff;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zr107_state::dsp_dataram_w)
|
||||
void zr107_state::dsp_dataram_w(offs_t offset, uint32_t data)
|
||||
{
|
||||
m_sharc_dataram[offset] = data;
|
||||
}
|
||||
|
||||
@ -49,9 +49,9 @@ private:
|
||||
TIMER_BEEP_OFF
|
||||
};
|
||||
|
||||
DECLARE_READ8_MEMBER(zrt80_10_r);
|
||||
DECLARE_WRITE8_MEMBER(zrt80_30_w);
|
||||
DECLARE_WRITE8_MEMBER(zrt80_38_w);
|
||||
uint8_t zrt80_10_r();
|
||||
void zrt80_30_w(uint8_t data);
|
||||
void zrt80_38_w(uint8_t data);
|
||||
void kbd_put(u8 data);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
|
||||
@ -71,7 +71,7 @@ private:
|
||||
};
|
||||
|
||||
|
||||
READ8_MEMBER( zrt80_state::zrt80_10_r )
|
||||
uint8_t zrt80_state::zrt80_10_r()
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
@ -91,13 +91,13 @@ void zrt80_state::device_timer(emu_timer &timer, device_timer_id id, int param,
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(zrt80_state::zrt80_30_w)
|
||||
void zrt80_state::zrt80_30_w(uint8_t data)
|
||||
{
|
||||
timer_set(attotime::from_msec(100), TIMER_BEEP_OFF);
|
||||
m_beep->set_state(1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zrt80_state::zrt80_38_w)
|
||||
void zrt80_state::zrt80_38_w(uint8_t data)
|
||||
{
|
||||
timer_set(attotime::from_msec(400), TIMER_BEEP_OFF);
|
||||
m_beep->set_state(1);
|
||||
|
||||
@ -60,9 +60,9 @@ public:
|
||||
private:
|
||||
virtual void video_start() override;
|
||||
void scanline_cb(uint32_t data);
|
||||
DECLARE_WRITE16_MEMBER(videoram_w);
|
||||
DECLARE_READ8_MEMBER(spriteram_r);
|
||||
DECLARE_WRITE8_MEMBER(spriteram_w);
|
||||
void videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t spriteram_r(offs_t offset);
|
||||
void spriteram_w(offs_t offset, uint8_t data);
|
||||
void update_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int priority);
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
@ -73,7 +73,7 @@ private:
|
||||
void pia1_porta_w(uint8_t data);
|
||||
uint8_t pia1_portb_r();
|
||||
|
||||
DECLARE_READ8_MEMBER(ptm_r);
|
||||
uint8_t ptm_r(offs_t offset);
|
||||
|
||||
void zwackery_map(address_map &map);
|
||||
|
||||
@ -272,19 +272,19 @@ void zwackery_state::scanline_cb(uint32_t data)
|
||||
m_ptm->set_c3(1);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( zwackery_state::videoram_w )
|
||||
void zwackery_state::videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_videoram[offset]);
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
READ8_MEMBER( zwackery_state::spriteram_r )
|
||||
uint8_t zwackery_state::spriteram_r(offs_t offset)
|
||||
{
|
||||
return m_spriteram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zwackery_state::spriteram_w )
|
||||
void zwackery_state::spriteram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_spriteram[offset] = data;
|
||||
}
|
||||
@ -459,7 +459,7 @@ uint8_t zwackery_state::pia1_portb_r()
|
||||
// It expects D1 to end up between 0 and 5; in order to
|
||||
// make this happen, we must assume that reads from the
|
||||
// 6840 take 14 additional cycles
|
||||
READ8_MEMBER( zwackery_state::ptm_r )
|
||||
uint8_t zwackery_state::ptm_r(offs_t offset)
|
||||
{
|
||||
m_maincpu->adjust_icount(-14);
|
||||
return m_ptm->read(offset);
|
||||
|
||||
@ -51,24 +51,24 @@ private:
|
||||
/* video-related */
|
||||
tilemap_t *m_bg_tilemap;
|
||||
|
||||
uint8_t m_yiear_nmi_enable;
|
||||
uint8_t m_yiear_irq_enable;
|
||||
DECLARE_WRITE8_MEMBER(yiear_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(yiear_control_w);
|
||||
DECLARE_READ8_MEMBER(yiear_speech_r);
|
||||
DECLARE_WRITE8_MEMBER(yiear_VLM5030_control_w);
|
||||
uint8_t m_nmi_enable;
|
||||
uint8_t m_irq_enable;
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
void control_w(uint8_t data);
|
||||
uint8_t speech_r();
|
||||
void VLM5030_control_w(uint8_t data);
|
||||
|
||||
uint8_t m_SN76496_latch;
|
||||
DECLARE_WRITE8_MEMBER( konami_SN76496_latch_w ) { m_SN76496_latch = data; };
|
||||
DECLARE_WRITE8_MEMBER( konami_SN76496_w ) { m_sn->write(m_SN76496_latch); };
|
||||
void konami_SN76496_latch_w(uint8_t data) { m_SN76496_latch = data; };
|
||||
void konami_SN76496_w(uint8_t data) { m_sn->write(m_SN76496_latch); };
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
void yiear_palette(palette_device &palette) const;
|
||||
uint32_t screen_update_yiear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void palette(palette_device &palette) const;
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
INTERRUPT_GEN_MEMBER(yiear_nmi_interrupt);
|
||||
INTERRUPT_GEN_MEMBER(nmi_interrupt);
|
||||
void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
|
||||
|
||||
void main_map(address_map &map);
|
||||
|
||||
@ -59,7 +59,7 @@ private:
|
||||
int m_sprites_scrolldx;
|
||||
int m_sprites_scrolldy;
|
||||
|
||||
template<int Layer> DECLARE_WRITE16_MEMBER(vram_w);
|
||||
template<int Layer> void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
TILEMAP_MAPPER_MEMBER(tilemap_scan_pages);
|
||||
template<int Layer> TILE_GET_INFO_MEMBER(get_tile_info);
|
||||
@ -82,7 +82,7 @@ protected:
|
||||
void main_map(address_map &map);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(magicbub_sound_command_w);
|
||||
void magicbub_sound_command_w(uint8_t data);
|
||||
|
||||
void sound_map(address_map &map);
|
||||
void sound_port_map(address_map &map);
|
||||
@ -109,7 +109,7 @@ protected:
|
||||
void main_map(address_map &map);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(sound_bank_w);
|
||||
void sound_bank_w(uint8_t data);
|
||||
|
||||
void oki_map(address_map &map);
|
||||
|
||||
|
||||
@ -50,13 +50,13 @@ private:
|
||||
/* memory */
|
||||
uint8_t m_videoram[0x4000];
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(main_irq_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(videobank_w);
|
||||
DECLARE_READ8_MEMBER(videoram_r);
|
||||
DECLARE_WRITE8_MEMBER(videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(flipscreen_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
void bankswitch_w(uint8_t data);
|
||||
void main_irq_ack_w(uint8_t data);
|
||||
void videobank_w(uint8_t data);
|
||||
uint8_t videoram_r(offs_t offset);
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
void flipscreen_w(uint8_t data);
|
||||
void sound_bankswitch_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
|
||||
@ -110,9 +110,9 @@ protected:
|
||||
emu_timer *m_kbd_timer;
|
||||
z80ne_cass_data_t m_cass_data;
|
||||
|
||||
DECLARE_READ8_MEMBER(lx383_r);
|
||||
DECLARE_WRITE8_MEMBER(lx383_w);
|
||||
DECLARE_READ8_MEMBER(lx385_ctrl_r);
|
||||
uint8_t lx383_r();
|
||||
void lx383_w(offs_t offset, uint8_t data);
|
||||
uint8_t lx385_ctrl_r();
|
||||
void lx385_ctrl_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(lx385_uart_tx_clock_w);
|
||||
|
||||
@ -172,9 +172,9 @@ protected:
|
||||
|
||||
DECLARE_READ_LINE_MEMBER(lx387_shift_r);
|
||||
DECLARE_READ_LINE_MEMBER(lx387_control_r);
|
||||
DECLARE_READ8_MEMBER(lx387_data_r);
|
||||
uint8_t lx387_data_r();
|
||||
uint8_t lx388_mc6847_videoram_r(offs_t offset);
|
||||
DECLARE_READ8_MEMBER(lx388_read_field_sync);
|
||||
uint8_t lx388_read_field_sync();
|
||||
|
||||
required_shared_ptr<uint8_t> m_videoram;
|
||||
required_device<mc6847_base_device> m_vdg;
|
||||
@ -238,10 +238,10 @@ private:
|
||||
void main_mem(address_map &map);
|
||||
void main_io(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(lx390_motor_w);
|
||||
DECLARE_READ8_MEMBER(lx390_reset_bank);
|
||||
DECLARE_READ8_MEMBER(lx390_fdc_r);
|
||||
DECLARE_WRITE8_MEMBER(lx390_fdc_w);
|
||||
void lx390_motor_w(uint8_t data);
|
||||
uint8_t lx390_reset_bank();
|
||||
uint8_t lx390_fdc_r(offs_t offset);
|
||||
void lx390_fdc_w(offs_t offset, uint8_t data);
|
||||
|
||||
void reset_lx390_banking();
|
||||
|
||||
|
||||
@ -47,11 +47,11 @@ private:
|
||||
int m_CollisionSprite;
|
||||
tilemap_t *m_bg_tilemap;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(tinvader_sound_w);
|
||||
DECLARE_WRITE8_MEMBER(tinvader_videoram_w);
|
||||
DECLARE_READ8_MEMBER(zac_s2636_r);
|
||||
DECLARE_WRITE8_MEMBER(zac_s2636_w);
|
||||
DECLARE_READ8_MEMBER(tinvader_port_0_r);
|
||||
void tinvader_sound_w(uint8_t data);
|
||||
void tinvader_videoram_w(offs_t offset, uint8_t data);
|
||||
uint8_t zac_s2636_r(offs_t offset);
|
||||
void zac_s2636_w(offs_t offset, uint8_t data);
|
||||
uint8_t tinvader_port_0_r();
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
void zac2650_palette(palette_device &palette) const;
|
||||
uint32_t screen_update_tinvader(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
@ -33,13 +33,13 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(dsw_r);
|
||||
DECLARE_READ8_MEMBER(prot1_r);
|
||||
DECLARE_READ8_MEMBER(prot2_r);
|
||||
uint8_t dsw_r();
|
||||
uint8_t prot1_r(offs_t offset);
|
||||
uint8_t prot2_r(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(nmi_mask_w);
|
||||
DECLARE_WRITE8_MEMBER(videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(attributes_w);
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
void attributes_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(flip_screen_x_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(flip_screen_y_w);
|
||||
void dsw_sel_w(uint8_t data);
|
||||
|
||||
@ -89,21 +89,21 @@ private:
|
||||
tilemap_t *m_fg_tilemap;
|
||||
tilemap_t *m_bg_tilemap;
|
||||
DECLARE_WRITE_LINE_MEMBER(int_enable_w);
|
||||
DECLARE_READ8_MEMBER(razmataz_counter_r);
|
||||
DECLARE_WRITE8_MEMBER(zaxxon_control_w);
|
||||
uint8_t razmataz_counter_r();
|
||||
void zaxxon_control_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_a_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_b_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_enable_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(flipscreen_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(fg_color_w);
|
||||
DECLARE_WRITE8_MEMBER(bg_position_w);
|
||||
void bg_position_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(bg_color_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(bg_enable_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(congo_fg_bank_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(congo_color_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(zaxxon_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(congo_colorram_w);
|
||||
DECLARE_WRITE8_MEMBER(congo_sprite_custom_w);
|
||||
void zaxxon_videoram_w(offs_t offset, uint8_t data);
|
||||
void congo_colorram_w(offs_t offset, uint8_t data);
|
||||
void congo_sprite_custom_w(address_space &space, offs_t offset, uint8_t data);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
TILE_GET_INFO_MEMBER(zaxxon_get_fg_tile_info);
|
||||
|
||||
@ -29,13 +29,13 @@ public:
|
||||
void zerozone(machine_config &config);
|
||||
|
||||
private:
|
||||
// in drivers/zerozone.c
|
||||
DECLARE_WRITE16_MEMBER(sound_w);
|
||||
// in drivers/zerozone.cpp
|
||||
void sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_w);
|
||||
|
||||
// in video/zerozone.c
|
||||
DECLARE_WRITE16_MEMBER(tilemap_w);
|
||||
DECLARE_WRITE16_MEMBER(tilebank_w);
|
||||
// in video/zerozone.cpp
|
||||
void tilemap_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void tilebank_w(uint16_t data);
|
||||
|
||||
// devices
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
@ -66,11 +66,11 @@ protected:
|
||||
template<int Chip> DECLARE_WRITE_LINE_MEMBER(cat702_dataout) { m_cat702_dataout[Chip] = state; update_sio0_rxd(); }
|
||||
DECLARE_WRITE_LINE_MEMBER(znmcu_dataout) { m_znmcu_dataout = state; update_sio0_rxd(); }
|
||||
void update_sio0_rxd() { m_sio0->write_rxd(m_cat702_dataout[0] && m_cat702_dataout[1] && m_znmcu_dataout); }
|
||||
DECLARE_READ8_MEMBER(znsecsel_r);
|
||||
DECLARE_WRITE8_MEMBER(znsecsel_w);
|
||||
DECLARE_READ8_MEMBER(boardconfig_r);
|
||||
DECLARE_READ16_MEMBER(unknown_r);
|
||||
DECLARE_WRITE8_MEMBER(coin_w);
|
||||
uint8_t znsecsel_r(offs_t offset, uint8_t mem_mask = ~0);
|
||||
void znsecsel_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
|
||||
uint8_t boardconfig_r();
|
||||
uint16_t unknown_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void coin_w(uint8_t data);
|
||||
|
||||
void zn_base_map(address_map &map);
|
||||
void zn_rom_base_map(address_map &map);
|
||||
@ -128,9 +128,9 @@ private:
|
||||
void qsound_map(address_map &map);
|
||||
void qsound_portmap(address_map &map);
|
||||
|
||||
DECLARE_READ16_MEMBER(kickharness_r);
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
DECLARE_WRITE8_MEMBER(qsound_bankswitch_w);
|
||||
uint16_t kickharness_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void bank_w(uint8_t data);
|
||||
void qsound_bankswitch_w(uint8_t data);
|
||||
INTERRUPT_GEN_MEMBER(qsound_interrupt);
|
||||
};
|
||||
|
||||
@ -187,8 +187,8 @@ protected:
|
||||
void coh1000a_map(address_map &map);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE16_MEMBER(acpsx_00_w);
|
||||
DECLARE_WRITE16_MEMBER(acpsx_10_w);
|
||||
void acpsx_00_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void acpsx_10_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
};
|
||||
|
||||
class nbajamex_state : public acclaim_zn_state
|
||||
@ -210,11 +210,11 @@ private:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(bank_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_80_w);
|
||||
DECLARE_WRITE8_MEMBER(backup_w);
|
||||
DECLARE_READ16_MEMBER(sound_08_r);
|
||||
DECLARE_READ16_MEMBER(sound_80_r);
|
||||
void bank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sound_80_w(uint16_t data);
|
||||
void backup_w(offs_t offset, uint8_t data);
|
||||
uint16_t sound_08_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
uint16_t sound_80_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
|
||||
void main_map(address_map &map);
|
||||
void bank_map(address_map &map);
|
||||
@ -276,8 +276,8 @@ private:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_unk_w);
|
||||
void bank_w(uint8_t data);
|
||||
void sound_unk_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
void main_map(address_map &map);
|
||||
void sound_map(address_map &map);
|
||||
@ -308,7 +308,7 @@ private:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
void bank_w(uint8_t data);
|
||||
|
||||
void main_map(address_map &map);
|
||||
|
||||
@ -341,8 +341,8 @@ protected:
|
||||
void main_map(address_map &map);
|
||||
void psarc_sound_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_irq_w);
|
||||
void bank_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
|
||||
void sound_irq_w(uint8_t data);
|
||||
|
||||
required_memory_region m_bankedroms;
|
||||
required_memory_bank m_rombank;
|
||||
@ -391,9 +391,9 @@ private:
|
||||
|
||||
uint16_t m_mcu_command;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(mcu_w);
|
||||
DECLARE_READ16_MEMBER(mcu_r);
|
||||
DECLARE_READ16_MEMBER(unk_r);
|
||||
void mcu_w(offs_t offset, uint16_t data);
|
||||
uint16_t mcu_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
uint16_t unk_r();
|
||||
|
||||
required_memory_region m_bankedroms;
|
||||
required_memory_bank m_rombank;
|
||||
@ -418,7 +418,7 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
void bank_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
|
||||
|
||||
required_memory_region m_bankedroms;
|
||||
required_memory_bank m_rombank;
|
||||
@ -444,7 +444,7 @@ private:
|
||||
void main_map(address_map &map);
|
||||
void sound_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
void sound_bankswitch_w(uint8_t data);
|
||||
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
required_memory_bank m_soundbank;
|
||||
@ -468,8 +468,8 @@ private:
|
||||
|
||||
void main_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(fram_w);
|
||||
DECLARE_READ8_MEMBER(fram_r);
|
||||
void fram_w(offs_t offset, uint8_t data);
|
||||
uint8_t fram_r(offs_t offset);
|
||||
|
||||
required_device<taito_zoom_device> m_zoom;
|
||||
required_device<nvram_device> m_fm1208s;
|
||||
@ -511,10 +511,10 @@ private:
|
||||
void dma_read(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size);
|
||||
void dma_write(uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size);
|
||||
|
||||
DECLARE_READ16_MEMBER(vt83c461_16_r);
|
||||
DECLARE_WRITE16_MEMBER(vt83c461_16_w);
|
||||
DECLARE_READ16_MEMBER(vt83c461_32_r);
|
||||
DECLARE_WRITE16_MEMBER(vt83c461_32_w);
|
||||
uint16_t vt83c461_16_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void vt83c461_16_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t vt83c461_32_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void vt83c461_32_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
required_device<vt83c461_device> m_vt83c461;
|
||||
|
||||
@ -548,7 +548,7 @@ private:
|
||||
void link_map(address_map &map);
|
||||
void link_port_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
void bank_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
|
||||
|
||||
required_memory_region m_bankedroms;
|
||||
required_memory_bank m_rombank;
|
||||
@ -572,8 +572,8 @@ private:
|
||||
void z80_map(address_map &map);
|
||||
void z80_port_map(address_map &map);
|
||||
|
||||
DECLARE_READ8_MEMBER(sound_main_status_r);
|
||||
DECLARE_READ8_MEMBER(sound_z80_status_r);
|
||||
uint8_t sound_main_status_r();
|
||||
uint8_t sound_z80_status_r();
|
||||
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
required_device_array<fifo7200_device, 2> m_fifo;
|
||||
|
||||
@ -22,10 +22,10 @@ protected:
|
||||
virtual void machine_reset() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(nmi_mask_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_nmi_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(master_soundlatch_w);
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
void nmi_mask_w(uint8_t data);
|
||||
void sound_nmi_enable_w(uint8_t data);
|
||||
void master_soundlatch_w(uint8_t data);
|
||||
void control_w(uint8_t data);
|
||||
|
||||
// devices
|
||||
required_device<z80_device> m_maincpu;
|
||||
|
||||
@ -57,13 +57,13 @@ private:
|
||||
void zorba_mem(address_map &map);
|
||||
|
||||
// Memory banking control
|
||||
DECLARE_READ8_MEMBER(ram_r);
|
||||
DECLARE_WRITE8_MEMBER(ram_w);
|
||||
DECLARE_READ8_MEMBER(rom_r);
|
||||
DECLARE_WRITE8_MEMBER(rom_w);
|
||||
uint8_t ram_r();
|
||||
void ram_w(uint8_t data);
|
||||
uint8_t rom_r();
|
||||
void rom_w(uint8_t data);
|
||||
|
||||
// Interrupt vectoring glue
|
||||
DECLARE_WRITE8_MEMBER(intmask_w);
|
||||
void intmask_w(uint8_t data);
|
||||
template <unsigned N> DECLARE_WRITE_LINE_MEMBER(tx_rx_rdy_w);
|
||||
template <unsigned N> DECLARE_WRITE_LINE_MEMBER(irq_w);
|
||||
|
||||
|
||||
@ -60,15 +60,15 @@ public:
|
||||
private:
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER(ula_high_r);
|
||||
DECLARE_READ8_MEMBER(ula_low_r);
|
||||
uint8_t ula_high_r(offs_t offset);
|
||||
uint8_t ula_low_r(offs_t offset);
|
||||
void refresh_w(offs_t offset, uint8_t data);
|
||||
DECLARE_READ8_MEMBER(zx80_io_r);
|
||||
DECLARE_READ8_MEMBER(zx81_io_r);
|
||||
DECLARE_READ8_MEMBER(pc8300_io_r);
|
||||
DECLARE_READ8_MEMBER(pow3000_io_r);
|
||||
DECLARE_WRITE8_MEMBER(zx80_io_w);
|
||||
DECLARE_WRITE8_MEMBER(zx81_io_w);
|
||||
uint8_t zx80_io_r(offs_t offset);
|
||||
uint8_t zx81_io_r(offs_t offset);
|
||||
uint8_t pc8300_io_r(offs_t offset);
|
||||
uint8_t pow3000_io_r(offs_t offset);
|
||||
void zx80_io_w(offs_t offset, uint8_t data);
|
||||
void zx81_io_w(offs_t offset, uint8_t data);
|
||||
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
|
||||
@ -348,7 +348,7 @@ void z80netf_state::machine_start()
|
||||
******************************************************************************/
|
||||
|
||||
/* LX.383 - LX.384 HEX keyboard and display */
|
||||
READ8_MEMBER(z80ne_state::lx383_r)
|
||||
uint8_t z80ne_state::lx383_r()
|
||||
{
|
||||
/*
|
||||
* Keyboard scanning
|
||||
@ -370,7 +370,7 @@ READ8_MEMBER(z80ne_state::lx383_r)
|
||||
return m_lx383_key[m_lx383_scan_counter];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(z80ne_state::lx383_w)
|
||||
void z80ne_state::lx383_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/*
|
||||
* First 8 locations (F0-F7) are mapped to a dual-port 8-byte RAM
|
||||
@ -454,7 +454,7 @@ WRITE8_MEMBER(z80ne_state::lx383_w)
|
||||
pin 2 for an old PMOS UART.
|
||||
*
|
||||
*/
|
||||
READ8_MEMBER(z80ne_state::lx385_ctrl_r)
|
||||
uint8_t z80ne_state::lx385_ctrl_r()
|
||||
{
|
||||
/* set unused bits high */
|
||||
uint8_t data = 0xc0;
|
||||
@ -553,14 +553,14 @@ uint8_t z80net_state::lx388_mc6847_videoram_r(offs_t offset)
|
||||
return m_videoram[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER(z80net_state::lx387_data_r)
|
||||
uint8_t z80net_state::lx387_data_r()
|
||||
{
|
||||
uint8_t data = m_lx387_kr2376->data_r() & 0x7f;
|
||||
data |= m_lx387_kr2376->get_output_pin(kr2376_device::KR2376_SO) << 7;
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(z80net_state::lx388_read_field_sync)
|
||||
uint8_t z80net_state::lx388_read_field_sync()
|
||||
{
|
||||
return m_vdg->fs_r() << 7;
|
||||
}
|
||||
@ -574,7 +574,7 @@ READ8_MEMBER(z80net_state::lx388_read_field_sync)
|
||||
*
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(z80netf_state::lx390_motor_w)
|
||||
void z80netf_state::lx390_motor_w(uint8_t data)
|
||||
{
|
||||
/* Selection of drive and parameters
|
||||
A write also causes the selected drive motor to turn on for about 3 seconds.
|
||||
@ -613,7 +613,7 @@ WRITE8_MEMBER(z80netf_state::lx390_motor_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(z80netf_state::lx390_reset_bank)
|
||||
uint8_t z80netf_state::lx390_reset_bank()
|
||||
{
|
||||
offs_t pc;
|
||||
|
||||
@ -631,7 +631,7 @@ READ8_MEMBER(z80netf_state::lx390_reset_bank)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(z80netf_state::lx390_fdc_r)
|
||||
uint8_t z80netf_state::lx390_fdc_r(offs_t offset)
|
||||
{
|
||||
uint8_t d;
|
||||
|
||||
@ -655,7 +655,7 @@ READ8_MEMBER(z80netf_state::lx390_fdc_r)
|
||||
break;
|
||||
case 6:
|
||||
d = 0xff;
|
||||
lx390_reset_bank(space, 0);
|
||||
lx390_reset_bank();
|
||||
break;
|
||||
case 7:
|
||||
d = m_wd1771->data_r() ^ 0xff;
|
||||
@ -667,11 +667,9 @@ READ8_MEMBER(z80netf_state::lx390_fdc_r)
|
||||
return d;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(z80netf_state::lx390_fdc_w)
|
||||
void z80netf_state::lx390_fdc_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint8_t d;
|
||||
|
||||
d = data;
|
||||
uint8_t d = data;
|
||||
switch(offset)
|
||||
{
|
||||
case 0:
|
||||
@ -696,7 +694,7 @@ WRITE8_MEMBER(z80netf_state::lx390_fdc_w)
|
||||
break;
|
||||
case 6:
|
||||
LOG("lx390_fdc_w, motor_w: %02x\n", d);
|
||||
lx390_motor_w(space, 0, d);
|
||||
lx390_motor_w(d);
|
||||
break;
|
||||
case 7:
|
||||
LOG("lx390_fdc_w, WD17xx data7, force: %02x\n", d);
|
||||
|
||||
@ -109,7 +109,7 @@ void zx_state::drop_sync()
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER( zx_state::zx80_io_r )
|
||||
uint8_t zx_state::zx80_io_r(offs_t offset)
|
||||
{
|
||||
/* port FE = read keyboard, NTSC/PAL diode, and cass bit; turn off HSYNC-generator/cass-out
|
||||
The upper 8 bits are used to select a keyboard scan line */
|
||||
@ -152,7 +152,7 @@ READ8_MEMBER( zx_state::zx80_io_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( zx_state::zx81_io_r )
|
||||
uint8_t zx_state::zx81_io_r(offs_t offset)
|
||||
{
|
||||
/* port FB = read printer status, not emulated
|
||||
FE = read keyboard, NTSC/PAL diode, and cass bit; turn off HSYNC-generator/cass-out
|
||||
@ -196,7 +196,7 @@ READ8_MEMBER( zx_state::zx81_io_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( zx_state::pc8300_io_r )
|
||||
uint8_t zx_state::pc8300_io_r(offs_t offset)
|
||||
{
|
||||
/* port F5 = sound
|
||||
F6 = unknown
|
||||
@ -241,7 +241,7 @@ READ8_MEMBER( zx_state::pc8300_io_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( zx_state::pow3000_io_r )
|
||||
uint8_t zx_state::pow3000_io_r(offs_t offset)
|
||||
{
|
||||
/* port 7E = read NTSC/PAL diode
|
||||
F5 = sound
|
||||
@ -291,7 +291,7 @@ READ8_MEMBER( zx_state::pow3000_io_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zx_state::zx80_io_w )
|
||||
void zx_state::zx80_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/* port FF = write HSYNC and cass data */
|
||||
|
||||
@ -301,7 +301,7 @@ WRITE8_MEMBER( zx_state::zx80_io_w )
|
||||
m_cassette->output(-1.0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( zx_state::zx81_io_w )
|
||||
void zx_state::zx81_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/* port F5 = unknown, pc8300/pow3000/lambda only
|
||||
F6 = unknown, pc8300/pow3000/lambda only
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
// thanks-to:Enrique Sanchez
|
||||
/***************************************************************************
|
||||
|
||||
video.c
|
||||
yiear.cpp
|
||||
|
||||
Functions to emulate the video hardware of the machine.
|
||||
|
||||
@ -31,7 +31,7 @@
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void yiear_state::yiear_palette(palette_device &palette) const
|
||||
void yiear_state::palette(palette_device &palette) const
|
||||
{
|
||||
uint8_t const *color_prom = memregion("proms")->base();
|
||||
|
||||
@ -62,13 +62,13 @@ void yiear_state::yiear_palette(palette_device &palette) const
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(yiear_state::yiear_videoram_w)
|
||||
void yiear_state::videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset / 2);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(yiear_state::yiear_control_w)
|
||||
void yiear_state::control_w(uint8_t data)
|
||||
{
|
||||
/* bit 0 flips screen */
|
||||
if (flip_screen() != (data & 0x01))
|
||||
@ -78,10 +78,10 @@ WRITE8_MEMBER(yiear_state::yiear_control_w)
|
||||
}
|
||||
|
||||
/* bit 1 is NMI enable */
|
||||
m_yiear_nmi_enable = data & 0x02;
|
||||
m_nmi_enable = data & 0x02;
|
||||
|
||||
/* bit 2 is IRQ enable */
|
||||
m_yiear_irq_enable = data & 0x04;
|
||||
m_irq_enable = data & 0x04;
|
||||
|
||||
/* bits 3 and 4 are coin counters */
|
||||
machine().bookkeeping().coin_counter_w(0, data & 0x08);
|
||||
@ -106,19 +106,15 @@ void yiear_state::video_start()
|
||||
|
||||
void yiear_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect )
|
||||
{
|
||||
uint8_t *spriteram = m_spriteram;
|
||||
uint8_t *spriteram_2 = m_spriteram2;
|
||||
int offs;
|
||||
|
||||
for (offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2)
|
||||
for (int offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2)
|
||||
{
|
||||
int attr = spriteram[offs];
|
||||
int code = spriteram_2[offs + 1] + 256 * (attr & 0x01);
|
||||
int attr = m_spriteram[offs];
|
||||
int code = m_spriteram2[offs + 1] + 256 * (attr & 0x01);
|
||||
int color = 0;
|
||||
int flipx = ~attr & 0x40;
|
||||
int flipy = attr & 0x80;
|
||||
int sy = 240 - spriteram[offs + 1];
|
||||
int sx = spriteram_2[offs];
|
||||
int sy = 240 - m_spriteram[offs + 1];
|
||||
int sx = m_spriteram2[offs];
|
||||
|
||||
if (flip_screen())
|
||||
{
|
||||
@ -139,7 +135,7 @@ void yiear_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t yiear_state::screen_update_yiear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
uint32_t yiear_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
|
||||
draw_sprites(bitmap, cliprect);
|
||||
|
||||
@ -39,13 +39,13 @@ Note: if MAME_DEBUG is defined, pressing Z with:
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(yunsung8_state::videobank_w)
|
||||
void yunsung8_state::videobank_w(uint8_t data)
|
||||
{
|
||||
m_videobank = data;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(yunsung8_state::videoram_r)
|
||||
uint8_t yunsung8_state::videoram_r(offs_t offset)
|
||||
{
|
||||
int bank;
|
||||
|
||||
@ -64,7 +64,7 @@ READ8_MEMBER(yunsung8_state::videoram_r)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(yunsung8_state::videoram_w)
|
||||
void yunsung8_state::videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset < 0x0800) // c000-c7ff Banked Palette RAM
|
||||
{
|
||||
@ -107,7 +107,7 @@ WRITE8_MEMBER(yunsung8_state::videoram_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(yunsung8_state::flipscreen_w)
|
||||
void yunsung8_state::flipscreen_w(uint8_t data)
|
||||
{
|
||||
machine().tilemap().set_flip_all((data & 1) ? (TILEMAP_FLIPX | TILEMAP_FLIPY) : 0);
|
||||
}
|
||||
|
||||
@ -16,19 +16,19 @@
|
||||
/* once it's workings are fully understood. */
|
||||
/**************************************************************/
|
||||
|
||||
WRITE8_MEMBER(zac2650_state::tinvader_videoram_w)
|
||||
void zac2650_state::tinvader_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
READ8_MEMBER(zac2650_state::zac_s2636_r)
|
||||
uint8_t zac2650_state::zac_s2636_r(offs_t offset)
|
||||
{
|
||||
if(offset!=0xCB) return m_s2636_0_ram[offset];
|
||||
else return m_CollisionSprite;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zac2650_state::zac_s2636_w)
|
||||
void zac2650_state::zac_s2636_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_s2636_0_ram[offset] = data;
|
||||
m_gfxdecode->gfx(1)->mark_dirty(offset/8);
|
||||
@ -39,7 +39,7 @@ WRITE8_MEMBER(zac2650_state::zac_s2636_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(zac2650_state::tinvader_port_0_r)
|
||||
uint8_t zac2650_state::tinvader_port_0_r()
|
||||
{
|
||||
return ioport("1E80")->read() - m_CollisionBackground;
|
||||
}
|
||||
|
||||
@ -141,13 +141,13 @@ void zaccaria_state::video_start()
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(zaccaria_state::videoram_w)
|
||||
void zaccaria_state::videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(zaccaria_state::attributes_w)
|
||||
void zaccaria_state::attributes_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset & 1)
|
||||
{
|
||||
|
||||
@ -191,7 +191,7 @@ WRITE_LINE_MEMBER(zaxxon_state::fg_color_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(zaxxon_state::bg_position_w)
|
||||
void zaxxon_state::bg_position_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/* 11 bits of scroll position are stored */
|
||||
if (offset == 0)
|
||||
@ -238,14 +238,14 @@ WRITE_LINE_MEMBER(zaxxon_state::congo_color_bank_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(zaxxon_state::zaxxon_videoram_w)
|
||||
void zaxxon_state::zaxxon_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(zaxxon_state::congo_colorram_w)
|
||||
void zaxxon_state::congo_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
@ -259,10 +259,8 @@ WRITE8_MEMBER(zaxxon_state::congo_colorram_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(zaxxon_state::congo_sprite_custom_w)
|
||||
void zaxxon_state::congo_sprite_custom_w(address_space &space, offs_t offset, uint8_t data)
|
||||
{
|
||||
uint8_t *spriteram = m_spriteram;
|
||||
|
||||
m_congo_custom[offset] = data;
|
||||
|
||||
/* seems to trigger on a write of 1 to the 4th byte */
|
||||
@ -278,10 +276,10 @@ WRITE8_MEMBER(zaxxon_state::congo_sprite_custom_w)
|
||||
while (count-- >= 0)
|
||||
{
|
||||
uint8_t daddr = space.read_byte(saddr + 0) * 4;
|
||||
spriteram[(daddr + 0) & 0xff] = space.read_byte(saddr + 1);
|
||||
spriteram[(daddr + 1) & 0xff] = space.read_byte(saddr + 2);
|
||||
spriteram[(daddr + 2) & 0xff] = space.read_byte(saddr + 3);
|
||||
spriteram[(daddr + 3) & 0xff] = space.read_byte(saddr + 4);
|
||||
m_spriteram[(daddr + 0) & 0xff] = space.read_byte(saddr + 1);
|
||||
m_spriteram[(daddr + 1) & 0xff] = space.read_byte(saddr + 2);
|
||||
m_spriteram[(daddr + 2) & 0xff] = space.read_byte(saddr + 3);
|
||||
m_spriteram[(daddr + 3) & 0xff] = space.read_byte(saddr + 4);
|
||||
saddr += 0x20;
|
||||
}
|
||||
}
|
||||
|
||||
@ -9,14 +9,14 @@
|
||||
#include "emu.h"
|
||||
#include "includes/zerozone.h"
|
||||
|
||||
WRITE16_MEMBER( zerozone_state::tilemap_w )
|
||||
void zerozone_state::tilemap_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_vram[offset]);
|
||||
m_zz_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER( zerozone_state::tilebank_w )
|
||||
void zerozone_state::tilebank_w(uint16_t data)
|
||||
{
|
||||
// popmessage ("Data %04x",data);
|
||||
m_tilebank = data & 0x07;
|
||||
|
||||
@ -92,7 +92,7 @@ void zx_state::recalc_hsync()
|
||||
m_ula_hsync->adjust(m_maincpu->cycles_to_attotime(delta));
|
||||
}
|
||||
|
||||
READ8_MEMBER(zx_state::ula_low_r)
|
||||
uint8_t zx_state::ula_low_r(offs_t offset)
|
||||
{
|
||||
uint8_t cdata = m_program->read_byte(offset);
|
||||
if(machine().side_effects_disabled())
|
||||
@ -110,7 +110,7 @@ READ8_MEMBER(zx_state::ula_low_r)
|
||||
return cdata;
|
||||
}
|
||||
|
||||
READ8_MEMBER(zx_state::ula_high_r)
|
||||
uint8_t zx_state::ula_high_r(offs_t offset)
|
||||
{
|
||||
uint8_t cdata = m_program->read_byte(offset);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user