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This commit is contained in:
Olivier Galibert 2018-01-03 10:41:10 +01:00
parent 590872f2a0
commit ee214727b8
38 changed files with 169 additions and 165 deletions
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2
src/mame/drivers/royalmah.cpp
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@ -491,7 +491,7 @@ WRITE8_MEMBER(royalmah_state::tontonb_bank_w)
/* bits 5 and 6 seem to affect which Dip Switch to read in 'majs101b' */ /* bits 5 and 6 seem to affect which Dip Switch to read in 'majs101b' */
WRITE8_MEMBER(royalmah_state::dynax_bank_w) WRITE8_MEMBER(royalmah_state::dynax_bank_w)
{ {
//logerror("%04x: bank %02x\n",space.device().safe_pc(),data); //logerror("%04x: bank %02x\n",m_maincpu->pc(),data);
m_dsw_select = data & 0x60; m_dsw_select = data & 0x60;

16
src/mame/drivers/segas32.cpp
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@ -713,11 +713,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(segas32_state::signal_v60_irq_callback)
} }
void segas32_state::int_control_w(address_space &space, int offset, uint8_t data) void segas32_state::int_control_w(int offset, uint8_t data)
{ {
int duration; int duration;
// logerror("%06X:int_control_w(%X) = %02X\n", space.device().safe_pc(), offset, data); // logerror("%06X:int_control_w(%X) = %02X\n", m_maincpu->pc(), offset, data);
switch (offset) switch (offset)
{ {
case 0: case 0:
@ -795,9 +795,9 @@ READ16_MEMBER(segas32_state::interrupt_control_16_r)
WRITE16_MEMBER(segas32_state::interrupt_control_16_w) WRITE16_MEMBER(segas32_state::interrupt_control_16_w)
{ {
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
int_control_w(space, offset*2+0, data); int_control_w(offset*2+0, data);
if (ACCESSING_BITS_8_15) if (ACCESSING_BITS_8_15)
int_control_w(space, offset*2+1, data >> 8); int_control_w(offset*2+1, data >> 8);
} }
@ -818,13 +818,13 @@ READ32_MEMBER(segas32_state::interrupt_control_32_r)
WRITE32_MEMBER(segas32_state::interrupt_control_32_w) WRITE32_MEMBER(segas32_state::interrupt_control_32_w)
{ {
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
int_control_w(space, offset*4+0, data); int_control_w(offset*4+0, data);
if (ACCESSING_BITS_8_15) if (ACCESSING_BITS_8_15)
int_control_w(space, offset*4+1, data >> 8); int_control_w(offset*4+1, data >> 8);
if (ACCESSING_BITS_16_23) if (ACCESSING_BITS_16_23)
int_control_w(space, offset*4+2, data >> 16); int_control_w(offset*4+2, data >> 16);
if (ACCESSING_BITS_24_31) if (ACCESSING_BITS_24_31)
int_control_w(space, offset*4+3, data >> 24); int_control_w(offset*4+3, data >> 24);
} }

4
src/mame/drivers/seibuspi.cpp
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@ -2164,7 +2164,7 @@ READ32_MEMBER(seibuspi_state::senkyua_speedup_r)
READ32_MEMBER(seibuspi_state::batlball_speedup_r) READ32_MEMBER(seibuspi_state::batlball_speedup_r)
{ {
// printf("space.device().safe_pc() %06x\n", space.device().safe_pc()); // printf("space.device().safe_pc() %06x\n", m_maincpu->pc());
/* batlbalu */ /* batlbalu */
if (m_maincpu->pc()==0x00305996) m_maincpu->spin_until_interrupt(); // idle if (m_maincpu->pc()==0x00305996) m_maincpu->spin_until_interrupt(); // idle
@ -2186,7 +2186,7 @@ READ32_MEMBER(seibuspi_state::viprp1_speedup_r)
/* viprp1ot */ /* viprp1ot */
if (m_maincpu->pc()==0x02026bd) m_maincpu->spin_until_interrupt(); // idle if (m_maincpu->pc()==0x02026bd) m_maincpu->spin_until_interrupt(); // idle
// osd_printf_debug("%08x\n",space.device().safe_pc()); // osd_printf_debug("%08x\n",m_maincpu->pc());
return m_mainram[0x001e2e0/4]; return m_mainram[0x001e2e0/4];
} }

2
src/mame/drivers/seicross.cpp
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@ -87,7 +87,7 @@ READ8_MEMBER(seicross_state::portB_r)
WRITE8_MEMBER(seicross_state::portB_w) WRITE8_MEMBER(seicross_state::portB_w)
{ {
//logerror("PC %04x: 8910 port B = %02x\n", space.device().safe_pc(), data); //logerror("PC %04x: 8910 port B = %02x\n", m_maincpu->pc(), data);
/* bit 0 is IRQ enable */ /* bit 0 is IRQ enable */
m_irq_mask = data & 1; m_irq_mask = data & 1;

8
src/mame/drivers/seta.cpp
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@ -2817,12 +2817,12 @@ ADDRESS_MAP_END
READ16_MEMBER(seta_state::thunderl_protection_r) READ16_MEMBER(seta_state::thunderl_protection_r)
{ {
// logerror("PC %06X - Protection Read\n", space.device().safe_pc()); // logerror("PC %06X - Protection Read\n", m_maincpu->pc());
return 0x00dd; return 0x00dd;
} }
WRITE16_MEMBER(seta_state::thunderl_protection_w) WRITE16_MEMBER(seta_state::thunderl_protection_w)
{ {
// logerror("PC %06X - Protection Written: %04X <- %04X\n", space.device().safe_pc(), offset*2, data); // logerror("PC %06X - Protection Written: %04X <- %04X\n", m_maincpu->pc(), offset*2, data);
} }
/* Similar to downtown etc. */ /* Similar to downtown etc. */
@ -2975,14 +2975,14 @@ READ16_MEMBER(seta_state::pairlove_prot_r)
int retdata; int retdata;
retdata = m_pairslove_protram[offset]; retdata = m_pairslove_protram[offset];
//osd_printf_debug("pairs love protection? read %06x %04x %04x\n",space.device().safe_pc(), offset,retdata); //osd_printf_debug("pairs love protection? read %06x %04x %04x\n",m_maincpu->pc(), offset,retdata);
m_pairslove_protram[offset] = m_pairslove_protram_old[offset]; m_pairslove_protram[offset] = m_pairslove_protram_old[offset];
return retdata; return retdata;
} }
WRITE16_MEMBER(seta_state::pairlove_prot_w) WRITE16_MEMBER(seta_state::pairlove_prot_w)
{ {
//osd_printf_debug("pairs love protection? write %06x %04x %04x\n",space.device().safe_pc(), offset,data); //osd_printf_debug("pairs love protection? write %06x %04x %04x\n",m_maincpu->pc(), offset,data);
m_pairslove_protram_old[offset] = m_pairslove_protram[offset]; m_pairslove_protram_old[offset] = m_pairslove_protram[offset];
m_pairslove_protram[offset] = data; m_pairslove_protram[offset] = data;
} }

4
src/mame/drivers/spdodgeb.cpp
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@ -213,7 +213,7 @@ void spdodgeb_state::mcu63705_update_inputs()
READ8_MEMBER(spdodgeb_state::mcu63701_r) READ8_MEMBER(spdodgeb_state::mcu63701_r)
{ {
// logerror("CPU #0 PC %04x: read from port %02x of 63701 data address 3801\n",space.device().safe_pc(),offset); // logerror("CPU #0 PC %04x: read from port %02x of 63701 data address 3801\n",m_maincpu->pc(),offset);
if (m_mcu63701_command == 0) return 0x6a; if (m_mcu63701_command == 0) return 0x6a;
else switch (offset) else switch (offset)
@ -229,7 +229,7 @@ READ8_MEMBER(spdodgeb_state::mcu63701_r)
WRITE8_MEMBER(spdodgeb_state::mcu63701_w) WRITE8_MEMBER(spdodgeb_state::mcu63701_w)
{ {
// logerror("CPU #0 PC %04x: write %02x to 63701 control address 3800\n",space.device().safe_pc(),data); // logerror("CPU #0 PC %04x: write %02x to 63701 control address 3800\n",m_maincpu->pc(),data);
m_mcu63701_command = data; m_mcu63701_command = data;
mcu63705_update_inputs(); mcu63705_update_inputs();
} }

10
src/mame/drivers/spy.cpp
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@ -47,12 +47,12 @@ READ8_MEMBER(spy_state::spy_bankedram1_r)
{ {
if (m_pmcbank) if (m_pmcbank)
{ {
//logerror("%04x read pmcram %04x\n", space.device().safe_pc(), offset); //logerror("%04x read pmcram %04x\n",m_maincpu->pc(), offset);
return m_pmcram[offset]; return m_pmcram[offset];
} }
else else
{ {
//logerror("%04x read pmc internal ram %04x\n", space.device().safe_pc(), offset); //logerror("%04x read pmc internal ram %04x\n", m_maincpu->pc(), offset);
return 0; return 0;
} }
} }
@ -70,11 +70,11 @@ WRITE8_MEMBER(spy_state::spy_bankedram1_w)
{ {
if (m_pmcbank) if (m_pmcbank)
{ {
//logerror("%04x pmcram %04x = %02x\n", space.device().safe_pc(), offset, data); //logerror("%04x pmcram %04x = %02x\n", m_maincpu->pc(), offset, data);
m_pmcram[offset] = data; m_pmcram[offset] = data;
} }
//else //else
//logerror("%04x pmc internal ram %04x = %02x\n", space.device().safe_pc(), offset, data); //logerror("%04x pmc internal ram %04x = %02x\n", m_maincpu->pc(), offset, data);
} }
else else
m_ram[offset] = data; m_ram[offset] = data;
@ -303,7 +303,7 @@ WRITE8_MEMBER(spy_state::spy_3f90_w)
/* bit 7 = PMC-BK */ /* bit 7 = PMC-BK */
m_pmcbank = (data & 0x80) >> 7; m_pmcbank = (data & 0x80) >> 7;
//logerror("%04x: 3f90_w %02x\n", space.device().safe_pc(), data); //logerror("%04x: 3f90_w %02x\n", m_maincpu->pc(), data);
/* bit 6 = PMC-START */ /* bit 6 = PMC-START */
if ((data & 0x40) && !(m_old_3f90 & 0x40)) if ((data & 0x40) && !(m_old_3f90 & 0x40))
{ {

4
src/mame/drivers/spyhuntertec.cpp
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@ -407,7 +407,7 @@ READ8_MEMBER(spyhuntertec_state::spyhuntertec_in2_r)
*/ */
// printf("%04x spyhuntertec_in2_r\n", space.device().safe_pc()); // printf("%04x spyhuntertec_in2_r\n", m_maincpu->pc());
return (ioport("IN2")->read() & ~0x40) | ((m_analog_count == 0) ? 0x40 : 0x00); return (ioport("IN2")->read() & ~0x40) | ((m_analog_count == 0) ? 0x40 : 0x00);
} }
@ -415,7 +415,7 @@ READ8_MEMBER(spyhuntertec_state::spyhuntertec_in2_r)
READ8_MEMBER(spyhuntertec_state::spyhuntertec_in3_r) READ8_MEMBER(spyhuntertec_state::spyhuntertec_in3_r)
{ {
uint8_t ret = ioport("IN3")->read(); uint8_t ret = ioport("IN3")->read();
// printf("%04x spyhuntertec_in3_r\n", space.device().safe_pc()); // printf("%04x spyhuntertec_in3_r\n",m_maincpu->pc());
return ret; return ret;
} }

30
src/mame/drivers/ssfindo.cpp
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@ -288,14 +288,14 @@ public:
TIMER_CALLBACK_MEMBER(PS7500_Timer0_callback); TIMER_CALLBACK_MEMBER(PS7500_Timer0_callback);
TIMER_CALLBACK_MEMBER(PS7500_Timer1_callback); TIMER_CALLBACK_MEMBER(PS7500_Timer1_callback);
typedef void (ssfindo_state::*speedup_func)(address_space &space); typedef void (ssfindo_state::*speedup_func)();
speedup_func m_speedup; speedup_func m_speedup;
void PS7500_startTimer0(); void PS7500_startTimer0();
void PS7500_startTimer1(); void PS7500_startTimer1();
void PS7500_reset(); void PS7500_reset();
void ssfindo_speedups(address_space& space); void ssfindo_speedups();
void ppcar_speedups(address_space& space); void ppcar_speedups();
}; };
@ -390,20 +390,20 @@ void ssfindo_state::PS7500_reset()
} }
void ssfindo_state::ssfindo_speedups(address_space& space) void ssfindo_state::ssfindo_speedups()
{ {
if (space.device().safe_pc()==0x2d6c8) // ssfindo if (m_maincpu->pc()==0x2d6c8) // ssfindo
space.device().execute().spin_until_time(attotime::from_usec(20)); m_maincpu->spin_until_time(attotime::from_usec(20));
else if (space.device().safe_pc()==0x2d6bc) // ssfindo else if (m_maincpu->pc()==0x2d6bc) // ssfindo
space.device().execute().spin_until_time(attotime::from_usec(20)); m_maincpu->spin_until_time(attotime::from_usec(20));
} }
void ssfindo_state::ppcar_speedups(address_space& space) void ssfindo_state::ppcar_speedups()
{ {
if (space.device().safe_pc()==0x000bc8) // ppcar if (m_maincpu->pc()==0x000bc8) // ppcar
space.device().execute().spin_until_time(attotime::from_usec(20)); m_maincpu->spin_until_time(attotime::from_usec(20));
else if (space.device().safe_pc()==0x000bbc) // ppcar else if (m_maincpu->pc()==0x000bbc) // ppcar
space.device().execute().spin_until_time(attotime::from_usec(20)); m_maincpu->spin_until_time(attotime::from_usec(20));
} }
@ -431,7 +431,7 @@ READ32_MEMBER(ssfindo_state::PS7500_IO_r)
return (m_PS7500_IO[IRQSTA] & m_PS7500_IO[IRQMSKA]) | 0x80; return (m_PS7500_IO[IRQSTA] & m_PS7500_IO[IRQMSKA]) | 0x80;
case IOCR: //TODO: nINT1, OD[n] p.81 case IOCR: //TODO: nINT1, OD[n] p.81
if (m_speedup) (this->*m_speedup)(space); if (m_speedup) (this->*m_speedup)();
if( m_iocr_hack) if( m_iocr_hack)
{ {
@ -505,7 +505,7 @@ WRITE32_MEMBER(ssfindo_state::PS7500_IO_w)
break; break;
case IOCR: case IOCR:
//popmessage("IOLINESW %i = %x @%x\n",offset,data,space.device().safe_pc()); //popmessage("IOLINESW %i = %x @%x\n",offset,data,m_maincpu->pc());
COMBINE_DATA(&m_PS7500_IO[offset]); COMBINE_DATA(&m_PS7500_IO[offset]);
// TODO: correct hook-up // TODO: correct hook-up
m_i2cmem->write_scl((data & 0x01) ? 1 : 0); m_i2cmem->write_scl((data & 0x01) ? 1 : 0);

12
src/mame/drivers/suna8.cpp
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@ -622,7 +622,7 @@ WRITE8_MEMBER(suna8_state::sranger_prot_w)
{ {
/* check code at 0x2ce2 (in sranger), protection is so dire that I can't even exactly /* check code at 0x2ce2 (in sranger), protection is so dire that I can't even exactly
estabilish if what I'm doing can be considered or not a kludge... -AS */ estabilish if what I'm doing can be considered or not a kludge... -AS */
space.write_byte(0xcd99,0xff); m_maincpu->space(AS_PROGRAM).write_byte(0xcd99,0xff);
} }
static ADDRESS_MAP_START( rranger_map, AS_PROGRAM, 8, suna8_state ) static ADDRESS_MAP_START( rranger_map, AS_PROGRAM, 8, suna8_state )
@ -682,7 +682,7 @@ WRITE8_MEMBER(suna8_state::brickzn_sprbank_w)
m_spritebank = (data >> 1) & 1; m_spritebank = (data >> 1) & 1;
logerror("CPU #0 - PC %04X: protection_val = %02X\n",m_maincpu->pc(),data); logerror("CPU #0 - PC %04X: protection_val = %02X\n",m_maincpu->pc(),data);
// if (data & ~0x03) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",space.device().safe_pc(),data); // if (data & ~0x03) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",m_maincpu->pc(),data);
} }
/* /*
@ -811,7 +811,7 @@ WRITE8_MEMBER(suna8_state::brickzn_multi_w)
{ {
// controls opcode decryption // controls opcode decryption
// see code at 71b, 45b7, 7380, 7a6b // see code at 71b, 45b7, 7380, 7a6b
//printf("CPU #0 - PC %04X: alt op-decrypt tog = %02X\n",space.device().safe_pc(),data); //printf("CPU #0 - PC %04X: alt op-decrypt tog = %02X\n",m_maincpu->pc(),data);
m_prot_opcode_toggle ^= 1; m_prot_opcode_toggle ^= 1;
if (m_prot_opcode_toggle == 0) if (m_prot_opcode_toggle == 0)
@ -833,9 +833,9 @@ WRITE8_MEMBER(suna8_state::brickzn_prot2_w)
{ {
// Disable work RAM write, see code at 96a: // Disable work RAM write, see code at 96a:
if ((m_prot2 ^ data) == 0x24) if ((m_prot2 ^ data) == 0x24)
space.unmap_write(0xc800, 0xdfff); m_maincpu->space(AS_PROGRAM).unmap_write(0xc800, 0xdfff);
else else
space.install_ram(0xc800, 0xdfff, m_wram); m_maincpu->space(AS_PROGRAM).install_ram(0xc800, 0xdfff, m_wram);
m_remap_sound = ((m_prot2 ^ data) == 0xf8) ? 1 : 0; m_remap_sound = ((m_prot2 ^ data) == 0xf8) ? 1 : 0;
@ -907,7 +907,7 @@ ADDRESS_MAP_END
WRITE8_MEMBER(suna8_state::hardhea2_nmi_w) WRITE8_MEMBER(suna8_state::hardhea2_nmi_w)
{ {
m_nmi_enable = data & 0x01; m_nmi_enable = data & 0x01;
// if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",space.device().safe_pc(),data); // if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",m_maincpu->pc(),data);
} }
/* /*

4
src/mame/drivers/suprgolf.cpp
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@ -299,7 +299,7 @@ WRITE8_MEMBER(suprgolf_state::rom_bank_select_w)
m_rom_bank = data; m_rom_bank = data;
//popmessage("%08x %02x",((data & 0x3f) * 0x4000),data); //popmessage("%08x %02x",((data & 0x3f) * 0x4000),data);
//osd_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,space.device().safe_pcbase()); //osd_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,m_maincpu->pcbase());
membank("bank2")->set_entry(data & 0x3f); membank("bank2")->set_entry(data & 0x3f);
m_msm_nmi_mask = data & 0x40; m_msm_nmi_mask = data & 0x40;
@ -308,7 +308,7 @@ WRITE8_MEMBER(suprgolf_state::rom_bank_select_w)
WRITE8_MEMBER(suprgolf_state::rom2_bank_select_w) WRITE8_MEMBER(suprgolf_state::rom2_bank_select_w)
{ {
//osd_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,space.device().safe_pcbase()); //osd_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,m_maincpu->pcbase());
membank("bank1")->set_entry(data & 0x0f); membank("bank1")->set_entry(data & 0x0f);
if(data & 0xf0) if(data & 0xf0)

2
src/mame/drivers/system16.cpp
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@ -1351,7 +1351,7 @@ ADDRESS_MAP_END
WRITE16_MEMBER(segas1x_bootleg_state::ddcrewbl_spritebank_w) WRITE16_MEMBER(segas1x_bootleg_state::ddcrewbl_spritebank_w)
{ {
// printf("banking write %08x: %04x (%04x %04x)\n", space.device().safe_pc(), offset*2, data&mem_mask, mem_mask); // printf("banking write %08x: %04x (%04x %04x)\n", m_maincpu->pc(), offset*2, data&mem_mask, mem_mask);
data &= mem_mask; data &= mem_mask;
// offset &= 0x7; // offset &= 0x7;

12
src/mame/drivers/taito_l.cpp
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@ -302,7 +302,7 @@ WRITE8_MEMBER(taitol_state::rombankswitch_w)
logerror("New rom size : %x\n", (m_high + 1) * 0x2000); logerror("New rom size : %x\n", (m_high + 1) * 0x2000);
} }
//logerror("robs %d, %02x (%04x)\n", offset, data, space.device().safe_pc()); //logerror("robs %d, %02x (%04x)\n", offset, data, m_main_cpu->pc());
m_cur_rombank = data; m_cur_rombank = data;
m_main_bnk->set_base(&m_main_prg[0x2000 * m_cur_rombank]); m_main_bnk->set_base(&m_main_prg[0x2000 * m_cur_rombank]);
} }
@ -320,7 +320,7 @@ WRITE8_MEMBER(fhawk_state::rombank2switch_w)
logerror("New rom2 size : %x\n", (m_high2 + 1) * 0x4000); logerror("New rom2 size : %x\n", (m_high2 + 1) * 0x4000);
} }
//logerror("robs2 %02x (%04x)\n", data, space.device().safe_pc()); //logerror("robs2 %02x (%04x)\n", data, m_main_cpu->pc());
m_cur_rombank2 = data; m_cur_rombank2 = data;
m_slave_bnk->set_base(&m_slave_prg[0x4000 * m_cur_rombank2]); m_slave_bnk->set_base(&m_slave_prg[0x4000 * m_cur_rombank2]);
@ -342,7 +342,7 @@ WRITE8_MEMBER(taitol_state::rambankswitch_w)
if (m_cur_rambank[offset] != data) if (m_cur_rambank[offset] != data)
{ {
m_cur_rambank[offset] = data; m_cur_rambank[offset] = data;
//logerror("rabs %d, %02x (%04x)\n", offset, data, space.device().safe_pc()); //logerror("rabs %d, %02x (%04x)\n", offset, data, m_main_cpu->pc());
if (data >= 0x14 && data <= 0x1f) if (data >= 0x14 && data <= 0x1f)
{ {
data -= 0x14; data -= 0x14;
@ -416,12 +416,12 @@ READ8_MEMBER(taitol_1cpu_state::extport_select_and_ym2203_r)
WRITE8_MEMBER(taitol_state::mcu_control_w) WRITE8_MEMBER(taitol_state::mcu_control_w)
{ {
// logerror("mcu control %02x (%04x)\n", data, space.device().safe_pc()); // logerror("mcu control %02x (%04x)\n", data, m_main_cpu->pc());
} }
READ8_MEMBER(taitol_state::mcu_control_r) READ8_MEMBER(taitol_state::mcu_control_r)
{ {
// logerror("mcu control read (%04x)\n", space.device().safe_pc()); // logerror("mcu control read (%04x)\n", m_main_cpu->pc());
return 0x1; return 0x1;
} }
@ -1515,7 +1515,7 @@ WRITE8_MEMBER(fhawk_state::portA_w)
m_cur_audio_bnk = data & 0x03; m_cur_audio_bnk = data & 0x03;
bankaddress = m_cur_audio_bnk * 0x4000; bankaddress = m_cur_audio_bnk * 0x4000;
m_audio_bnk->set_base(&m_audio_prg[bankaddress]); m_audio_bnk->set_base(&m_audio_prg[bankaddress]);
//logerror ("YM2203 bank change val=%02x pc=%04x\n", m_cur_audio_bnk, space.device().safe_pc() ); //logerror ("YM2203 bank change val=%02x %s\n", m_cur_audio_bnk, machine().describe_context() );
} }
} }

2
src/mame/drivers/taito_z.cpp
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@ -993,7 +993,7 @@ void taitoz_state::parse_cpu_control( )
WRITE16_MEMBER(taitoz_state::cpua_ctrl_w) WRITE16_MEMBER(taitoz_state::cpua_ctrl_w)
{ {
//logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data); //logerror("CPU #0 PC %06x: write %04x to cpu control\n", m_maincpu->pc(), data);
if (mem_mask == 0xff00) data >>= 8; if (mem_mask == 0xff00) data >>= 8;
data &= 0xff; data &= 0xff;

2
src/mame/drivers/taitopjc.cpp
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@ -475,7 +475,7 @@ void taitopjc_state::print_display_list()
WRITE64_MEMBER(taitopjc_state::dsp_w) WRITE64_MEMBER(taitopjc_state::dsp_w)
{ {
//logerror("dsp_w: %08X, %08X%08X, %08X%08X at %08X\n", offset, (uint32_t)(data >> 32), (uint32_t)(data), (uint32_t)(mem_mask >> 32), (uint32_t)(mem_mask), space.device().safe_pc()); //logerror("dsp_w: %08X, %08X%08X, %08X%08X at %08X\n", offset, (uint32_t)(data >> 32), (uint32_t)(data), (uint32_t)(mem_mask >> 32), (uint32_t)(mem_mask), m_maincpu->pc());
if (offset == 0x7fe) if (offset == 0x7fe)
{ {

6
src/mame/drivers/taitotz.cpp
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@ -1725,7 +1725,7 @@ WRITE64_MEMBER(taitotz_state::video_chip_w)
case 0xb: case 0xb:
{ {
m_video_ram_ptr = m_video_reg & 0xfffffff; m_video_ram_ptr = m_video_reg & 0xfffffff;
//logerror("video_chip_ram sel %08X at %08X\n", m_video_reg & 0x0fffffff, space.device().safe_pc()); //logerror("video_chip_ram sel %08X at %08X\n", m_video_reg & 0x0fffffff, m_maincpu->pc());
break; break;
} }
case 0x0: case 0x0:
@ -1814,7 +1814,7 @@ WRITE64_MEMBER(taitotz_state::video_fifo_w)
if (m_video_fifo_ptr >= 8) if (m_video_fifo_ptr >= 8)
{ {
m_renderer->push_direct_poly_fifo((uint32_t)(data >> 32)); m_renderer->push_direct_poly_fifo((uint32_t)(data >> 32));
//logerror("FIFO packet w: %08X at %08X\n", (uint32_t)(data >> 32), space.device().safe_pc()); //logerror("FIFO packet w: %08X at %08X\n", (uint32_t)(data >> 32), m_maincpu->pc());
} }
m_video_fifo_ptr++; m_video_fifo_ptr++;
} }
@ -1823,7 +1823,7 @@ WRITE64_MEMBER(taitotz_state::video_fifo_w)
if (m_video_fifo_ptr >= 8) if (m_video_fifo_ptr >= 8)
{ {
m_renderer->push_direct_poly_fifo((uint32_t)(data)); m_renderer->push_direct_poly_fifo((uint32_t)(data));
//logerror("FIFO packet w: %08X at %08X\n", (uint32_t)(data), space.device().safe_pc()); //logerror("FIFO packet w: %08X at %08X\n", (uint32_t)(data), m_maincpu->pc());
} }
m_video_fifo_ptr++; m_video_fifo_ptr++;
} }

4
src/mame/drivers/tandy1t.cpp
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@ -254,7 +254,7 @@ void tandy1000_state::tandy1000_write_eeprom(uint8_t data)
WRITE8_MEMBER( tandy1000_state::pc_t1t_p37x_w ) WRITE8_MEMBER( tandy1000_state::pc_t1t_p37x_w )
{ {
// DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", space.device().safe_pc( ),offset, data)); // DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", m_maincpu->pc( ),offset, data));
if (offset!=4) if (offset!=4)
logerror("T1T_p37x_w %.5x #%d $%02x\n", m_maincpu->pc( ),offset, data); logerror("T1T_p37x_w %.5x #%d $%02x\n", m_maincpu->pc( ),offset, data);
m_tandy_data[offset]=data; m_tandy_data[offset]=data;
@ -269,7 +269,7 @@ WRITE8_MEMBER( tandy1000_state::pc_t1t_p37x_w )
READ8_MEMBER( tandy1000_state::pc_t1t_p37x_r ) READ8_MEMBER( tandy1000_state::pc_t1t_p37x_r )
{ {
int data = m_tandy_data[offset]; int data = m_tandy_data[offset];
// DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", space.device().safe_pc( ), offset, data)); // DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", m_maincpu->pc( ), offset, data));
return data; return data;
} }

2
src/mame/drivers/tecmosys.cpp
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@ -231,7 +231,7 @@ WRITE16_MEMBER(tecmosys_state::unk880000_w)
case 0x22/2: case 0x22/2:
m_watchdog->watchdog_reset(); m_watchdog->watchdog_reset();
//logerror( "watchdog_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, space.device().safe_pc() ); //logerror( "watchdog_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, m_maincpu->_pc() );
break; break;
default: default:

4
src/mame/drivers/tetrisp2.cpp
View File

@ -196,7 +196,7 @@ WRITE16_MEMBER(tetrisp2_state::nndmseal_sound_bank_w)
memcpy(memregion("oki")->base(), rom + (m_bank_lo * 0x80000), 0x20000); memcpy(memregion("oki")->base(), rom + (m_bank_lo * 0x80000), 0x20000);
// logerror("PC:%06X sound bank_lo = %02X\n",space.device().safe_pc(),m_bank_lo); // logerror("PC:%06X sound bank_lo = %02X\n",m_maincpu->pc(),m_bank_lo);
} }
else else
{ {
@ -204,7 +204,7 @@ WRITE16_MEMBER(tetrisp2_state::nndmseal_sound_bank_w)
memcpy(memregion("oki")->base() + 0x20000, rom + (m_bank_lo * 0x80000) + (m_bank_hi * 0x20000), 0x20000); memcpy(memregion("oki")->base() + 0x20000, rom + (m_bank_lo * 0x80000) + (m_bank_hi * 0x20000), 0x20000);
// logerror("PC:%06X sound bank_hi = %02X\n",space.device().safe_pc(),m_bank_hi); // logerror("PC:%06X sound bank_hi = %02X\n",m_maincpu->pc(),m_bank_hi);
} }
} }
} }

4
src/mame/drivers/thunderx.cpp
View File

@ -70,7 +70,7 @@ READ8_MEMBER(thunderx_state::pmc_r)
{ {
if (PMC_BK) if (PMC_BK)
{ {
// logerror("%04x read pmcram %04x\n",space.device().safe_pc(),offset); // logerror("%04x read pmcram %04x\n",m_audiocpu->pc(),offset);
return m_pmcram[offset]; return m_pmcram[offset];
} }
else else
@ -299,7 +299,7 @@ READ8_MEMBER(thunderx_state::_1f98_r)
WRITE8_MEMBER(thunderx_state::thunderx_1f98_w) WRITE8_MEMBER(thunderx_state::thunderx_1f98_w)
{ {
// logerror("%04x: 1f98_w %02x\n", space.device().safe_pc(),data); // logerror("%04x: 1f98_w %02x\n", m_maincpu->pc(),data);
// bit 0 = enable char ROM reading through the video RAM // bit 0 = enable char ROM reading through the video RAM
m_k052109->set_rmrd_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE); m_k052109->set_rmrd_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);

4
src/mame/drivers/trvmadns.cpp
View File

@ -239,12 +239,12 @@ WRITE8_MEMBER(trvmadns_state::trvmadns_tileram_w)
{ {
if(offset==0) if(offset==0)
{ {
if(m_maincpu->pcbase()==0x29e9)// || space.device().safe_pcbase()==0x1b3f) //29f5 if(m_maincpu->pcbase()==0x29e9)// || m_maincpu->pcbase()==0x1b3f) //29f5
{ {
m_maincpu->set_input_line(0, HOLD_LINE); m_maincpu->set_input_line(0, HOLD_LINE);
} }
// else // else
// logerror("%x \n", space.device().safe_pcbase()); // logerror("%x \n", m_maincpu->pcbase());
} }

14
src/mame/drivers/ttchamp.cpp
View File

@ -279,7 +279,7 @@ WRITE16_MEMBER(ttchamp_state::paldat_w)
READ16_MEMBER(ttchamp_state::pic_r) READ16_MEMBER(ttchamp_state::pic_r)
{ {
// printf("%06x: read from PIC (%04x)\n", space.device().safe_pc(),mem_mask); // printf("%06x: read from PIC (%04x)\n", m_maincpu->pc(),mem_mask);
if (m_picmodex == picmode::SET_READLATCH) if (m_picmodex == picmode::SET_READLATCH)
{ {
// printf("read data %02x from %02x\n", m_pic_latched, m_pic_readaddr); // printf("read data %02x from %02x\n", m_pic_latched, m_pic_readaddr);
@ -294,7 +294,7 @@ READ16_MEMBER(ttchamp_state::pic_r)
WRITE16_MEMBER(ttchamp_state::pic_w) WRITE16_MEMBER(ttchamp_state::pic_w)
{ {
// printf("%06x: write to PIC %04x (%04x) (%d)\n", space.device().safe_pc(),data,mem_mask, m_picmodex); // printf("%06x: write to PIC %04x (%04x) (%d)\n", m_maincpu->pc(),data,mem_mask, m_picmodex);
if (m_picmodex == picmode::IDLE) if (m_picmodex == picmode::IDLE)
{ {
if (data == 0x11) if (data == 0x11)
@ -406,7 +406,7 @@ WRITE16_MEMBER(ttchamp_state::mem_w)
if (m_spritesinit == 1) if (m_spritesinit == 1)
{ {
// printf("%06x: spider_blitter_w %08x %04x %04x (init?) (base?)\n", space.device().safe_pc(), offset * 2, data, mem_mask); // printf("%06x: spider_blitter_w %08x %04x %04x (init?) (base?)\n", m_maincpu->pc(), offset * 2, data, mem_mask);
m_spritesinit = 2; m_spritesinit = 2;
m_spritesaddr = offset; m_spritesaddr = offset;
@ -414,7 +414,7 @@ WRITE16_MEMBER(ttchamp_state::mem_w)
} }
else if (m_spritesinit == 2) else if (m_spritesinit == 2)
{ {
// printf("%06x: spider_blitter_w %08x %04x %04x (init2) (width?)\n", space.device().safe_pc(), offset * 2, data, mem_mask); // printf("%06x: spider_blitter_w %08x %04x %04x (init2) (width?)\n", m_maincpu->pc(), offset * 2, data, mem_mask);
m_spriteswidth = offset & 0xff; m_spriteswidth = offset & 0xff;
//printf("%08x\n",(offset*2) & 0xfff00); //printf("%08x\n",(offset*2) & 0xfff00);
@ -448,7 +448,7 @@ WRITE16_MEMBER(ttchamp_state::mem_w)
if (m_rombank) if (m_rombank)
src += 0x100000; src += 0x100000;
// printf("%06x: spider_blitter_w %08x %04x %04x (previous data width %d address %08x)\n", space.device().safe_pc(), offset * 2, data, mem_mask, m_spriteswidth, m_spritesaddr); // printf("%06x: spider_blitter_w %08x %04x %04x (previous data width %d address %08x)\n", m_maincpu->pc(), offset * 2, data, mem_mask, m_spriteswidth, m_spritesaddr);
offset &= 0x7fff; offset &= 0x7fff;
for (int i = 0; i < m_spriteswidth; i++) for (int i = 0; i < m_spriteswidth; i++)
@ -530,14 +530,14 @@ WRITE16_MEMBER(ttchamp_state::port10_w)
/* selects upper bank for the blitter */ /* selects upper bank for the blitter */
WRITE16_MEMBER(ttchamp_state::port20_w) WRITE16_MEMBER(ttchamp_state::port20_w)
{ {
//printf("%06x: port20_w %04x %04x\n", space.device().safe_pc(), data, mem_mask); //printf("%06x: port20_w %04x %04x\n", m_maincpu->pc(), data, mem_mask);
m_rombank = 1; m_rombank = 1;
} }
/* selects lower bank for the blitter */ /* selects lower bank for the blitter */
WRITE16_MEMBER(ttchamp_state::port62_w) WRITE16_MEMBER(ttchamp_state::port62_w)
{ {
//printf("%06x: port62_w %04x %04x\n", space.device().safe_pc(), data, mem_mask); //printf("%06x: port62_w %04x %04x\n", m_maincpu->pc(), data, mem_mask);
m_rombank = 0; m_rombank = 0;
} }

4
src/mame/drivers/tumbleb.cpp
View File

@ -741,7 +741,7 @@ WRITE16_MEMBER(tumbleb_state::semicom_soundcmd_w)
{ {
m_soundlatch->write(space, 0, data & 0xff); m_soundlatch->write(space, 0, data & 0xff);
// needed for Super Trio which reads the sound with polling // needed for Super Trio which reads the sound with polling
// space.device().execute().spin_until_time(attotime::from_usec(100)); // m_maincpu->spin_until_time(attotime::from_usec(100));
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20)); machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
} }
@ -3502,7 +3502,7 @@ DRIVER_INIT_MEMBER(tumbleb_state,fncywld)
READ16_MEMBER(tumbleb_state::bcstory_1a0_read) READ16_MEMBER(tumbleb_state::bcstory_1a0_read)
{ {
//osd_printf_debug("bcstory_io %06x\n",space.device().safe_pc()); //osd_printf_debug("bcstory_io %06x\n",m_maincpu->pc());
if (m_maincpu->pc()==0x0560) return 0x1a0; if (m_maincpu->pc()==0x0560) return 0x1a0;
else return ioport("SYSTEM")->read(); else return ioport("SYSTEM")->read();

4
src/mame/drivers/twins.cpp
View File

@ -130,7 +130,7 @@ void twins_state::machine_start()
READ16_MEMBER(twins_state::twins_port4_r) READ16_MEMBER(twins_state::twins_port4_r)
{ {
// doesn't work?? // doesn't work??
// printf("%08x: twins_port4_r %04x\n", space.device().safe_pc(), mem_mask); // printf("%08x: twins_port4_r %04x\n", m_maincpu->pc(), mem_mask);
// return m_i2cmem->read_sda();// | 0xfffe; // return m_i2cmem->read_sda();// | 0xfffe;
return 0x0001; return 0x0001;
@ -138,7 +138,7 @@ READ16_MEMBER(twins_state::twins_port4_r)
WRITE16_MEMBER(twins_state::twins_port4_w) WRITE16_MEMBER(twins_state::twins_port4_w)
{ {
// printf("%08x: twins_port4_w %04x %04x\n", space.device().safe_pc(), data, mem_mask); // printf("%08x: twins_port4_w %04x %04x\n", m_maincpu->pc(), data, mem_mask);
int i2c_clk = BIT(data, 1); int i2c_clk = BIT(data, 1);
int i2c_mem = BIT(data, 0); int i2c_mem = BIT(data, 0);
m_i2cmem->write_scl(i2c_clk); m_i2cmem->write_scl(i2c_clk);

4
src/mame/drivers/vball.cpp
View File

@ -186,13 +186,13 @@ WRITE8_MEMBER(vball_state::scrollx_hi_w)
m_scrollx_hi = (data & 0x02) << 7; m_scrollx_hi = (data & 0x02) << 7;
bgprombank_w((data >> 2) & 0x07); bgprombank_w((data >> 2) & 0x07);
spprombank_w((data >> 5) & 0x07); spprombank_w((data >> 5) & 0x07);
//logerror("%04x: scrollx_hi = %d\n", space.device().safe_pcbase(), m_scrollx_hi); //logerror("%04x: scrollx_hi = %d\n", m_maincpu->pcbase(), m_scrollx_hi);
} }
WRITE8_MEMBER(vball_state::scrollx_lo_w) WRITE8_MEMBER(vball_state::scrollx_lo_w)
{ {
m_scrollx_lo = data; m_scrollx_lo = data;
//logerror("%04x: scrollx_lo =%d\n", space.device().safe_pcbase(), m_scrollx_lo); //logerror("%04x: scrollx_lo =%d\n", m_maincpu->pcbase(), m_scrollx_lo);
} }

2
src/mame/drivers/vegas.cpp
View File

@ -770,7 +770,7 @@ WRITE8_MEMBER(vegas_state::sio_w)
m_timekeeper->watchdog_write(space, offset, data); m_timekeeper->watchdog_write(space, offset, data);
if (0 && LOG_SIO) if (0 && LOG_SIO)
logerror("sio_w: Watchdog: %08x index: %d data: %02X\n", offset, index, data); logerror("sio_w: Watchdog: %08x index: %d data: %02X\n", offset, index, data);
//space.device().execute().eat_cycles(100); //m_maincpu->eat_cycles(100);
break; break;
} }
} }

8
src/mame/drivers/viper.cpp
View File

@ -1722,7 +1722,7 @@ READ64_MEMBER(viper_state::voodoo3_io_r)
} }
WRITE64_MEMBER(viper_state::voodoo3_io_w) WRITE64_MEMBER(viper_state::voodoo3_io_w)
{ {
// printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, space.device().safe_pc()); // printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, m_maincpu->pc());
write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_io_w), &(*m_voodoo)), space, offset, data, mem_mask); write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_io_w), &(*m_voodoo)), space, offset, data, mem_mask);
} }
@ -1733,7 +1733,7 @@ READ64_MEMBER(viper_state::voodoo3_r)
} }
WRITE64_MEMBER(viper_state::voodoo3_w) WRITE64_MEMBER(viper_state::voodoo3_w)
{ {
// printf("voodoo3_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, space.device().safe_pc()); // printf("voodoo3_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, m_maincpu->pc());
write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_w), &(*m_voodoo)), space, offset, data, mem_mask); write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_w), &(*m_voodoo)), space, offset, data, mem_mask);
} }
@ -1744,7 +1744,7 @@ READ64_MEMBER(viper_state::voodoo3_lfb_r)
} }
WRITE64_MEMBER(viper_state::voodoo3_lfb_w) WRITE64_MEMBER(viper_state::voodoo3_lfb_w)
{ {
// printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, space.device().safe_pc()); // printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (uint32_t)(data >> 32), (uint32_t)(data), offset, m_maincpu->pc());
write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_fb_w), &(*m_voodoo)), space, offset, data, mem_mask); write64be_with_32le_device_handler(write32_delegate(FUNC(voodoo_3_device::banshee_fb_w), &(*m_voodoo)), space, offset, data, mem_mask);
} }
@ -1945,7 +1945,7 @@ WRITE64_MEMBER(viper_state::e70000_w)
m_ds2430_timer->adjust(attotime::from_usec(40), 1); // presence pulse for 240 microsecs m_ds2430_timer->adjust(attotime::from_usec(40), 1); // presence pulse for 240 microsecs
m_ds2430_unk_status = 1; m_ds2430_unk_status = 1;
// printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (uint32_t)(data >> 32), (uint32_t)data, offset, (uint32_t)(mem_mask >> 32), (uint32_t)mem_mask, space.device().safe_pc()); // printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (uint32_t)(data >> 32), (uint32_t)data, offset, (uint32_t)(mem_mask >> 32), (uint32_t)mem_mask, m_maincpu->pc());
} }
else else
{ {

15
src/mame/drivers/wecleman.cpp
View File

@ -334,7 +334,7 @@ WRITE16_MEMBER(wecleman_state::irqctrl_w)
{ {
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
{ {
// logerror("CPU #0 - PC = %06X - $140005 <- %02X (old value: %02X)\n",space.device().safe_pc(), data&0xFF, old_data&0xFF); // logerror("CPU #0 - PC = %06X - $140005 <- %02X (old value: %02X)\n",m_maincpu->pc(), data&0xFF, old_data&0xFF);
// Bit 0 : SUBINT // Bit 0 : SUBINT
if ( (m_irqctrl & 1) && (!(data & 1)) ) // 1->0 transition if ( (m_irqctrl & 1) && (!(data & 1)) ) // 1->0 transition
@ -435,6 +435,7 @@ WRITE16_MEMBER(wecleman_state::blitter_w)
/* do a blit if $80010.b has been written */ /* do a blit if $80010.b has been written */
if ( (offset == 0x10/2) && (ACCESSING_BITS_8_15) ) if ( (offset == 0x10/2) && (ACCESSING_BITS_8_15) )
{ {
auto &mspace = m_maincpu->space(AS_PROGRAM);
/* 80000.b = ?? usually 0 - other values: 02 ; 00 - ? logic function ? */ /* 80000.b = ?? usually 0 - other values: 02 ; 00 - ? logic function ? */
/* 80001.b = ?? usually 0 - other values: 3f ; 01 - ? height ? */ /* 80001.b = ?? usually 0 - other values: 3f ; 01 - ? height ? */
int minterm = ( m_blitter_regs[0x0/2] & 0xFF00 ) >> 8; int minterm = ( m_blitter_regs[0x0/2] & 0xFF00 ) >> 8;
@ -467,7 +468,7 @@ WRITE16_MEMBER(wecleman_state::blitter_w)
for ( ; size > 0 ; size--) for ( ; size > 0 ; size--)
{ {
/* maybe slower than a memcpy but safer (and errors are logged) */ /* maybe slower than a memcpy but safer (and errors are logged) */
space.write_word(dest, space.read_word(src)); mspace.write_word(dest, mspace.read_word(src));
src += 2; src += 2;
dest += 2; dest += 2;
} }
@ -480,23 +481,23 @@ WRITE16_MEMBER(wecleman_state::blitter_w)
int i, j, destptr; int i, j, destptr;
/* Read offset of source from the list of blits */ /* Read offset of source from the list of blits */
i = src + space.read_word(list+2); i = src + mspace.read_word(list+2);
j = i + (size<<1); j = i + (size<<1);
destptr = dest; destptr = dest;
for (; i<j; destptr+=2, i+=2) for (; i<j; destptr+=2, i+=2)
space.write_word(destptr, space.read_word(i)); mspace.write_word(destptr, mspace.read_word(i));
destptr = dest + 14; destptr = dest + 14;
i = space.read_word(list) + m_spr_color_offs; i = mspace.read_word(list) + m_spr_color_offs;
space.write_word(destptr, i); mspace.write_word(destptr, i);
dest += 16; dest += 16;
list += 4; list += 4;
} }
/* hack for the blit to Sprites RAM - Sprite list end-marker */ /* hack for the blit to Sprites RAM - Sprite list end-marker */
space.write_word(dest, 0xFFFF); mspace.write_word(dest, 0xFFFF);
} }
} }
} }

2
src/mame/drivers/wgp.cpp
View File

@ -499,7 +499,7 @@ WRITE16_MEMBER(wgp_state::rotate_port_w)
{ {
case 0x00: case 0x00:
{ {
//logerror("CPU #0 PC %06x: warning - port %04x write %04x\n",space.device().safe_pc(),port_sel,data); //logerror("CPU #0 PC %06x: warning - port %04x write %04x\n",m_maincpu->pc(),port_sel,data);
m_rotate_ctrl[m_port_sel] = data; m_rotate_ctrl[m_port_sel] = data;
return; return;

2
src/mame/includes/segas32.h
View File

@ -183,7 +183,7 @@ public:
uint32_t multi32_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int index); uint32_t multi32_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int index);
void update_irq_state(); void update_irq_state();
void signal_v60_irq(int which); void signal_v60_irq(int which);
void int_control_w(address_space &space, int offset, uint8_t data); void int_control_w(int offset, uint8_t data);
void update_sound_irq_state(); void update_sound_irq_state();
void segas32_common_init(); void segas32_common_init();
void radm_sw1_output( int which, uint16_t data ); void radm_sw1_output( int which, uint16_t data );

10
src/mame/machine/archimds.cpp
View File

@ -508,7 +508,7 @@ bool archimedes_state::check_floppy_ready()
READ32_MEMBER( archimedes_state::ioc_ctrl_r ) READ32_MEMBER( archimedes_state::ioc_ctrl_r )
{ {
if(IOC_LOG) if(IOC_LOG)
logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], m_ioc_regs[offset&0x1f], m_maincpu->pc(),offset & 0x1f); logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], m_ioc_regs[offset&0x1f], m_maincpu->pc(),offset & 0x1f);
switch (offset & 0x1f) switch (offset & 0x1f)
{ {
@ -575,7 +575,7 @@ READ32_MEMBER( archimedes_state::ioc_ctrl_r )
case T3_LATCH_HI: return (m_ioc_timerout[3]>>8)&0xff; case T3_LATCH_HI: return (m_ioc_timerout[3]>>8)&0xff;
default: default:
if(!IOC_LOG) if(!IOC_LOG)
logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], m_ioc_regs[offset&0x1f], space.device() .safe_pc( ),offset & 0x1f); logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], m_ioc_regs[offset&0x1f], m_maincpu->pc(), offset & 0x1f);
break; break;
} }
@ -586,7 +586,7 @@ READ32_MEMBER( archimedes_state::ioc_ctrl_r )
WRITE32_MEMBER( archimedes_state::ioc_ctrl_w ) WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
{ {
if(IOC_LOG) if(IOC_LOG)
logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space.device() .safe_pc( )); logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], m_maincpu->pc());
switch (offset&0x1f) switch (offset&0x1f)
{ {
@ -704,7 +704,7 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
default: default:
if(!IOC_LOG) if(!IOC_LOG)
logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space.device() .safe_pc( )); logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], m_maincpu->pc());
m_ioc_regs[offset&0x1f] = data & 0xff; m_ioc_regs[offset&0x1f] = data & 0xff;
break; break;
@ -1216,5 +1216,5 @@ WRITE32_MEMBER(archimedes_state::archimedes_memc_page_w)
// now go ahead and set the mapping in the page table // now go ahead and set the mapping in the page table
m_memc_pages[log] = phys + (memc*0x80); m_memc_pages[log] = phys + (memc*0x80);
// printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", space.device().safe_pc(),memc_pagesize, data, log, phys, memc, perms); // printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", m_maincpu->pc(),memc_pagesize, data, log, phys, memc, perms);
} }

6
src/mame/machine/bonzeadv.cpp
View File

@ -380,8 +380,8 @@ WRITE16_MEMBER(asuka_state::bonzeadv_cchip_bank_w)
WRITE16_MEMBER(asuka_state::bonzeadv_cchip_ram_w) WRITE16_MEMBER(asuka_state::bonzeadv_cchip_ram_w)
{ {
// if (space.device().safe_pc()!=0xa028) // if (m_maincpu->pc()!=0xa028)
// logerror("%08x: write %04x %04x cchip\n", space.device().safe_pc(), offset, data); // logerror("%08x: write %04x %04x cchip\n", m_maincpu->pc(), offset, data);
data &= mem_mask; data &= mem_mask;
if (m_current_bank == 0) if (m_current_bank == 0)
@ -435,7 +435,7 @@ READ16_MEMBER(asuka_state::bonzeadv_cchip_ctrl_r)
READ16_MEMBER(asuka_state::bonzeadv_cchip_ram_r) READ16_MEMBER(asuka_state::bonzeadv_cchip_ram_r)
{ {
// logerror("%08x: read %04x cchip\n", space.device().safe_pc(), offset); // logerror("%08x: read %04x cchip\n", m_maincpu->pc(), offset);
if (m_current_bank == 0) if (m_current_bank == 0)
{ {

44
src/mame/machine/bublbobl.cpp
View File

@ -22,7 +22,7 @@ void bublbobl_state::common_sreset(int state)
if (m_ym2203 != nullptr) m_ym2203->reset(); // ym2203, if present, is reset if (m_ym2203 != nullptr) m_ym2203->reset(); // ym2203, if present, is reset
if (m_ym3526 != nullptr) m_ym3526->reset(); // ym3526, if present, is reset if (m_ym3526 != nullptr) m_ym3526->reset(); // ym3526, if present, is reset
m_audiocpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); // if a sound irq is active, it is cleared. is this necessary? if the above two devices de-assert /IRQ on reset (as a device_line write) properly, it shouldn't be... m_audiocpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); // if a sound irq is active, it is cleared. is this necessary? if the above two devices de-assert /IRQ on reset (as a device_line write) properly, it shouldn't be...
m_sound_to_main->acknowledge_w(m_audiocpu->device_t::memory().space(AS_PROGRAM), 0, 0x00, 0xFF); // sound->main semaphore is cleared m_sound_to_main->acknowledge_w(m_audiocpu->space(AS_PROGRAM), 0, 0x00, 0xFF); // sound->main semaphore is cleared
m_soundnmi->in_w<0>(0); // sound nmi enable is unset m_soundnmi->in_w<0>(0); // sound nmi enable is unset
} }
m_audiocpu->set_input_line(INPUT_LINE_RESET, state); // soundcpu is reset m_audiocpu->set_input_line(INPUT_LINE_RESET, state); // soundcpu is reset
@ -203,14 +203,14 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_ddr4_w)
READ8_MEMBER(bublbobl_state::bublbobl_mcu_port1_r) READ8_MEMBER(bublbobl_state::bublbobl_mcu_port1_r)
{ {
//logerror("%04x: 6801U4 port 1 read\n", space.device().safe_pc()); //logerror("%04x: 6801U4 port 1 read\n", m_mcu->pc());
m_port1_in = ioport("IN0")->read(); m_port1_in = ioport("IN0")->read();
return (m_port1_out & m_ddr1) | (m_port1_in & ~m_ddr1); return (m_port1_out & m_ddr1) | (m_port1_in & ~m_ddr1);
} }
WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port1_w) WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port1_w)
{ {
//logerror("%04x: 6801U4 port 1 write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 6801U4 port 1 write %02x\n", m_mcu->pc(), data);
// bit 4: coin lockout // bit 4: coin lockout
machine().bookkeeping().coin_lockout_global_w(~data & 0x10); machine().bookkeeping().coin_lockout_global_w(~data & 0x10);
@ -233,13 +233,13 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port1_w)
READ8_MEMBER(bublbobl_state::bublbobl_mcu_port2_r) READ8_MEMBER(bublbobl_state::bublbobl_mcu_port2_r)
{ {
//logerror("%04x: 6801U4 port 2 read\n", space.device().safe_pc()); //logerror("%04x: 6801U4 port 2 read\n", m_mcu->pc());
return (m_port2_out & m_ddr2) | (m_port2_in & ~m_ddr2); return (m_port2_out & m_ddr2) | (m_port2_in & ~m_ddr2);
} }
WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port2_w) WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port2_w)
{ {
//logerror("%04x: 6801U4 port 2 write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 6801U4 port 2 write %02x\n", m_mcu->pc(), data);
static const char *const portnames[] = { "DSW0", "DSW1", "IN1", "IN2" }; static const char *const portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
// bits 0-3: bits 8-11 of shared RAM address // bits 0-3: bits 8-11 of shared RAM address
@ -273,25 +273,25 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port2_w)
READ8_MEMBER(bublbobl_state::bublbobl_mcu_port3_r) READ8_MEMBER(bublbobl_state::bublbobl_mcu_port3_r)
{ {
//logerror("%04x: 6801U4 port 3 read\n", space.device().safe_pc()); //logerror("%04x: 6801U4 port 3 read\n", m_mcu->pc());
return (m_port3_out & m_ddr3) | (m_port3_in & ~m_ddr3); return (m_port3_out & m_ddr3) | (m_port3_in & ~m_ddr3);
} }
WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port3_w) WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port3_w)
{ {
//logerror("%04x: 6801U4 port 3 write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 6801U4 port 3 write %02x\n", m_mcu->pc(), data);
m_port3_out = data; m_port3_out = data;
} }
READ8_MEMBER(bublbobl_state::bublbobl_mcu_port4_r) READ8_MEMBER(bublbobl_state::bublbobl_mcu_port4_r)
{ {
//logerror("%04x: 6801U4 port 4 read\n", space.device().safe_pc()); //logerror("%04x: 6801U4 port 4 read\n", m_mcu->pc());
return (m_port4_out & m_ddr4) | (m_port4_in & ~m_ddr4); return (m_port4_out & m_ddr4) | (m_port4_in & ~m_ddr4);
} }
WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port4_w) WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port4_w)
{ {
//logerror("%04x: 6801U4 port 4 write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 6801U4 port 4 write %02x\n", m_mcu->pc(), data);
// bits 0-7 of shared RAM address // bits 0-7 of shared RAM address
@ -310,7 +310,7 @@ in boblbobl, so they don't matter. All checks are patched out in sboblbob.
READ8_MEMBER(bublbobl_state::boblbobl_ic43_a_r) READ8_MEMBER(bublbobl_state::boblbobl_ic43_a_r)
{ {
// if (offset >= 2) // if (offset >= 2)
// logerror("%04x: ic43_a_r (offs %d) res = %02x\n", space.device().safe_pc(), offset, res); // logerror("%04x: ic43_a_r (offs %d) res = %02x\n", m_mcu->pc(), offset, res);
if (offset == 0) if (offset == 0)
return m_ic43_a << 4; return m_ic43_a << 4;
@ -360,13 +360,13 @@ WRITE8_MEMBER(bublbobl_state::boblbobl_ic43_b_w)
{ {
static const int xorval[4] = { 4, 1, 8, 2 }; static const int xorval[4] = { 4, 1, 8, 2 };
// logerror("%04x: ic43_b_w (offs %d) %02x\n", space.device().safe_pc(), offset, data); // logerror("%04x: ic43_b_w (offs %d) %02x\n", m_mcu->pc(), offset, data);
m_ic43_b = (data >> 4) ^ xorval[offset]; m_ic43_b = (data >> 4) ^ xorval[offset];
} }
READ8_MEMBER(bublbobl_state::boblbobl_ic43_b_r) READ8_MEMBER(bublbobl_state::boblbobl_ic43_b_r)
{ {
// logerror("%04x: ic43_b_r (offs %d)\n", space.device().safe_pc(), offset); // logerror("%04x: ic43_b_r (offs %d)\n", m_mcu->pc(), offset);
if (offset == 0) if (offset == 0)
return m_ic43_b << 4; return m_ic43_b << 4;
else else
@ -394,7 +394,7 @@ INTERRUPT_GEN_MEMBER(bub68705_state::bublbobl_m68705_interrupt)
WRITE8_MEMBER(bub68705_state::port_a_w) WRITE8_MEMBER(bub68705_state::port_a_w)
{ {
//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 68705 port A write %02x\n", m_mcu->pc(), data);
m_port_a_out = data; m_port_a_out = data;
} }
@ -421,7 +421,7 @@ WRITE8_MEMBER(bub68705_state::port_a_w)
WRITE8_MEMBER(bub68705_state::port_b_w) WRITE8_MEMBER(bub68705_state::port_b_w)
{ {
//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data); //logerror("%04x: 68705 port B write %02x\n", m_mcu->pc(), data);
if (BIT(mem_mask, 0) && !BIT(data, 0) && BIT(m_port_b_out, 0)) if (BIT(mem_mask, 0) && !BIT(data, 0) && BIT(m_port_b_out, 0))
m_mcu->pa_w(space, 0, m_latch); m_mcu->pa_w(space, 0, m_latch);
@ -429,7 +429,7 @@ WRITE8_MEMBER(bub68705_state::port_b_w)
if (BIT(mem_mask, 1) && BIT(data, 1) && !BIT(m_port_b_out, 1)) /* positive edge trigger */ if (BIT(mem_mask, 1) && BIT(data, 1) && !BIT(m_port_b_out, 1)) /* positive edge trigger */
{ {
m_address = (m_address & 0xff00) | m_port_a_out; m_address = (m_address & 0xff00) | m_port_a_out;
//logerror("%04x: 68705 address %02x\n", space.device().safe_pc(), m_port_a_out); //logerror("%04x: 68705 address %02x\n", m_mcu->pc(), m_port_a_out);
} }
if (BIT(mem_mask, 2) && BIT(data, 2) && !BIT(m_port_b_out, 2)) /* positive edge trigger */ if (BIT(mem_mask, 2) && BIT(data, 2) && !BIT(m_port_b_out, 2)) /* positive edge trigger */
@ -441,29 +441,29 @@ WRITE8_MEMBER(bub68705_state::port_b_w)
{ {
if ((m_address & 0x0800) == 0x0000) if ((m_address & 0x0800) == 0x0000)
{ {
//logerror("%04x: 68705 read input port %02x\n", space.device().safe_pc(), m_address); //logerror("%04x: 68705 read input port %02x\n", m_mcu->pc(), m_address);
m_latch = m_mux_ports[m_address & 3]->read(); m_latch = m_mux_ports[m_address & 3]->read();
} }
else if ((m_address & 0x0c00) == 0x0c00) else if ((m_address & 0x0c00) == 0x0c00)
{ {
//logerror("%04x: 68705 read %02x from address %04x\n", space.device().safe_pc(), m_mcu_sharedram[m_address], m_address); //logerror("%04x: 68705 read %02x from address %04x\n", m_mcu->pc(), m_mcu_sharedram[m_address], m_address);
m_latch = m_mcu_sharedram[m_address & 0x03ff]; m_latch = m_mcu_sharedram[m_address & 0x03ff];
} }
else else
{ {
logerror("%04x: 68705 unknown read address %04x\n", space.device().safe_pc(), m_address); logerror("%04x: 68705 unknown read address %04x\n", m_mcu->pc(), m_address);
} }
} }
else /* write */ else /* write */
{ {
if ((m_address & 0x0c00) == 0x0c00) if ((m_address & 0x0c00) == 0x0c00)
{ {
//logerror("%04x: 68705 write %02x to address %04x\n", space.device().safe_pc(), m_port_a_out, m_address); //logerror("%04x: 68705 write %02x to address %04x\n", m_mcu->pc(), m_port_a_out, m_address);
m_mcu_sharedram[m_address & 0x03ff] = m_port_a_out; m_mcu_sharedram[m_address & 0x03ff] = m_port_a_out;
} }
else else
{ {
logerror("%04x: 68705 unknown write to address %04x\n", space.device().safe_pc(), m_address); logerror("%04x: 68705 unknown write to address %04x\n", m_mcu->pc(), m_address);
} }
} }
} }
@ -478,10 +478,10 @@ WRITE8_MEMBER(bub68705_state::port_b_w)
} }
if (BIT(mem_mask, 6) && !BIT(data, 6) && BIT(m_port_b_out, 6)) if (BIT(mem_mask, 6) && !BIT(data, 6) && BIT(m_port_b_out, 6))
logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data); logerror("%04x: 68705 unknown port B bit %02x\n", m_mcu->pc(), data);
if (BIT(mem_mask, 7) && !BIT(data, 7) && BIT(m_port_b_out, 7)) if (BIT(mem_mask, 7) && !BIT(data, 7) && BIT(m_port_b_out, 7))
logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data); logerror("%04x: 68705 unknown port B bit %02x\n", m_mcu->pc(), data);
m_port_b_out = data; m_port_b_out = data;
} }

8
src/mame/machine/dec0.cpp
View File

@ -39,7 +39,7 @@ READ16_MEMBER(dec0_state::dec0_controls_r)
return ioport("DSW")->read(); return ioport("DSW")->read();
case 8: /* Intel 8751 mc, Bad Dudes & Heavy Barrel only */ case 8: /* Intel 8751 mc, Bad Dudes & Heavy Barrel only */
//logerror("CPU #0 PC %06x: warning - read i8751 %06x - %04x\n", space.device().safe_pc(), 0x30c000+offset, m_i8751_return); //logerror("CPU #0 PC %06x: warning - read i8751 %06x - %04x\n", m_maincpu->pc(), 0x30c000+offset, m_i8751_return);
return m_i8751_return; return m_i8751_return;
} }
@ -104,7 +104,7 @@ WRITE8_MEMBER(dec0_state::hippodrm_prot_w)
READ16_MEMBER(dec0_state::hippodrm_68000_share_r) READ16_MEMBER(dec0_state::hippodrm_68000_share_r)
{ {
if (offset==0) space.device().execute().yield(); /* A wee helper */ if (offset==0) m_maincpu->yield(); /* A wee helper */
return m_hippodrm_shared_ram[offset]&0xff; return m_hippodrm_shared_ram[offset]&0xff;
} }
@ -319,14 +319,14 @@ WRITE16_MEMBER(dec0_state::sprite_mirror_w)
READ16_MEMBER(dec0_state::robocop_68000_share_r) READ16_MEMBER(dec0_state::robocop_68000_share_r)
{ {
//logerror("%08x: Share read %04x\n",space.device().safe_pc(),offset); //logerror("%08x: Share read %04x\n",m_maincpu->pc(),offset);
return m_robocop_shared_ram[offset]; return m_robocop_shared_ram[offset];
} }
WRITE16_MEMBER(dec0_state::robocop_68000_share_w) WRITE16_MEMBER(dec0_state::robocop_68000_share_w)
{ {
// logerror("%08x: Share write %04x %04x\n",space.device().safe_pc(),offset,data); // logerror("%08x: Share write %04x %04x\n",m_maincpu->pc(),offset,data);
m_robocop_shared_ram[offset]=data&0xff; m_robocop_shared_ram[offset]=data&0xff;

2
src/mame/machine/flstory.cpp
View File

@ -97,7 +97,7 @@ WRITE8_MEMBER(flstory_state::victnine_mcu_w)
READ8_MEMBER(flstory_state::victnine_mcu_r) READ8_MEMBER(flstory_state::victnine_mcu_r)
{ {
//logerror("%04x: mcu read (0x%02x)\n", space.device().safe_pcbase(), m_from_mcu); //logerror("%04x: mcu read (0x%02x)\n", m_maincpu->pcbase(), m_from_mcu);
return m_from_mcu - VICTNINE_MCU_SEED; return m_from_mcu - VICTNINE_MCU_SEED;
} }

8
src/mame/machine/igs025.cpp
View File

@ -146,7 +146,7 @@ WRITE16_MEMBER(igs025_device::killbld_igs025_prot_w )
break; break;
// default: // default:
// logerror("%06X: ASIC25 W CMD %X VAL %X\n", space.device().safe_pc(), m_kb_cmd, data); // logerror("%s: ASIC25 W CMD %X VAL %X\n", machine().describe_context(), m_kb_cmd, data);
} }
} }
} }
@ -239,7 +239,7 @@ WRITE16_MEMBER(igs025_device::drgw2_d80000_protection_w )
// break; // break;
// default: // default:
// logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_kb_cmd, data); // logerror("%s: warning, writing to igs003_reg %02x = %02x\n", machine().describe_context(), m_kb_cmd, data);
} }
} }
@ -291,7 +291,7 @@ READ16_MEMBER(igs025_device::killbld_igs025_prot_r)
return 0; // Read and then discarded return 0; // Read and then discarded
// default: // default:
// logerror("%06X: ASIC25 R CMD %X\n", space.device().safe_pc(), m_kb_cmd); // logerror("%s: ASIC25 R CMD %X\n", machine().describe_context(), m_kb_cmd);
// drgw2 notes // drgw2 notes
// case 0x13: // Read to $80eeb8 // case 0x13: // Read to $80eeb8
@ -302,7 +302,7 @@ READ16_MEMBER(igs025_device::killbld_igs025_prot_r)
// return 0; // return 0;
// default: // default:
// logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_kb_cmd); // logerror("%s: warning, reading with igs003_reg = %02x\n", machine().describe_context(), m_kb_cmd);
} }

2
src/mame/machine/intv.cpp
View File

@ -275,7 +275,7 @@ WRITE8_MEMBER( intv_state::intvkbd_io_w )
m_sr1_int_pending = 0; m_sr1_int_pending = 0;
break; break;
default: default:
//logerror("%04X: Unknown write %02x to 0x40%02x\n",space.device().safe_pc(),data,offset); //logerror("%04X: Unknown write %02x to 0x40%02x\n",m_keyboard->pc(),data,offset);
break; break;
} }
} }

61
src/mame/machine/konamigx.cpp
View File

@ -52,6 +52,7 @@ READ16_MEMBER(konamigx_state::K055550_word_r)
WRITE16_MEMBER(konamigx_state::K055550_word_w) WRITE16_MEMBER(konamigx_state::K055550_word_w)
{ {
auto &mspace = m_maincpu->space(AS_PROGRAM);
uint32_t adr, bsize, count, i, lim; uint32_t adr, bsize, count, i, lim;
int src, tgt, srcend, tgtend, skip, cx1, sx1, wx1, cy1, sy1, wy1, cz1, sz1, wz1, c2, s2, w2; int src, tgt, srcend, tgtend, skip, cx1, sx1, wx1, cy1, sy1, wy1, cz1, sz1, wz1, c2, s2, w2;
int dx, dy, angle; int dx, dy, angle;
@ -71,7 +72,7 @@ WRITE16_MEMBER(konamigx_state::K055550_word_w)
lim = adr+bsize*count; lim = adr+bsize*count;
for(i=adr; i<lim; i+=2) for(i=adr; i<lim; i+=2)
space.write_word(i, m_prot_data[0x1a/2]); mspace.write_word(i, m_prot_data[0x1a/2]);
break; break;
// WARNING: The following cases are speculation based with questionable accuracy!(AAT) // WARNING: The following cases are speculation based with questionable accuracy!(AAT)
@ -102,41 +103,41 @@ WRITE16_MEMBER(konamigx_state::K055550_word_w)
// let's hope GCC will inline the mem24bew calls // let's hope GCC will inline the mem24bew calls
for (src=adr; src<srcend; src+=bsize) for (src=adr; src<srcend; src+=bsize)
{ {
cx1 = (short)space.read_word(src); cx1 = (short)mspace.read_word(src);
sx1 = (short)space.read_word(src + 2); sx1 = (short)mspace.read_word(src + 2);
wx1 = (short)space.read_word(src + 4); wx1 = (short)mspace.read_word(src + 4);
cy1 = (short)space.read_word(src + 6); cy1 = (short)mspace.read_word(src + 6);
sy1 = (short)space.read_word(src + 8); sy1 = (short)mspace.read_word(src + 8);
wy1 = (short)space.read_word(src +10); wy1 = (short)mspace.read_word(src +10);
cz1 = (short)space.read_word(src +12); cz1 = (short)mspace.read_word(src +12);
sz1 = (short)space.read_word(src +14); sz1 = (short)mspace.read_word(src +14);
wz1 = (short)space.read_word(src +16); wz1 = (short)mspace.read_word(src +16);
count = i = src + skip; count = i = src + skip;
tgt = src + bsize; tgt = src + bsize;
for (; count<tgt; count++) space.write_byte(count, 0); for (; count<tgt; count++) mspace.write_byte(count, 0);
for (; tgt<tgtend; i++, tgt+=bsize) for (; tgt<tgtend; i++, tgt+=bsize)
{ {
c2 = (short)space.read_word(tgt); c2 = (short)mspace.read_word(tgt);
s2 = (short)space.read_word(tgt + 2); s2 = (short)mspace.read_word(tgt + 2);
w2 = (short)space.read_word(tgt + 4); w2 = (short)mspace.read_word(tgt + 4);
if (abs((cx1+sx1)-(c2+s2))>=wx1+w2) continue; // X rejection if (abs((cx1+sx1)-(c2+s2))>=wx1+w2) continue; // X rejection
c2 = (short)space.read_word(tgt + 6); c2 = (short)mspace.read_word(tgt + 6);
s2 = (short)space.read_word(tgt + 8); s2 = (short)mspace.read_word(tgt + 8);
w2 = (short)space.read_word(tgt +10); w2 = (short)mspace.read_word(tgt +10);
if (abs((cy1+sy1)-(c2+s2))>=wy1+w2) continue; // Y rejection if (abs((cy1+sy1)-(c2+s2))>=wy1+w2) continue; // Y rejection
c2 = (short)space.read_word(tgt +12); c2 = (short)mspace.read_word(tgt +12);
s2 = (short)space.read_word(tgt +14); s2 = (short)mspace.read_word(tgt +14);
w2 = (short)space.read_word(tgt +16); w2 = (short)mspace.read_word(tgt +16);
if (abs((cz1+sz1)-(c2+s2))>=wz1+w2) continue; // Z rejection if (abs((cz1+sz1)-(c2+s2))>=wz1+w2) continue; // Z rejection
space.write_byte(i, 0x80); // collision confirmed mspace.write_byte(i, 0x80); // collision confirmed
} }
} }
break; break;
@ -169,7 +170,7 @@ WRITE16_MEMBER(konamigx_state::K055550_word_w)
break; break;
default: default:
// logerror("%06x: unknown K055550 command %02x\n", space.device().safe_pc(), data); // logerror("%06x: unknown K055550 command %02x\n", m_maincpu->pc(), data);
break; break;
} }
} }
@ -177,6 +178,7 @@ WRITE16_MEMBER(konamigx_state::K055550_word_w)
WRITE16_MEMBER(konamigx_state::K053990_martchmp_word_w) WRITE16_MEMBER(konamigx_state::K053990_martchmp_word_w)
{ {
auto &mspace = m_maincpu->space(AS_PROGRAM);
int src_addr, src_count, src_skip; int src_addr, src_count, src_skip;
int dst_addr, /*dst_count,*/ dst_skip; int dst_addr, /*dst_count,*/ dst_skip;
int mod_addr, mod_count, mod_skip, mod_offs; int mod_addr, mod_count, mod_skip, mod_offs;
@ -210,13 +212,13 @@ WRITE16_MEMBER(konamigx_state::K053990_martchmp_word_w)
if (element_size == 1) if (element_size == 1)
for (i=src_count; i; i--) for (i=src_count; i; i--)
{ {
space.write_byte(dst_addr, space.read_byte(src_addr)); mspace.write_byte(dst_addr, mspace.read_byte(src_addr));
src_addr += src_skip; src_addr += src_skip;
dst_addr += dst_skip; dst_addr += dst_skip;
} }
else for (i=src_count; i; i--) else for (i=src_count; i; i--)
{ {
space.write_word(dst_addr, space.read_word(src_addr)); mspace.write_word(dst_addr, mspace.read_word(src_addr));
src_addr += src_skip; src_addr += src_skip;
dst_addr += dst_skip; dst_addr += dst_skip;
} }
@ -241,15 +243,15 @@ WRITE16_MEMBER(konamigx_state::K053990_martchmp_word_w)
for (i=mod_count; i; i--) for (i=mod_count; i; i--)
{ {
mod_val = space.read_word(mod_addr); mod_val = mspace.read_word(mod_addr);
mod_addr += mod_skip; mod_addr += mod_skip;
mod_data = space.read_word(src_addr); mod_data = mspace.read_word(src_addr);
src_addr += src_skip; src_addr += src_skip;
mod_data += mod_val; mod_data += mod_val;
space.write_word(dst_addr, mod_data); mspace.write_word(dst_addr, mod_data);
dst_addr += dst_skip; dst_addr += dst_skip;
} }
break; break;
@ -475,6 +477,7 @@ void konamigx_state::fantjour_dma_install()
WRITE32_MEMBER(konamigx_state::fantjour_dma_w) WRITE32_MEMBER(konamigx_state::fantjour_dma_w)
{ {
auto &mspace = m_maincpu->space(AS_PROGRAM);
COMBINE_DATA(m_fantjour_dma + offset); COMBINE_DATA(m_fantjour_dma + offset);
if(!offset && ACCESSING_BITS_24_31) { if(!offset && ACCESSING_BITS_24_31) {
uint32_t sa = m_fantjour_dma[1]; uint32_t sa = m_fantjour_dma[1];
@ -495,14 +498,14 @@ WRITE32_MEMBER(konamigx_state::fantjour_dma_w)
if(mode == 0x93) if(mode == 0x93)
for(i1=0; i1 <= sz2; i1++) for(i1=0; i1 <= sz2; i1++)
for(i2=0; i2 < db; i2+=4) { for(i2=0; i2 < db; i2+=4) {
space.write_dword(da, space.read_dword(sa) ^ x); mspace.write_dword(da, mspace.read_dword(sa) ^ x);
da += 4; da += 4;
sa += 4; sa += 4;
} }
else if(mode == 0x8f) else if(mode == 0x8f)
for(i1=0; i1 <= sz2; i1++) for(i1=0; i1 <= sz2; i1++)
for(i2=0; i2 < db; i2+=4) { for(i2=0; i2 < db; i2+=4) {
space.write_dword(da, x); mspace.write_dword(da, x);
da += 4; da += 4;
} }
} }