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hng64: Add ROM banking for network CPU; improve RAM mapping and figure out where COM20020 would be mapped

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This commit is contained in:
AJR 2023-04-26 20:45:38 -04:00
parent d7c8d0c52e
commit ee3c9ae26b
2 changed files with 18 additions and 4 deletions
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19
src/mame/snk/hng64.cpp
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@ -699,8 +699,9 @@ LVS-DG2
void hng64_state::hng_comm_map(address_map &map) void hng64_state::hng_comm_map(address_map &map)
{ {
map(0x00000, 0x7ffff).rom().region("user2", 0); map(0x00000, 0x1ffff).rom().region("comm", 0);
map(0xf0000, 0xfffff).ram(); map(0x20000, 0x3ffff).bankr(m_com_bank);
map(0x40000, 0x47fff).mirror(0xb8000).ram();
} }
void hng64_state::hng_comm_io_map(address_map &map) void hng64_state::hng_comm_io_map(address_map &map)
@ -720,8 +721,10 @@ void hng64_state::hng_comm_io_map(address_map &map)
// map(0x3c, 0x3f).noprw(); /* Reserved */ // map(0x3c, 0x3f).noprw(); /* Reserved */
/* General IO */ /* General IO */
// map(0x40, 0x47).rw("ulanc", FUNC(com20020_device::read), FUNC(com20020_device::write));
map(0x50, 0x57).rw(FUNC(hng64_state::hng64_com_share_r), FUNC(hng64_state::hng64_com_share_w)); map(0x50, 0x57).rw(FUNC(hng64_state::hng64_com_share_r), FUNC(hng64_state::hng64_com_share_w));
// map(0x72, 0x72).w(hng64_state::)); /* dunno yet */ map(0x72, 0x72).w(FUNC(hng64_state::hng64_com_bank_w));
// map(0x73, 0x73).w(hng64_state::)); /* dunno yet */
} }
@ -775,6 +778,11 @@ uint8_t hng64_state::hng64_com_share_r(offs_t offset)
return m_com_shared[offset]; return m_com_shared[offset];
} }
void hng64_state::hng64_com_bank_w(uint8_t data)
{
m_com_bank->set_entry(data & 0x03);
}
uint32_t hng64_state::hng64_rtc_r(offs_t offset, uint32_t mem_mask) uint32_t hng64_state::hng64_rtc_r(offs_t offset, uint32_t mem_mask)
{ {
@ -2173,6 +2181,9 @@ void hng64_state::machine_start()
m_3dfifo_timer = timer_alloc(FUNC(hng64_state::hng64_3dfifo_processed), this); m_3dfifo_timer = timer_alloc(FUNC(hng64_state::hng64_3dfifo_processed), this);
m_comhack_timer = timer_alloc(FUNC(hng64_state::comhack_callback), this); m_comhack_timer = timer_alloc(FUNC(hng64_state::comhack_callback), this);
m_com_bank->configure_entries(0, 4, memregion("comm")->base(), 0x20000);
m_com_bank->set_entry(0);
init_io(); init_io();
save_pointer(NAME(m_com_virtual_mem), 0x100000); save_pointer(NAME(m_com_virtual_mem), 0x100000);
@ -2669,7 +2680,7 @@ void hng64_state::hng64_fight(machine_config &config)
ROM_SYSTEM_BIOS( 3, "korea", "Korea" ) \ ROM_SYSTEM_BIOS( 3, "korea", "Korea" ) \
ROM_LOAD_HNG64_BIOS( 3, "bios_korea.bin", 0x00000, 0x080000, CRC(ac953e2e) SHA1(f502188ef252b7c9d04934c4b525730a116de48b) ) \ ROM_LOAD_HNG64_BIOS( 3, "bios_korea.bin", 0x00000, 0x080000, CRC(ac953e2e) SHA1(f502188ef252b7c9d04934c4b525730a116de48b) ) \
/* KL5C80 BIOS (network CPU) */ \ /* KL5C80 BIOS (network CPU) */ \
ROM_REGION( 0x0100000, "user2", 0 ) \ ROM_REGION( 0x080000, "comm", 0 ) \
ROM_LOAD ( "from1.bin", 0x000000, 0x080000, CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) ) \ ROM_LOAD ( "from1.bin", 0x000000, 0x080000, CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) ) \
/* FPGA (unknown) */ \ /* FPGA (unknown) */ \
ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \ ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \

3
src/mame/snk/hng64.h
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@ -174,6 +174,7 @@ public:
m_fbscroll(*this, "fbscroll"), m_fbscroll(*this, "fbscroll"),
m_fbunk(*this, "fbunk"), m_fbunk(*this, "fbunk"),
m_idt7133_dpram(*this, "com_ram"), m_idt7133_dpram(*this, "com_ram"),
m_com_bank(*this, "com_bank"),
m_gfxdecode(*this, "gfxdecode"), m_gfxdecode(*this, "gfxdecode"),
m_in(*this, "IN%u", 0U), m_in(*this, "IN%u", 0U),
m_samsho64_3d_hack(0), m_samsho64_3d_hack(0),
@ -246,6 +247,7 @@ private:
required_shared_ptr<uint32_t> m_idt7133_dpram; required_shared_ptr<uint32_t> m_idt7133_dpram;
//required_shared_ptr<uint8_t> m_com_mmu_mem; //required_shared_ptr<uint8_t> m_com_mmu_mem;
required_memory_bank m_com_bank;
required_device<gfxdecode_device> m_gfxdecode; required_device<gfxdecode_device> m_gfxdecode;
@ -330,6 +332,7 @@ private:
void hng64_com_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); void hng64_com_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void hng64_com_share_w(offs_t offset, uint8_t data); void hng64_com_share_w(offs_t offset, uint8_t data);
uint8_t hng64_com_share_r(offs_t offset); uint8_t hng64_com_share_r(offs_t offset);
void hng64_com_bank_w(uint8_t data);
void hng64_com_share_mips_w(offs_t offset, uint8_t data); void hng64_com_share_mips_w(offs_t offset, uint8_t data);
uint8_t hng64_com_share_mips_r(offs_t offset); uint8_t hng64_com_share_mips_r(offs_t offset);
uint32_t hng64_sysregs_r(offs_t offset, uint32_t mem_mask = ~0); uint32_t hng64_sysregs_r(offs_t offset, uint32_t mem_mask = ~0);