Cleanups and version bump.

This commit is contained in:
Aaron Giles 2010-04-21 20:01:49 +00:00
parent 75fa442218
commit ee4f1afeec
23 changed files with 228 additions and 228 deletions

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@ -11,9 +11,9 @@
Various fixes by Lord Nightmare
Modularization by Lord Nightmare
Sub-interpolation-cycle parameter updating added by Lord Nightmare
Preliminary MASSIVE merge of tms5110 and tms5220 cores by Lord Nightmare
Lattice Filter, Multiplier, and clipping redone by Lord Nightmare
TMS5220C multi-rate feature added by Lord Nightmare
Preliminary MASSIVE merge of tms5110 and tms5220 cores by Lord Nightmare
Lattice Filter, Multiplier, and clipping redone by Lord Nightmare
TMS5220C multi-rate feature added by Lord Nightmare
Much information regarding these lpc encoding comes from US patent 4,209,844
US patent 4,331,836 describes the complete 51xx chip
@ -471,8 +471,8 @@ static void update_status_and_ints(tms5220_state *tms)
{
/* update flags and set ints if needed */
/* BL is set if neither byte 9 nor 8 of the fifo are in use; this
translates to having fifo_count (which ranges from 0 bytes in use to 16
bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
translates to having fifo_count (which ranges from 0 bytes in use to 16
bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
if (tms->fifo_count <= 8)
{
/* generate an interrupt if necessary; if /BL was inactive and is now active, set int. */
@ -484,7 +484,7 @@ static void update_status_and_ints(tms5220_state *tms)
tms->buffer_low = 0;
/* BE is set if neither byte 15 nor 14 of the fifo are in use; this
translates to having fifo_count equal to exactly 0 */
translates to having fifo_count equal to exactly 0 */
if (tms->fifo_count == 0)
{
/* generate an interrupt if necessary; if /BE was inactive and is now active, set int. */
@ -496,8 +496,8 @@ static void update_status_and_ints(tms5220_state *tms)
tms->buffer_empty = 0;
/* TS is talk status and is set elsewhere in the fifo parser and in
the SPEAK command handler; however, if /BE is true during speak external
mode, it is immediately unset here. */
the SPEAK command handler; however, if /BE is true during speak external
mode, it is immediately unset here. */
if ((tms->speak_external == 1) && (tms->buffer_empty == 1))
{
/* generate an interrupt if necessary; if /TS was active and is now inactive, set int. */
@ -506,7 +506,7 @@ static void update_status_and_ints(tms5220_state *tms)
tms->talk_status = 0;
}
/* Note that TS being unset will also generate an interrupt when a STOP
frame is encountered; this is handled in the sample generator code and not here */
frame is encountered; this is handled in the sample generator code and not here */
}
/**********************************************************************************************
@ -681,7 +681,7 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
goto empty;
/* if speak external is set, but talk status is not (yet) set,
wait for buffer low to clear */
wait for buffer low to clear */
if (!tms->talk_status && tms->speak_external)
{
if (tms->buffer_low == 1)
@ -736,14 +736,14 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
/* in all cases where interpolation would be inhibited, set the target
value equal to the current value.
Interpolation inhibit cases:
* Old frame was voiced, new is unvoiced
* Old frame was silence/zero energy, new is unvoiced
* Old frame was unvoiced, new is voiced
* New frame is a silence/zero energy frame - ? not sure
* New frame is a stop frame - ? not sure
*/
value equal to the current value.
Interpolation inhibit cases:
* Old frame was voiced, new is unvoiced
* Old frame was silence/zero energy, new is unvoiced
* Old frame was unvoiced, new is voiced
* New frame is a silence/zero energy frame - ? not sure
* New frame is a stop frame - ? not sure
*/
if ( ((NEW_FRAME_SILENCE_FLAG == 0) && (NEW_FRAME_STOP_FLAG == 0))
&& ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1))
|| ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 1))
@ -761,7 +761,7 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
tms->target_k[i] = tms->current_k[i];
}
/* in cases where the new frame is a STOP or SILENCE frame,
ramp the energy down to 0, leaving everything else alone. */
ramp the energy down to 0, leaving everything else alone. */
else if ((NEW_FRAME_SILENCE_FLAG == 1) || (NEW_FRAME_STOP_FLAG == 1))
{
#ifdef DEBUG_GENERATION
@ -944,17 +944,17 @@ empty:
static INT16 clip_and_wrap(INT16 cliptemp)
{
/* clipping & wrapping, just like the patent shows:
first of all the result should be clamped to 14 bits, between -16384 and 16383
*/
first of all the result should be clamped to 14 bits, between -16384 and 16383
*/
while (cliptemp > 16383) cliptemp -= 32768;
while (cliptemp < -16384) cliptemp += 32768;
/* the top 10 bits of this result are visible on the digital output IO pin.
next, if the top 3 bits of the 14 bit result are all the same, the lowest of those 3 bits plus the next 7 bits are the signed analog output, otherwise the low bits are all forced to match the inverse of the topmost bit, i.e.:
1x xxxx xxxx xxxx -> 0b10000000
11 1bcd efgh xxxx -> 0b1bcdefgh
00 0bcd efgh xxxx -> 0b0bcdefgh
0x xxxx xxxx xxxx -> 0b01111111
*/
next, if the top 3 bits of the 14 bit result are all the same, the lowest of those 3 bits plus the next 7 bits are the signed analog output, otherwise the low bits are all forced to match the inverse of the topmost bit, i.e.:
1x xxxx xxxx xxxx -> 0b10000000
11 1bcd efgh xxxx -> 0b1bcdefgh
00 0bcd efgh xxxx -> 0b0bcdefgh
0x xxxx xxxx xxxx -> 0b01111111
*/
#ifdef DO_CLIP_AND_WRAP
if (cliptemp > 2047) cliptemp = 2047;
else if (cliptemp < -2048) cliptemp = -2048;
@ -968,10 +968,10 @@ static INT16 clip_and_wrap(INT16 cliptemp)
/**********************************************************************************************
ti_matrix_multiply -- does the proper multiply and shift as the TI chips do.
a is the k coefficient and is clamped to 10 bits (9 bits plus a sign)
b is the running result and is clamped to 14 bits.
output is 14 bits, but note the result LSB bit is always 1.
ti_matrix_multiply -- does the proper multiply and shift as the TI chips do.
a is the k coefficient and is clamped to 10 bits (9 bits plus a sign)
b is the running result and is clamped to 14 bits.
output is 14 bits, but note the result LSB bit is always 1.
**********************************************************************************************/
static INT16 matrix_multiply(INT16 a, INT16 b)
@ -1086,7 +1086,7 @@ static void process_command(tms5220_state *tms, unsigned char cmd)
if (tms->talk_status == 0) /* TALKST must be clear for LA */
{
/* tms5220 data sheet says that if we load only one 4-bit nibble, it won't work.
This code does not care about this. */
This code does not care about this. */
if (tms->intf->load_address)
(*tms->intf->load_address)(tms->device, cmd & 0x0f);
tms->schedule_dummy_read = TRUE;
@ -1155,7 +1155,7 @@ static void parse_frame(tms5220_state *tms)
bits = 131072; // == arbitrary large number
}
/* if the chip is a tms5220C, and the rate mode is set to that each frame (0x04 bit set)
has a 2 bit rate preceeding it, grab two bits here and store them as the rate; */
has a 2 bit rate preceeding it, grab two bits here and store them as the rate; */
if ((tms->variant == SUBTYPE_TMS5220C) && (tms->tms5220c_rate & 0x04))
{
bits -= 2;
@ -1317,16 +1317,16 @@ static DEVICE_START( tms5220 )
tms->stream = stream_create(device, 0, 1, device->clock / 80, tms, tms5220_update);
/*if (tms->table == NULL)
{
assert_always(tms->intf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
tms->M0_callback = tms->intf->M0_callback;
tms->set_load_address = tms->intf->load_address;
}
else
{
tms->M0_callback = speech_rom_read_bit;
tms->set_load_address = speech_rom_set_addr;
}*/
{
assert_always(tms->intf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
tms->M0_callback = tms->intf->M0_callback;
tms->set_load_address = tms->intf->load_address;
}
else
{
tms->M0_callback = speech_rom_read_bit;
tms->set_load_address = speech_rom_set_addr;
}*/
/* not during reset which is called frm within a write! */
tms->io_ready = 1;

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@ -2165,7 +2165,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( funquiz )
MDRV_IMPORT_FROM(fw1stpal)
// MDRV_IMPORT_FROM(fw2ndpal)
// MDRV_IMPORT_FROM(fw2ndpal)
MDRV_CPU_REPLACE("maincpu", M65C02, MASTER_CLOCK/8) /* 2MHz */
MDRV_CPU_PROGRAM_MAP(funquiz_map)
@ -3129,7 +3129,7 @@ ROM_END
r.3 = 2a.bin royalcrde Royal Card (austrian, set 6)
All ROMs are double sized, with identical halves.
The set is working properly, with Bet (Hold 5) and normal payout. No Remote.
The set is working properly, with Bet (Hold 5) and normal payout. No Remote.
*/
ROM_START( royalcrda )
ROM_REGION( 0x10000, "maincpu", 0 )
@ -3182,9 +3182,9 @@ ROM_START( royalcrdc )
ROM_REGION( 0x20000, "gfx1", 0 )
ROM_LOAD( "roj.ic26", 0x0000, 0x10000, CRC(3883cdcb) SHA1(b71a786822fe8fcb2c6fcdc463facb2738ec8c01) )
// ROM_IGNORE( 0x8000)
// ROM_IGNORE( 0x8000)
ROM_LOAD( "roj.ic25", 0x8000, 0x10000, CRC(c5b787e8) SHA1(be88aa901c1f96d171af45c3602e0ce72b8fff34) )
// ROM_IGNORE( 0x8000)
// ROM_IGNORE( 0x8000)
ROM_REGION( 0x0800, "nvram", 0 ) /* default NVRAM */
ROM_LOAD( "royalcrdc_nvram.bin", 0x0000, 0x0800, CRC(eacb0c7b) SHA1(513816623aa3843dd5d0416fc012060c7a9f6c71) )

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@ -1657,9 +1657,9 @@ INPUT_PORTS_START( mk3ghw )
PORT_DIPSETTING( 0x05, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x03, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x02, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x01, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x02, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x01, DEF_STR( Hardest ) )
// PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
PORT_DIPUNUSED( 0x08, IP_ACTIVE_HIGH )
PORT_DIPUNUSED( 0x10, IP_ACTIVE_HIGH )
PORT_DIPUNUSED( 0x20, IP_ACTIVE_HIGH )

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@ -234,7 +234,7 @@ static WRITE16_HANDLER( livequiz_coin_w )
coin_counter_w(space->machine, 0, data & 0x0001);
}
#ifdef MAME_DEBUG
// popmessage("coin %04X", data);
// popmessage("coin %04X", data);
#endif
}
@ -290,7 +290,7 @@ static WRITE16_HANDLER( hammer_coin_w )
coin_counter_w(space->machine, 1, data & 0x0002);
}
#ifdef MAME_DEBUG
// popmessage("coin %04X", data);
// popmessage("coin %04X", data);
#endif
}
@ -304,14 +304,14 @@ static WRITE16_HANDLER( hammer_motor_w )
// data & 0x0080 ?
}
#ifdef MAME_DEBUG
// popmessage("motor %04X", data);
// popmessage("motor %04X", data);
#endif
}
static WRITE16_HANDLER( hammer_led_w )
{
#ifdef MAME_DEBUG
// popmessage("led %04X", data);
// popmessage("led %04X", data);
#endif
}
@ -561,7 +561,7 @@ static INPUT_PORTS_START( hammer )
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("eeprom", eeprom_read_bit)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE_NO_TOGGLE( 0x0040, IP_ACTIVE_LOW )
@ -932,7 +932,7 @@ ROM_START( hammer )
ROM_REGION( 0x080000, "tiles", ROMREGION_ERASE )
// Use the tiles rom from livequiz (not present in this set) to show some debug text
// ROM_LOAD( "27c4096.u23", 0x000000, 0x080000, CRC(25121de8) SHA1(edf24d87551639b871baf3243b452a4e2ba84107) )
// ROM_LOAD( "27c4096.u23", 0x000000, 0x080000, CRC(25121de8) SHA1(edf24d87551639b871baf3243b452a4e2ba84107) )
ROM_REGION( 0x400000, "ymz", 0 )
ROM_LOAD( "s0.u25", 0x000000, 0x200000, CRC(c049a3e0) SHA1(0c7016c3128c170a84ad3f92fad1165775210e3d) )

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@ -1126,31 +1126,31 @@ static READ16_HANDLER( ef9369_r )
static INPUT_PORTS_START( crmaze )
PORT_START("ORANGE1")
// PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("00")
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("01")
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("02")
// PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("03")
// PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("04")
// PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("05")
// PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("06")
// PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("07")
// PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("00")
// PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("01")
// PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("02")
// PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("03")
// PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("04")
// PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("05")
// PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("06")
// PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("07")
PORT_START("ORANGE2")
// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("08")
// PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("09")
// PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("10")
// PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("11")
// PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("12")
// PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("13")
// PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("14")
// PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("200p?")
// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("08")
// PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("09")
// PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("10")
// PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("11")
// PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("12")
// PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("13")
// PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("14")
// PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("200p?")
PORT_START("BLACK1")
// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("16")
// PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("17")
// PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("18")
// PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("19")
// PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("20")
// PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("16")
// PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("17")
// PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("18")
// PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("19")
// PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("20")
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Test Switch")
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Door Switch?") PORT_TOGGLE
@ -1490,8 +1490,8 @@ static READ16_DEVICE_HANDLER( oki_r )
static WRITE16_DEVICE_HANDLER( oki_w )
{
// 0x10: .xxx xxxx OKIM6736 I6-I0
// 0x12: .... ...x OKIM6736 /ST
// 0x10: .xxx xxxx OKIM6736 I6-I0
// 0x12: .... ...x OKIM6736 /ST
}
static void video_reset(running_device *device)
@ -1929,9 +1929,9 @@ static READ16_HANDLER( characteriser16_r )
LOG_CHR(("Characteriser read offset %02X \n",offset));
LOG_CHR(("Characteriser read data %02X \n",mpu4_current_chr_table[prot_col].response));
// printf("%04x Characteriser read offset %02X,data %02X\n", cpu_get_previouspc(space->cpu),offset,mpu4_current_chr_table[prot_col].response);
// printf("Characteriser read offset %02X \n",offset);
// printf("Characteriser read data %02X \n",mpu4_current_chr_table[prot_col].response);
// printf("%04x Characteriser read offset %02X,data %02X\n", cpu_get_previouspc(space->cpu),offset,mpu4_current_chr_table[prot_col].response);
// printf("Characteriser read offset %02X \n",offset);
// printf("Characteriser read data %02X \n",mpu4_current_chr_table[prot_col].response);
if (!mpu4_current_chr_table)
fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(space->cpu));

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@ -33,7 +33,7 @@ public:
UINT16 * tilemap_regs;
UINT16 * video_regs;
UINT16 * spriteram;
// UINT16 * paletteram; // currently this uses generic palette handling
// UINT16 * paletteram; // currently this uses generic palette handling
/* video-related */
tilemap_t *mid_tilemap, *txt_tilemap;

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@ -868,7 +868,7 @@ WRITE8_HANDLER( subsino_out_c_w )
tilemap_mark_all_tiles_dirty (reel1_tilemap);
tilemap_mark_all_tiles_dirty (reel2_tilemap);
tilemap_mark_all_tiles_dirty (reel3_tilemap);
// popmessage("data %02x\n",data);
// popmessage("data %02x\n",data);
}
static ADDRESS_MAP_START( tisub_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -1025,7 +1025,7 @@ static ADDRESS_MAP_START( stisub_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE( 0x0d016, 0x0d017 ) AM_DEVWRITE( "ymsnd", ym3812_w )
// AM_RANGE( 0x0d01b, 0x0d01b ) AM_WRITE( subsino_tiles_offset_w )
// AM_RANGE( 0x0d01b, 0x0d01b ) AM_WRITE( subsino_tiles_offset_w )
AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
@ -1504,12 +1504,12 @@ static INPUT_PORTS_START( stisub )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
/*
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 / Big")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 / Small")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_BET ) PORT_IMPULSE(3)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 / Big")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 / Small")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_BET ) PORT_IMPULSE(3)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
*/
PORT_START("INA")

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@ -957,11 +957,11 @@ static INPUT_PORTS_START( rbibb )
PORT_DIPSETTING( 0x00, "RP2C04-0001" )
PORT_DIPSETTING( 0x20, "RP2C03" )
PORT_DIPSETTING( 0x40, "RP2C04-0002" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
PORT_DIPSETTING( 0x80, "RP2C04-0003" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
PORT_DIPSETTING( 0xc0, "RP2C04-0004" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
INPUT_PORTS_END
static INPUT_PORTS_START( btlecity )
@ -1399,11 +1399,11 @@ static INPUT_PORTS_START( vstetris )
PORT_DIPSETTING( 0x00, "RP2C04-0001" )
PORT_DIPSETTING( 0x20, "RP2C03" )
PORT_DIPSETTING( 0x40, "RP2C04-0002" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
PORT_DIPSETTING( 0x80, "RP2C04-0003" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
PORT_DIPSETTING( 0xc0, "RP2C04-0004" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
INPUT_PORTS_END
/* P2 Start is a different bit */
@ -1434,11 +1434,11 @@ static INPUT_PORTS_START( vsskykid )
PORT_DIPSETTING( 0x00, "RP2C04-0001" )
PORT_DIPSETTING( 0x20, "RP2C03" )
PORT_DIPSETTING( 0x40, "RP2C04-0002" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
PORT_DIPSETTING( 0x80, "RP2C04-0003" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
PORT_DIPSETTING( 0xc0, "RP2C04-0004" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
// PORT_DIPSETTING( 0xe0, "RP2C03" )
INPUT_PORTS_END
static INPUT_PORTS_START( vspinbal )
@ -1622,11 +1622,11 @@ static INPUT_PORTS_START( starlstr )
PORT_DIPNAME( 0xe0, 0x00, "PPU Type" )
PORT_DIPSETTING( 0x00, "RP2C03" )
PORT_DIPSETTING( 0x20, "RP2C04-0001" )
// PORT_DIPSETTING( 0x40, "RP2C03" )
// PORT_DIPSETTING( 0x40, "RP2C03" )
PORT_DIPSETTING( 0x60, "RP2C04-0002" )
// PORT_DIPSETTING( 0x80, "RP2C03" )
// PORT_DIPSETTING( 0x80, "RP2C03" )
PORT_DIPSETTING( 0xa0, "RP2C04-0003" )
// PORT_DIPSETTING( 0xc0, "RP2C03" )
// PORT_DIPSETTING( 0xc0, "RP2C03" )
PORT_DIPSETTING( 0xe0, "RP2C04-0004" )
PORT_START("DSW1") /* no DSW1? */
@ -1658,12 +1658,12 @@ static INPUT_PORTS_START( tkoboxng )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0xe0, 0x00, "PPU Type" )
PORT_DIPSETTING( 0x00, "RP2C04-0003" )
// PORT_DIPSETTING( 0x20, "RP2C03" )
// PORT_DIPSETTING( 0x40, "RP2C03" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
// PORT_DIPSETTING( 0x80, "RP2C03" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
// PORT_DIPSETTING( 0xc0, "RP2C03" )
// PORT_DIPSETTING( 0x20, "RP2C03" )
// PORT_DIPSETTING( 0x40, "RP2C03" )
// PORT_DIPSETTING( 0x60, "RP2C03" )
// PORT_DIPSETTING( 0x80, "RP2C03" )
// PORT_DIPSETTING( 0xa0, "RP2C03" )
// PORT_DIPSETTING( 0xc0, "RP2C03" )
PORT_DIPSETTING( 0xe0, "RP2C03" )
INPUT_PORTS_END

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@ -13,7 +13,7 @@ public:
UINT16 * videoram3;
UINT16 * rowscroll;
UINT16 * spriteram;
// UINT16 * paletteram; // currently this uses generic palette handling
// UINT16 * paletteram; // currently this uses generic palette handling
size_t spriteram_size;
/* video-related */

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@ -14,7 +14,7 @@ public:
/* memory pointers */
UINT16 * videoram;
UINT16 * spriteram;
// UINT16 * paletteram; // currently this uses generic palette handling
// UINT16 * paletteram; // currently this uses generic palette handling
/* video-related */
tilemap_t *bg_tilemap, *tx_tilemap;

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@ -572,7 +572,7 @@ WRITE8_HANDLER( snes_w_io )
// APU is mirrored from 2140 to 217f
if (offset >= APU00 && offset < WMDATA)
{
// printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,cpu_get_pc(space->cpu));
// printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,cpu_get_pc(space->cpu));
spc_port_in(state->spc700, offset & 0x3, data);
cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(20));
return;
@ -2200,7 +2200,7 @@ static void snes_dma( const address_space *space, UINT8 channels )
/* Number of bytes to transfer */
length = state->dma_channel[i].trans_size;
// printf( "DMA-Ch %d: len: %X, abus: %X, bbus: %X, incr: %d, dir: %s, type: %d\n", i, length, abus | abus_bank, bbus, increment, state->dma_channel[i].dmap & 0x80 ? "PPU->CPU" : "CPU->PPU", state->dma_channel[i].dmap & 0x07);
// printf( "DMA-Ch %d: len: %X, abus: %X, bbus: %X, incr: %d, dir: %s, type: %d\n", i, length, abus | abus_bank, bbus, increment, state->dma_channel[i].dmap & 0x80 ? "PPU->CPU" : "CPU->PPU", state->dma_channel[i].dmap & 0x07);
#ifdef SNES_DBG_DMA
mame_printf_debug( "DMA-Ch %d: len: %X, abus: %X, bbus: %X, incr: %d, dir: %s, type: %d\n", i, length, abus | abus_bank, bbus, increment, state->dma_channel[i].dmap & 0x80 ? "PPU->CPU" : "CPU->PPU", state->dma_channel[i].dmap & 0x07);

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@ -2232,7 +2232,7 @@ static void pvr_drawframebuffer(bitmap_t *bitmap,const rectangle *cliprect)
xi=((pvrta_regs[FB_R_SIZE] & 0x3ff)+1) << 1;
dy=((pvrta_regs[FB_R_SIZE] >> 10) & 0x3ff)+1;
// dy++;
// dy++;
dy*=2; // probably depends on interlace mode, fields etc...
switch (unpackmode)

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@ -159,7 +159,7 @@ READ8_DEVICE_HANDLER( ppu2c0x_r );
#define MDRV_PPU2C05_04_ADD(_tag, _intrf) \
MDRV_DEVICE_ADD(_tag, PPU_2C05_04, 0) \
MDRV_DEVICE_CONFIG(_intrf)
MDRV_DEVICE_CONFIG(_intrf)
#define MDRV_PPU2C07_ADD(_tag, _intrf) \
MDRV_DEVICE_ADD(_tag, PPU_2C07, 0) \

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@ -10,4 +10,4 @@
***************************************************************************/
extern const char build_version[];
const char build_version[] = "0.137u2 ("__DATE__")";
const char build_version[] = "0.137u3 ("__DATE__")";