mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
Some documentation work.
Along the way, set default models for devices missing them. Fix standalone makefile to work in mingw environment. (nw)
This commit is contained in:
parent
52ed4a179a
commit
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@ -1,5 +1,7 @@
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// license:GPL-2.0+
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// copyright-holders:Couriersud
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//! [ne555 example]
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/*
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* ne555_astable.c
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*
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@ -48,3 +50,4 @@ NETLIST_START(ne555_astable)
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LOG(log3, 555.OUT)
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NETLIST_END()
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//! [ne555 example]
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@ -127,7 +127,7 @@ public:
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};
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NETLIB_CONSTRUCTOR(Q)
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, m_model(*this, "MODEL", "")
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, m_model(*this, "MODEL", "NPN")
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, m_qtype(BJT_NPN)
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{
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}
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@ -348,7 +348,7 @@ NETLIB_OBJECT_DERIVED(D, twoterm)
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{
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public:
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NETLIB_CONSTRUCTOR_DERIVED(D, twoterm)
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, m_model(*this, "MODEL", "")
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, m_model(*this, "MODEL", "D")
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, m_D(*this, "m_D")
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{
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register_subalias("A", m_P);
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@ -32,7 +32,7 @@ DOXYFILE_ENCODING = UTF-8
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# title of most generated pages and in a few other places.
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# The default value is: My Project.
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PROJECT_NAME = Netlist documentaton
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PROJECT_NAME = Netlist documentation
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# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
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# could be handy for archiving the generated documentation or if some version
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@ -771,7 +771,7 @@ WARN_LOGFILE =
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# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
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# Note: If this tag is empty the current directory is searched.
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INPUT = ".." "../analog" "../documentation"
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INPUT = .. ../analog ../documentation ../devices
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# This tag can be used to specify the character encoding of the source files
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# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
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@ -844,7 +844,7 @@ EXCLUDE_SYMBOLS =
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# that contain example code fragments that are included (see the \include
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# command).
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EXAMPLE_PATH =
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EXAMPLE_PATH = ../../../../nl_examples
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# If the value of the EXAMPLE_PATH tag contains directories, you can use the
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# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
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@ -1416,7 +1416,7 @@ DISABLE_INDEX = NO
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# The default value is: NO.
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# This tag requires that the tag GENERATE_HTML is set to YES.
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GENERATE_TREEVIEW = NO
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GENERATE_TREEVIEW = YES
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# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
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# doxygen will group on one line in the generated HTML documentation.
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@ -195,11 +195,15 @@ doc:
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#-------------------------------------------------
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.depend: $(SOURCES)
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ifeq ($(OS),windows)
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@echo using existing .depend
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else
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@echo creating .depend
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@rm -f ./.depend
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@for i in $(SOURCES); do \
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$(CC) $(CFLAGS) -MM $$i -MT `echo $$i | sed -e 's/$(SRC)/$(OBJ)/' -e 's/.cpp/.o/' ` >>./.depend; \
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done
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endif
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depend: .depend
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@ -1,8 +1,50 @@
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// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nld_NE555.c
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/*!
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* \file nld_NE555.cpp
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*
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* \page NE555 NE555: PRECISION TIMERS
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*
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* The Swiss army knife for timing purposes
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*
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* \section ne555_1 Synopsis
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*
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* \code
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* NE555(name)
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* NE555_DIP(name)
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* \endcode
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*
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* For the \c NE555 use verbose pin assignments like \c name.TRIG or \c name.OUT.
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* For the \c NE555_DIP use pin numbers like \c name.1.
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*
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* \section ne555_2 Connection Diagram
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*
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* <pre>
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* +--------+
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* GND |1 ++ 8| VCC
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* TRIG |2 7| DISCH
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* OUT |3 6| THRES
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* RESET |4 5| CONT
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* +--------+
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* </pre>
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*
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* Naming conventions follow Texas Instruments datasheet
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*
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* \section ne555_3 Function Table
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*
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* | CLR | CLK | D | Q | QQ |
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* |-----|-----|---|:-:|:---:|
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* | 0 | X | X | 0 | 1 |
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* | 1 | R | 1 | 1 | 0 |
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* | 1 | R | 0 | 0 | 1 |
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* | 1 | 0 | X | Q0| Q0Q |
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*
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* \section ne555_4 Limitations
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*
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* Internal resistor network currently fixed to 5k.
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*
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* \section ne555_5 Example
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* \snippet ne555_astable.c ne555 example
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*/
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#include "nld_ne555.h"
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@ -96,6 +138,7 @@ namespace netlist
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m_R3.do_reset();
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m_RDIS.do_reset();
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/* FIXME make resistance a parameter, properly model other variants */
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m_R1.set_R(5000);
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m_R2.set_R(5000);
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m_R3.set_R(5000);
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@ -1,20 +1,5 @@
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// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nld_NE555.h
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*
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* NE555: PRECISION TIMERS
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*
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* +--------+
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* GND |1 ++ 8| VCC
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* TRIG |2 7| DISCH
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* OUT |3 6| THRES
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* RESET |4 5| CONT
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* +--------+
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*
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* Naming conventions follow Texas Instruments datasheet
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*
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*/
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#ifndef NLD_NE555_H_
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#define NLD_NE555_H_
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@ -303,8 +303,8 @@ namespace netlist
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NETLIB_OBJECT(function)
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{
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NETLIB_CONSTRUCTOR(function)
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, m_N(*this, "N", 2)
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, m_func(*this, "FUNC", "")
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, m_N(*this, "N", 1)
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, m_func(*this, "FUNC", "A0")
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, m_Q(*this, "Q")
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{
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std::vector<pstring> inps;
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@ -1,5 +1,208 @@
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/*
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* Documentation settings
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*/
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/*!
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* \defgroup devices Devices
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*
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*/
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/*!
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* \page devices Devices
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*
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* Below is a list of all the devices currently supported ...
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*
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* - \subpage AFUNC
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* - \subpage ANALOG_INPUT
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* - \subpage CAP
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* - \subpage CCCS
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* - \subpage CD4001_DIP
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* - \subpage CD4001_NOR
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* - \subpage CD4016_DIP
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* - \subpage CD4020_DIP
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* - \subpage CD4020
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* - \subpage CD4020_WI
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* - \subpage CD4066_DIP
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* - \subpage CD4066_GATE
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* - \subpage CD4316_DIP
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* - \subpage CD4316_GATE
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* - \subpage CD4538_DIP
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* - \subpage CLOCK
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* - \subpage CS
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* - \subpage DIODE
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* - \subpage DUMMY_INPUT
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* - \subpage EPROM_2716_DIP
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* - \subpage EPROM_2716
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* - \subpage EXTCLOCK
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* - \subpage FRONTIER_DEV
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* - \subpage GND
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* - \subpage IND
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* - \subpage LM324_DIP
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* - \subpage LM358_DIP
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* - \subpage LM3900
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* - \subpage LM747A_DIP
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* - \subpage LM747_DIP
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* - \subpage LOGD
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* - \subpage LOGIC_INPUT
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* - \subpage LOG
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* - \subpage LVCCS
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* - \subpage MAINCLOCK
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* - \subpage MB3614_DIP
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* - \subpage MC14584B_DIP
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* - \subpage MC14584B_GATE
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* - \subpage MM5837_DIP
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* - \subpage NE555_DIP
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* - \subpage NE555
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* - \subpage NETDEV_DELAY
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* - \subpage NETDEV_RSFF
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* - \subpage OPAMP
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* - \subpage opamp_layout_1_11_6
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* - \subpage opamp_layout_1_7_4
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* - \subpage opamp_layout_1_8_5
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* - \subpage opamp_layout_2_13_9_4
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* - \subpage opamp_layout_2_8_4
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* - \subpage opamp_layout_4_4_11
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* - \subpage PARAMETER
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* - \subpage POT2
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* - \subpage POT
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* - \subpage PROM_82S115_DIP
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* - \subpage PROM_82S115
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* - \subpage PROM_82S123_DIP
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* - \subpage PROM_82S123
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* - \subpage PROM_82S126_DIP
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* - \subpage PROM_82S126
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* - \subpage QBJT_EB
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* - \subpage QBJT_SW
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* - \subpage R2R_DAC
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* - \subpage RAM_2102A_DIP
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* - \subpage RAM_2102A
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* - \subpage RES
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* - \subpage RES_SWITCH
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* - \subpage SN74LS629_DIP
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* - \subpage SN74LS629
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* - \subpage SOLVER
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* - \subpage SWITCH2
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* - \subpage SWITCH
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* - \subpage TTL_7400_DIP
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* - \subpage TTL_7400_GATE
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* - \subpage TTL_7400_NAND
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* - \subpage TTL_7402_DIP
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* - \subpage TTL_7402_GATE
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* - \subpage TTL_7402_NOR
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* - \subpage TTL_7404_DIP
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* - \subpage TTL_7404_GATE
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* - \subpage TTL_7404_INVERT
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* - \subpage TTL_7408_AND
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* - \subpage TTL_7408_DIP
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* - \subpage TTL_7408_GATE
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* - \subpage TTL_74107A
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* - \subpage TTL_74107_DIP
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* - \subpage TTL_74107
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* - \subpage TTL_7410_DIP
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* - \subpage TTL_7410_GATE
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* - \subpage TTL_7410_NAND
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* - \subpage TTL_7411_AND
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* - \subpage TTL_7411_DIP
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* - \subpage TTL_7411_GATE
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* - \subpage TTL_74123_DIP
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* - \subpage TTL_74123
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* - \subpage TTL_74153_DIP
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* - \subpage TTL_74153
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* - \subpage TTL_74161_DIP
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* - \subpage TTL_74161
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* - \subpage TTL_74165_DIP
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* - \subpage TTL_74165
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* - \subpage TTL_74166_DIP
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* - \subpage TTL_74166
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* - \subpage TTL_7416_DIP
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* - \subpage TTL_7416_GATE
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* - \subpage TTL_74174_DIP
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* - \subpage TTL_74174
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* - \subpage TTL_74175_DIP
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* - \subpage TTL_74175
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* - \subpage TTL_74192_DIP
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* - \subpage TTL_74192
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* - \subpage TTL_74193_DIP
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* - \subpage TTL_74193
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* - \subpage TTL_74194_DIP
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* - \subpage TTL_74194
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* - \subpage TTL_7420_DIP
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* - \subpage TTL_7420_GATE
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* - \subpage TTL_7420_NAND
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* - \subpage TTL_7425_DIP
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* - \subpage TTL_7425_GATE
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* - \subpage TTL_7425_NOR
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* - \subpage TTL_74260_DIP
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* - \subpage TTL_74260_GATE
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* - \subpage TTL_74260_NOR
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* - \subpage TTL_74279_DIP
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* - \subpage TTL_7427_DIP
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* - \subpage TTL_7427_GATE
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* - \subpage TTL_7427_NOR
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* - \subpage TTL_7430_DIP
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* - \subpage TTL_7430_GATE
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* - \subpage TTL_7430_NAND
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* - \subpage TTL_7432_DIP
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* - \subpage TTL_7432_GATE
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* - \subpage TTL_7432_OR
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* - \subpage TTL_74365_DIP
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* - \subpage TTL_74365
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* - \subpage TTL_7437_DIP
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* - \subpage TTL_7437_GATE
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* - \subpage TTL_7437_NAND
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* - \subpage TTL_7448_DIP
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* - \subpage TTL_7448
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* - \subpage TTL_7450_ANDORINVERT
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* - \subpage TTL_7450_DIP
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* - \subpage TTL_7473A_DIP
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* - \subpage TTL_7473A
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* - \subpage TTL_7473_DIP
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* - \subpage TTL_7473
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* - \subpage TTL_7474_DIP
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* - \subpage TTL_7474
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* - \subpage TTL_7475_DIP
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* - \subpage TTL_7475
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* - \subpage TTL_7477_DIP
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* - \subpage TTL_7477
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* - \subpage TTL_7483_DIP
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* - \subpage TTL_7483
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* - \subpage TTL_7485_DIP
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* - \subpage TTL_7485
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* - \subpage TTL_7486_DIP
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* - \subpage TTL_7486_GATE
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* - \subpage TTL_7486_XOR
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* - \subpage TTL_7490_DIP
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* - \subpage TTL_7490
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* - \subpage TTL_7493_DIP
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* - \subpage TTL_7493
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* - \subpage TTL_82S16_DIP
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* - \subpage TTL_82S16
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* - \subpage TTL_9310_DIP
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* - \subpage TTL_9310
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* - \subpage TTL_9312_DIP
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* - \subpage TTL_9312
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* - \subpage TTL_9316_DIP
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* - \subpage TTL_9316
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* - \subpage TTL_9322_DIP
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* - \subpage TTL_9322
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* - \subpage TTL_9334_DIP
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* - \subpage TTL_9334
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* - \subpage TTL_9602_DIP
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* - \subpage TTL_AM2847_DIP
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* - \subpage TTL_AM2847
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* - \subpage TTL_INPUT
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* - \subpage TTL_TRISTATE3
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* - \subpage TTL_TRISTATE
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* - \subpage UA741_DIP10
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* - \subpage UA741_DIP14
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* - \subpage UA741_DIP8
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* - \subpage VCCS
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* - \subpage VCVS
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* - \subpage VS
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*
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* \mainpage Netlist
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/*! \mainpage notitle
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##Netlist
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Reference in New Issue
Block a user