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Some documentation work.

Browse Source 
Along the way, set default models for devices missing them. 
Fix standalone makefile to work in mingw environment. (nw)
This commit is contained in:
couriersud 2017-02-01 20:30:42 +01:00
parent 52ed4a179a
commit ee8fed61c2
9 changed files with 264 additions and 26 deletions
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3
nl_examples/ne555_astable.c
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@ -1,5 +1,7 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
//! [ne555 example]
/*
* ne555_astable.c
*
@ -48,3 +50,4 @@ NETLIST_START(ne555_astable)
LOG(log3, 555.OUT)
NETLIST_END()
//! [ne555 example]

2
src/lib/netlist/analog/nld_bjt.cpp
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@ -127,7 +127,7 @@ public:
};
NETLIB_CONSTRUCTOR(Q)
, m_model(*this, "MODEL", "")
, m_model(*this, "MODEL", "NPN")
, m_qtype(BJT_NPN)
{
}

2
src/lib/netlist/analog/nlid_twoterm.h
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@ -348,7 +348,7 @@ NETLIB_OBJECT_DERIVED(D, twoterm)
{
public:
NETLIB_CONSTRUCTOR_DERIVED(D, twoterm)
, m_model(*this, "MODEL", "")
, m_model(*this, "MODEL", "D")
, m_D(*this, "m_D")
{
register_subalias("A", m_P);

8
src/lib/netlist/build/doxygen.conf
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@ -32,7 +32,7 @@ DOXYFILE_ENCODING = UTF-8
# title of most generated pages and in a few other places.
# The default value is: My Project.
PROJECT_NAME = Netlist documentaton
PROJECT_NAME = Netlist documentation
# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
# could be handy for archiving the generated documentation or if some version
@ -771,7 +771,7 @@ WARN_LOGFILE =
# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
# Note: If this tag is empty the current directory is searched.
INPUT = ".." "../analog" "../documentation"
INPUT = .. ../analog ../documentation ../devices
# This tag can be used to specify the character encoding of the source files
# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
@ -844,7 +844,7 @@ EXCLUDE_SYMBOLS =
# that contain example code fragments that are included (see the \include
# command).
EXAMPLE_PATH =
EXAMPLE_PATH = ../../../../nl_examples
# If the value of the EXAMPLE_PATH tag contains directories, you can use the
# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
@ -1416,7 +1416,7 @@ DISABLE_INDEX = NO
# The default value is: NO.
# This tag requires that the tag GENERATE_HTML is set to YES.
GENERATE_TREEVIEW = NO
GENERATE_TREEVIEW = YES
# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
# doxygen will group on one line in the generated HTML documentation.

4
src/lib/netlist/build/makefile
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@ -195,11 +195,15 @@ doc:
#-------------------------------------------------
.depend: $(SOURCES)
ifeq ($(OS),windows)
@echo using existing .depend
else
@echo creating .depend
@rm -f ./.depend
@for i in $(SOURCES); do \
$(CC) $(CFLAGS) -MM $$i -MT `echo $$i | sed -e 's/$(SRC)/$(OBJ)/' -e 's/.cpp/.o/' ` >>./.depend; \
done
endif
depend: .depend

47
src/lib/netlist/devices/nld_ne555.cpp
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@ -1,8 +1,50 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_NE555.c
/*!
* \file nld_NE555.cpp
*
* \page NE555 NE555: PRECISION TIMERS
*
* The Swiss army knife for timing purposes
*
* \section ne555_1 Synopsis
*
* \code
* NE555(name)
* NE555_DIP(name)
* \endcode
*
* For the \c NE555 use verbose pin assignments like \c name.TRIG or \c name.OUT.
* For the \c NE555_DIP use pin numbers like \c name.1.
*
* \section ne555_2 Connection Diagram
*
* <pre>
* +--------+
* GND |1 ++ 8| VCC
* TRIG |2 7| DISCH
* OUT |3 6| THRES
* RESET |4 5| CONT
* +--------+
* </pre>
*
* Naming conventions follow Texas Instruments datasheet
*
* \section ne555_3 Function Table
*
* | CLR | CLK | D | Q | QQ |
* |-----|-----|---|:-:|:---:|
* | 0 | X | X | 0 | 1 |
* | 1 | R | 1 | 1 | 0 |
* | 1 | R | 0 | 0 | 1 |
* | 1 | 0 | X | Q0| Q0Q |
*
* \section ne555_4 Limitations
*
* Internal resistor network currently fixed to 5k.
*
* \section ne555_5 Example
* \snippet ne555_astable.c ne555 example
*/
#include "nld_ne555.h"
@ -96,6 +138,7 @@ namespace netlist
m_R3.do_reset();
m_RDIS.do_reset();
/* FIXME make resistance a parameter, properly model other variants */
m_R1.set_R(5000);
m_R2.set_R(5000);
m_R3.set_R(5000);

15
src/lib/netlist/devices/nld_ne555.h
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@ -1,20 +1,5 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_NE555.h
*
* NE555: PRECISION TIMERS
*
* +--------+
* GND |1 ++ 8| VCC
* TRIG |2 7| DISCH
* OUT |3 6| THRES
* RESET |4 5| CONT
* +--------+
*
* Naming conventions follow Texas Instruments datasheet
*
*/
#ifndef NLD_NE555_H_
#define NLD_NE555_H_

4
src/lib/netlist/devices/nlid_system.h
View File

@ -303,8 +303,8 @@ namespace netlist
NETLIB_OBJECT(function)
{
NETLIB_CONSTRUCTOR(function)
, m_N(*this, "N", 2)
, m_func(*this, "FUNC", "")
, m_N(*this, "N", 1)
, m_func(*this, "FUNC", "A0")
, m_Q(*this, "Q")
{
std::vector<pstring> inps;

205
src/lib/netlist/documentation/mainpage.dox.h
View File

@ -1,5 +1,208 @@
/*
* Documentation settings
*/
/*!
* \defgroup devices Devices
*
*/
/*!
* \page devices Devices
*
* Below is a list of all the devices currently supported ...
*
* - \subpage AFUNC
* - \subpage ANALOG_INPUT
* - \subpage CAP
* - \subpage CCCS
* - \subpage CD4001_DIP
* - \subpage CD4001_NOR
* - \subpage CD4016_DIP
* - \subpage CD4020_DIP
* - \subpage CD4020
* - \subpage CD4020_WI
* - \subpage CD4066_DIP
* - \subpage CD4066_GATE
* - \subpage CD4316_DIP
* - \subpage CD4316_GATE
* - \subpage CD4538_DIP
* - \subpage CLOCK
* - \subpage CS
* - \subpage DIODE
* - \subpage DUMMY_INPUT
* - \subpage EPROM_2716_DIP
* - \subpage EPROM_2716
* - \subpage EXTCLOCK
* - \subpage FRONTIER_DEV
* - \subpage GND
* - \subpage IND
* - \subpage LM324_DIP
* - \subpage LM358_DIP
* - \subpage LM3900
* - \subpage LM747A_DIP
* - \subpage LM747_DIP
* - \subpage LOGD
* - \subpage LOGIC_INPUT
* - \subpage LOG
* - \subpage LVCCS
* - \subpage MAINCLOCK
* - \subpage MB3614_DIP
* - \subpage MC14584B_DIP
* - \subpage MC14584B_GATE
* - \subpage MM5837_DIP
* - \subpage NE555_DIP
* - \subpage NE555
* - \subpage NETDEV_DELAY
* - \subpage NETDEV_RSFF
* - \subpage OPAMP
* - \subpage opamp_layout_1_11_6
* - \subpage opamp_layout_1_7_4
* - \subpage opamp_layout_1_8_5
* - \subpage opamp_layout_2_13_9_4
* - \subpage opamp_layout_2_8_4
* - \subpage opamp_layout_4_4_11
* - \subpage PARAMETER
* - \subpage POT2
* - \subpage POT
* - \subpage PROM_82S115_DIP
* - \subpage PROM_82S115
* - \subpage PROM_82S123_DIP
* - \subpage PROM_82S123
* - \subpage PROM_82S126_DIP
* - \subpage PROM_82S126
* - \subpage QBJT_EB
* - \subpage QBJT_SW
* - \subpage R2R_DAC
* - \subpage RAM_2102A_DIP
* - \subpage RAM_2102A
* - \subpage RES
* - \subpage RES_SWITCH
* - \subpage SN74LS629_DIP
* - \subpage SN74LS629
* - \subpage SOLVER
* - \subpage SWITCH2
* - \subpage SWITCH
* - \subpage TTL_7400_DIP
* - \subpage TTL_7400_GATE
* - \subpage TTL_7400_NAND
* - \subpage TTL_7402_DIP
* - \subpage TTL_7402_GATE
* - \subpage TTL_7402_NOR
* - \subpage TTL_7404_DIP
* - \subpage TTL_7404_GATE
* - \subpage TTL_7404_INVERT
* - \subpage TTL_7408_AND
* - \subpage TTL_7408_DIP
* - \subpage TTL_7408_GATE
* - \subpage TTL_74107A
* - \subpage TTL_74107_DIP
* - \subpage TTL_74107
* - \subpage TTL_7410_DIP
* - \subpage TTL_7410_GATE
* - \subpage TTL_7410_NAND
* - \subpage TTL_7411_AND
* - \subpage TTL_7411_DIP
* - \subpage TTL_7411_GATE
* - \subpage TTL_74123_DIP
* - \subpage TTL_74123
* - \subpage TTL_74153_DIP
* - \subpage TTL_74153
* - \subpage TTL_74161_DIP
* - \subpage TTL_74161
* - \subpage TTL_74165_DIP
* - \subpage TTL_74165
* - \subpage TTL_74166_DIP
* - \subpage TTL_74166
* - \subpage TTL_7416_DIP
* - \subpage TTL_7416_GATE
* - \subpage TTL_74174_DIP
* - \subpage TTL_74174
* - \subpage TTL_74175_DIP
* - \subpage TTL_74175
* - \subpage TTL_74192_DIP
* - \subpage TTL_74192
* - \subpage TTL_74193_DIP
* - \subpage TTL_74193
* - \subpage TTL_74194_DIP
* - \subpage TTL_74194
* - \subpage TTL_7420_DIP
* - \subpage TTL_7420_GATE
* - \subpage TTL_7420_NAND
* - \subpage TTL_7425_DIP
* - \subpage TTL_7425_GATE
* - \subpage TTL_7425_NOR
* - \subpage TTL_74260_DIP
* - \subpage TTL_74260_GATE
* - \subpage TTL_74260_NOR
* - \subpage TTL_74279_DIP
* - \subpage TTL_7427_DIP
* - \subpage TTL_7427_GATE
* - \subpage TTL_7427_NOR
* - \subpage TTL_7430_DIP
* - \subpage TTL_7430_GATE
* - \subpage TTL_7430_NAND
* - \subpage TTL_7432_DIP
* - \subpage TTL_7432_GATE
* - \subpage TTL_7432_OR
* - \subpage TTL_74365_DIP
* - \subpage TTL_74365
* - \subpage TTL_7437_DIP
* - \subpage TTL_7437_GATE
* - \subpage TTL_7437_NAND
* - \subpage TTL_7448_DIP
* - \subpage TTL_7448
* - \subpage TTL_7450_ANDORINVERT
* - \subpage TTL_7450_DIP
* - \subpage TTL_7473A_DIP
* - \subpage TTL_7473A
* - \subpage TTL_7473_DIP
* - \subpage TTL_7473
* - \subpage TTL_7474_DIP
* - \subpage TTL_7474
* - \subpage TTL_7475_DIP
* - \subpage TTL_7475
* - \subpage TTL_7477_DIP
* - \subpage TTL_7477
* - \subpage TTL_7483_DIP
* - \subpage TTL_7483
* - \subpage TTL_7485_DIP
* - \subpage TTL_7485
* - \subpage TTL_7486_DIP
* - \subpage TTL_7486_GATE
* - \subpage TTL_7486_XOR
* - \subpage TTL_7490_DIP
* - \subpage TTL_7490
* - \subpage TTL_7493_DIP
* - \subpage TTL_7493
* - \subpage TTL_82S16_DIP
* - \subpage TTL_82S16
* - \subpage TTL_9310_DIP
* - \subpage TTL_9310
* - \subpage TTL_9312_DIP
* - \subpage TTL_9312
* - \subpage TTL_9316_DIP
* - \subpage TTL_9316
* - \subpage TTL_9322_DIP
* - \subpage TTL_9322
* - \subpage TTL_9334_DIP
* - \subpage TTL_9334
* - \subpage TTL_9602_DIP
* - \subpage TTL_AM2847_DIP
* - \subpage TTL_AM2847
* - \subpage TTL_INPUT
* - \subpage TTL_TRISTATE3
* - \subpage TTL_TRISTATE
* - \subpage UA741_DIP10
* - \subpage UA741_DIP14
* - \subpage UA741_DIP8
* - \subpage VCCS
* - \subpage VCVS
* - \subpage VS
*
* \mainpage Netlist
/*! \mainpage notitle
##Netlist