mirror of
https://github.com/holub/mame
synced 2025-06-06 12:53:46 +03:00
bus/heathzenith/h89: Add Z-89-11 Multi-Mode Interface Card option (#13105)
This commit is contained in:
Mark Garlanger
GitHub
parent
926b6182b1
commit
ee988cf9c6
@ -5787,6 +5787,8 @@ if (BUSES["H89BUS"]~=null) then
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MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z_89_11.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z_89_11.h",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z37_fdc.cpp",
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MAME_DIR .. "src/devices/bus/heathzenith/h89/z37_fdc.h",
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}
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@ -16,6 +16,7 @@
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#include "sigmasoft_parallel_port.h"
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#include "sigmasoft_sound.h"
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#include "we_pullup.h"
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#include "z_89_11.h"
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#include "z37_fdc.h"
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void h89_left_cards(device_slot_interface &device)
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@ -30,6 +31,8 @@ void h89_right_cards(device_slot_interface &device)
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device.option_add("ha_88_3", H89BUS_HA_88_3);
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device.option_add("h_88_5", H89BUS_H_88_5);
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device.option_add("ss_snd", H89BUS_SIGMASOFT_SND);
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device.option_add("z_89_11", H89BUS_Z_89_11);
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device.option_add("z37fdc", H89BUS_Z37);
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}
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330
src/devices/bus/heathzenith/h89/z_89_11.cpp
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330
src/devices/bus/heathzenith/h89/z_89_11.cpp
Normal file
@ -0,0 +1,330 @@
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// license:BSD-3-Clause
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// copyright-holders:Mark Garlanger
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/***************************************************************************
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Heath/Zenith Z-89-11 Multi-Mode Interface Card
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****************************************************************************/
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#include "emu.h"
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#include "z_89_11.h"
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#include "bus/rs232/rs232.h"
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#include "machine/i8255.h"
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#include "machine/ins8250.h"
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#include "machine/scn_pci.h"
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namespace {
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class z_89_11_device : public device_t, public device_h89bus_right_card_interface
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{
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public:
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z_89_11_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = XTAL(1'843'200).value());
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virtual void write(u8 select_lines, u8 offset, u8 data) override;
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virtual u8 read(u8 select_lines, u8 offset) override;
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protected:
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virtual void device_start() override ATTR_COLD;
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virtual void device_reset() override ATTR_COLD;
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virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
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virtual ioport_constructor device_input_ports() const override ATTR_COLD;
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void lp_w(offs_t reg, u8 val);
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u8 lp_r(offs_t reg);
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void aux_w(offs_t reg, u8 val);
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u8 aux_r(offs_t reg);
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void modem_w(offs_t reg, u8 val);
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u8 modem_r(offs_t reg);
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void update_intr(u8 level);
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void aux_int(int data);
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required_device<i8255_device> m_lp;
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required_device<ins8250_device> m_aux;
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required_device<scn2661c_device> m_modem;
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required_ioport m_cfg_lp;
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required_ioport m_cfg_aux;
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required_ioport m_cfg_modem;
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bool m_lp_enabled;
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bool m_aux_enabled;
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bool m_modem_enabled;
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u8 m_lp_int_idx;
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u8 m_aux_int_idx;
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u8 m_modem_int_idx;
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int m_lp_intr;
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int m_aux_intr;
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int m_modem_intr;
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};
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z_89_11_device::z_89_11_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock):
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device_t(mconfig, H89BUS_Z_89_11, tag, owner, clock),
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device_h89bus_right_card_interface(mconfig, *this),
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m_lp(*this, "lp"),
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m_aux(*this, "aux"),
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m_modem(*this, "modem"),
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m_cfg_lp(*this, "CFG_LP"),
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m_cfg_aux(*this, "CFG_AUX"),
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m_cfg_modem(*this, "CFG_MODEM"),
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m_lp_intr(0),
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m_aux_intr(0),
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m_modem_intr(0)
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{
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}
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u8 z_89_11_device::read(u8 select_lines, u8 offset)
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{
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if ((select_lines & h89bus_device::H89_SER0) && (m_aux_enabled))
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{
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return aux_r(offset);
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}
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if ((select_lines & h89bus_device::H89_SER1) && (m_modem_enabled))
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{
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return modem_r(offset);
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}
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if ((select_lines & h89bus_device::H89_LP) && (m_lp_enabled))
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{
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return lp_r(offset);
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}
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return 0;
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}
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void z_89_11_device::write(u8 select_lines, u8 offset, u8 data)
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{
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if ((select_lines & h89bus_device::H89_SER0) && (m_aux_enabled))
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{
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aux_w(offset, data);
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return;
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}
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if ((select_lines & h89bus_device::H89_SER1) && (m_modem_enabled))
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{
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modem_w(offset, data);
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return;
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}
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if ((select_lines & h89bus_device::H89_LP) && (m_lp_enabled))
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{
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lp_w(offset, data);
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return;
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}
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}
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u8 z_89_11_device::lp_r(offs_t reg)
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{
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return m_lp->read(reg);
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}
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void z_89_11_device::lp_w(offs_t reg, u8 val)
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{
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m_lp->write(reg, val);
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}
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u8 z_89_11_device::aux_r(offs_t reg)
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{
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return m_aux->ins8250_r(reg);
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}
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void z_89_11_device::aux_w(offs_t reg, u8 val)
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{
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m_aux->ins8250_w(reg, val);
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}
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u8 z_89_11_device::modem_r(offs_t reg)
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{
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return m_modem->read(reg);
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}
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void z_89_11_device::modem_w(offs_t reg, u8 val)
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{
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m_modem->write(reg, val);
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}
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void z_89_11_device::update_intr(u8 level)
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{
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// check for interrupt disabled
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if (level == 0)
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{
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return;
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}
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// Handle multiple ports set to the same interrupt. If any are set, interrupt should be triggered
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int data = 0;
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if (m_lp_enabled && (m_lp_int_idx == level))
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{
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data |= m_lp_intr;
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}
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if (m_aux_enabled && (m_aux_int_idx == level))
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{
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data |= m_aux_intr;
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}
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if (m_modem_enabled && (m_modem_int_idx == level))
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{
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data |= m_modem_intr;
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}
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switch(level)
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{
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case 1:
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set_slot_int3(data);
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break;
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case 2:
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set_slot_int4(data);
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break;
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case 3:
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set_slot_int5(data);
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break;
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}
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}
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void z_89_11_device::aux_int(int data)
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{
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if (!m_aux_enabled)
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{
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return;
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}
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m_aux_intr = data;
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update_intr(m_aux_int_idx);
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}
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void z_89_11_device::device_start()
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{
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save_item(NAME(m_lp_enabled));
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save_item(NAME(m_lp_int_idx));
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save_item(NAME(m_aux_enabled));
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save_item(NAME(m_aux_int_idx));
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save_item(NAME(m_modem_enabled));
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save_item(NAME(m_modem_int_idx));
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save_item(NAME(m_lp_intr));
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save_item(NAME(m_aux_intr));
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save_item(NAME(m_modem_intr));
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}
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void z_89_11_device::device_reset()
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{
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ioport_value const cfg_lp(m_cfg_lp->read());
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ioport_value const cfg_aux(m_cfg_aux->read());
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ioport_value const cfg_modem(m_cfg_modem->read());
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m_lp_enabled = bool(BIT(cfg_lp, 0));
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m_aux_enabled = bool(BIT(cfg_aux, 0));
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m_modem_enabled = bool(BIT(cfg_modem, 0));
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// LP Interrupt level
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m_lp_int_idx = BIT(cfg_lp, 1, 2);
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// AUX Interrupt level
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m_aux_int_idx = BIT(cfg_aux, 1, 2);
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// MODEM Interrupt level
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m_modem_int_idx = BIT(cfg_modem, 1, 2);
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}
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void z_89_11_device::device_add_mconfig(machine_config &config)
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{
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// Parallel 0xD0-0xD7 (320 - 327 octal)
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I8255(config, m_lp, m_clock);
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// AUX DCE 0xE0-0xE7 (340 - 347 octal)
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//
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INS8250(config, m_aux, XTAL(1'843'200));
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m_aux->out_tx_callback().set("dce2", FUNC(rs232_port_device::write_txd));
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m_aux->out_dtr_callback().set("dce2", FUNC(rs232_port_device::write_dtr));
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m_aux->out_rts_callback().set("dce2", FUNC(rs232_port_device::write_rts));
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m_aux->out_int_callback().set(FUNC(z_89_11_device::aux_int));
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rs232_port_device &dce2(RS232_PORT(config, "dce2", default_rs232_devices, "loopback"));
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dce2.rxd_handler().set(m_aux, FUNC(ins8250_device::rx_w));
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dce2.dcd_handler().set(m_aux, FUNC(ins8250_device::dcd_w));
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dce2.dsr_handler().set(m_aux, FUNC(ins8250_device::dsr_w));
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dce2.cts_handler().set(m_aux, FUNC(ins8250_device::cts_w));
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dce2.ri_handler().set(m_aux, FUNC(ins8250_device::ri_w));
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// Modem DTE 0xD7-0xDF (330 - 337 octal)
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SCN2661C(config, m_modem, XTAL(5'068'800));
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m_modem->txd_handler().set("dte", FUNC(rs232_port_device::write_txd));
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m_modem->dtr_handler().set("dte", FUNC(rs232_port_device::write_dtr));
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m_modem->rts_handler().set("dte", FUNC(rs232_port_device::write_rts));
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rs232_port_device &dte(RS232_PORT(config, "dte", default_rs232_devices, "loopback"));
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dte.rxd_handler().set(m_modem, FUNC(scn2661c_device::rxd_w));
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dte.dcd_handler().set(m_modem, FUNC(scn2661c_device::dcd_w));
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dte.dsr_handler().set(m_modem, FUNC(scn2661c_device::dsr_w));
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dte.cts_handler().set(m_modem, FUNC(scn2661c_device::cts_w));
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}
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static INPUT_PORTS_START( z_89_11_device )
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// INS8250
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PORT_START("CFG_LP")
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PORT_CONFNAME(0x01, 0x01, "LP - DCE (340 octal) Enabled" )
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x01, DEF_STR( Yes ))
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PORT_CONFNAME(0x06, 0x00, "LP - DCE (340 octal) Interrupt level")
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PORT_CONFSETTING( 0x00, DEF_STR( None ))
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PORT_CONFSETTING( 0x02, "3")
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PORT_CONFSETTING( 0x04, "4")
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PORT_CONFSETTING( 0x06, "5")
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// 8255 chip
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PORT_START("CFG_AUX")
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PORT_CONFNAME(0x01, 0x01, "AUX - DCE (320 octal) Enabled" )
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x01, DEF_STR( Yes ))
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PORT_CONFNAME(0x06, 0x00, "AUX - DCE (320 octal) Interrupt level")
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PORT_CONFSETTING( 0x00, DEF_STR( None ))
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PORT_CONFSETTING( 0x02, "3")
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PORT_CONFSETTING( 0x04, "4")
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PORT_CONFSETTING( 0x06, "5")
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// 2661
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PORT_START("CFG_MODEM")
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PORT_CONFNAME(0x01, 0x01, "MODEM - DTE (330 octal) Enabled" )
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x01, DEF_STR( Yes ))
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PORT_CONFNAME(0x06, 0x00, "MODEM - DTE (330 octal) Interrupt level")
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PORT_CONFSETTING( 0x00, DEF_STR( None ))
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PORT_CONFSETTING( 0x02, "3")
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PORT_CONFSETTING( 0x04, "4")
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PORT_CONFSETTING( 0x06, "5")
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PORT_CONFNAME(0x08, 0x00, "Interrupt on Rx Ready Enabled")
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x08, DEF_STR( Yes ))
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PORT_CONFNAME(0x10, 0x00, "Interrupt on Tx Ready Enabled")
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x10, DEF_STR( Yes ))
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PORT_CONFNAME(0x20, 0x00, "Interrupt on Tx Empty Enabled")
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PORT_CONFSETTING( 0x00, DEF_STR( No ))
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PORT_CONFSETTING( 0x20, DEF_STR( Yes ))
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INPUT_PORTS_END
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ioport_constructor z_89_11_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(z_89_11_device);
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}
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}
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DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_Z_89_11, device_h89bus_right_card_interface, z_89_11_device, "z_89_11", "Heath/Zenith Z-89-11 Multi-Function I/O Card");
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19
src/devices/bus/heathzenith/h89/z_89_11.h
Normal file
19
src/devices/bus/heathzenith/h89/z_89_11.h
Normal file
@ -0,0 +1,19 @@
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// license:BSD-3-Clause
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// copyright-holders:Mark Garlanger
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/***************************************************************************
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Heath/Zenith Z-89-1 Multi-Function I/O card
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****************************************************************************/
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#ifndef MAME_BUS_HEATHZENITH_H89_Z_89_11_H
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#define MAME_BUS_HEATHZENITH_H89_Z_89_11_H
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#pragma once
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#include "h89bus.h"
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DECLARE_DEVICE_TYPE(H89BUS_Z_89_11, device_h89bus_right_card_interface)
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#endif // MAME_BUS_HEATHZENITH_H89_Z_89_11_H
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