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mcs51.c: Modernized cpu core.

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This commit is contained in:
Wilbert Pol 2013-08-27 18:24:26 +00:00
parent a620906b8d
commit eeaccc5f94
15 changed files with 1069 additions and 984 deletions
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1555
src/emu/cpu/mcs51/mcs51.c
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File diff suppressed because it is too large Load Diff

447
src/emu/cpu/mcs51/mcs51.h
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@ -72,49 +72,403 @@ enum
MCS51_PORT_TX = 0x20004, /* P3.1 */
};
/***************************************************************************
CONFIGURATION
***************************************************************************/
/* configuration of the DS5002FP */
struct ds5002fp_config
class mcs51_cpu_device : public cpu_device
{
UINT8 mcon; /* bootstrap loader MCON register */
UINT8 rpctl; /* bootstrap loader RPCTL register */
UINT8 crc; /* bootstrap loader CRC register */
public:
// construction/destruction
mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
void i8051_set_serial_tx_callback(write8_delegate tx_func);
void i8051_set_serial_rx_callback(read8_delegate rx_func);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 12 - 1) / 12; }
virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 12); }
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 20; }
virtual UINT32 execute_input_lines() const { return 6; }
virtual UINT32 execute_default_irq_vector() const { return 0; }
virtual void execute_run();
virtual void execute_set_input(int inputnum, int state);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
}
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry);
virtual void state_export(const device_state_entry &entry);
void state_string_export(const device_state_entry &entry, astring &string);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 5; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
protected:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
//Internal stuff
UINT16 m_ppc; //previous pc
UINT16 m_pc; //current pc
UINT16 m_features; //features of this cpu
UINT8 m_rwm; //Signals that the current instruction is a read/write/modify instruction
int m_inst_cycles; /* cycles for the current instruction */
int m_ram_mask; /* second ram bank for indirect access available ? */
int m_num_interrupts; /* number of interrupts supported */
int m_recalc_parity; /* recalculate parity before next instruction */
UINT32 m_last_line_state; /* last state of input lines line */
int m_t0_cnt; /* number of 0->1 transistions on T0 line */
int m_t1_cnt; /* number of 0->1 transistions on T1 line */
int m_t2_cnt; /* number of 0->1 transistions on T2 line */
int m_t2ex_cnt; /* number of 0->1 transistions on T2EX line */
int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
UINT8 m_irq_active; /* mask which irq levels are serviced */
UINT8 m_irq_prio[8]; /* interrupt priority */
int m_icount;
struct mcs51_uart
{
UINT8 data_out; //Data to send out
UINT8 bits_to_send; //How many bits left to send when transmitting out the serial port
int smod_div; /* signal divided by 2^SMOD */
int rx_clk; /* rx clock */
int tx_clk; /* tx clock */
UINT8 delay_cycles; //Gross Hack;
} m_uart; /* internal uart */
/* Internal Ram */
UINT8 *m_internal_ram; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
UINT8 *m_sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
/* SFR Callbacks */
virtual void sfr_write(size_t offset, UINT8 data);
virtual UINT8 sfr_read(size_t offset);
/* Memory spaces */
address_space *m_program;
direct_read_data *m_direct;
address_space *m_data;
address_space *m_io;
/* Serial Port TX/RX Callbacks */
// TODO: Move to special port r/w
write8_delegate m_serial_tx_callback; //Call back funciton when sending data out of serial port
read8_delegate m_serial_rx_callback; //Call back function to retrieve data when receiving serial port data
/* DS5002FP */
struct {
UINT8 previous_ta; /* Previous Timed Access value */
UINT8 ta_window; /* Limed Access window */
UINT8 range; /* Memory Range */
/* Bootstrap Configuration */
UINT8 mcon; /* bootstrap loader MCON register */
UINT8 rpctl; /* bootstrap loader RPCTL register */
UINT8 crc; /* bootstrap loader CRC register */
} m_ds5002fp;
// for the debugger
UINT8 m_rtemp;
static const UINT8 mcs51_cycles[256];
UINT8 iram_iread(offs_t a);
void iram_iwrite(offs_t a, UINT8 d);
void clear_current_irq();
UINT8 r_acc();
UINT8 r_psw();
void update_ptrs();
offs_t external_ram_iaddr(offs_t offset, offs_t mem_mask);
UINT8 iram_read(size_t offset);
void iram_write(size_t offset, UINT8 data);
void push_pc();
void pop_pc();
void set_parity();
UINT8 bit_address_r(UINT8 offset);
void bit_address_w(UINT8 offset, UINT8 bit);
void do_add_flags(UINT8 a, UINT8 data, UINT8 c);
void do_sub_flags(UINT8 a, UINT8 data, UINT8 c);
void transmit_receive(int source);
void update_timer_t0(int cycles);
void update_timer_t1(int cycles);
void update_timer_t2(int cycles);
void update_timers(int cycles);
void serial_transmit(UINT8 data);
void serial_receive();
void update_serial(int cycles);
void update_irq_prio(UINT8 ipl, UINT8 iph);
void execute_op(UINT8 op);
void check_irqs();
void burn_cycles(int cycles);
void acall(UINT8 r);
void add_a_byte(UINT8 r);
void add_a_mem(UINT8 r);
void add_a_ir(UINT8 r);
void add_a_r(UINT8 r);
void addc_a_byte(UINT8 r);
void addc_a_mem(UINT8 r);
void addc_a_ir(UINT8 r);
void addc_a_r(UINT8 r);
void ajmp(UINT8 r);
void anl_mem_a(UINT8 r);
void anl_mem_byte(UINT8 r);
void anl_a_byte(UINT8 r);
void anl_a_mem(UINT8 r);
void anl_a_ir(UINT8 r);
void anl_a_r(UINT8 r);
void anl_c_bitaddr(UINT8 r);
void anl_c_nbitaddr(UINT8 r);
void cjne_a_byte(UINT8 r);
void cjne_a_mem(UINT8 r);
void cjne_ir_byte(UINT8 r);
void cjne_r_byte(UINT8 r);
void clr_bitaddr(UINT8 r);
void clr_c(UINT8 r);
void clr_a(UINT8 r);
void cpl_bitaddr(UINT8 r);
void cpl_c(UINT8 r);
void cpl_a(UINT8 r);
void da_a(UINT8 r);
void dec_a(UINT8 r);
void dec_mem(UINT8 r);
void dec_ir(UINT8 r);
void dec_r(UINT8 r);
void div_ab(UINT8 r);
void djnz_mem(UINT8 r);
void djnz_r(UINT8 r);
void inc_a(UINT8 r);
void inc_mem(UINT8 r);
void inc_ir(UINT8 r);
void inc_r(UINT8 r);
void inc_dptr(UINT8 r);
void jb(UINT8 r);
void jbc(UINT8 r);
void jc(UINT8 r);
void jmp_iadptr(UINT8 r);
void jnb(UINT8 r);
void jnc(UINT8 r);
void jnz(UINT8 r);
void jz(UINT8 r);
void lcall(UINT8 r);
void ljmp(UINT8 r);
void mov_a_byte(UINT8 r);
void mov_a_mem(UINT8 r);
void mov_a_ir(UINT8 r);
void mov_a_r(UINT8 r);
void mov_mem_byte(UINT8 r);
void mov_mem_mem(UINT8 r);
void mov_ir_byte(UINT8 r);
void mov_r_byte(UINT8 r);
void mov_mem_ir(UINT8 r);
void mov_mem_r(UINT8 r);
void mov_dptr_byte(UINT8 r);
void mov_bitaddr_c(UINT8 r);
void mov_ir_mem(UINT8 r);
void mov_r_mem(UINT8 r);
void mov_mem_a(UINT8 r);
void mov_ir_a(UINT8 r);
void mov_r_a(UINT8 r);
void movc_a_iapc(UINT8 r);
void mov_c_bitaddr(UINT8 r);
void movc_a_iadptr(UINT8 r);
void movx_a_idptr(UINT8 r);
void movx_a_ir(UINT8 r);
void movx_idptr_a(UINT8 r);
void movx_ir_a(UINT8 r);
void mul_ab(UINT8 r);
void nop(UINT8 r);
void orl_mem_a(UINT8 r);
void orl_mem_byte(UINT8 r);
void orl_a_byte(UINT8 r);
void orl_a_mem(UINT8 r);
void orl_a_ir(UINT8 r);
void orl_a_r(UINT8 r);
void orl_c_bitaddr(UINT8 r);
void orl_c_nbitaddr(UINT8 r);
void pop(UINT8 r);
void push(UINT8 r);
void ret(UINT8 r);
void reti(UINT8 r);
void rl_a(UINT8 r);
void rlc_a(UINT8 r);
void rr_a(UINT8 r);
void rrc_a(UINT8 r);
void setb_c(UINT8 r);
void setb_bitaddr(UINT8 r);
void sjmp(UINT8 r);
void subb_a_byte(UINT8 r);
void subb_a_mem(UINT8 r);
void subb_a_ir(UINT8 r);
void subb_a_r(UINT8 r);
void swap_a(UINT8 r);
void xch_a_mem(UINT8 r);
void xch_a_ir(UINT8 r);
void xch_a_r(UINT8 r);
void xchd_a_ir(UINT8 r);
void xrl_mem_a(UINT8 r);
void xrl_mem_byte(UINT8 r);
void xrl_a_byte(UINT8 r);
void xrl_a_mem(UINT8 r);
void xrl_a_ir(UINT8 r);
void xrl_a_r(UINT8 r);
void illegal(UINT8 r);
UINT8 ds5002fp_protected(size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask);
};
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
extern void i8051_set_serial_tx_callback(device_t *device, write8_delegate tx_func);
extern void i8051_set_serial_rx_callback(device_t *device, read8_delegate rx_func);
/* variants with no internal rom and 128 byte internal memory */
DECLARE_LEGACY_CPU_DEVICE(I8031, i8031);
extern const device_type I8031;
/* variants with no internal rom and 256 byte internal memory */
DECLARE_LEGACY_CPU_DEVICE(I8032, i8032);
extern const device_type I8032;
/* variants 4k internal rom and 128 byte internal memory */
DECLARE_LEGACY_CPU_DEVICE(I8051, i8051);
DECLARE_LEGACY_CPU_DEVICE(I8751, i8751);
extern const device_type I8051;
extern const device_type I8751;
/* variants 8k internal rom and 256 byte internal memory and more registers */
DECLARE_LEGACY_CPU_DEVICE(I8052, i8052);
DECLARE_LEGACY_CPU_DEVICE(I8752, i8752);
extern const device_type I8052;
extern const device_type I8752;
/* cmos variants */
DECLARE_LEGACY_CPU_DEVICE(I80C31, i80c31);
DECLARE_LEGACY_CPU_DEVICE(I80C51, i80c51);
DECLARE_LEGACY_CPU_DEVICE(I87C51, i87c51);
DECLARE_LEGACY_CPU_DEVICE(I80C32, i80c32);
DECLARE_LEGACY_CPU_DEVICE(I80C52, i80c52);
DECLARE_LEGACY_CPU_DEVICE(I87C52, i87c52);
extern const device_type I80C31;
extern const device_type I80C51;
extern const device_type I87C51;
extern const device_type I80C32;
extern const device_type I80C52;
extern const device_type I87C52;
/* 4k internal perom and 128 internal ram and 2 analog comparators */
DECLARE_LEGACY_CPU_DEVICE(AT89C4051, at89c4051);
extern const device_type AT89C4051;
extern const device_type DS5002FP;
class i8031_device : public mcs51_cpu_device
{
public:
// construction/destruction
i8031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i8051_device : public mcs51_cpu_device
{
public:
// construction/destruction
i8051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i8751_device : public mcs51_cpu_device
{
public:
// construction/destruction
i8751_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i8052_device : public mcs51_cpu_device
{
public:
// construction/destruction
i8052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
i8052_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
/* SFR Callbacks */
virtual void sfr_write(size_t offset, UINT8 data);
virtual UINT8 sfr_read(size_t offset);
};
class i8032_device : public i8052_device
{
public:
// construction/destruction
i8032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i8752_device : public i8052_device
{
public:
// construction/destruction
i8752_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i80c31_device : public i8052_device
{
public:
// construction/destruction
i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
};
class i80c51_device : public mcs51_cpu_device
{
public:
// construction/destruction
i80c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
i80c51_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
};
class i87c51_device : public i80c51_device
{
public:
// construction/destruction
i87c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i80c52_device : public i8052_device
{
public:
// construction/destruction
i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
i80c52_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
/* SFR Callbacks */
virtual void sfr_write(size_t offset, UINT8 data);
virtual UINT8 sfr_read(size_t offset);
};
class i80c32_device : public i80c52_device
{
public:
// construction/destruction
i80c32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class i87c52_device : public i80c52_device
{
public:
// construction/destruction
i87c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class at89c4051_device : public i80c51_device
{
public:
// construction/destruction
at89c4051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
/*
* The DS5002FP has 2 16 bits data address buses (the byte-wide bus and the expanded bus). The exact memory position accessed depends on the
@ -132,17 +486,28 @@ DECLARE_LEGACY_CPU_DEVICE(AT89C4051, at89c4051);
* Internal ram 128k and security features
*/
DECLARE_LEGACY_CPU_DEVICE(DS5002FP, ds5002fp);
#define MCFG_DS5002FP_CONFIG(_mcon, _rpctl, _crc) \
ds5002fp_device::set_mcon(*device, _mcon); \
ds5002fp_device::set_rpctl(*device, _rpctl); \
ds5002fp_device::set_crc(*device, _crc);
class ds5002fp_device : public mcs51_cpu_device
{
public:
// construction/destruction
ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/****************************************************************************
* Disassembler
****************************************************************************/
static void set_mcon(device_t &device, UINT8 mcon) { downcast<ds5002fp_device &>(device).m_ds5002fp.mcon = mcon; }
static void set_rpctl(device_t &device, UINT8 rpctl) { downcast<ds5002fp_device &>(device).m_ds5002fp.rpctl = rpctl; }
static void set_crc(device_t &device, UINT8 crc) { downcast<ds5002fp_device &>(device).m_ds5002fp.crc = crc; }
protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
/* SFR Callbacks */
virtual void sfr_write(size_t offset, UINT8 data);
virtual UINT8 sfr_read(size_t offset);
};
CPU_DISASSEMBLE( i8051 );
CPU_DISASSEMBLE( i80c51 );
CPU_DISASSEMBLE( i8052 );
CPU_DISASSEMBLE( i80c52 );
CPU_DISASSEMBLE( ds5002fp );
#endif /* __MCS51_H__ */

2
src/emu/cpu/mcs51/mcs51ops.c
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@ -976,5 +976,5 @@ OPHANDLER( xrl_a_r )
//illegal opcodes
OPHANDLER( illegal )
{
LOG(("i8051 '%s': illegal opcode at 0x%03x: %02x\n", mcs51_state->device->tag(), PC-1, r));
LOG(("i8051 '%s': illegal opcode at 0x%03x: %02x\n", tag(), PC-1, r));
}

2
src/emu/sound/qs1000.c
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@ -234,7 +234,7 @@ void qs1000_device::device_start()
m_p2_w_func.resolve(m_out_p2_cb, *this);
m_p3_w_func.resolve(m_out_p3_cb, *this);
i8051_set_serial_rx_callback(m_cpu, read8_delegate(FUNC(qs1000_device::data_to_i8052),this));
m_cpu->i8051_set_serial_rx_callback(read8_delegate(FUNC(qs1000_device::data_to_i8052),this));
// TODO: register state for saving
}

2
src/mame/drivers/eolith.c
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@ -1512,7 +1512,7 @@ DRIVER_INIT_MEMBER(eolith_state,eolith)
init_eolith_speedup(machine());
// Sound CPU -> QS1000 CPU serial link
i8051_set_serial_tx_callback(m_soundcpu, write8_delegate(FUNC(eolith_state::soundcpu_to_qs1000),this));
m_soundcpu->i8051_set_serial_tx_callback(write8_delegate(FUNC(eolith_state::soundcpu_to_qs1000),this));
// Configure the sound ROM banking
membank("sound_bank")->configure_entries(0, 16, memregion("sounddata")->base(), 0x8000);

6
src/mame/drivers/maygayv1.c
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@ -250,7 +250,7 @@ public:
DECLARE_WRITE8_MEMBER(data_from_i8031);
DECLARE_READ8_MEMBER(data_to_i8031);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_soundcpu;
required_device<i8052_device> m_soundcpu;
required_device<upd7759_device> m_upd7759;
};
@ -1018,8 +1018,8 @@ void maygayv1_state::machine_start()
// duart_68681_init(DUART_CLOCK, duart_irq_handler, duart_tx);
i8051_set_serial_tx_callback(m_soundcpu, write8_delegate(FUNC(maygayv1_state::data_from_i8031),this));
i8051_set_serial_rx_callback(m_soundcpu, read8_delegate(FUNC(maygayv1_state::data_to_i8031),this));
m_soundcpu->i8051_set_serial_tx_callback(write8_delegate(FUNC(maygayv1_state::data_from_i8031),this));
m_soundcpu->i8051_set_serial_rx_callback(read8_delegate(FUNC(maygayv1_state::data_to_i8031),this));
}
void maygayv1_state::machine_reset()

10
src/mame/drivers/wrally.c
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@ -144,14 +144,6 @@ static ADDRESS_MAP_START( dallas_ram, AS_IO, 8, wrally_state )
AM_RANGE(0x0000, 0xffff) AM_READWRITE(dallas_share_r, dallas_share_w) AM_MASK(0x3fff) /* Shared RAM with the main CPU */
ADDRESS_MAP_END
/* DS5002FP configuration */
static const ds5002fp_config dallas_config =
{
0x88, /* bootstrap loader MCON register */
0x00, /* bootstrap loader RPCTL register */
0x80 /* bootstrap loader CRC register */
};
static INPUT_PORTS_START( wrally )
PORT_START("DSW")
PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:8,7")
@ -251,7 +243,7 @@ static MACHINE_CONFIG_START( wrally, wrally_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", wrally_state, irq6_line_hold)
MCFG_CPU_ADD("mcu", DS5002FP, XTAL_24MHz/2) /* verified on pcb */
MCFG_CPU_CONFIG(dallas_config)
MCFG_DS5002FP_CONFIG( 0x88, 0x00, 0x80 )
MCFG_CPU_PROGRAM_MAP(dallas_rom)
MCFG_CPU_IO_MAP(dallas_ram)

3
src/mame/includes/eolith.h
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@ -1,4 +1,5 @@
#include "cpu/mcs51/mcs51.h"
#include "sound/qs1000.h"
class eolith_state : public driver_device
@ -26,7 +27,7 @@ public:
UINT8 m_data_to_qs1000;
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_soundcpu;
optional_device<i8032_device> m_soundcpu;
optional_device<qs1000_device> m_qs1000;
optional_ioport m_in0; // klondkp doesn't have it
optional_ioport m_eepromoutport;

3
src/mame/includes/micro3d.h
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@ -5,6 +5,7 @@
*************************************************************************/
#include "cpu/tms34010/tms34010.h"
#include "cpu/mcs51/mcs51.h"
#include "sound/upd7759.h"
@ -132,7 +133,7 @@ public:
DECLARE_WRITE8_MEMBER(data_from_i8031);
DECLARE_READ8_MEMBER(data_to_i8031);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
required_device<i8051_device> m_audiocpu;
required_device<upd7759_device> m_upd7759;
required_device<cpu_device> m_drmath;
required_device<cpu_device> m_vgb;

4
src/mame/machine/micro3d.c
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@ -617,8 +617,8 @@ DRIVER_INIT_MEMBER(micro3d_state,micro3d)
{
address_space &space = m_drmath->space(AS_DATA);
i8051_set_serial_tx_callback(m_audiocpu, write8_delegate(FUNC(micro3d_state::data_from_i8031),this));
i8051_set_serial_rx_callback(m_audiocpu, read8_delegate(FUNC(micro3d_state::data_to_i8031),this));
m_audiocpu->i8051_set_serial_tx_callback(write8_delegate(FUNC(micro3d_state::data_from_i8031),this));
m_audiocpu->i8051_set_serial_rx_callback(read8_delegate(FUNC(micro3d_state::data_to_i8031),this));
m_duart68681 = machine().device("duart68681");

6
src/mess/drivers/basic52.c
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@ -47,7 +47,7 @@ public:
DECLARE_WRITE8_MEMBER(kbd_put);
DECLARE_READ8_MEMBER(unk_r);
UINT8 m_term_data;
required_device<cpu_device> m_maincpu;
required_device<mcs51_cpu_device> m_maincpu;
required_device<generic_terminal_device> m_terminal;
virtual void machine_reset();
DECLARE_WRITE8_MEMBER(to_term);
@ -96,8 +96,8 @@ READ8_MEMBER( basic52_state::unk_r)
void basic52_state::machine_reset()
{
i8051_set_serial_tx_callback(m_maincpu, write8_delegate(FUNC(basic52_state::to_term),this));
i8051_set_serial_rx_callback(m_maincpu, read8_delegate(FUNC(basic52_state::from_term),this));
m_maincpu->i8051_set_serial_tx_callback(write8_delegate(FUNC(basic52_state::to_term),this));
m_maincpu->i8051_set_serial_rx_callback(read8_delegate(FUNC(basic52_state::from_term),this));
}
WRITE8_MEMBER( basic52_state::kbd_put )

4
src/mess/drivers/pes.c
View File

@ -228,8 +228,8 @@ void pes_state::machine_reset()
DRIVER_INIT_MEMBER(pes_state,pes)
{
i8051_set_serial_tx_callback(m_maincpu, write8_delegate(FUNC(pes_state::data_from_i8031),this));
i8051_set_serial_rx_callback(m_maincpu, read8_delegate(FUNC(pes_state::data_to_i8031),this));
m_maincpu->i8051_set_serial_tx_callback(write8_delegate(FUNC(pes_state::data_from_i8031),this));
m_maincpu->i8051_set_serial_rx_callback(read8_delegate(FUNC(pes_state::data_to_i8031),this));
}
/******************************************************************************

3
src/mess/includes/pes.h
View File

@ -11,6 +11,7 @@
#include "machine/terminal.h"
#include "sound/tms5220.h"
#include "cpu/mcs51/mcs51.h"
class pes_state : public driver_device
{
@ -22,7 +23,7 @@ public:
m_speech(*this, "tms5220")
{ }
required_device<cpu_device> m_maincpu;
required_device<i80c31_device> m_maincpu;
required_device<generic_terminal_device> m_terminal;
required_device<tms5220_device> m_speech;

4
src/mess/machine/wangpckb.c
View File

@ -413,8 +413,8 @@ wangpc_keyboard_device::wangpc_keyboard_device(const machine_config &mconfig, co
void wangpc_keyboard_device::device_start()
{
// set serial callbacks
i8051_set_serial_tx_callback(m_maincpu, WRITE8_DELEGATE(wangpc_keyboard_device, mcs51_tx_callback));
i8051_set_serial_rx_callback(m_maincpu, READ8_DELEGATE(wangpc_keyboard_device, mcs51_rx_callback));
m_maincpu->i8051_set_serial_tx_callback(WRITE8_DELEGATE(wangpc_keyboard_device, mcs51_tx_callback));
m_maincpu->i8051_set_serial_rx_callback(READ8_DELEGATE(wangpc_keyboard_device, mcs51_rx_callback));
set_data_frame(8, 2, SERIAL_PARITY_NONE);
}

2
src/mess/machine/wangpckb.h
View File

@ -72,7 +72,7 @@ protected:
virtual void input_callback(UINT8 state);
private:
required_device<cpu_device> m_maincpu;
required_device<i8051_device> m_maincpu;
required_ioport m_y0;
required_ioport m_y1;
required_ioport m_y2;