mirror of
https://github.com/holub/mame
synced 2025-10-06 17:08:28 +03:00
hp64k: Improved HP Hybrid CPU (still no DMA)
This commit is contained in:
fulivi
parent
7717489f3e
commit
eecc50b48a
File diff suppressed because it is too large
Load Diff
@ -10,13 +10,11 @@
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// discrete implementation of the 1960s into a multi-chip module (hence the "hybrid" name).
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// This emulator currently supports the 5061-3011 version only.
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//
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// There is very little information around on this processor.
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// For this emulator I mainly relied on these sources:
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// - http://www.hp9845.net/ website
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// - HP manual "Assembly development ROM manual for the HP9845": this is the most precious
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// and "enabling" resource of all
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// - US Patent 4,180,854 describing the HP9845 system
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// - Some manual for the 2116 processor
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// - Study of disassembly of firmware of HP64000 system
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// - A lot of "educated" guessing
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@ -40,6 +38,9 @@
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#define HP_IOADDR_PA_SHIFT 2
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#define HP_IOADDR_IC_SHIFT 0
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// Compose an I/O address from PA & IC
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#define HP_MAKE_IOADDR(pa , ic) (((pa) << HP_IOADDR_PA_SHIFT) | ((ic) << HP_IOADDR_IC_SHIFT))
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// Addresses of memory mapped registers
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#define HP_REG_A_ADDR 0x0000
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#define HP_REG_B_ADDR 0x0001
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@ -65,75 +66,76 @@ class hp_hybrid_cpu_device : public cpu_device
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{
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public:
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protected:
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hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
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hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 6; }
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virtual UINT32 execute_max_cycles() const { return 25; }
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virtual UINT32 execute_input_lines() const { return 2; }
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virtual UINT32 execute_default_irq_vector() const { return 0xffff; }
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 6; }
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virtual UINT32 execute_max_cycles() const { return 25; }
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virtual UINT32 execute_input_lines() const { return 2; }
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virtual UINT32 execute_default_irq_vector() const { return 0xffff; }
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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UINT16 execute_one(UINT16 opcode);
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UINT16 execute_one_sub(UINT16 opcode);
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UINT16 execute_one(UINT16 opcode);
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UINT16 execute_one_sub(UINT16 opcode);
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, std::string &str);
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, std::string &str);
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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private:
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address_space_config m_program_config;
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address_space_config m_io_config;
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private:
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address_space_config m_program_config;
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address_space_config m_io_config;
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address_space *m_program;
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direct_read_data *m_direct;
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address_space *m_io;
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int m_icount;
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address_space *m_program;
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direct_read_data *m_direct;
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address_space *m_io;
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int m_icount;
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// State of processor
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UINT16 m_reg_A; // Register A
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UINT16 m_reg_B; // Register B
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UINT16 m_reg_P; // Register P
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UINT16 m_reg_R; // Register R
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UINT16 m_reg_C; // Register C
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UINT16 m_reg_D; // Register D
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UINT16 m_reg_IV; // Register IV
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UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
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UINT16 m_flags; // Flags (carry, overflow, cb, db, int en, dma en, dma dir)
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UINT8 m_dmapa; // DMA peripheral address (4 bits)
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UINT16 m_dmama; // DMA address
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UINT16 m_dmac; // DMA counter
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UINT16 m_reg_I; // Instruction register
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// State of processor
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UINT16 m_reg_A; // Register A
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UINT16 m_reg_B; // Register B
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UINT16 m_reg_P; // Register P
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UINT16 m_reg_R; // Register R
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UINT16 m_reg_C; // Register C
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UINT16 m_reg_D; // Register D
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UINT16 m_reg_IV; // Register IV
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UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
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UINT16 m_flags; // Flags (carry, overflow, cb, db, int en, dma en, dma dir)
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UINT8 m_dmapa; // DMA peripheral address (4 bits)
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UINT16 m_dmama; // DMA address
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UINT16 m_dmac; // DMA counter
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UINT16 m_reg_I; // Instruction register
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UINT16 get_ea(UINT16 opcode);
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void do_add(UINT16& addend1 , UINT16 addend2);
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UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
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UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
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void do_pw(UINT16 opcode);
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UINT16 get_ea(UINT16 opcode);
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void do_add(UINT16& addend1 , UINT16 addend2);
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UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
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UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
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void do_pw(UINT16 opcode);
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void check_for_interrupts(void);
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UINT16 RM(UINT16 addr);
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void WM(UINT16 addr , UINT16 v);
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void WMB(UINT32 addr , UINT8 v);
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UINT16 RIO(UINT8 pa , UINT8 ic);
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void WIO(UINT8 pa , UINT8 ic , UINT16 v);
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UINT16 RM(UINT16 addr);
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void WM(UINT16 addr , UINT16 v);
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void WMB(UINT32 addr , UINT8 v);
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UINT16 RIO(UINT8 pa , UINT8 ic);
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void WIO(UINT8 pa , UINT8 ic , UINT16 v);
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};
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class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device
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{
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public:
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hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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extern const device_type HP_5061_3011;
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@ -11,84 +11,84 @@
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typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode);
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typedef struct {
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UINT16 m_op_mask;
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UINT16 m_opcode;
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const char *m_mnemonic;
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fn_dis_param m_param_fn;
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UINT32 m_dasm_flags;
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UINT16 m_op_mask;
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UINT16 m_opcode;
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const char *m_mnemonic;
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fn_dis_param m_param_fn;
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UINT32 m_dasm_flags;
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} dis_entry_t;
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static void addr_2_str(char *buffer , UINT16 addr , bool indirect)
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{
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char *s = buffer + strlen(buffer);
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char *s = buffer + strlen(buffer);
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s += sprintf(s , "$%04x" , addr);
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s += sprintf(s , "$%04x" , addr);
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switch (addr) {
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case HP_REG_A_ADDR:
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strcpy(s , "(A)");
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break;
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case HP_REG_B_ADDR:
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strcpy(s , "(B)");
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break;
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case HP_REG_P_ADDR:
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strcpy(s , "(P)");
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break;
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case HP_REG_R_ADDR:
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strcpy(s , "(R)");
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break;
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case HP_REG_R4_ADDR:
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strcpy(s , "(R4)");
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break;
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case HP_REG_R5_ADDR:
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strcpy(s , "(R5)");
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break;
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case HP_REG_R6_ADDR:
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strcpy(s , "(R6)");
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break;
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case HP_REG_R7_ADDR:
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strcpy(s , "(R7)");
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break;
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case HP_REG_IV_ADDR:
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strcpy(s , "(IV)");
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break;
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case HP_REG_PA_ADDR:
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strcpy(s , "(PA)");
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break;
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case HP_REG_DMAPA_ADDR:
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strcpy(s , "(DMAPA)");
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break;
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case HP_REG_DMAMA_ADDR:
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strcpy(s , "(DMAMA)");
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break;
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case HP_REG_DMAC_ADDR:
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strcpy(s , "(DMAC)");
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break;
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case HP_REG_C_ADDR:
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strcpy(s , "(C)");
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break;
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case HP_REG_D_ADDR:
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strcpy(s , "(D)");
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break;
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}
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switch (addr) {
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case HP_REG_A_ADDR:
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strcpy(s , "(A)");
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break;
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if (indirect) {
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strcat(s , ",I");
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}
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case HP_REG_B_ADDR:
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strcpy(s , "(B)");
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break;
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case HP_REG_P_ADDR:
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strcpy(s , "(P)");
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break;
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case HP_REG_R_ADDR:
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strcpy(s , "(R)");
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break;
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case HP_REG_R4_ADDR:
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strcpy(s , "(R4)");
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break;
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case HP_REG_R5_ADDR:
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strcpy(s , "(R5)");
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break;
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case HP_REG_R6_ADDR:
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strcpy(s , "(R6)");
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break;
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case HP_REG_R7_ADDR:
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strcpy(s , "(R7)");
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break;
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case HP_REG_IV_ADDR:
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strcpy(s , "(IV)");
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break;
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case HP_REG_PA_ADDR:
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strcpy(s , "(PA)");
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break;
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case HP_REG_DMAPA_ADDR:
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strcpy(s , "(DMAPA)");
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break;
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case HP_REG_DMAMA_ADDR:
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strcpy(s , "(DMAMA)");
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break;
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case HP_REG_DMAC_ADDR:
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strcpy(s , "(DMAC)");
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break;
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case HP_REG_C_ADDR:
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strcpy(s , "(C)");
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break;
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case HP_REG_D_ADDR:
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strcpy(s , "(D)");
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break;
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}
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if (indirect) {
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strcat(s , ",I");
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}
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}
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static void param_none(char *buffer , offs_t pc , UINT16 opcode)
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@ -97,185 +97,185 @@ static void param_none(char *buffer , offs_t pc , UINT16 opcode)
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static void param_loc(char *buffer , offs_t pc , UINT16 opcode)
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{
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UINT16 base;
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UINT16 off;
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if (opcode & 0x0400) {
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// Current page
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base = pc;
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} else {
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// Base page
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base = 0;
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}
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UINT16 base;
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UINT16 off;
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off = opcode & 0x3ff;
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if (off & 0x200) {
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off -= 0x400;
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}
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if (opcode & 0x0400) {
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// Current page
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base = pc;
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} else {
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// Base page
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base = 0;
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}
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addr_2_str(buffer , base + off , (opcode & 0x8000) != 0);
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off = opcode & 0x3ff;
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if (off & 0x200) {
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off -= 0x400;
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}
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addr_2_str(buffer , base + off , (opcode & 0x8000) != 0);
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}
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static void param_addr32(char *buffer , offs_t pc , UINT16 opcode)
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{
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addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0);
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addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0);
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}
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static void param_skip(char *buffer , offs_t pc , UINT16 opcode)
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{
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UINT16 off = opcode & 0x3f;
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if (off & 0x20) {
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off -= 0x40;
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}
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addr_2_str(buffer , pc + off , false);
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UINT16 off = opcode & 0x3f;
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if (off & 0x20) {
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off -= 0x40;
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}
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addr_2_str(buffer , pc + off , false);
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}
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static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode)
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{
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param_skip(buffer, pc, opcode);
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if (opcode & 0x80) {
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if (opcode & 0x40) {
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strcat(buffer , ",S");
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} else {
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strcat(buffer , ",C");
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param_skip(buffer, pc, opcode);
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if (opcode & 0x80) {
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if (opcode & 0x40) {
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strcat(buffer , ",S");
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} else {
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strcat(buffer , ",C");
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}
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}
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}
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}
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static void param_ret(char *buffer , offs_t pc , UINT16 opcode)
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{
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char *s = buffer + strlen(buffer);
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int off = opcode & 0x3f;
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if (off & 0x20) {
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off -= 0x40;
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}
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char *s = buffer + strlen(buffer);
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s += sprintf(s , "%d" , off);
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if (opcode & 0x40) {
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strcpy(s , ",P");
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}
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int off = opcode & 0x3f;
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if (off & 0x20) {
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off -= 0x40;
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}
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s += sprintf(s , "%d" , off);
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if (opcode & 0x40) {
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strcpy(s , ",P");
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}
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}
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static void param_n16(char *buffer , offs_t pc , UINT16 opcode)
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{
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char *s = buffer + strlen(buffer);
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char *s = buffer + strlen(buffer);
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sprintf(s , "%u" , (opcode & 0xf) + 1);
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sprintf(s , "%u" , (opcode & 0xf) + 1);
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}
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static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode)
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{
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addr_2_str(buffer, opcode & 7, false);
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addr_2_str(buffer, opcode & 7, false);
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if (opcode & 0x80) {
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strcat(buffer , ",D");
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} else {
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strcat(buffer , ",I");
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}
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if (opcode & 0x80) {
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strcat(buffer , ",D");
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} else {
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strcat(buffer , ",I");
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}
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}
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static const dis_entry_t dis_table[] = {
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// *** BPC Instructions ***
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{0xffff , 0x0000 , "NOP" , param_none , 0 },
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{0x7800 , 0x0000 , "LDA" , param_loc , 0 },
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{0x7800 , 0x0800 , "LDB" , param_loc , 0 },
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{0x7800 , 0x1000 , "CPA" , param_loc , 0 },
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{0x7800 , 0x1800 , "CPB" , param_loc , 0 },
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{0x7800 , 0x2000 , "ADA" , param_loc , 0 },
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{0x7800 , 0x2800 , "ADB" , param_loc , 0 },
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{0x7800 , 0x3000 , "STA" , param_loc , 0 },
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{0x7800 , 0x3800 , "STB" , param_loc , 0 },
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{0x7800 , 0x4000 , "JSM" , param_loc , DASMFLAG_STEP_OVER },
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{0x7800 , 0x4800 , "ISZ" , param_loc , 0 },
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{0x7800 , 0x5000 , "AND" , param_loc , 0 },
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{0x7800 , 0x5800 , "DSZ" , param_loc , 0 },
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{0x7800 , 0x6000 , "IOR" , param_loc , 0 },
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{0x7800 , 0x6800 , "JMP" , param_loc , 0 },
|
||||
{0x7fe0 , 0x7000 , "EXE" , param_addr32 , 0 },
|
||||
{0xffc0 , 0x7400 , "RZA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7C00 , "RZB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7440 , "RIA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7C40 , "RIB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7500 , "SZA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7D00 , "SZB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7540 , "SIA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7D40 , "SIB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7480 , "SFS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7580 , "SFC" , param_skip , 0 },
|
||||
{0xffc0 , 0x7c80 , "SSS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7d80 , "SSC" , param_skip , 0 },
|
||||
{0xffc0 , 0x7cc0 , "SHS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7dc0 , "SHC" , param_skip , 0 },
|
||||
{0xff00 , 0x7600 , "SLA" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7e00 , "SLB" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7700 , "RLA" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7f00 , "RLB" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf400 , "SAP" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfc00 , "SBP" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf500 , "SAM" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfd00 , "SBM" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf600 , "SOC" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf700 , "SOS" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfe00 , "SEC" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xff00 , "SES" , param_skip_sc , 0 },
|
||||
{0xffff , 0xf020 , "TCA" , param_none , 0 },
|
||||
{0xffff , 0xf820 , "TCB" , param_none , 0 },
|
||||
{0xffff , 0xf060 , "CMA" , param_none , 0 },
|
||||
{0xffff , 0xf860 , "CMB" , param_none , 0 },
|
||||
{0xff80 , 0xf080 , "RET" , param_ret , DASMFLAG_STEP_OUT },
|
||||
{0xfff0 , 0xf100 , "AAR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf900 , "ABR" , param_n16 , 0 },
|
||||
{0xffff , 0xf14f , "CLA" , param_none , 0 },
|
||||
{0xfff0 , 0xf140 , "SAR" , param_n16 , 0 },
|
||||
{0xffff , 0xf94f , "CLB" , param_none , 0 },
|
||||
{0xfff0 , 0xf940 , "SBR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf180 , "SAL" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf980 , "SBL" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf1c0 , "RAR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf9c0 , "RBR" , param_n16 , 0 },
|
||||
// *** IOC Instructions ***
|
||||
{0xffff , 0x7100 , "SDO" , param_none , 0 },
|
||||
{0xffff , 0x7108 , "SDI" , param_none , 0 },
|
||||
{0xffff , 0x7110 , "EIR" , param_none , 0 },
|
||||
{0xffff , 0x7118 , "DIR" , param_none , 0 },
|
||||
{0xffff , 0x7120 , "DMA" , param_none , 0 },
|
||||
{0xffff , 0x7128 , "PCM" , param_none , 0 },
|
||||
{0xffff , 0x7138 , "DDR" , param_none , 0 },
|
||||
{0xffff , 0x7140 , "DBL" , param_none , 0 },
|
||||
{0xffff , 0x7148 , "CBL" , param_none , 0 },
|
||||
{0xffff , 0x7150 , "DBU" , param_none , 0 },
|
||||
{0xffff , 0x7158 , "CBU" , param_none , 0 },
|
||||
{0xff78 , 0x7160 , "PWC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7168 , "PWD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7960 , "PBC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7968 , "PBD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7170 , "WWC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7178 , "WWD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7970 , "WBC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7978 , "WBD" , param_reg_id , 0 },
|
||||
// *** END ***
|
||||
{0 , 0 , NULL , NULL , 0 }
|
||||
// *** BPC Instructions ***
|
||||
{0xffff , 0x0000 , "NOP" , param_none , 0 },
|
||||
{0x7800 , 0x0000 , "LDA" , param_loc , 0 },
|
||||
{0x7800 , 0x0800 , "LDB" , param_loc , 0 },
|
||||
{0x7800 , 0x1000 , "CPA" , param_loc , 0 },
|
||||
{0x7800 , 0x1800 , "CPB" , param_loc , 0 },
|
||||
{0x7800 , 0x2000 , "ADA" , param_loc , 0 },
|
||||
{0x7800 , 0x2800 , "ADB" , param_loc , 0 },
|
||||
{0x7800 , 0x3000 , "STA" , param_loc , 0 },
|
||||
{0x7800 , 0x3800 , "STB" , param_loc , 0 },
|
||||
{0x7800 , 0x4000 , "JSM" , param_loc , DASMFLAG_STEP_OVER },
|
||||
{0x7800 , 0x4800 , "ISZ" , param_loc , 0 },
|
||||
{0x7800 , 0x5000 , "AND" , param_loc , 0 },
|
||||
{0x7800 , 0x5800 , "DSZ" , param_loc , 0 },
|
||||
{0x7800 , 0x6000 , "IOR" , param_loc , 0 },
|
||||
{0x7800 , 0x6800 , "JMP" , param_loc , 0 },
|
||||
{0x7fe0 , 0x7000 , "EXE" , param_addr32 , 0 },
|
||||
{0xffc0 , 0x7400 , "RZA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7C00 , "RZB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7440 , "RIA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7C40 , "RIB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7500 , "SZA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7D00 , "SZB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7540 , "SIA" , param_skip , 0 },
|
||||
{0xffc0 , 0x7D40 , "SIB" , param_skip , 0 },
|
||||
{0xffc0 , 0x7480 , "SFS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7580 , "SFC" , param_skip , 0 },
|
||||
{0xffc0 , 0x7c80 , "SSS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7d80 , "SSC" , param_skip , 0 },
|
||||
{0xffc0 , 0x7cc0 , "SHS" , param_skip , 0 },
|
||||
{0xffc0 , 0x7dc0 , "SHC" , param_skip , 0 },
|
||||
{0xff00 , 0x7600 , "SLA" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7e00 , "SLB" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7700 , "RLA" , param_skip_sc , 0 },
|
||||
{0xff00 , 0x7f00 , "RLB" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf400 , "SAP" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfc00 , "SBP" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf500 , "SAM" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfd00 , "SBM" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf600 , "SOC" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xf700 , "SOS" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xfe00 , "SEC" , param_skip_sc , 0 },
|
||||
{0xff00 , 0xff00 , "SES" , param_skip_sc , 0 },
|
||||
{0xffff , 0xf020 , "TCA" , param_none , 0 },
|
||||
{0xffff , 0xf820 , "TCB" , param_none , 0 },
|
||||
{0xffff , 0xf060 , "CMA" , param_none , 0 },
|
||||
{0xffff , 0xf860 , "CMB" , param_none , 0 },
|
||||
{0xff80 , 0xf080 , "RET" , param_ret , DASMFLAG_STEP_OUT },
|
||||
{0xfff0 , 0xf100 , "AAR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf900 , "ABR" , param_n16 , 0 },
|
||||
{0xffff , 0xf14f , "CLA" , param_none , 0 },
|
||||
{0xfff0 , 0xf140 , "SAR" , param_n16 , 0 },
|
||||
{0xffff , 0xf94f , "CLB" , param_none , 0 },
|
||||
{0xfff0 , 0xf940 , "SBR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf180 , "SAL" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf980 , "SBL" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf1c0 , "RAR" , param_n16 , 0 },
|
||||
{0xfff0 , 0xf9c0 , "RBR" , param_n16 , 0 },
|
||||
// *** IOC Instructions ***
|
||||
{0xffff , 0x7100 , "SDO" , param_none , 0 },
|
||||
{0xffff , 0x7108 , "SDI" , param_none , 0 },
|
||||
{0xffff , 0x7110 , "EIR" , param_none , 0 },
|
||||
{0xffff , 0x7118 , "DIR" , param_none , 0 },
|
||||
{0xffff , 0x7120 , "DMA" , param_none , 0 },
|
||||
{0xffff , 0x7128 , "PCM" , param_none , 0 },
|
||||
{0xffff , 0x7138 , "DDR" , param_none , 0 },
|
||||
{0xffff , 0x7140 , "DBL" , param_none , 0 },
|
||||
{0xffff , 0x7148 , "CBL" , param_none , 0 },
|
||||
{0xffff , 0x7150 , "DBU" , param_none , 0 },
|
||||
{0xffff , 0x7158 , "CBU" , param_none , 0 },
|
||||
{0xff78 , 0x7160 , "PWC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7168 , "PWD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7960 , "PBC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7968 , "PBD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7170 , "WWC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7178 , "WWD" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7970 , "WBC" , param_reg_id , 0 },
|
||||
{0xff78 , 0x7978 , "WBD" , param_reg_id , 0 },
|
||||
// *** END ***
|
||||
{0 , 0 , NULL , NULL , 0 }
|
||||
};
|
||||
|
||||
CPU_DISASSEMBLE(hp_hybrid)
|
||||
{
|
||||
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
|
||||
const dis_entry_t *p;
|
||||
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
|
||||
const dis_entry_t *p;
|
||||
|
||||
for (p = dis_table; p->m_op_mask; p++) {
|
||||
if ((opcode & p->m_op_mask) == p->m_opcode) {
|
||||
strcpy(buffer , p->m_mnemonic);
|
||||
strcat(buffer , " ");
|
||||
p->m_param_fn(buffer , pc , opcode);
|
||||
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
|
||||
for (p = dis_table; p->m_op_mask; p++) {
|
||||
if ((opcode & p->m_op_mask) == p->m_opcode) {
|
||||
strcpy(buffer , p->m_mnemonic);
|
||||
strcat(buffer , " ");
|
||||
p->m_param_fn(buffer , pc , opcode);
|
||||
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Unknown opcode
|
||||
strcpy(buffer , "???");
|
||||
// Unknown opcode
|
||||
strcpy(buffer , "???");
|
||||
|
||||
return 1 | DASMFLAG_SUPPORTED;
|
||||
return 1 | DASMFLAG_SUPPORTED;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user