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z80scc: fix access to wr7'

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This commit is contained in:
Patrick Mackinlay 2023-06-07 08:58:18 +07:00
parent 6b3ba498ed
commit eed6108b15
1 changed files with 5 additions and 2 deletions
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7
src/devices/machine/z80scc.cpp
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@ -1650,7 +1650,7 @@ uint8_t z80scc_channel::do_sccreg_rr14()
{
LOGR("%s\n", FUNCNAME);
if (m_uart->m_variant & (z80scc_device::SET_ESCC | z80scc_device::TYPE_SCC85C30))
return BIT(m_wr7, 6) ? m_wr7 : m_rr10;
return BIT(m_wr7p, 6) ? m_wr7p : m_rr10;
else
return m_rr10;
}
@ -2014,7 +2014,10 @@ void z80scc_channel::do_sccreg_wr6(uint8_t data)
void z80scc_channel::do_sccreg_wr7(uint8_t data)
{
LOG("%s(%02x): Receive sync\n", FUNCNAME, data);
m_sync_pattern = (data << 8) | (m_sync_pattern & 0xff);
if ((m_uart->m_variant & (z80scc_device::SET_ESCC | z80scc_device::TYPE_SCC85C30)) && BIT(m_wr15, 0))
m_wr7p = data;
else
m_sync_pattern = (data << 8) | (m_sync_pattern & 0xff);
}
/* WR8 is the transmit buffer register */