mirror of
https://github.com/holub/mame
synced 2025-07-04 17:38:08 +03:00
Removing legacy code. (nw)
This commit is contained in:
Michael Zapf
parent
18eaa848e9
commit
eef8f45e9a
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -1525,14 +1525,10 @@ src/emu/cpu/tms7000/tms70op.c svneol=native#text/plain
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src/emu/cpu/tms7000/tms70tb.c svneol=native#text/plain
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src/emu/cpu/tms9900/9900dasm.c svneol=native#text/plain
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src/emu/cpu/tms9900/99xxcore.h svneol=native#text/plain
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src/emu/cpu/tms9900/99xxstat.h svneol=native#text/plain
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src/emu/cpu/tms9900/ti990_10.c svneol=native#text/plain
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src/emu/cpu/tms9900/ti990_10.h svneol=native#text/plain
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src/emu/cpu/tms9900/ti990_10l.c svneol=native#text/plain
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src/emu/cpu/tms9900/tms9900.c svneol=native#text/plain
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src/emu/cpu/tms9900/tms9900.h svneol=native#text/plain
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src/emu/cpu/tms9900/tms9900l.c svneol=native#text/plain
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src/emu/cpu/tms9900/tms9900l.h svneol=native#text/plain
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src/emu/cpu/tms9900/tms9980a.c svneol=native#text/plain
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src/emu/cpu/tms9900/tms9980a.h svneol=native#text/plain
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src/emu/cpu/tms9900/tms9995.c svneol=native#text/plain
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@ -1230,7 +1230,480 @@ static void set_flag1(tms99xx_state *cpustate, int val);
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/************************************************************************
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* Status register functions
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************************************************************************/
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#include "99xxstat.h"
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/*
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remember that the OP ST bit is maintained in cpustate->lastparity
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*/
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/*
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setstat sets the ST_OP bit according to cpustate->lastparity
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It must be called before reading the ST register.
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*/
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static void setstat(tms99xx_state *cpustate)
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{
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int i;
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UINT8 a;
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cpustate->STATUS &= ~ ST_OP;
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/* We set the parity bit. */
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a = cpustate->lastparity;
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for (i=0; i<8; i++) /* 8 bits to test */
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{
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if (a & 1) /* If current bit is set */
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cpustate->STATUS ^= ST_OP; /* we toggle the ST_OP bit */
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a >>= 1; /* Next bit. */
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}
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}
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/*
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getstat sets emulator's cpustate->lastparity variable according to 9900's STATUS bits.
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It must be called on interrupt return, or when, for some reason,
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the emulated program sets the STATUS register directly.
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*/
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static void getstat(tms99xx_state *cpustate)
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{
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#if (USE_ST_MASK)
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cpustate->STATUS &= ST_MASK; /* unused bits are forced to 0 */
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#endif
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if (cpustate->STATUS & ST_OP)
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cpustate->lastparity = 1;
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else
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cpustate->lastparity = 0;
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#if HAS_MAPPING
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cpustate->cur_map = (cpustate->STATUS & ST_MF) ? 1 : 0;
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#endif
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}
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/*
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A few words about the following functions.
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A big portability issue is the behavior of the ">>" instruction with the sign bit, which has
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not been normalised. Every compiler does whatever it thinks smartest.
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My code assumed that when shifting right signed numbers, the operand is left-filled with a
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copy of sign bit, and that when shifting unsigned variables, it is left-filled with 0s.
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This is probably the most logical behaviour, and it is the behavior of CW PRO3 - most time
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(the exception is that ">>=" instructions always copy the sign bit (!)). But some compilers
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are bound to disagree.
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So, I had to create special functions with predefined tables included, so that this code work
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on every compiler. BUT this is a real slow-down.
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So, you might have to include a few lines in assembly to make this work better.
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Sorry about this, this problem is really unpleasant and absurd, but it is not my fault.
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*/
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static const UINT16 right_shift_mask_table[17] =
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{
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0xFFFF,
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0x7FFF,
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0x3FFF,
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0x1FFF,
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0x0FFF,
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0x07FF,
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0x03FF,
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0x01FF,
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0x00FF,
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0x007F,
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0x003F,
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0x001F,
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0x000F,
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0x0007,
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0x0003,
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0x0001,
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0x0000
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};
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static const UINT16 inverted_right_shift_mask_table[17] =
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{
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0x0000,
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0x8000,
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0xC000,
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0xE000,
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0xF000,
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0xF800,
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0xFC00,
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0xFE00,
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0xFF00,
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0xFF80,
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0xFFC0,
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0xFFE0,
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0xFFF0,
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0xFFF8,
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0xFFFC,
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0xFFFE,
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0xFFFF
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};
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INLINE UINT16 logical_right_shift(UINT16 val, int c)
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{
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return((val>>c) & right_shift_mask_table[c]);
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}
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INLINE INT16 arithmetic_right_shift(INT16 val, int c)
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{
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if (val < 0)
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return((val>>c) | inverted_right_shift_mask_table[c]);
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else
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return((val>>c) & right_shift_mask_table[c]);
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}
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/*
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Set lae
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*/
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INLINE void setst_lae(tms99xx_state *cpustate, INT16 val)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
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if (val > 0)
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cpustate->STATUS |= (ST_LGT | ST_AGT);
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else if (val < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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}
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/*
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Set laep (BYTE)
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*/
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INLINE void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
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if (val > 0)
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cpustate->STATUS |= (ST_LGT | ST_AGT);
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else if (val < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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cpustate->lastparity = val;
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}
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/*
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For COC, CZC, and TB
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*/
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INLINE void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
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{
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if (val == to)
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cpustate->STATUS |= ST_EQ;
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else
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cpustate->STATUS &= ~ ST_EQ;
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}
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/*
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For CI, C, CB
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*/
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INLINE void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
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if (val == to)
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cpustate->STATUS |= ST_EQ;
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else
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{
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if ( ((INT16) val) > ((INT16) to) )
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cpustate->STATUS |= ST_AGT;
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if ( ((UINT16) val) > ((UINT16) to) )
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cpustate->STATUS |= ST_LGT;
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}
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}
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/*
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Set laeco for add
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*/
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INLINE INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
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{
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UINT32 res;
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INT16 res2;
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
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res = (a & 0xffff) + (b & 0xffff);
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if (res & 0x10000)
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cpustate->STATUS |= ST_C;
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if ((res ^ b) & (res ^ a) & 0x8000)
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cpustate->STATUS |= ST_OV;
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#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
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if (((a & b) | ((a | b) & ~ res)) & 0x0800)
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cpustate->STATUS |= ST_DC;
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#endif
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res2 = (INT16) res;
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if (res2 > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (res2 < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return res2;
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}
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/*
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Set laeco for subtract
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*/
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INLINE INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
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{
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UINT32 res;
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INT16 res2;
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
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res = (a & 0xffff) - (b & 0xffff);
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if (! (res & 0x10000))
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cpustate->STATUS |= ST_C;
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if ((a ^ b) & (a ^ res) & 0x8000)
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cpustate->STATUS |= ST_OV;
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#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
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if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x0800)
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cpustate->STATUS |= ST_DC;
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#endif
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res2 = (INT16) res;
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if (res2 > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (res2 < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return res2;
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}
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/*
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Set laecop for add (BYTE)
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*/
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INLINE INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
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{
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unsigned int res;
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INT8 res2;
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
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res = (a & 0xff) + (b & 0xff);
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if (res & 0x100)
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cpustate->STATUS |= ST_C;
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if ((res ^ b) & (res ^ a) & 0x80)
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cpustate->STATUS |= ST_OV;
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#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
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if (((a & b) | ((a | b) & ~ res)) & 0x08)
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cpustate->STATUS |= ST_DC;
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#endif
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res2 = (INT8) res;
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if (res2 > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (res2 < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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cpustate->lastparity = res2;
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return res2;
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}
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/*
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Set laecop for subtract (BYTE)
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*/
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INLINE INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
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{
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unsigned int res;
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INT8 res2;
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
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res = (a & 0xff) - (b & 0xff);
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if (! (res & 0x100))
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cpustate->STATUS |= ST_C;
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if ((a ^ b) & (a ^ res) & 0x80)
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cpustate->STATUS |= ST_OV;
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#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
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if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x08)
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cpustate->STATUS |= ST_DC;
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#endif
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res2 = (INT8) res;
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if (res2 > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (res2 < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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cpustate->lastparity = res2;
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return res2;
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}
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/*
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For NEG
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*/
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INLINE void setst_laeo(tms99xx_state *cpustate, INT16 val)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_OV);
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if (val > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (val < 0)
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{
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cpustate->STATUS |= ST_LGT;
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if (((UINT16) val) == 0x8000)
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cpustate->STATUS |= ST_OV;
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}
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else
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cpustate->STATUS |= ST_EQ;
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}
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/*
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Meat of SRA
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*/
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INLINE UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
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if (c != 0)
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{
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a = arithmetic_right_shift(a, c-1);
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if (a & 1) // The carry bit equals the last bit that is shifted out
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cpustate->STATUS |= ST_C;
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a = arithmetic_right_shift(a, 1);
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}
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if (a > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (a < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return a;
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}
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/*
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Meat of SRL. Same algorithm as SRA, except that we fills in with 0s.
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*/
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INLINE UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
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if (c != 0)
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{
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a = logical_right_shift(a, c-1);
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if (a & 1)
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cpustate->STATUS |= ST_C;
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a = logical_right_shift(a, 1);
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}
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if (((INT16) a) > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (((INT16) a) < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return a;
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}
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//
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// Meat of SRC
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//
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INLINE UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
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if (c != 0)
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{
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a = logical_right_shift(a, c) | (a << (16-c));
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if (a & 0x8000) // The carry bit equals the last bit that is shifted out
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cpustate->STATUS |= ST_C;
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}
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if (((INT16) a) > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (((INT16) a) < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return a;
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}
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//
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// Meat of SLA
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//
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INLINE UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c)
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{
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cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
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if (c != 0)
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{
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{
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register UINT16 mask;
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register UINT16 ousted_bits;
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mask = 0xFFFF << (16-c-1);
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ousted_bits = a & mask;
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if (ousted_bits) // If ousted_bits is neither all 0s
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if (ousted_bits ^ mask) // nor all 1s,
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cpustate->STATUS |= ST_OV; // we set overflow
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}
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a <<= c-1;
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if (a & 0x8000) // The carry bit equals the last bit that is shifted out
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cpustate->STATUS |= ST_C;
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a <<= 1;
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}
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if (((INT16) a) > 0)
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cpustate->STATUS |= ST_LGT | ST_AGT;
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else if (((INT16) a) < 0)
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cpustate->STATUS |= ST_LGT;
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else
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cpustate->STATUS |= ST_EQ;
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return a;
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}
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/**************************************************************************/
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@ -1,484 +0,0 @@
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// license:MAME
|
||||
// copyright-holders:Raphael Nabet
|
||||
/************************************************************************
|
||||
|
||||
ST register functions
|
||||
|
||||
************************************************************************/
|
||||
|
||||
/*
|
||||
remember that the OP ST bit is maintained in cpustate->lastparity
|
||||
*/
|
||||
|
||||
/*
|
||||
setstat sets the ST_OP bit according to cpustate->lastparity
|
||||
|
||||
It must be called before reading the ST register.
|
||||
*/
|
||||
|
||||
static void setstat(tms99xx_state *cpustate)
|
||||
{
|
||||
int i;
|
||||
UINT8 a;
|
||||
|
||||
cpustate->STATUS &= ~ ST_OP;
|
||||
|
||||
/* We set the parity bit. */
|
||||
a = cpustate->lastparity;
|
||||
|
||||
for (i=0; i<8; i++) /* 8 bits to test */
|
||||
{
|
||||
if (a & 1) /* If current bit is set */
|
||||
cpustate->STATUS ^= ST_OP; /* we toggle the ST_OP bit */
|
||||
|
||||
a >>= 1; /* Next bit. */
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
getstat sets emulator's cpustate->lastparity variable according to 9900's STATUS bits.
|
||||
It must be called on interrupt return, or when, for some reason,
|
||||
the emulated program sets the STATUS register directly.
|
||||
*/
|
||||
static void getstat(tms99xx_state *cpustate)
|
||||
{
|
||||
#if (USE_ST_MASK)
|
||||
cpustate->STATUS &= ST_MASK; /* unused bits are forced to 0 */
|
||||
#endif
|
||||
|
||||
if (cpustate->STATUS & ST_OP)
|
||||
cpustate->lastparity = 1;
|
||||
else
|
||||
cpustate->lastparity = 0;
|
||||
|
||||
#if HAS_MAPPING
|
||||
cpustate->cur_map = (cpustate->STATUS & ST_MF) ? 1 : 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
A few words about the following functions.
|
||||
|
||||
A big portability issue is the behavior of the ">>" instruction with the sign bit, which has
|
||||
not been normalised. Every compiler does whatever it thinks smartest.
|
||||
My code assumed that when shifting right signed numbers, the operand is left-filled with a
|
||||
copy of sign bit, and that when shifting unsigned variables, it is left-filled with 0s.
|
||||
This is probably the most logical behaviour, and it is the behavior of CW PRO3 - most time
|
||||
(the exception is that ">>=" instructions always copy the sign bit (!)). But some compilers
|
||||
are bound to disagree.
|
||||
|
||||
So, I had to create special functions with predefined tables included, so that this code work
|
||||
on every compiler. BUT this is a real slow-down.
|
||||
So, you might have to include a few lines in assembly to make this work better.
|
||||
Sorry about this, this problem is really unpleasant and absurd, but it is not my fault.
|
||||
*/
|
||||
|
||||
|
||||
static const UINT16 right_shift_mask_table[17] =
|
||||
{
|
||||
0xFFFF,
|
||||
0x7FFF,
|
||||
0x3FFF,
|
||||
0x1FFF,
|
||||
0x0FFF,
|
||||
0x07FF,
|
||||
0x03FF,
|
||||
0x01FF,
|
||||
0x00FF,
|
||||
0x007F,
|
||||
0x003F,
|
||||
0x001F,
|
||||
0x000F,
|
||||
0x0007,
|
||||
0x0003,
|
||||
0x0001,
|
||||
0x0000
|
||||
};
|
||||
|
||||
static const UINT16 inverted_right_shift_mask_table[17] =
|
||||
{
|
||||
0x0000,
|
||||
0x8000,
|
||||
0xC000,
|
||||
0xE000,
|
||||
0xF000,
|
||||
0xF800,
|
||||
0xFC00,
|
||||
0xFE00,
|
||||
0xFF00,
|
||||
0xFF80,
|
||||
0xFFC0,
|
||||
0xFFE0,
|
||||
0xFFF0,
|
||||
0xFFF8,
|
||||
0xFFFC,
|
||||
0xFFFE,
|
||||
0xFFFF
|
||||
};
|
||||
|
||||
INLINE UINT16 logical_right_shift(UINT16 val, int c)
|
||||
{
|
||||
return((val>>c) & right_shift_mask_table[c]);
|
||||
}
|
||||
|
||||
INLINE INT16 arithmetic_right_shift(INT16 val, int c)
|
||||
{
|
||||
if (val < 0)
|
||||
return((val>>c) | inverted_right_shift_mask_table[c]);
|
||||
else
|
||||
return((val>>c) & right_shift_mask_table[c]);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
Set lae
|
||||
*/
|
||||
INLINE void setst_lae(tms99xx_state *cpustate, INT16 val)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
|
||||
|
||||
if (val > 0)
|
||||
cpustate->STATUS |= (ST_LGT | ST_AGT);
|
||||
else if (val < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Set laep (BYTE)
|
||||
*/
|
||||
INLINE void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
|
||||
|
||||
if (val > 0)
|
||||
cpustate->STATUS |= (ST_LGT | ST_AGT);
|
||||
else if (val < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
cpustate->lastparity = val;
|
||||
}
|
||||
|
||||
/*
|
||||
For COC, CZC, and TB
|
||||
*/
|
||||
INLINE void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
|
||||
{
|
||||
if (val == to)
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
else
|
||||
cpustate->STATUS &= ~ ST_EQ;
|
||||
}
|
||||
|
||||
/*
|
||||
For CI, C, CB
|
||||
*/
|
||||
INLINE void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
|
||||
|
||||
if (val == to)
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
else
|
||||
{
|
||||
if ( ((INT16) val) > ((INT16) to) )
|
||||
cpustate->STATUS |= ST_AGT;
|
||||
if ( ((UINT16) val) > ((UINT16) to) )
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
Set laeco for add
|
||||
*/
|
||||
INLINE INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
|
||||
{
|
||||
UINT32 res;
|
||||
INT16 res2;
|
||||
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
|
||||
|
||||
res = (a & 0xffff) + (b & 0xffff);
|
||||
|
||||
if (res & 0x10000)
|
||||
cpustate->STATUS |= ST_C;
|
||||
|
||||
if ((res ^ b) & (res ^ a) & 0x8000)
|
||||
cpustate->STATUS |= ST_OV;
|
||||
|
||||
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
|
||||
if (((a & b) | ((a | b) & ~ res)) & 0x0800)
|
||||
cpustate->STATUS |= ST_DC;
|
||||
#endif
|
||||
|
||||
res2 = (INT16) res;
|
||||
|
||||
if (res2 > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (res2 < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return res2;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Set laeco for subtract
|
||||
*/
|
||||
INLINE INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
|
||||
{
|
||||
UINT32 res;
|
||||
INT16 res2;
|
||||
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
|
||||
|
||||
res = (a & 0xffff) - (b & 0xffff);
|
||||
|
||||
if (! (res & 0x10000))
|
||||
cpustate->STATUS |= ST_C;
|
||||
|
||||
if ((a ^ b) & (a ^ res) & 0x8000)
|
||||
cpustate->STATUS |= ST_OV;
|
||||
|
||||
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
|
||||
if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x0800)
|
||||
cpustate->STATUS |= ST_DC;
|
||||
#endif
|
||||
|
||||
res2 = (INT16) res;
|
||||
|
||||
if (res2 > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (res2 < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return res2;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Set laecop for add (BYTE)
|
||||
*/
|
||||
INLINE INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
|
||||
{
|
||||
unsigned int res;
|
||||
INT8 res2;
|
||||
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
|
||||
|
||||
res = (a & 0xff) + (b & 0xff);
|
||||
|
||||
if (res & 0x100)
|
||||
cpustate->STATUS |= ST_C;
|
||||
|
||||
if ((res ^ b) & (res ^ a) & 0x80)
|
||||
cpustate->STATUS |= ST_OV;
|
||||
|
||||
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
|
||||
if (((a & b) | ((a | b) & ~ res)) & 0x08)
|
||||
cpustate->STATUS |= ST_DC;
|
||||
#endif
|
||||
|
||||
res2 = (INT8) res;
|
||||
|
||||
if (res2 > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (res2 < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
cpustate->lastparity = res2;
|
||||
|
||||
return res2;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Set laecop for subtract (BYTE)
|
||||
*/
|
||||
INLINE INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
|
||||
{
|
||||
unsigned int res;
|
||||
INT8 res2;
|
||||
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
|
||||
|
||||
res = (a & 0xff) - (b & 0xff);
|
||||
|
||||
if (! (res & 0x100))
|
||||
cpustate->STATUS |= ST_C;
|
||||
|
||||
if ((a ^ b) & (a ^ res) & 0x80)
|
||||
cpustate->STATUS |= ST_OV;
|
||||
|
||||
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
|
||||
if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x08)
|
||||
cpustate->STATUS |= ST_DC;
|
||||
#endif
|
||||
|
||||
res2 = (INT8) res;
|
||||
|
||||
if (res2 > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (res2 < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
cpustate->lastparity = res2;
|
||||
|
||||
return res2;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
For NEG
|
||||
*/
|
||||
INLINE void setst_laeo(tms99xx_state *cpustate, INT16 val)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_OV);
|
||||
|
||||
if (val > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (val < 0)
|
||||
{
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
if (((UINT16) val) == 0x8000)
|
||||
cpustate->STATUS |= ST_OV;
|
||||
}
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
Meat of SRA
|
||||
*/
|
||||
INLINE UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
|
||||
|
||||
if (c != 0)
|
||||
{
|
||||
a = arithmetic_right_shift(a, c-1);
|
||||
if (a & 1) // The carry bit equals the last bit that is shifted out
|
||||
cpustate->STATUS |= ST_C;
|
||||
a = arithmetic_right_shift(a, 1);
|
||||
}
|
||||
|
||||
if (a > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (a < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Meat of SRL. Same algorithm as SRA, except that we fills in with 0s.
|
||||
*/
|
||||
INLINE UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
|
||||
|
||||
if (c != 0)
|
||||
{
|
||||
a = logical_right_shift(a, c-1);
|
||||
if (a & 1)
|
||||
cpustate->STATUS |= ST_C;
|
||||
a = logical_right_shift(a, 1);
|
||||
}
|
||||
|
||||
if (((INT16) a) > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (((INT16) a) < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
// Meat of SRC
|
||||
//
|
||||
INLINE UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
|
||||
|
||||
if (c != 0)
|
||||
{
|
||||
a = logical_right_shift(a, c) | (a << (16-c));
|
||||
if (a & 0x8000) // The carry bit equals the last bit that is shifted out
|
||||
cpustate->STATUS |= ST_C;
|
||||
}
|
||||
|
||||
if (((INT16) a) > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (((INT16) a) < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
// Meat of SLA
|
||||
//
|
||||
INLINE UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c)
|
||||
{
|
||||
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
|
||||
|
||||
if (c != 0)
|
||||
{
|
||||
{
|
||||
register UINT16 mask;
|
||||
register UINT16 ousted_bits;
|
||||
|
||||
mask = 0xFFFF << (16-c-1);
|
||||
ousted_bits = a & mask;
|
||||
|
||||
if (ousted_bits) // If ousted_bits is neither all 0s
|
||||
if (ousted_bits ^ mask) // nor all 1s,
|
||||
cpustate->STATUS |= ST_OV; // we set overflow
|
||||
}
|
||||
|
||||
a <<= c-1;
|
||||
if (a & 0x8000) // The carry bit equals the last bit that is shifted out
|
||||
cpustate->STATUS |= ST_C;
|
||||
|
||||
a <<= 1;
|
||||
}
|
||||
|
||||
if (((INT16) a) > 0)
|
||||
cpustate->STATUS |= ST_LGT | ST_AGT;
|
||||
else if (((INT16) a) < 0)
|
||||
cpustate->STATUS |= ST_LGT;
|
||||
else
|
||||
cpustate->STATUS |= ST_EQ;
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
|
||||
/***********************************************************************/
|
||||
@ -1,15 +0,0 @@
|
||||
// license:MAME
|
||||
// copyright-holders:Raphael Nabet
|
||||
/*
|
||||
Generate the tms9900 emulator
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "tms9900l.h"
|
||||
|
||||
#define TMS99XX_MODEL TI990_10_ID
|
||||
|
||||
#include "99xxcore.h"
|
||||
|
||||
DEFINE_LEGACY_CPU_DEVICE(TI990_10L, ti990_10l);
|
||||
@ -1,17 +0,0 @@
|
||||
// license:MAME
|
||||
// copyright-holders:Raphael Nabet
|
||||
/*
|
||||
This is the previous implementation of the TMS9900 using the common
|
||||
core implementation in 99xxcore. The new cycle-precise implementation
|
||||
can be found in tms9900.c
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "debugger.h"
|
||||
#include "tms9900l.h"
|
||||
|
||||
#define TMS99XX_MODEL TMS9900_ID
|
||||
|
||||
#include "99xxcore.h"
|
||||
|
||||
DEFINE_LEGACY_CPU_DEVICE(TMS9900L, tms9900l);
|
||||
@ -1,99 +0,0 @@
|
||||
// license:MAME
|
||||
// copyright-holders:Raphael Nabet
|
||||
/*
|
||||
tms9900.h
|
||||
|
||||
C Header file for TMS9900 core
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __TMS9900_H__
|
||||
#define __TMS9900_H__
|
||||
|
||||
|
||||
/*#define TI990_9_ID 0*//* early implementation, used in a few real-world applications, 1974 */
|
||||
/* very similar to mapper-less 990/10 and tms9900, but the Load process */
|
||||
/* is different */
|
||||
/* ("ti990/9" is likely to be a nickname) */
|
||||
#define TI990_10_ID 1 /* original multi-chip implementation for minicomputer systems, 1975 */
|
||||
/*#define TI990_12_ID 2*//* multi-chip implementation, faster than 990/10. huge instruction set */
|
||||
/* (144 instructions, with up to 16 additional custom instructions simulteanously) */
|
||||
/* 1979 (or before) */
|
||||
#define TMS9900_ID 3 /* mono-chip implementation, 1976 */
|
||||
#define TMS9940_ID 4 /* microcontroller with 2kb ROM, 128b RAM, decrementer, CRU bus, 1979 */
|
||||
#define TMS9980_ID 5 /* 8-bit variant of tms9900. Two distinct chips actually : tms9980a, */
|
||||
/* and tms9981 with an extra clock and simplified power supply */
|
||||
#define TMS9985_ID 6 /* 9940 with 8kb ROM, 256b RAM, and a 8-bit external bus, c. 1978 (never released) */
|
||||
#define TMS9989_ID 7 /* improved 9980, used in bombs, missiles, and other *nice* hardware */
|
||||
/*#define SBP68689_ID 8*//* improved 9989, built as an ASIC as 9989 was running scarce */
|
||||
#define TMS9995_ID 9 /* tms9985-like, with many improvements (but no ROM) */
|
||||
#define TMS99000_ID 10/* improved mono-chip implementation, meant to replace 990/10, 1981 */
|
||||
/* This chip is available in several variants (tms99105, tms99110...), */
|
||||
/* which are similar but emulate additional instructions thanks */
|
||||
/* to the so-called macrostore feature. */
|
||||
#define TMS99105A_ID 11
|
||||
#define TMS99110A_ID 12
|
||||
|
||||
|
||||
/* NPW 25-May-2002 - Added these to get it to compile under windows */
|
||||
#define TI9940_ID TMS9940_ID
|
||||
#define TI9985_ID TMS9985_ID
|
||||
|
||||
|
||||
enum
|
||||
{
|
||||
TMS9900_PC=1, TMS9900_WP, TMS9900_STATUS, TMS9900_IR,
|
||||
TMS9900_R0, TMS9900_R1, TMS9900_R2, TMS9900_R3,
|
||||
TMS9900_R4, TMS9900_R5, TMS9900_R6, TMS9900_R7,
|
||||
TMS9900_R8, TMS9900_R9, TMS9900_R10, TMS9900_R11,
|
||||
TMS9900_R12, TMS9900_R13, TMS9900_R14, TMS9900_R15
|
||||
};
|
||||
|
||||
typedef void (*ti99xx_idle_func)(device_t *device, int state);
|
||||
typedef void (*ti99xx_rset_func)(device_t *device);
|
||||
typedef void (*ti99xx_lrex_func)(device_t *device);
|
||||
typedef void (*ti99xx_ckon_ckof_func)(device_t *device, int state);
|
||||
typedef void (*ti99xx_error_interrupt_func)(device_t *device, int state);
|
||||
|
||||
|
||||
DECLARE_LEGACY_CPU_DEVICE(TI990_10L, ti990_10l);
|
||||
|
||||
/*
|
||||
structure with the parameters ti990_10_reset wants.
|
||||
*/
|
||||
|
||||
struct ti990_10reset_param
|
||||
{
|
||||
ti99xx_idle_func idle_callback;
|
||||
ti99xx_rset_func rset_callback;
|
||||
ti99xx_lrex_func lrex_callback;
|
||||
ti99xx_ckon_ckof_func ckon_ckof_callback;
|
||||
ti99xx_error_interrupt_func error_interrupt_callback;
|
||||
};
|
||||
|
||||
/* accessor for the internal ROM */
|
||||
extern DECLARE_READ16_HANDLER(ti990_10_internal_r);
|
||||
|
||||
/* CRU accessor for the mapper registers (R12 base 0x1fa0) */
|
||||
extern DECLARE_READ8_HANDLER(ti990_10_mapper_cru_r);
|
||||
extern DECLARE_WRITE8_HANDLER(ti990_10_mapper_cru_w);
|
||||
/* CRU accessor for the error interrupt register (R12 base 0x1fc0) */
|
||||
extern DECLARE_READ8_HANDLER(ti990_10_eir_cru_r);
|
||||
extern DECLARE_WRITE8_HANDLER(ti990_10_eir_cru_w);
|
||||
|
||||
|
||||
|
||||
DECLARE_LEGACY_CPU_DEVICE(TMS9900L, tms9900l);
|
||||
|
||||
/*
|
||||
structure with optional parameters for tms9900_reset.
|
||||
*/
|
||||
struct tms9900reset_param
|
||||
{
|
||||
ti99xx_idle_func idle_callback;
|
||||
};
|
||||
|
||||
|
||||
|
||||
#endif /* __TMS9900_H__ */
|
||||
Loading…
Reference in New Issue
Block a user