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Merge pull request #1105 from MooglyGuy/master
Initial FDC hookup in sun4.cpp [Ryan Holtz]
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commit
ef11069ee4
@ -500,6 +500,7 @@ public:
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, m_maincpu(*this, "maincpu")
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, m_scc1(*this, SCC1_TAG)
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, m_scc2(*this, SCC2_TAG)
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, m_fdc(*this, FDC_TAG)
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, m_type0space(*this, "type0")
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, m_type1space(*this, "type1")
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, m_ram(*this, RAM_TAG)
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@ -528,7 +529,8 @@ public:
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DECLARE_WRITE32_MEMBER( timer_w );
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DECLARE_READ8_MEMBER( irq_r );
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DECLARE_WRITE8_MEMBER( irq_w );
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DECLARE_READ8_MEMBER( fake_fdc_r );
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DECLARE_READ8_MEMBER( fdc_r );
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DECLARE_WRITE8_MEMBER( fdc_w );
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DECLARE_DRIVER_INIT(sun4);
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DECLARE_DRIVER_INIT(sun4c);
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@ -540,6 +542,7 @@ protected:
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required_device<mb86901_device> m_maincpu;
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required_device<z80scc_device> m_scc1;
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required_device<z80scc_device> m_scc2;
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required_device<n82077aa_device> m_fdc;
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optional_device<address_map_bank_device> m_type0space, m_type1space;
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required_device<ram_device> m_ram;
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required_memory_region m_rom;
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@ -1284,7 +1287,7 @@ static ADDRESS_MAP_START(type1space_map, AS_PROGRAM, 32, sun4_state)
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AM_RANGE(0x05000000, 0x05000003) AM_READWRITE8(irq_r, irq_w, 0xffffffff)
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AM_RANGE(0x06000000, 0x0607ffff) AM_ROM AM_REGION("user1", 0)
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// AM_RANGE(0x07200000, 0x07200007) AM_DEVICE8(FDC_TAG, n82077aa_device, map, 0xffffffff)
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AM_RANGE(0x07200000, 0x07200003) AM_READ8(fake_fdc_r, 0xffffffff)
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AM_RANGE(0x07200000, 0x07200003) AM_READWRITE8(fdc_r, fdc_w, 0xffffffff)
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AM_RANGE(0x08000000, 0x08000003) AM_READ(ss1_sl0_id) // slot 0 contains SCSI/DMA/Ethernet
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AM_RANGE(0x0e000000, 0x0e000003) AM_READ(ss1_sl3_id) // slot 3 contains video board
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ADDRESS_MAP_END
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@ -1294,9 +1297,43 @@ static ADDRESS_MAP_START(type1space_s4_map, AS_PROGRAM, 32, sun4_state)
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AM_RANGE(0x01000000, 0x0100000f) AM_DEVREADWRITE8(SCC2_TAG, z80scc_device, ba_cd_inv_r, ba_cd_inv_w, 0xff00ff00)
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ADDRESS_MAP_END
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READ8_MEMBER( sun4_state::fake_fdc_r )
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READ8_MEMBER( sun4_state::fdc_r )
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{
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return 0x80; // always ready
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if (space.debugger_access())
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return 0;
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switch(offset)
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{
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case 0: // Main Status (R)
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return m_fdc->msr_r(space, 0, 0xff);
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break;
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case 1: // FIFO Data Port (R)
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return m_fdc->fifo_r(space, 0, 0xff);
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break;
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default:
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break;
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}
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return 0;
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}
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WRITE8_MEMBER( sun4_state::fdc_w )
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{
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switch(offset)
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{
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case 0: // Data Rate Select Register (W)
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m_fdc->dsr_w(space, 0, data, 0xff);
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break;
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case 1: // FIFO Data Port (W)
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m_fdc->fifo_w(space, 0, data, 0xff);
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break;
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default:
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break;
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}
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}
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READ8_MEMBER( sun4_state::irq_r )
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