Miscellaneous cleanup, and a couple of error checks.

This commit is contained in:
Vas Crabb 2024-01-25 05:42:52 +11:00
parent 16b0d444db
commit ef3b2ab1aa
14 changed files with 93 additions and 82 deletions

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@ -30,20 +30,20 @@ public:
abc_super_smartaid_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// optional information overrides
virtual void device_add_mconfig(machine_config &config) override;
virtual const tiny_rom_entry *device_rom_region() const override;
protected:
// device-level overrides
// device_t implementation
virtual void device_add_mconfig(machine_config &config) override;
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_start() override;
virtual void device_reset() override;
// device_nvram_interface overrides
// device_nvram_interface implementation
virtual void nvram_default() override { }
virtual bool nvram_read(util::read_stream &file) override { size_t actual; return !file.read(m_nvram, m_nvram.bytes(), actual) && actual == m_nvram.bytes(); }
virtual bool nvram_write(util::write_stream &file) override { size_t actual; return !file.write(m_nvram, m_nvram.bytes(), actual) && actual == m_nvram.bytes(); }
// device_abcbus_interface overrides
// device_abcbus_interface implementation
virtual void abcbus_cs(uint8_t data) override { m_bus->write_cs(data); }
virtual uint8_t abcbus_inp() override { return m_bus->read_inp(); }
virtual void abcbus_out(uint8_t data) override { m_bus->write_out(data); }

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@ -31,16 +31,16 @@ public:
c64_dqbb_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override;
// device_nvram_interface overrides
// device_nvram_interface implementation
virtual void nvram_default() override { }
virtual bool nvram_read(util::read_stream &file) override { size_t actual; return !file.read(m_nvram.get(), 0x4000, actual) && actual == 0x4000; }
virtual bool nvram_write(util::write_stream &file) override { size_t actual; return !file.write(m_nvram.get(), 0x4000, actual) && actual == 0x4000; }
// device_c64_expansion_card_interface overrides
// device_c64_expansion_card_interface implementation
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;

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@ -97,6 +97,8 @@ void c64_expansion_slot_device::device_reset()
std::pair<std::error_condition, std::string> c64_expansion_slot_device::call_load()
{
std::error_condition err;
if (m_card)
{
m_card->m_roml_size = 0;
@ -152,6 +154,10 @@ std::pair<std::error_condition, std::string> c64_expansion_slot_device::call_loa
cbm_crt_read_data(image_core_file(), roml, romh);
}
}
else
{
err = image_error::INVALIDIMAGE;
}
}
else
{
@ -187,7 +193,7 @@ std::pair<std::error_condition, std::string> c64_expansion_slot_device::call_loa
return std::make_pair(image_error::INVALIDLENGTH, "ROM size must be power of 2");
}
return std::make_pair(std::error_condition(), std::string());
return std::make_pair(err, std::string());
}

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@ -32,20 +32,18 @@ public:
c64_final_chesscard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
// device_t implementation
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
virtual void device_start() override;
virtual void device_reset() override;
// optional information overrides
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
// device_nvram_interface overrides
// device_nvram_interface implementation
virtual void nvram_default() override { }
virtual bool nvram_read(util::read_stream &file) override { size_t actual; return !file.read(m_nvram.get(), 0x2000, actual) && actual == 0x2000; }
virtual bool nvram_write(util::write_stream &file) override { size_t actual; return !file.write(m_nvram.get(), 0x2000, actual) && actual == 0x2000; }
// device_c64_expansion_card_interface overrides
// device_c64_expansion_card_interface implementation
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
@ -58,7 +56,7 @@ private:
int m_hidden;
void mainlatch_int(int state) { m_slot->nmi_w(state); }
uint8_t rom_r(offs_t offset) { return m_romx[offset]; } // cartridge cpu rom
uint8_t rom_r(offs_t offset) { return m_romx[offset]; } // cartridge CPU ROM
uint8_t nvram_r(offs_t offset) { return m_nvram[offset & 0x1fff]; }
void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset & 0x1fff] = data; }

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@ -31,16 +31,16 @@ public:
c64_neoram_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override;
// device_nvram_interface overrides
// device_nvram_interface implementation
virtual void nvram_default() override { }
virtual bool nvram_read(util::read_stream &file) override { size_t actual; return !file.read(m_nvram.get(), 0x200000, actual) && actual == 0x200000; }
virtual bool nvram_write(util::write_stream &file) override { size_t actual; return !file.write(m_nvram.get(), 0x200000, actual) && actual == 0x200000; }
// device_c64_expansion_card_interface overrides
// device_c64_expansion_card_interface implementation
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;

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@ -85,6 +85,8 @@ void cbm2_expansion_slot_device::device_start()
std::pair<std::error_condition, std::string> cbm2_expansion_slot_device::call_load()
{
std::error_condition err;
if (m_card)
{
if (!loaded_through_softlist())
@ -106,6 +108,10 @@ std::pair<std::error_condition, std::string> cbm2_expansion_slot_device::call_lo
m_card->m_bank3 = std::make_unique<uint8_t[]>(size);
fread(m_card->m_bank3, size);
}
else
{
err = image_error::INVALIDIMAGE;
}
}
else
{
@ -115,7 +121,7 @@ std::pair<std::error_condition, std::string> cbm2_expansion_slot_device::call_lo
}
}
return std::make_pair(std::error_condition(), std::string());
return std::make_pair(err, std::string());
}

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@ -29,8 +29,8 @@ DEFINE_DEVICE_TYPE(VIC20_EXPANSION_SLOT, vic20_expansion_slot_device, "vic20_exp
device_vic20_expansion_card_interface::device_vic20_expansion_card_interface(const machine_config &mconfig, device_t &device)
: device_interface(device, "vic20exp")
, m_slot(dynamic_cast<vic20_expansion_slot_device *>(device.owner()))
{
m_slot = dynamic_cast<vic20_expansion_slot_device *>(device.owner());
}

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@ -124,7 +124,7 @@ protected:
std::unique_ptr<uint8_t[]> m_blk3;
std::unique_ptr<uint8_t[]> m_blk5;
vic20_expansion_slot_device *m_slot;
vic20_expansion_slot_device *const m_slot;
};

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@ -2,7 +2,7 @@
// copyright-holders:Aaron Giles
/***************************************************************************
eeprom.c
eeprom.cpp
Base class for EEPROM devices.
@ -11,6 +11,8 @@
#include "emu.h"
#include "machine/eeprom.h"
#include "multibyte.h"
//#define VERBOSE 1
#include "logmacro.h"
@ -23,18 +25,18 @@
// eeprom_base_device - constructor
//-------------------------------------------------
eeprom_base_device::eeprom_base_device(const machine_config &mconfig, device_type devtype, const char *tag, device_t *owner)
: device_t(mconfig, devtype, tag, owner, 0),
device_nvram_interface(mconfig, *this),
m_region(*this, DEVICE_SELF),
m_cells(0),
m_address_bits(0),
m_data_bits(0),
m_default_data(nullptr),
m_default_data_size(0),
m_default_value(0),
m_default_value_set(false),
m_completion_time(attotime::zero)
eeprom_base_device::eeprom_base_device(const machine_config &mconfig, device_type devtype, const char *tag, device_t *owner) :
device_t(mconfig, devtype, tag, owner, 0),
device_nvram_interface(mconfig, *this),
m_region(*this, DEVICE_SELF),
m_cells(0),
m_address_bits(0),
m_data_bits(0),
m_default_data(nullptr),
m_default_data_size(0),
m_default_value(0),
m_default_value_set(false),
m_completion_time(attotime::zero)
{
// a 2ms write time is too long for rfjetsa
m_operation_time[WRITE_TIME] = attotime::from_usec(1750);
@ -251,8 +253,8 @@ void eeprom_base_device::nvram_default()
bool eeprom_base_device::nvram_read(util::read_stream &file)
{
uint32_t eeprom_length = 1 << m_address_bits;
uint32_t eeprom_bytes = eeprom_length * m_data_bits / 8;
uint32_t const eeprom_length = 1 << m_address_bits;
uint32_t const eeprom_bytes = eeprom_length * m_data_bits / 8;
size_t actual_bytes;
return !file.read(&m_data[0], eeprom_bytes, actual_bytes) && actual_bytes == eeprom_bytes;
@ -266,8 +268,8 @@ bool eeprom_base_device::nvram_read(util::read_stream &file)
bool eeprom_base_device::nvram_write(util::write_stream &file)
{
uint32_t eeprom_length = 1 << m_address_bits;
uint32_t eeprom_bytes = eeprom_length * m_data_bits / 8;
uint32_t const eeprom_length = 1 << m_address_bits;
uint32_t const eeprom_bytes = eeprom_length * m_data_bits / 8;
size_t actual_bytes;
return !file.write(&m_data[0], eeprom_bytes, actual_bytes) && actual_bytes == eeprom_bytes;
@ -281,7 +283,7 @@ bool eeprom_base_device::nvram_write(util::write_stream &file)
uint32_t eeprom_base_device::internal_read(offs_t address)
{
if (m_data_bits == 16)
return m_data[address * 2] | (m_data[address * 2 + 1] << 8);
return get_u16le(&m_data[address * 2]);
else
return m_data[address];
}
@ -295,9 +297,7 @@ uint32_t eeprom_base_device::internal_read(offs_t address)
void eeprom_base_device::internal_write(offs_t address, uint32_t data)
{
if (m_data_bits == 16)
{
m_data[address * 2] = data;
m_data[address * 2 + 1] = data >> 8;
} else
put_u16le(&m_data[address * 2], data);
else
m_data[address] = data;
}

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@ -71,12 +71,12 @@ protected:
std::unique_ptr<uint8_t []> m_data;
// configuration state
uint32_t m_cells;
uint8_t m_address_bits;
uint8_t m_data_bits;
uint32_t m_cells;
uint8_t m_address_bits;
uint8_t m_data_bits;
const void * m_default_data;
uint32_t m_default_data_size;
uint32_t m_default_value;
uint32_t m_default_data_size;
uint32_t m_default_value;
bool m_default_value_set;
attotime m_operation_time[TIMING_COUNT];

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@ -2,7 +2,7 @@
// copyright-holders:Aaron Giles
/***************************************************************************
nvram.c
nvram.cpp
Generic non-volatile RAM.
@ -78,12 +78,12 @@ void nvram_device::nvram_default()
// random values
case DEFAULT_RANDOM:
{
uint8_t *nvram = reinterpret_cast<uint8_t *>(m_base);
for (int index = 0; index < m_length; index++)
nvram[index] = machine().rand();
{
uint8_t *nvram = reinterpret_cast<uint8_t *>(m_base);
for (int index = 0; index < m_length; index++)
nvram[index] = machine().rand();
}
break;
}
// custom handler
case DEFAULT_CUSTOM:
@ -133,10 +133,10 @@ bool nvram_device::nvram_write(util::write_stream &file)
void nvram_device::determine_final_base()
{
// find our shared pointer with the target RAM
if (m_base == nullptr)
if (!m_base)
{
memory_share *share = owner()->memshare(tag());
if (share == nullptr)
memory_share *const share = owner()->memshare(tag());
if (!share)
throw emu_fatalerror("NVRAM device '%s' has no corresponding share() region", tag());
m_base = share->ptr();
m_length = share->bytes();
@ -144,5 +144,5 @@ void nvram_device::determine_final_base()
// if we are region-backed for the default, find it now and make sure it's the right size
if (m_region.found() && m_region->bytes() != m_length)
throw emu_fatalerror("%s",string_format("NVRAM device '%s' has a default region, but it should be 0x%X bytes", tag(), m_length).c_str());
throw emu_fatalerror("%s",string_format("NVRAM device '%s' has a default region, but it should be 0x%X bytes", tag(), m_length));
}

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@ -19,6 +19,7 @@
#include "emu.h"
#include "icorender.h"
#include "util/ioprocs.h"
#include "util/msdib.h"
#include "util/png.h"
@ -72,7 +73,7 @@ struct icon_dir_entry_t
};
bool load_ico_png(util::core_file &fp, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
bool load_ico_png(util::random_read &fp, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
{
// skip out if the data isn't a reasonable size - PNG magic alone is eight bytes
if (9U >= dir.size)
@ -118,7 +119,7 @@ bool load_ico_png(util::core_file &fp, icon_dir_entry_t const &dir, bitmap_argb3
}
bool load_ico_dib(util::core_file &fp, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
bool load_ico_dib(util::random_read &fp, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
{
fp.seek(dir.offset, SEEK_SET);
util::msdib_error const err(util::msdib_read_bitmap_data(fp, bitmap, dir.size, dir.get_height()));
@ -154,7 +155,7 @@ bool load_ico_dib(util::core_file &fp, icon_dir_entry_t const &dir, bitmap_argb3
}
bool load_ico_image(util::core_file &fp, unsigned index, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
bool load_ico_image(util::random_read &fp, unsigned index, icon_dir_entry_t const &dir, bitmap_argb32 &bitmap)
{
// try loading PNG image data (contains PNG file magic if used), and then fall back
if (load_ico_png(fp, dir, bitmap))
@ -173,7 +174,7 @@ bool load_ico_image(util::core_file &fp, unsigned index, icon_dir_entry_t const
}
bool load_ico_image(util::core_file &fp, unsigned count, unsigned index, bitmap_argb32 &bitmap)
bool load_ico_image(util::random_read &fp, unsigned count, unsigned index, bitmap_argb32 &bitmap)
{
// read the directory entry
std::error_condition err;
@ -206,7 +207,7 @@ bool load_ico_image(util::core_file &fp, unsigned count, unsigned index, bitmap_
} // anonymous namespace
int images_in_ico(util::core_file &fp)
int images_in_ico(util::random_read &fp)
{
// read and check the icon file header
std::error_condition err;
@ -237,7 +238,7 @@ int images_in_ico(util::core_file &fp)
}
void render_load_ico(util::core_file &fp, unsigned index, bitmap_argb32 &bitmap)
void render_load_ico(util::random_read &fp, unsigned index, bitmap_argb32 &bitmap)
{
// check that these things haven't been padded somehow
static_assert(sizeof(icon_dir_t) == 6U, "compiler has applied padding to icon_dir_t");
@ -261,7 +262,7 @@ void render_load_ico(util::core_file &fp, unsigned index, bitmap_argb32 &bitmap)
}
void render_load_ico_first(util::core_file &fp, bitmap_argb32 &bitmap)
void render_load_ico_first(util::random_read &fp, bitmap_argb32 &bitmap)
{
int const count(images_in_ico(fp));
for (int i = 0; count > i; ++i)
@ -273,7 +274,7 @@ void render_load_ico_first(util::core_file &fp, bitmap_argb32 &bitmap)
}
void render_load_ico_highest_detail(util::core_file &fp, bitmap_argb32 &bitmap)
void render_load_ico_highest_detail(util::random_read &fp, bitmap_argb32 &bitmap)
{
// read and check the icon file header - logs a message on error
int const count(images_in_ico(fp));

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@ -18,16 +18,16 @@
namespace ui {
// get number of images in icon file (-1 on error)
int images_in_ico(util::core_file &fp);
int images_in_ico(util::random_read &fp);
// load specified icon from file (zero-based)
void render_load_ico(util::core_file &fp, unsigned index, bitmap_argb32 &bitmap);
void render_load_ico(util::random_read &fp, unsigned index, bitmap_argb32 &bitmap);
// load first supported icon from file
void render_load_ico_first(util::core_file &fp, bitmap_argb32 &bitmap);
void render_load_ico_first(util::random_read &fp, bitmap_argb32 &bitmap);
// load highest detail supported icon from file
void render_load_ico_highest_detail(util::core_file &fp, bitmap_argb32 &bitmap);
void render_load_ico_highest_detail(util::random_read &fp, bitmap_argb32 &bitmap);
} // namespace ui

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@ -657,8 +657,8 @@ void gi6809_state::glck6809(machine_config &config)
PIA6821(config, m_pia[0], 0); // controlled by slave
m_pia[0]->readpa_handler().set_ioport("PIA0_A");
m_pia[0]->writepb_handler().set(FUNC(gi6809_state::lamps5_w));
m_pia[0]->ca2_handler().set([](bool state) {});
m_pia[0]->cb2_handler().set([](bool state) {});
m_pia[0]->ca2_handler().set_nop();
m_pia[0]->cb2_handler().set_nop();
PIA6821(config, m_pia[1], 0); // controlled by master
m_pia[1]->writepa_handler().set(FUNC(gi6809_state::snd_mux_w));
@ -666,8 +666,8 @@ void gi6809_state::glck6809(machine_config &config)
m_pia[1]->writepb_handler().set(FUNC(gi6809_state::lamps3_w));
m_pia[1]->readcb1_handler().set(m_crtc, FUNC(mc6845_device::vsync_r));
m_pia[1]->irqb_handler().set_inputline(m_maincpu, M6809_IRQ_LINE);
m_pia[1]->ca2_handler().set([](bool state) {});
m_pia[1]->cb2_handler().set([](bool state) {});
m_pia[1]->ca2_handler().set_nop();
m_pia[1]->cb2_handler().set_nop();
}
@ -692,7 +692,7 @@ void gi6809_state::castawayt(machine_config &config)
m_pia[0]->readpa_handler().set_ioport("PIA0_A");
m_pia[0]->writepb_handler().set(FUNC(gi6809_state::lamps8_w));
m_pia[0]->readca1_handler().set(m_crtc, FUNC(mc6845_device::vsync_r));
m_pia[0]->ca2_handler().set([](bool state) {});
m_pia[0]->ca2_handler().set_nop();
PIA6821(config, m_pia[1], 0); // DDRA:FF (All Out) - DDRB:EO (OOOI-IIII)
m_pia[1]->writepa_handler().set(FUNC(gi6809_state::snd_mux_w));
@ -703,7 +703,7 @@ void gi6809_state::castawayt(machine_config &config)
//m_pia[1]->readca2_handler() coin in lower opto to be implemented
m_pia[1]->readcb1_handler().set(m_crtc, FUNC(mc6845_device::vsync_r));
m_pia[1]->cb2_handler().set([](bool state) {});
m_pia[1]->cb2_handler().set_nop();
m_pia[1]->irqa_handler().set_inputline(m_maincpu, M6809_FIRQ_LINE);
m_pia[1]->irqb_handler().set_inputline(m_maincpu, M6809_IRQ_LINE);
}
@ -731,8 +731,8 @@ void gi6809_state::jesterch(machine_config &config)
m_pia[0]->readpa_handler().set_ioport("PIA0_A");
m_pia[0]->writepb_handler().set(FUNC(gi6809_state::lamps5_w));
m_pia[0]->irqa_handler().set_inputline(m_slavecpu, M6809_IRQ_LINE);
m_pia[0]->ca2_handler().set([](bool state) {});
m_pia[0]->cb2_handler().set([](bool state) {});
m_pia[0]->ca2_handler().set_nop();
m_pia[0]->cb2_handler().set_nop();
PIA6821(config, m_pia[1], 0); // DDRA:FF (All Out) - DDRB:EO (OOOI-IIII)
m_pia[1]->writepa_handler().set(FUNC(gi6809_state::snd_mux_w));
@ -742,8 +742,8 @@ void gi6809_state::jesterch(machine_config &config)
//m_pia[1]->readca1_handler() coin in upper opto to be implemented
//m_pia[1]->readca2_handler() coin in lower opto to be implemented
m_pia[1]->ca2_handler().set([](bool state) {});
m_pia[1]->cb2_handler().set([](bool state) {});
m_pia[1]->ca2_handler().set_nop();
m_pia[1]->cb2_handler().set_nop();
m_pia[1]->irqb_handler().set_inputline(m_maincpu, M6809_IRQ_LINE);
m_pia[1]->irqa_handler().set_inputline(m_maincpu, M6809_FIRQ_LINE);
}