some mostly pc related cleanup (nw)
This commit is contained in:
Miodrag Milanovic
parent
c2f8663985
commit
ef517f4fd3
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -6544,7 +6544,6 @@ src/mess/includes/pp01.h svneol=native#text/plain
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src/mess/includes/primo.h svneol=native#text/plain
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src/mess/includes/prof180x.h svneol=native#text/plain
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src/mess/includes/prof80.h svneol=native#text/plain
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src/mess/includes/ps2.h svneol=native#text/plain
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src/mess/includes/psion.h svneol=native#text/plain
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src/mess/includes/px8.h svneol=native#text/plain
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src/mess/includes/ql.h svneol=native#text/plain
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@ -7420,8 +7419,6 @@ src/mess/machine/pc_keyboards.c svneol=native#text/plain
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src/mess/machine/pc_keyboards.h svneol=native#text/plain
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src/mess/machine/pc_lpt.c svneol=native#text/plain
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src/mess/machine/pc_lpt.h svneol=native#text/plain
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src/mess/machine/pc_turbo.c svneol=native#text/plain
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src/mess/machine/pc_turbo.h svneol=native#text/plain
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src/mess/machine/pce.c svneol=native#text/plain
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src/mess/machine/pce220_ser.c svneol=native#text/plain
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src/mess/machine/pce220_ser.h svneol=native#text/plain
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@ -7450,7 +7447,6 @@ src/mess/machine/pokemini.c svneol=native#text/plain
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src/mess/machine/poly88.c svneol=native#text/plain
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src/mess/machine/pp01.c svneol=native#text/plain
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src/mess/machine/primo.c svneol=native#text/plain
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src/mess/machine/ps2.c svneol=native#text/plain
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src/mess/machine/psion_pack.c svneol=native#text/plain
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src/mess/machine/psion_pack.h svneol=native#text/plain
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src/mess/machine/psxanalog.c svneol=native#text/plain
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@ -61,7 +61,7 @@ More information can be found at http://www.seasip.info/AmstradXT/1640tech/index
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#include "machine/ram.h"
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static ADDRESS_MAP_START( ppc512_map, AS_PROGRAM, 16, pc_state )
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static ADDRESS_MAP_START( ppc512_map, AS_PROGRAM, 16, amstrad_pc_state )
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AM_RANGE(0x00000, 0x7ffff) AM_RAMBANK("bank10")
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AM_RANGE(0x80000, 0xbffff) AM_NOP
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AM_RANGE(0xc0000, 0xc7fff) AM_ROM
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@ -70,7 +70,7 @@ static ADDRESS_MAP_START( ppc512_map, AS_PROGRAM, 16, pc_state )
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AM_RANGE(0xf0000, 0xfffff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ppc640_map, AS_PROGRAM, 16, pc_state )
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static ADDRESS_MAP_START( ppc640_map, AS_PROGRAM, 16, amstrad_pc_state )
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AM_RANGE(0x00000, 0x9ffff) AM_RAMBANK("bank10")
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AM_RANGE(0xa0000, 0xbffff) AM_NOP
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AM_RANGE(0xc0000, 0xc7fff) AM_ROM
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@ -79,27 +79,27 @@ static ADDRESS_MAP_START( ppc640_map, AS_PROGRAM, 16, pc_state )
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AM_RANGE(0xf0000, 0xfffff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(ppc512_io, AS_IO, 16, pc_state )
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static ADDRESS_MAP_START(ppc512_io, AS_IO, 16, amstrad_pc_state )
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AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE8("dma8237", am9517a_device, read, write, 0xffff)
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AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8_LEGACY("pic8259", pic8259_r, pic8259_w, 0xffff)
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AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8_LEGACY("pit8253", pit8253_r, pit8253_w, 0xffff)
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AM_RANGE(0x0060, 0x0065) AM_READWRITE8_LEGACY(pc1640_port60_r, pc1640_port60_w, 0xffff)
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AM_RANGE(0x0060, 0x0065) AM_READWRITE8(pc1640_port60_r, pc1640_port60_w, 0xffff)
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AM_RANGE(0x0070, 0x0071) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffff)
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AM_RANGE(0x0078, 0x0079) AM_READWRITE8_LEGACY(pc1640_mouse_x_r, pc1640_mouse_x_w, 0xffff)
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AM_RANGE(0x007a, 0x007b) AM_READWRITE8_LEGACY(pc1640_mouse_y_r, pc1640_mouse_y_w, 0xffff)
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AM_RANGE(0x0078, 0x0079) AM_READWRITE8(pc1640_mouse_x_r, pc1640_mouse_x_w, 0xffff)
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AM_RANGE(0x007a, 0x007b) AM_READWRITE8(pc1640_mouse_y_r, pc1640_mouse_y_w, 0xffff)
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AM_RANGE(0x0080, 0x0087) AM_READWRITE8(pc_page_r, pc_page_w, 0xffff)
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AM_RANGE(0x0200, 0x0207) AM_DEVREADWRITE8("joy", pc_joy_device, joy_port_r, joy_port_w, 0xffff)
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AM_RANGE(0x0278, 0x027b) AM_READ8_LEGACY(pc200_port278_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_2", pc_lpt_w, 0x00ff)
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AM_RANGE(0x0278, 0x027b) AM_READ8(pc200_port278_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_2", pc_lpt_w, 0x00ff)
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AM_RANGE(0x02e8, 0x02ef) AM_DEVREADWRITE8("ins8250_3", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x02f8, 0x02ff) AM_DEVREADWRITE8("ins8250_1", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x0378, 0x037b) AM_READ8_LEGACY(pc200_port378_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_1", pc_lpt_w, 0x00ff)
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AM_RANGE(0x0378, 0x037b) AM_READ8(pc200_port378_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_1", pc_lpt_w, 0x00ff)
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AM_RANGE(0x03bc, 0x03bf) AM_DEVREADWRITE8_LEGACY("lpt_0", pc_lpt_r, pc_lpt_w, 0x00ff)
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AM_RANGE(0x03e8, 0x03ef) AM_DEVREADWRITE8("ins8250_2", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x03f0, 0x03f7) AM_DEVICE8("fdc", pc_fdc_xt_device, map, 0xffff)
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AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ins8250_0", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( pc200_map, AS_PROGRAM, 16, pc_state )
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static ADDRESS_MAP_START( pc200_map, AS_PROGRAM, 16, amstrad_pc_state )
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AM_RANGE(0x00000, 0x9ffff) AM_RAMBANK("bank10")
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AM_RANGE(0xa0000, 0xbffff) AM_NOP
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AM_RANGE(0xc0000, 0xc7fff) AM_ROM
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@ -108,19 +108,19 @@ static ADDRESS_MAP_START( pc200_map, AS_PROGRAM, 16, pc_state )
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AM_RANGE(0xf0000, 0xfffff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(pc200_io, AS_IO, 16, pc_state )
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static ADDRESS_MAP_START(pc200_io, AS_IO, 16, amstrad_pc_state )
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AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE8("dma8237", am9517a_device, read, write, 0xffff)
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AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE8_LEGACY("pic8259", pic8259_r, pic8259_w, 0xffff)
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AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8_LEGACY("pit8253", pit8253_r, pit8253_w, 0xffff)
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AM_RANGE(0x0060, 0x0065) AM_READWRITE8_LEGACY(pc1640_port60_r, pc1640_port60_w, 0xffff)
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AM_RANGE(0x0078, 0x0079) AM_READWRITE8_LEGACY(pc1640_mouse_x_r, pc1640_mouse_x_w, 0xffff)
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AM_RANGE(0x007a, 0x007b) AM_READWRITE8_LEGACY(pc1640_mouse_y_r, pc1640_mouse_y_w, 0xffff)
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AM_RANGE(0x0060, 0x0065) AM_READWRITE8(pc1640_port60_r, pc1640_port60_w, 0xffff)
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AM_RANGE(0x0078, 0x0079) AM_READWRITE8(pc1640_mouse_x_r, pc1640_mouse_x_w, 0xffff)
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AM_RANGE(0x007a, 0x007b) AM_READWRITE8(pc1640_mouse_y_r, pc1640_mouse_y_w, 0xffff)
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AM_RANGE(0x0080, 0x0087) AM_READWRITE8(pc_page_r, pc_page_w, 0xffff)
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AM_RANGE(0x0200, 0x0207) AM_DEVREADWRITE8("joy", pc_joy_device, joy_port_r, joy_port_w, 0xffff)
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AM_RANGE(0x0278, 0x027b) AM_READ8_LEGACY(pc200_port278_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_2", pc_lpt_w, 0x00ff)
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AM_RANGE(0x0278, 0x027b) AM_READ8(pc200_port278_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_2", pc_lpt_w, 0x00ff)
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AM_RANGE(0x02e8, 0x02ef) AM_DEVREADWRITE8("ins8250_3", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x02f8, 0x02ff) AM_DEVREADWRITE8("ins8250_1", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x0378, 0x037b) AM_READ8_LEGACY(pc200_port378_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_1", pc_lpt_w, 0x00ff)
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AM_RANGE(0x0378, 0x037b) AM_READ8(pc200_port378_r, 0xffff) AM_DEVWRITE8_LEGACY("lpt_1", pc_lpt_w, 0x00ff)
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AM_RANGE(0x03bc, 0x03bf) AM_DEVREADWRITE8_LEGACY("lpt_0", pc_lpt_r, pc_lpt_w, 0x00ff)
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AM_RANGE(0x03e8, 0x03ef) AM_DEVREADWRITE8("ins8250_2", ins8250_device, ins8250_r, ins8250_w, 0xffff)
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AM_RANGE(0x03f0, 0x03f7) AM_DEVICE8("fdc", pc_fdc_xt_device, map, 0xffff)
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@ -237,7 +237,7 @@ SLOT_INTERFACE_END
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MCFG_CPU_ADD("maincpu", type, clock) \
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MCFG_CPU_PROGRAM_MAP(mem##_map) \
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MCFG_CPU_IO_MAP(port##_io) \
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, vblankfunc, "screen", 0, 1) \
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", amstrad_pc_state, vblankfunc, "screen", 0, 1) \
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MCFG_CPU_CONFIG(i86_address_mask)
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@ -258,12 +258,12 @@ static GFXDECODE_START( pc200 )
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GFXDECODE_ENTRY( "gfx1", 0x0000, pc200_charlayout, 3, 1 )
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GFXDECODE_END
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static MACHINE_CONFIG_START( pc200, pc_state )
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static MACHINE_CONFIG_START( pc200, amstrad_pc_state )
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/* basic machine hardware */
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MCFG_CPU_PC(pc200, pc200, I8086, 8000000, pc_frame_interrupt)
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MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
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MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
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MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
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MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
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MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
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@ -328,15 +328,15 @@ static GFXDECODE_START( pc1512 )
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GFXDECODE_ENTRY( "gfx1", 0x0000, pc1512_charlayout, 3, 1 )
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GFXDECODE_END
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static MACHINE_CONFIG_START( ppc512, pc_state )
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static MACHINE_CONFIG_START( ppc512, amstrad_pc_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", V30, 8000000)
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MCFG_CPU_PROGRAM_MAP(ppc512_map)
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MCFG_CPU_IO_MAP(ppc512_io)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, pc_frame_interrupt, "screen", 0, 1)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", amstrad_pc_state, pc_frame_interrupt, "screen", 0, 1)
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MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
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MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
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MCFG_MACHINE_START_OVERRIDE(amstrad_pc_state,pc)
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MCFG_MACHINE_RESET_OVERRIDE(amstrad_pc_state,pc)
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MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
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@ -505,9 +505,9 @@ ROM_END
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***************************************************************************/
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
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COMP( 1987, ppc512, ibm5150, 0, ppc512, pc200, pc_state, ppc512, "Amstrad plc", "Amstrad PPC512", GAME_NOT_WORKING)
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COMP( 1987, ppc640, ibm5150, 0, ppc640, pc200, pc_state, ppc512, "Amstrad plc", "Amstrad PPC640", GAME_NOT_WORKING)
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COMP( 1988, pc20, ibm5150, 0, pc200, pc200, pc_state, pc200, "Amstrad plc", "Amstrad PC20" , GAME_NOT_WORKING)
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COMP( 1988, pc200, ibm5150, 0, pc200, pc200, pc_state, pc200, "Sinclair Research Ltd", "PC200 Professional Series", GAME_NOT_WORKING)
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COMP( 1988, pc2086, ibm5150, 0, pc200, pc200, pc_state, pc200, "Amstrad plc", "Amstrad PC2086", GAME_NOT_WORKING )
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COMP( 1990, pc3086, ibm5150, 0, pc200, pc200, pc_state, pc200, "Amstrad plc", "Amstrad PC3086", GAME_NOT_WORKING )
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COMP( 1987, ppc512, ibm5150, 0, ppc512, pc200, amstrad_pc_state, ppc512, "Amstrad plc", "Amstrad PPC512", GAME_NOT_WORKING)
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COMP( 1987, ppc640, ibm5150, 0, ppc640, pc200, amstrad_pc_state, ppc512, "Amstrad plc", "Amstrad PPC640", GAME_NOT_WORKING)
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COMP( 1988, pc20, ibm5150, 0, pc200, pc200, amstrad_pc_state, pc200, "Amstrad plc", "Amstrad PC20" , GAME_NOT_WORKING)
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COMP( 1988, pc200, ibm5150, 0, pc200, pc200, amstrad_pc_state, pc200, "Sinclair Research Ltd", "PC200 Professional Series", GAME_NOT_WORKING)
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COMP( 1988, pc2086, ibm5150, 0, pc200, pc200, amstrad_pc_state, pc200, "Amstrad plc", "Amstrad PC2086", GAME_NOT_WORKING )
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COMP( 1990, pc3086, ibm5150, 0, pc200, pc200, amstrad_pc_state, pc200, "Amstrad plc", "Amstrad PC3086", GAME_NOT_WORKING )
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@ -98,13 +98,13 @@ static ADDRESS_MAP_START( hecdisc2_io , AS_IO, 8, hec2hrp_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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// ROM Page managing
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AM_RANGE(0x000,0x00f) AM_READWRITE_LEGACY(hector_disc2_io00_port_r, hector_disc2_io00_port_w )
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AM_RANGE(0x000,0x00f) AM_READWRITE(hector_disc2_io00_port_r, hector_disc2_io00_port_w )
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// RS232 - 8251 managing
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AM_RANGE(0x020,0x02f) AM_READWRITE_LEGACY(hector_disc2_io20_port_r, hector_disc2_io20_port_w )
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AM_RANGE(0x020,0x02f) AM_READWRITE(hector_disc2_io20_port_r, hector_disc2_io20_port_w )
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// Hector communication managing
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AM_RANGE(0x030,0x03f) AM_READWRITE_LEGACY(hector_disc2_io30_port_r, hector_disc2_io30_port_w )
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AM_RANGE(0x040,0x04f) AM_READWRITE_LEGACY(hector_disc2_io40_port_r, hector_disc2_io40_port_w )
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AM_RANGE(0x050,0x05f) AM_READWRITE_LEGACY(hector_disc2_io50_port_r, hector_disc2_io50_port_w )
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AM_RANGE(0x030,0x03f) AM_READWRITE(hector_disc2_io30_port_r, hector_disc2_io30_port_w )
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AM_RANGE(0x040,0x04f) AM_READWRITE(hector_disc2_io40_port_r, hector_disc2_io40_port_w )
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AM_RANGE(0x050,0x05f) AM_READWRITE(hector_disc2_io50_port_r, hector_disc2_io50_port_w )
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// uPD765 link:
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AM_RANGE(0x060,0x061) AM_DEVICE("upd765", upd765a_device, map)
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AM_RANGE(0x070,0x07f) AM_DEVREADWRITE("upd765", upd765a_device, mdma_r, mdma_w)
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@ -330,7 +330,7 @@ MACHINE_START_MEMBER(hec2hrp_state,hec2hrx)
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m_hector_videoram.set_target(m_hector_videoram_hrx,m_hector_videoram.bytes());
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hector_init();
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hector_disc2_init(machine()); // Init of the Disc II !
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hector_disc2_init(); // Init of the Disc II !
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}
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/*****************************************************************************/
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MACHINE_START_MEMBER(hec2hrp_state,hec2mdhrx)
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@ -368,7 +368,7 @@ MACHINE_RESET_MEMBER(hec2hrp_state,hec2hrx)
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// Machines init
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hector_reset(1, 1);
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hector_disc2_reset(machine());
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hector_disc2_reset();
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}
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//minidisc
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MACHINE_RESET_MEMBER(hec2hrp_state,hec2mdhrx)
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@ -47,7 +47,6 @@
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#include "includes/at.h"
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#include "machine/8042kbdc.h"
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#include "machine/pit8253.h"
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#include "includes/ps2.h"
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#include "machine/pcshare.h"
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#include "video/newport.h"
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#include "sound/dac.h"
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@ -310,7 +310,7 @@ static ADDRESS_MAP_START(ibm5550_io, AS_IO, 16, pc_state )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( europc_map, AS_PROGRAM, 8, pc_state )
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static ADDRESS_MAP_START( europc_map, AS_PROGRAM, 8, europc_pc_state )
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AM_RANGE(0x00000, 0x9ffff) AM_RAMBANK("bank10")
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AM_RANGE(0xa0000, 0xaffff) AM_NOP
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AM_RANGE(0xc0000, 0xc7fff) AM_NOP
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@ -321,16 +321,16 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START(europc_io, AS_IO, 8, pc_state )
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static ADDRESS_MAP_START(europc_io, AS_IO, 8, europc_pc_state )
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AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE("dma8237", am9517a_device, read, write)
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AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE_LEGACY("pic8259", pic8259_r, pic8259_w)
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AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE_LEGACY("pit8253", pit8253_r, pit8253_w)
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AM_RANGE(0x0060, 0x0063) AM_READWRITE_LEGACY(europc_pio_r, europc_pio_w)
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AM_RANGE(0x0060, 0x0063) AM_READWRITE(europc_pio_r, europc_pio_w)
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AM_RANGE(0x0080, 0x0087) AM_READWRITE(pc_page_r, pc_page_w)
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AM_RANGE(0x0200, 0x0207) AM_DEVREADWRITE("joy", pc_joy_device, joy_port_r, joy_port_w)
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AM_RANGE(0x0250, 0x025f) AM_READWRITE_LEGACY(europc_jim_r, europc_jim_w)
|
||||
AM_RANGE(0x0250, 0x025f) AM_READWRITE(europc_jim_r, europc_jim_w)
|
||||
AM_RANGE(0x0278, 0x027b) AM_DEVREADWRITE_LEGACY("lpt_2", pc_lpt_r, pc_lpt_w)
|
||||
AM_RANGE(0x02e0, 0x02e0) AM_READ_LEGACY(europc_jim2_r)
|
||||
AM_RANGE(0x02e0, 0x02e0) AM_READ(europc_jim2_r)
|
||||
AM_RANGE(0x02e8, 0x02ef) AM_DEVREADWRITE("ins8250_3", ins8250_device, ins8250_r, ins8250_w)
|
||||
AM_RANGE(0x02f8, 0x02ff) AM_DEVREADWRITE("ins8250_1", ins8250_device, ins8250_r, ins8250_w)
|
||||
AM_RANGE(0x0378, 0x037b) AM_DEVREADWRITE_LEGACY("lpt_1", pc_lpt_r, pc_lpt_w)
|
||||
@ -1038,12 +1038,12 @@ static GFXDECODE_START( europc )
|
||||
GFXDECODE_ENTRY( "gfx1", 0x0800, europc_16_charlayout, 3, 1 )
|
||||
GFXDECODE_END
|
||||
|
||||
static MACHINE_CONFIG_START( europc, pc_state )
|
||||
static MACHINE_CONFIG_START( europc, europc_pc_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_PC(europc, europc, I8088, 4772720*2, pc_frame_interrupt)
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
|
||||
MCFG_MACHINE_START_OVERRIDE(europc_pc_state,pc)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(europc_pc_state,pc)
|
||||
|
||||
MCFG_PIT8253_ADD( "pit8253", ibm5150_pit8253_config )
|
||||
|
||||
@ -2337,7 +2337,7 @@ ROM_END
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */
|
||||
COMP( 1984, dgone, ibm5150, 0, pccga, pccga, pc_state, pccga, "Data General", "Data General/One" , GAME_NOT_WORKING)/* CGA, 2x 3.5" disk drives */
|
||||
COMP( 1985, bw230, ibm5150, 0, pccga, bondwell, pc_state, bondwell, "Bondwell Holding", "BW230 (PRO28 Series)", 0 )
|
||||
COMP( 1988, europc, ibm5150, 0, europc, europc, pc_state, europc, "Schneider Rdf. AG", "EURO PC", GAME_NOT_WORKING)
|
||||
COMP( 1988, europc, ibm5150, 0, europc, europc, europc_pc_state, europc, "Schneider Rdf. AG", "EURO PC", GAME_NOT_WORKING)
|
||||
COMP( 1984, compc1, ibm5150, 0, pccga, pccga, pc_state, pccga, "Commodore Business Machines", "Commodore PC-1" , GAME_NOT_WORKING)
|
||||
COMP( 1987, pc10iii, ibm5150, 0, pccga, pccga, pc_state, pccga, "Commodore Business Machines", "Commodore PC-10 III" , GAME_NOT_WORKING)
|
||||
|
||||
|
||||
@ -7,27 +7,48 @@
|
||||
#ifndef AMSTR_PC_H_
|
||||
#define AMSTR_PC_H_
|
||||
|
||||
#include "includes/pc.h"
|
||||
|
||||
#define PC200_MODE (machine.root_device().ioport("DSW0")->read() & 0x30)
|
||||
#define PC200_MDA 0x30
|
||||
class amstrad_pc_state : public pc_state
|
||||
{
|
||||
public:
|
||||
amstrad_pc_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pc_state(mconfig, type, tag)
|
||||
{ m_mouse.x =0; m_mouse.y=0;}
|
||||
|
||||
DECLARE_READ8_MEMBER( pc1640_port60_r );
|
||||
DECLARE_WRITE8_MEMBER( pc1640_port60_w );
|
||||
|
||||
/*----------- defined in machine/amstr_pc.c -----------*/
|
||||
DECLARE_READ8_MEMBER( pc1640_mouse_x_r );
|
||||
DECLARE_READ8_MEMBER( pc1640_mouse_y_r );
|
||||
DECLARE_WRITE8_MEMBER( pc1640_mouse_x_w );
|
||||
DECLARE_WRITE8_MEMBER( pc1640_mouse_y_w );
|
||||
|
||||
DECLARE_READ8_HANDLER( pc1640_port60_r );
|
||||
DECLARE_WRITE8_HANDLER( pc1640_port60_w );
|
||||
DECLARE_READ8_MEMBER( pc200_port378_r );
|
||||
DECLARE_READ8_MEMBER( pc200_port278_r );
|
||||
DECLARE_READ8_MEMBER( pc1640_port378_r );
|
||||
DECLARE_READ8_MEMBER( pc1640_port3d0_r );
|
||||
DECLARE_READ8_MEMBER( pc1640_port4278_r );
|
||||
DECLARE_READ8_MEMBER( pc1640_port278_r );
|
||||
|
||||
DECLARE_DRIVER_INIT(pc1512);
|
||||
DECLARE_DRIVER_INIT(pc1640);
|
||||
DECLARE_DRIVER_INIT(ppc512);
|
||||
DECLARE_DRIVER_INIT(pc200);
|
||||
|
||||
private:
|
||||
struct {
|
||||
UINT8 x,y; //byte clipping needed
|
||||
} m_mouse;
|
||||
|
||||
DECLARE_READ8_HANDLER( pc1640_mouse_x_r );
|
||||
DECLARE_READ8_HANDLER( pc1640_mouse_y_r );
|
||||
DECLARE_WRITE8_HANDLER( pc1640_mouse_x_w );
|
||||
DECLARE_WRITE8_HANDLER( pc1640_mouse_y_w );
|
||||
// 64 system status register?
|
||||
UINT8 m_port60;
|
||||
UINT8 m_port61;
|
||||
UINT8 m_port62;
|
||||
UINT8 m_port65;
|
||||
|
||||
DECLARE_READ8_HANDLER( pc200_port378_r );
|
||||
DECLARE_READ8_HANDLER( pc200_port278_r );
|
||||
DECLARE_READ8_HANDLER( pc1640_port378_r );
|
||||
DECLARE_READ8_HANDLER( pc1640_port3d0_r );
|
||||
DECLARE_READ8_HANDLER( pc1640_port4278_r );
|
||||
DECLARE_READ8_HANDLER( pc1640_port278_r );
|
||||
int m_dipstate;
|
||||
};
|
||||
|
||||
INPUT_PORTS_EXTERN( amstrad_keyboard );
|
||||
|
||||
|
||||
@ -35,7 +35,6 @@
|
||||
#include "machine/idectrl.h"
|
||||
#include "machine/isa_aha1542.h"
|
||||
#include "machine/at_keybc.h"
|
||||
#include "includes/ps2.h"
|
||||
|
||||
#include "imagedev/harddriv.h"
|
||||
#include "machine/am9517a.h"
|
||||
|
||||
@ -7,6 +7,47 @@
|
||||
#ifndef EUROPC_H_
|
||||
#define EUROPC_H_
|
||||
|
||||
#include "includes/pc.h"
|
||||
#include "video/pc_aga.h"
|
||||
|
||||
class europc_pc_state : public pc_state
|
||||
{
|
||||
public:
|
||||
europc_pc_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pc_state(mconfig, type, tag),
|
||||
m_jim_state(0),
|
||||
m_port61(0) { }
|
||||
|
||||
DECLARE_WRITE8_MEMBER( europc_pio_w );
|
||||
DECLARE_READ8_MEMBER( europc_pio_r );
|
||||
|
||||
DECLARE_WRITE8_MEMBER ( europc_jim_w );
|
||||
DECLARE_READ8_MEMBER ( europc_jim_r );
|
||||
DECLARE_READ8_MEMBER ( europc_jim2_r );
|
||||
|
||||
DECLARE_READ8_MEMBER( europc_rtc_r );
|
||||
DECLARE_WRITE8_MEMBER( europc_rtc_w );
|
||||
|
||||
TIMER_CALLBACK_MEMBER(europc_rtc_timer);
|
||||
|
||||
DECLARE_DRIVER_INIT(europc);
|
||||
|
||||
void europc_rtc_set_time();
|
||||
void europc_rtc_init();
|
||||
void europc_rtc_load_stream(emu_file *file);
|
||||
void europc_rtc_save_stream(emu_file *file);
|
||||
|
||||
UINT8 m_jim_data[16];
|
||||
UINT8 m_jim_state;
|
||||
AGA_MODE m_jim_mode;
|
||||
int m_port61; // bit 0,1 must be 0 for startup; reset?
|
||||
UINT8 m_rtc_data[0x10];
|
||||
int m_rtc_reg;
|
||||
int m_rtc_state;
|
||||
emu_timer *m_rtc_timer;
|
||||
};
|
||||
|
||||
extern NVRAM_HANDLER( europc_rtc );
|
||||
|
||||
/*
|
||||
layout of an uk europc
|
||||
@ -132,21 +173,4 @@ i am not sure if keypad enter delivers the mf2 keycode
|
||||
PORT_BIT ( 0xffff, 0x0000, IPT_UNUSED )
|
||||
|
||||
|
||||
/*----------- defined in machine/europc.c -----------*/
|
||||
|
||||
DECLARE_WRITE8_HANDLER( europc_pio_w );
|
||||
DECLARE_READ8_HANDLER( europc_pio_r );
|
||||
|
||||
extern DECLARE_WRITE8_HANDLER ( europc_jim_w );
|
||||
extern DECLARE_READ8_HANDLER ( europc_jim_r );
|
||||
extern DECLARE_READ8_HANDLER ( europc_jim2_r );
|
||||
|
||||
extern DECLARE_READ8_HANDLER( europc_rtc_r );
|
||||
extern DECLARE_WRITE8_HANDLER( europc_rtc_w );
|
||||
extern NVRAM_HANDLER( europc_rtc );
|
||||
|
||||
void europc_rtc_set_time(running_machine &machine);
|
||||
void europc_rtc_init(running_machine &machine);
|
||||
|
||||
|
||||
#endif /* EUROPC_H_ */
|
||||
|
||||
@ -161,41 +161,26 @@ public:
|
||||
void Init_Hector_Palette();
|
||||
void hector_80c(bitmap_ind16 &bitmap, UINT8 *page, int ymax, int yram) ;
|
||||
void hector_hr(bitmap_ind16 &bitmap, UINT8 *page, int ymax, int yram) ;
|
||||
|
||||
/*----------- defined in machine/hecdisk2.c -----------*/
|
||||
|
||||
// disc2 handling
|
||||
DECLARE_READ8_MEMBER( hector_disc2_io00_port_r);
|
||||
DECLARE_WRITE8_MEMBER( hector_disc2_io00_port_w);
|
||||
DECLARE_READ8_MEMBER( hector_disc2_io20_port_r);
|
||||
DECLARE_WRITE8_MEMBER( hector_disc2_io20_port_w);
|
||||
DECLARE_READ8_MEMBER( hector_disc2_io30_port_r);
|
||||
DECLARE_WRITE8_MEMBER( hector_disc2_io30_port_w);
|
||||
DECLARE_READ8_MEMBER( hector_disc2_io40_port_r);
|
||||
DECLARE_WRITE8_MEMBER( hector_disc2_io40_port_w);
|
||||
DECLARE_READ8_MEMBER( hector_disc2_io50_port_r);
|
||||
DECLARE_WRITE8_MEMBER( hector_disc2_io50_port_w);
|
||||
|
||||
void hector_disc2_reset();
|
||||
void hector_disc2_init();
|
||||
};
|
||||
|
||||
/*----------- defined in machine/hec2hrp.c -----------*/
|
||||
|
||||
/* Protoype of memory Handler*/
|
||||
DECLARE_WRITE8_HANDLER( hector_switch_bank_rom_w );
|
||||
|
||||
/* Prototype of I/O Handler*/
|
||||
DECLARE_READ8_HANDLER( hector_mx_io_port_r );
|
||||
/*----------- defined in video/hec2video.c -----------*/
|
||||
|
||||
|
||||
|
||||
|
||||
/* Sound function*/
|
||||
extern const sn76477_interface hector_sn76477_interface;
|
||||
|
||||
/*----------- defined in machine/hecdisk2.c -----------*/
|
||||
|
||||
// disc2 handling
|
||||
DECLARE_READ8_HANDLER( hector_disc2_io00_port_r);
|
||||
DECLARE_WRITE8_HANDLER( hector_disc2_io00_port_w);
|
||||
DECLARE_READ8_HANDLER( hector_disc2_io20_port_r);
|
||||
DECLARE_WRITE8_HANDLER( hector_disc2_io20_port_w);
|
||||
DECLARE_READ8_HANDLER( hector_disc2_io30_port_r);
|
||||
DECLARE_WRITE8_HANDLER( hector_disc2_io30_port_w);
|
||||
DECLARE_READ8_HANDLER( hector_disc2_io40_port_r);
|
||||
DECLARE_WRITE8_HANDLER( hector_disc2_io40_port_w);
|
||||
DECLARE_READ8_HANDLER( hector_disc2_io50_port_r);
|
||||
DECLARE_WRITE8_HANDLER( hector_disc2_io50_port_w);
|
||||
|
||||
void hector_disc2_reset( running_machine &machine);
|
||||
void hector_disc2_init( running_machine &machine);
|
||||
void hector_minidisc_init( running_machine &machine);
|
||||
|
||||
extern const wd17xx_interface hector_wd17xx_interface; // Special for minidisc
|
||||
extern const floppy_interface minidisc_floppy_interface;
|
||||
|
||||
@ -80,18 +80,13 @@ public:
|
||||
DECLARE_READ8_MEMBER(unk_r);
|
||||
DECLARE_READ8_MEMBER(ec1841_memboard_r);
|
||||
DECLARE_WRITE8_MEMBER(ec1841_memboard_w);
|
||||
DECLARE_DRIVER_INIT(europc);
|
||||
DECLARE_DRIVER_INIT(mc1502);
|
||||
DECLARE_DRIVER_INIT(bondwell);
|
||||
DECLARE_DRIVER_INIT(pcjr);
|
||||
DECLARE_DRIVER_INIT(pccga);
|
||||
DECLARE_DRIVER_INIT(t1000hx);
|
||||
DECLARE_DRIVER_INIT(ppc512);
|
||||
DECLARE_DRIVER_INIT(pc200);
|
||||
DECLARE_DRIVER_INIT(ibm5150);
|
||||
DECLARE_DRIVER_INIT(pcmda);
|
||||
DECLARE_DRIVER_INIT(pc1512);
|
||||
DECLARE_DRIVER_INIT(pc1640);
|
||||
DECLARE_MACHINE_START(pc);
|
||||
DECLARE_MACHINE_RESET(pc);
|
||||
DECLARE_MACHINE_RESET(tandy1000rl);
|
||||
@ -161,8 +156,19 @@ public:
|
||||
void pcjr_keyb_init();
|
||||
void mess_init_pc_common(UINT32 flags, void (*set_keyb_int_func)(running_machine &, int), void (*set_hdc_int_func)(running_machine &,int,int));
|
||||
void pc_rtc_init();
|
||||
|
||||
TIMER_CALLBACK_MEMBER(pc_turbo_callback);
|
||||
void pc_turbo_setup(double off_speed, double on_speed);
|
||||
|
||||
int m_turbo_cur_val;
|
||||
double m_turbo_off_speed;
|
||||
double m_turbo_on_speed;
|
||||
|
||||
};
|
||||
|
||||
void pc_set_irq_line(running_machine &machine,int irq, int state);
|
||||
void pc_set_keyb_int(running_machine &machine, int state);
|
||||
|
||||
/*----------- defined in machine/pc.c -----------*/
|
||||
|
||||
extern const struct am9517a_interface ibm5150_dma8237_config;
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
/*****************************************************************************
|
||||
*
|
||||
* includes/ps2.h
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef PS2_H_
|
||||
#define PS2_H_
|
||||
|
||||
|
||||
/*----------- defined in machine/ps2.c -----------*/
|
||||
|
||||
DECLARE_READ8_HANDLER(ps2_pos_r);
|
||||
DECLARE_WRITE8_HANDLER(ps2_pos_w);
|
||||
|
||||
|
||||
#endif /* PS2_H_ */
|
||||
@ -98,20 +98,6 @@ port 03de write/read
|
||||
cmos ram 23 dipswitches?
|
||||
*/
|
||||
|
||||
static struct {
|
||||
struct {
|
||||
UINT8 x,y; //byte clipping needed
|
||||
} mouse;
|
||||
|
||||
// 64 system status register?
|
||||
UINT8 port60;
|
||||
UINT8 port61;
|
||||
UINT8 port62;
|
||||
UINT8 port65;
|
||||
|
||||
int dipstate;
|
||||
} pc1640={{0}, 0};
|
||||
|
||||
/* test sequence in bios
|
||||
write 00 to 65
|
||||
write 30 to 61
|
||||
@ -146,29 +132,73 @@ static struct {
|
||||
7d 01 01 mouse button right
|
||||
*/
|
||||
|
||||
WRITE8_HANDLER( pc1640_port60_w )
|
||||
DRIVER_INIT_MEMBER(amstrad_pc_state,pc1640)
|
||||
{
|
||||
pc_state *state = space.machine().driver_data<pc_state>();
|
||||
address_space &io_space = machine().firstcpu->space( AS_IO );
|
||||
|
||||
io_space.install_read_handler(0x278, 0x27b, read8_delegate(FUNC(amstrad_pc_state::pc1640_port278_r),this), 0xffff);
|
||||
io_space.install_read_handler(0x4278, 0x427b, read8_delegate(FUNC(amstrad_pc_state::pc1640_port4278_r),this), 0xffff);
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(amstrad_pc_state,pc200)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(amstrad_pc_state,ppc512)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
DRIVER_INIT_MEMBER(amstrad_pc_state,pc1512)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( amstrad_pc_state::pc1640_port60_w )
|
||||
{
|
||||
switch (offset) {
|
||||
case 1:
|
||||
pc1640.port61=data;
|
||||
if (data==0x30) pc1640.port62=(pc1640.port65&0x10)>>4;
|
||||
else if (data==0x34) pc1640.port62=pc1640.port65&0xf;
|
||||
pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
|
||||
state->pc_speaker_set_spkrdata( data & 0x02 );
|
||||
m_port61=data;
|
||||
if (data==0x30) m_port62=(m_port65&0x10)>>4;
|
||||
else if (data==0x34) m_port62=m_port65&0xf;
|
||||
pit8253_gate2_w(machine().device("pit8253"), BIT(data, 0));
|
||||
pc_speaker_set_spkrdata( data & 0x02 );
|
||||
pc_keyb_set_clock(data&0x40);
|
||||
break;
|
||||
case 4:
|
||||
if (data&0x80) {
|
||||
pc1640.port60=data^0x8d;
|
||||
m_port60=data^0x8d;
|
||||
} else {
|
||||
pc1640.port60=data;
|
||||
m_port60=data;
|
||||
}
|
||||
break;
|
||||
case 5:
|
||||
// stores the configuration data for port 62 configuration dipswitch emulation
|
||||
pc1640.port65=data;
|
||||
m_port65=data;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -176,76 +206,76 @@ WRITE8_HANDLER( pc1640_port60_w )
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( pc1640_port60_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_port60_r )
|
||||
{
|
||||
int data=0;
|
||||
switch (offset) {
|
||||
case 0:
|
||||
if (pc1640.port61&0x80)
|
||||
data=pc1640.port60;
|
||||
if (m_port61&0x80)
|
||||
data=m_port60;
|
||||
else
|
||||
data = pc_keyb_read();
|
||||
break;
|
||||
|
||||
case 1:
|
||||
data = pc1640.port61;
|
||||
data = m_port61;
|
||||
break;
|
||||
|
||||
case 2:
|
||||
data = pc1640.port62;
|
||||
if (pit8253_get_output(space.machine().device("pit8253"), 2))
|
||||
data = m_port62;
|
||||
if (pit8253_get_output(machine().device("pit8253"), 2))
|
||||
data |= 0x20;
|
||||
break;
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc200_port378_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc200_port378_r )
|
||||
{
|
||||
device_t *lpt = space.machine().device("lpt_1");
|
||||
device_t *lpt = machine().device("lpt_1");
|
||||
UINT8 data = pc_lpt_r(lpt, space, offset);
|
||||
|
||||
if (offset == 1)
|
||||
data = (data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
|
||||
data = (data & ~7) | (ioport("DSW0")->read() & 7);
|
||||
if (offset == 2)
|
||||
data = (data & ~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xc0);
|
||||
data = (data & ~0xe0) | (ioport("DSW0")->read() & 0xc0);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc200_port278_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc200_port278_r )
|
||||
{
|
||||
device_t *lpt = space.machine().device("lpt_2");
|
||||
device_t *lpt = machine().device("lpt_2");
|
||||
UINT8 data = pc_lpt_r(lpt, space, offset);
|
||||
|
||||
if (offset == 1)
|
||||
data = (data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
|
||||
data = (data & ~7) | (ioport("DSW0")->read() & 7);
|
||||
if (offset == 2)
|
||||
data = (data & ~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xc0);
|
||||
data = (data & ~0xe0) | (ioport("DSW0")->read() & 0xc0);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( pc1640_port378_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_port378_r )
|
||||
{
|
||||
device_t *lpt = space.machine().device("lpt_1");
|
||||
UINT8 data = pc_lpt_r(lpt, space, offset);
|
||||
device_t *lpt = machine().device("lpt_1");
|
||||
UINT8 data = pc_lpt_r(lpt, space, offset);
|
||||
|
||||
if (offset == 1)
|
||||
data=(data & ~7) | (space.machine().root_device().ioport("DSW0")->read() & 7);
|
||||
data=(data & ~7) | (ioport("DSW0")->read() & 7);
|
||||
if (offset == 2)
|
||||
{
|
||||
switch (pc1640.dipstate)
|
||||
switch (m_dipstate)
|
||||
{
|
||||
case 0:
|
||||
data = (data&~0xe0) | (space.machine().root_device().ioport("DSW0")->read() & 0xe0);
|
||||
data = (data&~0xe0) | (ioport("DSW0")->read() & 0xe0);
|
||||
break;
|
||||
case 1:
|
||||
data = (data&~0xe0) | ((space.machine().root_device().ioport("DSW0")->read() & 0xe000)>>8);
|
||||
data = (data&~0xe0) | ((ioport("DSW0")->read() & 0xe000)>>8);
|
||||
break;
|
||||
case 2:
|
||||
data = (data&~0xe0) | ((space.machine().root_device().ioport("DSW0")->read() & 0xe00)>>4);
|
||||
data = (data&~0xe0) | ((ioport("DSW0")->read() & 0xe00)>>4);
|
||||
break;
|
||||
|
||||
}
|
||||
@ -253,44 +283,44 @@ READ8_HANDLER( pc1640_port378_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc1640_port3d0_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_port3d0_r )
|
||||
{
|
||||
if (offset==0xa) pc1640.dipstate=0;
|
||||
if (offset==0xa) m_dipstate=0;
|
||||
return space.read_byte(0x3d0+offset);
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc1640_port4278_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_port4278_r )
|
||||
{
|
||||
if (offset==2) pc1640.dipstate=1;
|
||||
if (offset==2) m_dipstate=1;
|
||||
// read parallelport
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc1640_port278_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_port278_r )
|
||||
{
|
||||
if ((offset==2)||(offset==0)) pc1640.dipstate=2;
|
||||
if ((offset==2)||(offset==0)) m_dipstate=2;
|
||||
// read parallelport
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc1640_mouse_x_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_mouse_x_r )
|
||||
{
|
||||
return pc1640.mouse.x - space.machine().root_device().ioport("pc_mouse_x")->read();
|
||||
return m_mouse.x - ioport("pc_mouse_x")->read();
|
||||
}
|
||||
|
||||
READ8_HANDLER( pc1640_mouse_y_r )
|
||||
READ8_MEMBER( amstrad_pc_state::pc1640_mouse_y_r )
|
||||
{
|
||||
return pc1640.mouse.y - space.machine().root_device().ioport("pc_mouse_y")->read();
|
||||
return m_mouse.y - ioport("pc_mouse_y")->read();
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( pc1640_mouse_x_w )
|
||||
WRITE8_MEMBER( amstrad_pc_state::pc1640_mouse_x_w )
|
||||
{
|
||||
pc1640.mouse.x = data + space.machine().root_device().ioport("pc_mouse_x")->read();
|
||||
m_mouse.x = data + ioport("pc_mouse_x")->read();
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( pc1640_mouse_y_w )
|
||||
WRITE8_MEMBER( amstrad_pc_state::pc1640_mouse_y_w )
|
||||
{
|
||||
pc1640.mouse.y = data + space.machine().root_device().ioport("pc_mouse_y")->read();
|
||||
m_mouse.y = data + ioport("pc_mouse_y")->read();
|
||||
}
|
||||
|
||||
INPUT_PORTS_START( amstrad_keyboard )
|
||||
|
||||
@ -1,9 +1,7 @@
|
||||
#include "emu.h"
|
||||
#include "includes/europc.h"
|
||||
#include "includes/pc.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pit8253.h"
|
||||
#include "video/pc_aga.h"
|
||||
#include "coreutil.h"
|
||||
|
||||
/*
|
||||
@ -72,11 +70,6 @@
|
||||
46a: 00 jim 250 01 jim 350
|
||||
*/
|
||||
|
||||
static struct {
|
||||
UINT8 data[16];
|
||||
UINT8 state;
|
||||
AGA_MODE mode;
|
||||
} europc_jim = { { 0 } } ;
|
||||
|
||||
/*
|
||||
250..253 write only 00 be 00 10
|
||||
@ -94,7 +87,7 @@ static struct {
|
||||
254..257 r/w memory ? JIM asic? ram behaviour
|
||||
|
||||
*/
|
||||
WRITE8_HANDLER ( europc_jim_w )
|
||||
WRITE8_MEMBER( europc_pc_state::europc_jim_w )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -104,18 +97,18 @@ WRITE8_HANDLER ( europc_jim_w )
|
||||
switch (data)
|
||||
{
|
||||
case 0x1f:
|
||||
case 0x0b: europc_jim.mode = AGA_MONO; break;
|
||||
case 0x0b: m_jim_mode = AGA_MONO; break;
|
||||
case 0xe: //80 columns?
|
||||
case 0xd: //40 columns?
|
||||
case 0x18:
|
||||
case 0x1a: europc_jim.mode = AGA_COLOR; break;
|
||||
default: europc_jim.mode = AGA_OFF; break;
|
||||
case 0x1a: m_jim_mode = AGA_COLOR; break;
|
||||
default: m_jim_mode = AGA_OFF; break;
|
||||
}
|
||||
}
|
||||
// mode= data&0x10?AGA_COLOR:AGA_MONO;
|
||||
// mode= data&0x10?AGA_COLOR:AGA_OFF;
|
||||
pc_aga_set_mode(space.machine(), europc_jim.mode);
|
||||
if (data & 0x80) europc_jim.state = 0;
|
||||
pc_aga_set_mode(space.machine(), m_jim_mode);
|
||||
if (data & 0x80) m_jim_state = 0;
|
||||
break;
|
||||
case 4:
|
||||
switch(data & 0xc0)
|
||||
@ -130,30 +123,30 @@ WRITE8_HANDLER ( europc_jim_w )
|
||||
return;
|
||||
}
|
||||
logerror("jim write %.2x %.2x\n", offset, data);
|
||||
europc_jim.data[offset] = data;
|
||||
m_jim_data[offset] = data;
|
||||
}
|
||||
|
||||
READ8_HANDLER ( europc_jim_r )
|
||||
READ8_MEMBER( europc_pc_state::europc_jim_r )
|
||||
{
|
||||
int data = 0;
|
||||
switch(offset)
|
||||
{
|
||||
case 4: case 5: case 6: case 7: data = europc_jim.data[offset]; break;
|
||||
case 4: case 5: case 6: case 7: data = m_jim_data[offset]; break;
|
||||
case 0: case 1: case 2: case 3: data = 0; break;
|
||||
case 0xa: return europc_rtc_r(space, 0);
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_HANDLER ( europc_jim2_r )
|
||||
READ8_MEMBER( europc_pc_state::europc_jim2_r )
|
||||
{
|
||||
switch (europc_jim.state)
|
||||
switch (m_jim_state)
|
||||
{
|
||||
case 0: europc_jim.state++; return 0;
|
||||
case 1: europc_jim.state++; return 0x80;
|
||||
case 0: m_jim_state++; return 0;
|
||||
case 1: m_jim_state++; return 0x80;
|
||||
case 2:
|
||||
europc_jim.state = 0;
|
||||
switch (europc_jim.mode)
|
||||
m_jim_state = 0;
|
||||
switch (m_jim_mode)
|
||||
{
|
||||
case AGA_COLOR: return 0x87; // for color;
|
||||
case AGA_MONO: return 0x90; //for mono
|
||||
@ -166,21 +159,18 @@ READ8_HANDLER ( europc_jim2_r )
|
||||
|
||||
/* port 2e0 polling!? at fd6e1 */
|
||||
|
||||
static struct {
|
||||
int port61; // bit 0,1 must be 0 for startup; reset?
|
||||
} europc_pio= { 0 };
|
||||
|
||||
WRITE8_HANDLER( europc_pio_w )
|
||||
|
||||
WRITE8_MEMBER( europc_pc_state::europc_pio_w )
|
||||
{
|
||||
pc_state *state = space.machine().driver_data<pc_state>();
|
||||
switch (offset)
|
||||
{
|
||||
case 1:
|
||||
europc_pio.port61=data;
|
||||
m_port61=data;
|
||||
// if (data == 0x30) pc1640.port62 = (pc1640.port65 & 0x10) >> 4;
|
||||
// else if (data == 0x34) pc1640.port62 = pc1640.port65 & 0xf;
|
||||
pit8253_gate2_w(space.machine().device("pit8253"), BIT(data, 0));
|
||||
state->pc_speaker_set_spkrdata(BIT(data, 1));
|
||||
pc_speaker_set_spkrdata(BIT(data, 1));
|
||||
pc_keyb_set_clock(BIT(data, 6));
|
||||
break;
|
||||
}
|
||||
@ -189,17 +179,17 @@ WRITE8_HANDLER( europc_pio_w )
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( europc_pio_r )
|
||||
READ8_MEMBER( europc_pc_state::europc_pio_r )
|
||||
{
|
||||
int data = 0;
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
if (!(europc_pio.port61&0x80))
|
||||
if (!(m_port61&0x80))
|
||||
data = pc_keyb_read();
|
||||
break;
|
||||
case 1:
|
||||
data = europc_pio.port61;
|
||||
data = m_port61;
|
||||
break;
|
||||
case 2:
|
||||
if (pit8253_get_output(space.machine().device("pit8253"), 2))
|
||||
@ -210,78 +200,72 @@ WRITE8_HANDLER( europc_pio_w )
|
||||
}
|
||||
|
||||
// realtime clock and nvram
|
||||
static struct {
|
||||
/*
|
||||
reg 0: seconds
|
||||
reg 1: minutes
|
||||
reg 2: hours
|
||||
reg 3: day 1 based
|
||||
reg 4: month 1 based
|
||||
reg 5: year bcd (no century, values bigger 88? are handled as 1900, else 2000)
|
||||
reg 6:
|
||||
reg 7:
|
||||
reg 8:
|
||||
reg 9:
|
||||
reg a:
|
||||
reg b: 0x10 written
|
||||
bit 0,1: 0 video startup mode: 0=specialadapter, 1=color40, 2=color80, 3=monochrom
|
||||
bit 2: internal video on
|
||||
bit 4: color
|
||||
bit 6,7: clock
|
||||
reg c:
|
||||
bit 0,1: language/country
|
||||
reg d: xor checksum
|
||||
reg e:
|
||||
reg 0f: 01 status ok, when not 01 written
|
||||
*/
|
||||
UINT8 data[0x10];
|
||||
int reg;
|
||||
int state;
|
||||
emu_timer *timer;
|
||||
} europc_rtc;
|
||||
/*
|
||||
reg 0: seconds
|
||||
reg 1: minutes
|
||||
reg 2: hours
|
||||
reg 3: day 1 based
|
||||
reg 4: month 1 based
|
||||
reg 5: year bcd (no century, values bigger 88? are handled as 1900, else 2000)
|
||||
reg 6:
|
||||
reg 7:
|
||||
reg 8:
|
||||
reg 9:
|
||||
reg a:
|
||||
reg b: 0x10 written
|
||||
bit 0,1: 0 video startup mode: 0=specialadapter, 1=color40, 2=color80, 3=monochrom
|
||||
bit 2: internal video on
|
||||
bit 4: color
|
||||
bit 6,7: clock
|
||||
reg c:
|
||||
bit 0,1: language/country
|
||||
reg d: xor checksum
|
||||
reg e:
|
||||
reg 0f: 01 status ok, when not 01 written
|
||||
*/
|
||||
|
||||
void europc_rtc_set_time(running_machine &machine)
|
||||
void europc_pc_state::europc_rtc_set_time()
|
||||
{
|
||||
system_time systime;
|
||||
|
||||
/* get the current date/time from the core */
|
||||
machine.current_datetime(systime);
|
||||
machine().current_datetime(systime);
|
||||
|
||||
europc_rtc.data[0] = dec_2_bcd(systime.utc_time.second);
|
||||
europc_rtc.data[1] = dec_2_bcd(systime.utc_time.minute);
|
||||
europc_rtc.data[2] = dec_2_bcd(systime.utc_time.hour);
|
||||
m_rtc_data[0] = dec_2_bcd(systime.utc_time.second);
|
||||
m_rtc_data[1] = dec_2_bcd(systime.utc_time.minute);
|
||||
m_rtc_data[2] = dec_2_bcd(systime.utc_time.hour);
|
||||
|
||||
europc_rtc.data[3] = dec_2_bcd(systime.utc_time.mday);
|
||||
europc_rtc.data[4] = dec_2_bcd(systime.utc_time.month + 1);
|
||||
europc_rtc.data[5] = dec_2_bcd(systime.utc_time.year % 100);
|
||||
m_rtc_data[3] = dec_2_bcd(systime.utc_time.mday);
|
||||
m_rtc_data[4] = dec_2_bcd(systime.utc_time.month + 1);
|
||||
m_rtc_data[5] = dec_2_bcd(systime.utc_time.year % 100);
|
||||
}
|
||||
|
||||
static TIMER_CALLBACK(europc_rtc_timer)
|
||||
TIMER_CALLBACK_MEMBER(europc_pc_state::europc_rtc_timer)
|
||||
{
|
||||
int month, year;
|
||||
europc_rtc.data[0]=bcd_adjust(europc_rtc.data[0]+1);
|
||||
if (europc_rtc.data[0]>=0x60)
|
||||
m_rtc_data[0]=bcd_adjust(m_rtc_data[0]+1);
|
||||
if (m_rtc_data[0]>=0x60)
|
||||
{
|
||||
europc_rtc.data[0]=0;
|
||||
europc_rtc.data[1]=bcd_adjust(europc_rtc.data[1]+1);
|
||||
if (europc_rtc.data[1]>=0x60)
|
||||
m_rtc_data[0]=0;
|
||||
m_rtc_data[1]=bcd_adjust(m_rtc_data[1]+1);
|
||||
if (m_rtc_data[1]>=0x60)
|
||||
{
|
||||
europc_rtc.data[1]=0;
|
||||
europc_rtc.data[2]=bcd_adjust(europc_rtc.data[2]+1);
|
||||
if (europc_rtc.data[2]>=0x24)
|
||||
m_rtc_data[1]=0;
|
||||
m_rtc_data[2]=bcd_adjust(m_rtc_data[2]+1);
|
||||
if (m_rtc_data[2]>=0x24)
|
||||
{
|
||||
europc_rtc.data[2]=0;
|
||||
europc_rtc.data[3]=bcd_adjust(europc_rtc.data[3]+1);
|
||||
month=bcd_2_dec(europc_rtc.data[4]);
|
||||
year=bcd_2_dec(europc_rtc.data[5])+2000; // save for julian_days_in_month_calculation
|
||||
if (europc_rtc.data[3]> gregorian_days_in_month(month, year))
|
||||
m_rtc_data[2]=0;
|
||||
m_rtc_data[3]=bcd_adjust(m_rtc_data[3]+1);
|
||||
month=bcd_2_dec(m_rtc_data[4]);
|
||||
year=bcd_2_dec(m_rtc_data[5])+2000; // save for julian_days_in_month_calculation
|
||||
if (m_rtc_data[3]> gregorian_days_in_month(month, year))
|
||||
{
|
||||
europc_rtc.data[3]=1;
|
||||
europc_rtc.data[4]=bcd_adjust(europc_rtc.data[4]+1);
|
||||
if (europc_rtc.data[4]>0x12)
|
||||
m_rtc_data[3]=1;
|
||||
m_rtc_data[4]=bcd_adjust(m_rtc_data[4]+1);
|
||||
if (m_rtc_data[4]>0x12)
|
||||
{
|
||||
europc_rtc.data[4]=1;
|
||||
europc_rtc.data[5]=bcd_adjust(europc_rtc.data[5]+1)&0xff;
|
||||
m_rtc_data[4]=1;
|
||||
m_rtc_data[5]=bcd_adjust(m_rtc_data[5]+1)&0xff;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -289,65 +273,68 @@ static TIMER_CALLBACK(europc_rtc_timer)
|
||||
}
|
||||
}
|
||||
|
||||
void europc_rtc_init(running_machine &machine)
|
||||
void europc_pc_state::europc_rtc_init()
|
||||
{
|
||||
memset(&europc_rtc,0,sizeof(europc_rtc));
|
||||
europc_rtc.data[0xf]=1;
|
||||
memset(&m_rtc_data,0,sizeof(m_rtc_data));
|
||||
m_rtc_reg = 0;
|
||||
m_rtc_state = 0;
|
||||
m_rtc_data[0xf]=1;
|
||||
|
||||
europc_rtc.timer = machine.scheduler().timer_alloc(FUNC(europc_rtc_timer));
|
||||
europc_rtc.timer->adjust(attotime::zero, 0, attotime(1,0));
|
||||
m_rtc_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(europc_pc_state::europc_rtc_timer),this));
|
||||
m_rtc_timer->adjust(attotime::zero, 0, attotime(1,0));
|
||||
}
|
||||
|
||||
READ8_HANDLER( europc_rtc_r )
|
||||
READ8_MEMBER( europc_pc_state::europc_rtc_r )
|
||||
{
|
||||
int data=0;
|
||||
switch (europc_rtc.state)
|
||||
switch (m_rtc_state)
|
||||
{
|
||||
case 1:
|
||||
data=(europc_rtc.data[europc_rtc.reg]&0xf0)>>4;
|
||||
europc_rtc.state++;
|
||||
data=(m_rtc_data[m_rtc_reg]&0xf0)>>4;
|
||||
m_rtc_state++;
|
||||
break;
|
||||
case 2:
|
||||
data=europc_rtc.data[europc_rtc.reg]&0xf;
|
||||
europc_rtc.state=0;
|
||||
// logerror("rtc read %x %.2x\n",europc_rtc.reg, europc_rtc.data[europc_rtc.reg]);
|
||||
data=m_rtc_data[m_rtc_reg]&0xf;
|
||||
m_rtc_state=0;
|
||||
// logerror("rtc read %x %.2x\n",m_rtc_reg, m_rtc_data[m_rtc_reg]);
|
||||
break;
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( europc_rtc_w )
|
||||
WRITE8_MEMBER( europc_pc_state::europc_rtc_w )
|
||||
{
|
||||
switch (europc_rtc.state)
|
||||
switch (m_rtc_state)
|
||||
{
|
||||
case 0:
|
||||
europc_rtc.reg=data;
|
||||
europc_rtc.state=1;
|
||||
m_rtc_reg=data;
|
||||
m_rtc_state=1;
|
||||
break;
|
||||
case 1:
|
||||
europc_rtc.data[europc_rtc.reg]=(europc_rtc.data[europc_rtc.reg]&~0xf0)|((data&0xf)<<4);
|
||||
europc_rtc.state++;
|
||||
m_rtc_data[m_rtc_reg]=(m_rtc_data[m_rtc_reg]&~0xf0)|((data&0xf)<<4);
|
||||
m_rtc_state++;
|
||||
break;
|
||||
case 2:
|
||||
europc_rtc.data[europc_rtc.reg]=(europc_rtc.data[europc_rtc.reg]&~0xf)|(data&0xf);
|
||||
europc_rtc.state=0;
|
||||
// logerror("rtc written %x %.2x\n",europc_rtc.reg, europc_rtc.data[europc_rtc.reg]);
|
||||
m_rtc_data[m_rtc_reg]=(m_rtc_data[m_rtc_reg]&~0xf)|(data&0xf);
|
||||
m_rtc_state=0;
|
||||
// logerror("rtc written %x %.2x\n",m_rtc_reg, m_rtc_data[m_rtc_reg]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void europc_rtc_load_stream(emu_file *file)
|
||||
void europc_pc_state::europc_rtc_load_stream(emu_file *file)
|
||||
{
|
||||
file->read(europc_rtc.data, sizeof(europc_rtc.data));
|
||||
file->read(m_rtc_data, sizeof(m_rtc_data));
|
||||
}
|
||||
|
||||
static void europc_rtc_save_stream(emu_file *file)
|
||||
void europc_pc_state::europc_rtc_save_stream(emu_file *file)
|
||||
{
|
||||
file->write(europc_rtc.data, sizeof(europc_rtc.data));
|
||||
file->write(m_rtc_data, sizeof(m_rtc_data));
|
||||
}
|
||||
|
||||
NVRAM_HANDLER( europc_rtc )
|
||||
{
|
||||
europc_pc_state *state = machine.driver_data<europc_pc_state>();
|
||||
if (file == NULL)
|
||||
{
|
||||
/* init only */
|
||||
@ -355,11 +342,38 @@ NVRAM_HANDLER( europc_rtc )
|
||||
}
|
||||
else if (read_or_write)
|
||||
{
|
||||
europc_rtc_save_stream(file);
|
||||
state->europc_rtc_save_stream(file);
|
||||
}
|
||||
else
|
||||
{
|
||||
europc_rtc_load_stream(file);
|
||||
europc_rtc_set_time(machine);
|
||||
state->europc_rtc_load_stream(file);
|
||||
state->europc_rtc_set_time();
|
||||
}
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(europc_pc_state,europc)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
UINT8 *rom = &memregion("maincpu")->base()[0];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
/*
|
||||
fix century rom bios bug !
|
||||
if year <79 month (and not CENTURY) is loaded with 0x20
|
||||
*/
|
||||
if (rom[0xff93e]==0xb6){ // mov dh,
|
||||
UINT8 a;
|
||||
rom[0xff93e]=0xb5; // mov ch,
|
||||
for (i=0xf8000, a=0; i<0xfffff; i++ ) a+=rom[i];
|
||||
rom[0xfffff]=256-a;
|
||||
}
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
|
||||
europc_rtc_init();
|
||||
// europc_rtc_set_time();
|
||||
}
|
||||
|
||||
@ -251,7 +251,7 @@ READ8_MEMBER(hec2hrp_state::hector_keyboard_r)
|
||||
}
|
||||
//RESET DISC II unit
|
||||
if (isHectorWithDisc2() )
|
||||
hector_disc2_reset(machine());
|
||||
hector_disc2_reset();
|
||||
|
||||
/* floppy md master reset */
|
||||
if (isHectorWithMiniDisc())
|
||||
|
||||
@ -44,12 +44,11 @@
|
||||
/*****************************************************************************/
|
||||
/**** Management of the interrupts (NMI and INT)between uPD765 and Z80 ******/
|
||||
/*****************************************************************************/
|
||||
void hector_disc2_init( running_machine &machine)
|
||||
void hec2hrp_state::hector_disc2_init()
|
||||
{
|
||||
hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
|
||||
upd765a_device *fdc = machine.device<upd765a_device>("upd765");
|
||||
fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(hec2hrp_state::disc2_fdc_interrupt), state));
|
||||
fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(hec2hrp_state::disc2_fdc_dma_irq), state));
|
||||
upd765a_device *fdc = machine().device<upd765a_device>("upd765");
|
||||
fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(hec2hrp_state::disc2_fdc_interrupt), this));
|
||||
fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(hec2hrp_state::disc2_fdc_dma_irq), this));
|
||||
}
|
||||
|
||||
/* upd765 INT is connected to interrupt of Z80 within a RNMI hardware authorization */
|
||||
@ -67,96 +66,88 @@ void hec2hrp_state::disc2_fdc_dma_irq(bool state)
|
||||
}
|
||||
|
||||
// RESET the disc2 Unit !
|
||||
void hector_disc2_reset(running_machine &machine)
|
||||
void hec2hrp_state::hector_disc2_reset()
|
||||
{
|
||||
hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
|
||||
// Initialization Disc2 unit
|
||||
state->m_disc2cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||
machine.device<upd765a_device>("upd765")->reset();
|
||||
m_disc2cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
|
||||
machine().device<upd765a_device>("upd765")->reset();
|
||||
// Select ROM memory to cold restart
|
||||
state->membank("bank3")->set_entry(DISCII_BANK_ROM);
|
||||
membank("bank3")->set_entry(DISCII_BANK_ROM);
|
||||
|
||||
// Clear the Hardware's buffers
|
||||
state->m_hector_disc2_data_r_ready=0x0; /* =ff when PC2 = true and data in read buffer (state->m_hector_disc2_data_read) */
|
||||
state->m_hector_disc2_data_w_ready=0x0; /* =ff when Disc 2 Port 40 had send a data in write buffer (state->m_hector_disc2_data_write) */
|
||||
state->m_hector_disc2_data_read=0; /* Data send by Hector to Disc 2 when PC2=true */
|
||||
state->m_hector_disc2_data_write=0; /* Data send by Disc 2 to Hector when Write Port I/O 40 */
|
||||
state->m_hector_disc2_RNMI = 0; /* State of I/O 50 D5 = authorization for INT / NMI */
|
||||
state->m_IRQ_current_state=0; /* Clear the IRQ active request */
|
||||
state->m_NMI_current_state=0; /* Clear the DMA active request */
|
||||
m_hector_disc2_data_r_ready=0x0; /* =ff when PC2 = true and data in read buffer (state->m_hector_disc2_data_read) */
|
||||
m_hector_disc2_data_w_ready=0x0; /* =ff when Disc 2 Port 40 had send a data in write buffer (state->m_hector_disc2_data_write) */
|
||||
m_hector_disc2_data_read=0; /* Data send by Hector to Disc 2 when PC2=true */
|
||||
m_hector_disc2_data_write=0; /* Data send by Disc 2 to Hector when Write Port I/O 40 */
|
||||
m_hector_disc2_RNMI = 0; /* State of I/O 50 D5 = authorization for INT / NMI */
|
||||
m_IRQ_current_state=0; /* Clear the IRQ active request */
|
||||
m_NMI_current_state=0; /* Clear the DMA active request */
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/******************** Port handling of the Z80 Disc II unit *****************/
|
||||
/*****************************************************************************/
|
||||
READ8_HANDLER( hector_disc2_io00_port_r)
|
||||
READ8_MEMBER( hec2hrp_state::hector_disc2_io00_port_r)
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
/* Switch Disc 2 to RAM to let full RAM acces */
|
||||
state->membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
return 0;
|
||||
}
|
||||
WRITE8_HANDLER( hector_disc2_io00_port_w)
|
||||
WRITE8_MEMBER( hec2hrp_state::hector_disc2_io00_port_w)
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
/* Switch Disc 2 to RAM to let full RAM acces */
|
||||
state->membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
}
|
||||
READ8_HANDLER( hector_disc2_io20_port_r)
|
||||
READ8_MEMBER( hec2hrp_state::hector_disc2_io20_port_r)
|
||||
{
|
||||
// You can implemente the 8251 chip communication here !
|
||||
return 0;
|
||||
}
|
||||
WRITE8_HANDLER( hector_disc2_io20_port_w)
|
||||
WRITE8_MEMBER( hec2hrp_state::hector_disc2_io20_port_w)
|
||||
{
|
||||
// You can implemente the 8251 chip communication here !
|
||||
}
|
||||
READ8_HANDLER( hector_disc2_io30_port_r)
|
||||
READ8_MEMBER( hec2hrp_state::hector_disc2_io30_port_r)
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
return state->m_hector_disc2_data_r_ready;
|
||||
return m_hector_disc2_data_r_ready;
|
||||
}
|
||||
WRITE8_HANDLER( hector_disc2_io30_port_w)
|
||||
WRITE8_MEMBER( hec2hrp_state::hector_disc2_io30_port_w)
|
||||
{
|
||||
// Nothing here !
|
||||
}
|
||||
|
||||
READ8_HANDLER( hector_disc2_io40_port_r)
|
||||
READ8_MEMBER( hec2hrp_state::hector_disc2_io40_port_r)
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
/* Read data send by Hector, by Disc2*/
|
||||
state->m_hector_disc2_data_r_ready = 0x00; /* Clear memory info read ready*/
|
||||
return state->m_hector_disc2_data_read; /* send the data !*/
|
||||
m_hector_disc2_data_r_ready = 0x00; /* Clear memory info read ready*/
|
||||
return m_hector_disc2_data_read; /* send the data !*/
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( hector_disc2_io40_port_w) /* Write data send by Disc2, to Hector*/
|
||||
WRITE8_MEMBER( hec2hrp_state::hector_disc2_io40_port_w) /* Write data send by Disc2, to Hector*/
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
state->m_hector_disc2_data_write = data; /* Memorization data*/
|
||||
state->m_hector_disc2_data_w_ready = 0x80; /* Memorization data write ready in D7*/
|
||||
m_hector_disc2_data_write = data; /* Memorization data*/
|
||||
m_hector_disc2_data_w_ready = 0x80; /* Memorization data write ready in D7*/
|
||||
}
|
||||
|
||||
READ8_HANDLER( hector_disc2_io50_port_r) /*Read memory info write ready*/
|
||||
READ8_MEMBER( hec2hrp_state::hector_disc2_io50_port_r) /*Read memory info write ready*/
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
return state->m_hector_disc2_data_w_ready;
|
||||
return m_hector_disc2_data_w_ready;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( hector_disc2_io50_port_w) /* I/O Port to the stuff of Disc2*/
|
||||
WRITE8_MEMBER( hec2hrp_state::hector_disc2_io50_port_w) /* I/O Port to the stuff of Disc2*/
|
||||
{
|
||||
hec2hrp_state *state = space.machine().driver_data<hec2hrp_state>();
|
||||
upd765a_device *fdc = space.machine().device<upd765a_device>("upd765");
|
||||
upd765a_device *fdc = machine().device<upd765a_device>("upd765");
|
||||
|
||||
/* FDC Motor Control - Bit 0/1 defines the state of the FDD 0/1 motor */
|
||||
space.machine().device<floppy_connector>("upd765:0")->get_device()->mon_w(BIT(data, 0)); // Moteur floppy A:
|
||||
space.machine().device<floppy_connector>("upd765:1")->get_device()->mon_w(BIT(data, 1)); // Moteur floppy B:
|
||||
machine().device<floppy_connector>("upd765:0")->get_device()->mon_w(BIT(data, 0)); // Moteur floppy A:
|
||||
machine().device<floppy_connector>("upd765:1")->get_device()->mon_w(BIT(data, 1)); // Moteur floppy B:
|
||||
|
||||
/* Write bit TC uPD765 on D4 of port I/O 50 */
|
||||
fdc->tc_w(BIT(data, 4));
|
||||
|
||||
|
||||
/* Authorization interrupt and NMI with RNMI signal*/
|
||||
state->m_hector_disc2_RNMI = BIT(data, 5);
|
||||
state->m_disc2cpu->set_input_line(INPUT_LINE_IRQ0, state->m_IRQ_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
|
||||
state->m_disc2cpu->set_input_line(INPUT_LINE_NMI, state->m_NMI_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_hector_disc2_RNMI = BIT(data, 5);
|
||||
m_disc2cpu->set_input_line(INPUT_LINE_IRQ0, m_IRQ_current_state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
|
||||
m_disc2cpu->set_input_line(INPUT_LINE_NMI, m_NMI_current_state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
@ -18,7 +18,6 @@
|
||||
#include "machine/ins8250.h"
|
||||
#include "machine/mc146818.h"
|
||||
#include "machine/pic8259.h"
|
||||
#include "machine/pc_turbo.h"
|
||||
|
||||
#include "video/pc_vga.h"
|
||||
#include "video/pc_cga.h"
|
||||
@ -31,7 +30,6 @@
|
||||
#include "machine/pc_fdc.h"
|
||||
#include "machine/upd765.h"
|
||||
#include "includes/amstr_pc.h"
|
||||
#include "includes/europc.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "imagedev/cassette.h"
|
||||
#include "sound/speaker.h"
|
||||
@ -1158,7 +1156,7 @@ void pc_state::fdc_dma_drq(bool state)
|
||||
m_dma8237->dreq2_w( state );
|
||||
}
|
||||
|
||||
static void pc_set_irq_line(running_machine &machine,int irq, int state)
|
||||
void pc_set_irq_line(running_machine &machine,int irq, int state)
|
||||
{
|
||||
pc_state *st = machine.driver_data<pc_state>();
|
||||
|
||||
@ -1175,7 +1173,7 @@ static void pc_set_irq_line(running_machine &machine,int irq, int state)
|
||||
}
|
||||
}
|
||||
|
||||
static void pc_set_keyb_int(running_machine &machine, int state)
|
||||
void pc_set_keyb_int(running_machine &machine, int state)
|
||||
{
|
||||
pc_set_irq_line( machine, 1, state );
|
||||
}
|
||||
@ -1360,7 +1358,7 @@ DRIVER_INIT_MEMBER(pc_state,pccga)
|
||||
DRIVER_INIT_MEMBER(pc_state,bondwell)
|
||||
{
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, NULL, pc_set_irq_line);
|
||||
pc_turbo_setup(machine(), machine().firstcpu, "DSW2", 0x02, 4.77/12, 1);
|
||||
pc_turbo_setup(4.77/12, 1);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,pcmda)
|
||||
@ -1368,75 +1366,12 @@ DRIVER_INIT_MEMBER(pc_state,pcmda)
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,europc)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
UINT8 *rom = &memregion("maincpu")->base()[0];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
/*
|
||||
fix century rom bios bug !
|
||||
if year <79 month (and not CENTURY) is loaded with 0x20
|
||||
*/
|
||||
if (rom[0xff93e]==0xb6){ // mov dh,
|
||||
UINT8 a;
|
||||
rom[0xff93e]=0xb5; // mov ch,
|
||||
for (i=0xf8000, a=0; i<0xfffff; i++ ) a+=rom[i];
|
||||
rom[0xfffff]=256-a;
|
||||
}
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
|
||||
europc_rtc_init(machine());
|
||||
// europc_rtc_set_time(machine());
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,t1000hx)
|
||||
{
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
pc_turbo_setup(machine(), machine().firstcpu, "DSW2", 0x02, 4.77/12, 1);
|
||||
pc_turbo_setup(4.77/12, 1);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,pc200)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,ppc512)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
DRIVER_INIT_MEMBER(pc_state,pc1512)
|
||||
{
|
||||
UINT8 *gfx = &memregion("gfx1")->base()[0x8000];
|
||||
int i;
|
||||
|
||||
/* just a plain bit pattern for graphics data generation */
|
||||
for (i = 0; i < 256; i++)
|
||||
gfx[i] = i;
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,pcjr)
|
||||
{
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pcjr_set_keyb_int, pc_set_irq_line);
|
||||
@ -1447,15 +1382,6 @@ DRIVER_INIT_MEMBER(pc_state,mc1502)
|
||||
mess_init_pc_common(0, NULL, pc_set_irq_line);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(pc_state,pc1640)
|
||||
{
|
||||
address_space &io_space = machine().firstcpu->space( AS_IO );
|
||||
|
||||
io_space.install_legacy_read_handler(0x278, 0x27b, FUNC(pc1640_port278_r), 0xffff);
|
||||
io_space.install_legacy_read_handler(0x4278, 0x427b, FUNC(pc1640_port4278_r), 0xffff);
|
||||
|
||||
mess_init_pc_common(PCCOMMON_KEYBOARD_PC, pc_set_keyb_int, pc_set_irq_line);
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(pc_state::pc_irq_callback)
|
||||
{
|
||||
@ -1814,3 +1740,25 @@ READ8_MEMBER(pc_state::pc_EXP_r)
|
||||
//DBG_LOG(1,"EXP_unit_r",("%.2x $%02x\n", offset, data));
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
TIMER_CALLBACK_MEMBER(pc_state::pc_turbo_callback)
|
||||
{
|
||||
int val;
|
||||
|
||||
val = ioport("DSW2")->read() & 0x02;
|
||||
|
||||
if (val != m_turbo_cur_val)
|
||||
{
|
||||
m_turbo_cur_val = val;
|
||||
m_maincpu->set_clock_scale(val ? m_turbo_on_speed : m_turbo_off_speed);
|
||||
}
|
||||
}
|
||||
|
||||
void pc_state::pc_turbo_setup(double off_speed, double on_speed)
|
||||
{
|
||||
m_turbo_cur_val = -1;
|
||||
m_turbo_off_speed = off_speed;
|
||||
m_turbo_on_speed = on_speed;
|
||||
machine().scheduler().timer_pulse(attotime::from_msec(100), timer_expired_delegate(FUNC(pc_state::pc_turbo_callback),this));
|
||||
}
|
||||
|
||||
@ -1,54 +0,0 @@
|
||||
/*********************************************************************
|
||||
|
||||
pc_turbo.c
|
||||
|
||||
The PC "turbo" button
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "pc_turbo.h"
|
||||
|
||||
|
||||
struct pc_turbo_info
|
||||
{
|
||||
device_t *cpu;
|
||||
const char *port;
|
||||
int mask;
|
||||
int cur_val;
|
||||
double off_speed;
|
||||
double on_speed;
|
||||
};
|
||||
|
||||
|
||||
|
||||
static TIMER_CALLBACK(pc_turbo_callback)
|
||||
{
|
||||
struct pc_turbo_info *ti = (struct pc_turbo_info *) ptr;
|
||||
int val;
|
||||
|
||||
val = machine.root_device().ioport(ti->port)->read() & ti->mask;
|
||||
|
||||
if (val != ti->cur_val)
|
||||
{
|
||||
ti->cur_val = val;
|
||||
ti->cpu->set_clock_scale(val ? ti->on_speed : ti->off_speed);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
int pc_turbo_setup(running_machine &machine, device_t *cpu, const char *port, int mask, double off_speed, double on_speed)
|
||||
{
|
||||
struct pc_turbo_info *ti;
|
||||
|
||||
ti = auto_alloc(machine, struct pc_turbo_info);
|
||||
ti->cpu = cpu;
|
||||
ti->port = port;
|
||||
ti->mask = mask;
|
||||
ti->cur_val = -1;
|
||||
ti->off_speed = off_speed;
|
||||
ti->on_speed = on_speed;
|
||||
machine.scheduler().timer_pulse(attotime::from_msec(100), FUNC(pc_turbo_callback), 0, ti);
|
||||
return 0;
|
||||
}
|
||||
@ -1,15 +0,0 @@
|
||||
/*********************************************************************
|
||||
|
||||
pc_turbo.h
|
||||
|
||||
The PC "turbo" button
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#ifndef PC_TURBO_H
|
||||
#define PC_TURBO_H
|
||||
|
||||
int pc_turbo_setup(running_machine &machine, device_t *cpu, const char *port, int mask, double off_speed, double on_speed);
|
||||
|
||||
|
||||
#endif /* PC_TURBO_H */
|
||||
@ -1,96 +0,0 @@
|
||||
/*****************************************************************************
|
||||
*
|
||||
* machine/ps2.c
|
||||
*
|
||||
* IBM Personal System 2
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "includes/ps2.h"
|
||||
|
||||
|
||||
/*
|
||||
ibm ps2 model 30
|
||||
----------------
|
||||
(postcode at 0x0190!)
|
||||
f008a
|
||||
f0112 "real mode switchback"
|
||||
f0147
|
||||
f0204 03
|
||||
f02a5 04
|
||||
f03b8 07
|
||||
f0413 08
|
||||
f0470 0a
|
||||
f04a2 0b
|
||||
f04e9 0e
|
||||
f0525 0f
|
||||
f088f
|
||||
f215c
|
||||
f0928 12
|
||||
f0bbf
|
||||
f0c27
|
||||
f0c96 24
|
||||
f0e01 40
|
||||
e1cf0
|
||||
e2b2c
|
||||
e1d48
|
||||
f0e45
|
||||
beep code
|
||||
f0e8e 43
|
||||
f0ec9 45
|
||||
f0f19 48
|
||||
f0f62 4a
|
||||
f0f97 4c
|
||||
f0ff7 4e
|
||||
f1050 51
|
||||
f118c 52
|
||||
f11e3 53
|
||||
f2393 f0
|
||||
f23eb f2
|
||||
f241f f3 task register usage!
|
||||
f2468 f4
|
||||
f24d2 f5
|
||||
f2524 f6
|
||||
f2574 f7
|
||||
f25be f9
|
||||
f264c 3e
|
||||
f137e 55
|
||||
f13a8 output of keyboard problem
|
||||
f152b 5b
|
||||
f1543 5c
|
||||
f15c6 60
|
||||
f16c9 65
|
||||
various error outputs
|
||||
f176a 66
|
||||
f1827 6a
|
||||
f18ec 6c
|
||||
f1a1e 6e
|
||||
f2bf7 6f
|
||||
|
||||
f2dcc
|
||||
|
||||
f1db9 write byte to nvram
|
||||
*/
|
||||
|
||||
static struct {
|
||||
UINT8 data[8];
|
||||
} pos={
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
READ8_HANDLER(ps2_pos_r)
|
||||
{
|
||||
UINT8 data=pos.data[offset];
|
||||
switch (offset) {
|
||||
case 2:
|
||||
data|=8;
|
||||
break;
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER(ps2_pos_w)
|
||||
{
|
||||
pos.data[offset]=data;
|
||||
}
|
||||
@ -18,7 +18,6 @@
|
||||
#include "machine/idectrl.h"
|
||||
#include "machine/isa_aha1542.h"
|
||||
#include "machine/at_keybc.h"
|
||||
#include "includes/ps2.h"
|
||||
|
||||
#include "imagedev/harddriv.h"
|
||||
#include "machine/pci.h"
|
||||
|
||||
@ -735,7 +735,6 @@ $(MESSOBJ)/ascii.a: \
|
||||
|
||||
$(MESSOBJ)/at.a: \
|
||||
$(MESS_MACHINE)/at_keybc.o \
|
||||
$(MESS_MACHINE)/ps2.o \
|
||||
$(MESS_MACHINE)/cs4031.o \
|
||||
$(MESS_MACHINE)/cs8221.o \
|
||||
$(MESS_MACHINE)/at.o \
|
||||
@ -1500,7 +1499,6 @@ $(MESSOBJ)/pc9801.a: \
|
||||
$(MESS_MACHINE)/pc9801_kbd.o\
|
||||
|
||||
$(MESSOBJ)/pcshare.a: \
|
||||
$(MESS_MACHINE)/pc_turbo.o \
|
||||
$(MESS_MACHINE)/pc_fdc.o \
|
||||
$(MESS_MACHINE)/pc_joy.o \
|
||||
$(MESS_MACHINE)/pc_keyboards.o \
|
||||
|
||||
@ -17,6 +17,9 @@
|
||||
ROM_LOAD("hercules.chr", 0x00000, 0x1000, CRC(7e8c9d76))
|
||||
|
||||
*/
|
||||
#ifndef __PC_AGA__
|
||||
#define __PC_AGA__
|
||||
|
||||
|
||||
#define AGA_SCREEN_NAME "screen"
|
||||
#define AGA_MC6845_NAME "mc6845_aga"
|
||||
@ -40,3 +43,5 @@ DECLARE_READ8_HANDLER( pc200_cga_r );
|
||||
DECLARE_WRITE8_HANDLER( pc200_cga_w );
|
||||
DECLARE_READ16_HANDLER( pc200_cga16le_r );
|
||||
DECLARE_WRITE16_HANDLER( pc200_cga16le_w );
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user