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i186: Add Am186EM and Am188EM variant types

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This commit is contained in:
AJR 2022-07-26 11:18:37 -04:00
parent 1e8eb909c8
commit ef676c3240
3 changed files with 51 additions and 12 deletions
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31
src/devices/cpu/i86/i186.cpp
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@ -6,6 +6,9 @@
// Note: the X1 input (typically an XTAL) is divided by 2 internally.
// The device clock should therefore be twice the desired operating
// frequency (and twice the speed rating suffixed to the part number).
// Some high-performance AMD versions, however, generate the system
// clock with a PLL and only support XTAL dividers other than 1 for
// compatibility and power-saving modes.
#include "emu.h"
#include "i186.h"
@ -127,19 +130,27 @@ const uint8_t i80186_cpu_device::m_i80186_timing[] =
DEFINE_DEVICE_TYPE(I80186, i80186_cpu_device, "i80186", "Intel 80186")
DEFINE_DEVICE_TYPE(I80188, i80188_cpu_device, "i80188", "Intel 80188")
i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, I80188, tag, owner, clock, 8)
{
memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::inta_callback));
}
DEFINE_DEVICE_TYPE(AM186EM, am186em_device, "am186em", "AMD Am186EM")
DEFINE_DEVICE_TYPE(AM188EM, am188em_device, "am188em", "AMD Am188EM")
i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, I80186, tag, owner, clock, 16)
{
memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::inta_callback));
}
i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, I80188, tag, owner, clock, 8)
{
}
am186em_device::am186em_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, AM186EM, tag, owner, clock, 16)
{
}
am188em_device::am188em_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, AM188EM, tag, owner, clock, 8)
{
}
i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_bus_size)
@ -155,6 +166,8 @@ i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type
, m_irqa_cb(*this)
, m_irmx_irq_ack(*this)
{
memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::inta_callback));
}
device_memory_interface::space_config_vector i80186_cpu_device::memory_space_config() const

26
src/devices/cpu/i86/i186.h
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@ -9,6 +9,8 @@
DECLARE_DEVICE_TYPE(I80186, i80186_cpu_device)
DECLARE_DEVICE_TYPE(I80188, i80188_cpu_device)
DECLARE_DEVICE_TYPE(AM186EM, am186em_device)
DECLARE_DEVICE_TYPE(AM188EM, am188em_device)
class i80186_cpu_device : public i8086_common_cpu_device
{
@ -169,4 +171,28 @@ public:
i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class am186em_device : public i80186_cpu_device
{
public:
// construction/destruction
am186em_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return clocks; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles; }
};
class am188em_device : public i80186_cpu_device
{
public:
// construction/destruction
am188em_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return clocks; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles; }
};
#endif // MAME_CPU_I86_I186_H

6
src/mame/subsino/subsino2.cpp
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@ -2996,7 +2996,7 @@ void subsino2_state::mtrain(machine_config &config)
void subsino2_state::saklove(machine_config &config)
{
I80188(config, m_maincpu, XTAL(20'000'000)*2); // !! AMD AM188-EM !!
AM188EM(config, m_maincpu, XTAL(20'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &subsino2_state::saklove_map);
m_maincpu->set_addrmap(AS_IO, &subsino2_state::saklove_io);
@ -3031,7 +3031,7 @@ void subsino2_state::saklove(machine_config &config)
void subsino2_state::xplan(machine_config &config)
{
I80188(config, m_maincpu, XTAL(20'000'000)*2); // !! AMD AM188-EM !!
AM188EM(config, m_maincpu, XTAL(20'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &subsino2_state::xplan_map);
m_maincpu->set_addrmap(AS_IO, &subsino2_state::xplan_io);
@ -3045,7 +3045,7 @@ void subsino2_state::xplan(machine_config &config)
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); // game reads vblank state
m_screen->set_screen_update(FUNC(subsino2_state::screen_update_subsino2));
m_screen->set_palette(m_palette);
m_screen->screen_vblank().set("maincpu", FUNC(i80188_cpu_device::int0_w));
m_screen->screen_vblank().set("maincpu", FUNC(am188em_device::int0_w));
GFXDECODE(config, m_gfxdecode, m_palette, gfx_ss9601);
PALETTE(config, m_palette).set_entries(256);