mirror of
https://github.com/holub/mame
synced 2025-07-03 17:08:39 +03:00
Cleanups and version bump
This commit is contained in:
Miodrag Milanovic
parent
bc5ffe4937
commit
efa3a679a3
@ -227,16 +227,16 @@
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</software>
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</software>
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<!-- Same hashes as trojanl, why is there a new entry?
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<!-- Same hashes as trojanl, why is there a new entry?
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<software name="trojanla" cloneof="trojanl" supported="no">
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<software name="trojanla" cloneof="trojanl" supported="no">
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<description>Trojan Legend (Alt Revision)</description>
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<description>Trojan Legend (Alt Revision)</description>
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<year>200?</year>
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<year>200?</year>
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<publisher>TimeTop</publisher>
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<publisher>TimeTop</publisher>
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<part name="cart" interface="gameking_cart">
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<part name="cart" interface="gameking_cart">
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<dataarea name="rom" size="131072">
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<dataarea name="rom" size="131072">
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<rom name="trojan legend (alt).bin" size="131072" crc="b832db4f" sha1="5a152bfb2ba2150cff9dc66729ceadc0b47d4f17" offset="0x00000" />
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<rom name="trojan legend (alt).bin" size="131072" crc="b832db4f" sha1="5a152bfb2ba2150cff9dc66729ceadc0b47d4f17" offset="0x00000" />
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</dataarea>
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</dataarea>
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</part>
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</part>
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</software>
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</software>
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-->
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-->
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@ -121,11 +121,11 @@ public:
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void normalize()
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void normalize()
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{
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{
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while (m_attoseconds >= ATTOSECONDS_PER_SECOND)
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while (m_attoseconds >= ATTOSECONDS_PER_SECOND)
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{
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{
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m_seconds++;
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m_seconds++;
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m_attoseconds -= ATTOSECONDS_PER_SECOND;
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m_attoseconds -= ATTOSECONDS_PER_SECOND;
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}
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}
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}
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}
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attoseconds_t attoseconds() const { return m_attoseconds; }
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attoseconds_t attoseconds() const { return m_attoseconds; }
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@ -2,29 +2,29 @@
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// copyright-holders:Curt Coder
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// copyright-holders:Curt Coder
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/**********************************************************************
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/**********************************************************************
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Timeworks PARTNER 128 cartridge emulation
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Timeworks PARTNER 128 cartridge emulation
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**********************************************************************/
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**********************************************************************/
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/*
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/*
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PCB Layout
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PCB Layout
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----------
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----------
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|---------------|
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|---------------|
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|LS74 SW * |
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|LS74 SW * |
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|LS09 LS273|
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|LS09 LS273|
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|LS139 RAM |
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|LS139 RAM |
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|LS133 |
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|LS133 |
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| LS240 |
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| LS240 |
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|LS33 ROM |
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|LS33 ROM |
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|LS09 |
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|LS09 |
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|||||||||||||||
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ROM - Toshiba TMM24128AP 16Kx8 EPROM (blank label)
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ROM - Toshiba TMM24128AP 16Kx8 EPROM (blank label)
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RAM - Sony CXK5864PN-15L 8Kx8 SRAM
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RAM - Sony CXK5864PN-15L 8Kx8 SRAM
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SW - push button switch
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SW - push button switch
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* - solder point for joystick port dongle
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* - solder point for joystick port dongle
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*/
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*/
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@ -193,16 +193,16 @@ void partner128_t::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int
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{
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{
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/*
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/*
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bit description
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bit description
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0 RAM A7
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0 RAM A7
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1 RAM A8
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1 RAM A8
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2 RAM A9
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2 RAM A9
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3 RAM A10
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3 RAM A10
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4 RAM A11
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4 RAM A11
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5 RAM A12
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5 RAM A12
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6 LS74 1Cd,2Cd
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6 LS74 1Cd,2Cd
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7 N/C
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7 N/C
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*/
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*/
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@ -24,8 +24,8 @@
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// ======================> partner128_t
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// ======================> partner128_t
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class partner128_t : public device_t,
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class partner128_t : public device_t,
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public device_c64_expansion_card_interface
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public device_c64_expansion_card_interface
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//public device_vcs_control_port_interface
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//public device_vcs_control_port_interface
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{
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{
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public:
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public:
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// construction/destruction
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// construction/destruction
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@ -69,4 +69,3 @@ WRITE8_MEMBER(msx_cart_fs_sr022::write_cart)
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break;
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break;
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}
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}
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}
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}
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@ -12,37 +12,37 @@
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CPU_DISASSEMBLE( pdp8 );
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CPU_DISASSEMBLE( pdp8 );
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#define OP ((op >> 011) & 07)
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#define OP ((op >> 011) & 07)
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#define MR_IND ((op >> 010) & 01)
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#define MR_IND ((op >> 010) & 01)
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#define MR_PAGE ((op >> 07) & 01)
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#define MR_PAGE ((op >> 07) & 01)
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#define MR_ADDR (op & 0177)
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#define MR_ADDR (op & 0177)
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#define IOT_DEVICE ((op >> 03) & 077)
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#define IOT_DEVICE ((op >> 03) & 077)
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#define IOT_IOP1 (op & 01)
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#define IOT_IOP1 (op & 01)
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#define IOT_IOP2 ((op >> 01) & 01)
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#define IOT_IOP2 ((op >> 01) & 01)
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#define IOT_IOP4 ((op >> 02) & 01)
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#define IOT_IOP4 ((op >> 02) & 01)
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#define OPR_GROUP ((op >> 010) & 01)
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#define OPR_GROUP ((op >> 010) & 01)
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#define OPR_CLA ((op >> 07) & 01)
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#define OPR_CLA ((op >> 07) & 01)
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#define OPR_CLL ((op >> 06) & 01)
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#define OPR_CLL ((op >> 06) & 01)
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#define OPR_CMA ((op >> 05) & 01)
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#define OPR_CMA ((op >> 05) & 01)
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#define OPR_CML ((op >> 04) & 01)
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#define OPR_CML ((op >> 04) & 01)
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#define OPR_ROR ((op >> 03) & 01)
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#define OPR_ROR ((op >> 03) & 01)
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#define OPR_ROL ((op >> 02) & 01)
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#define OPR_ROL ((op >> 02) & 01)
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#define OPR_ROT2 ((op >> 01) & 01)
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#define OPR_ROT2 ((op >> 01) & 01)
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#define OPR_IAC (op & 01)
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#define OPR_IAC (op & 01)
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#define OPR_SMA OPR_CLL
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#define OPR_SMA OPR_CLL
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#define OPR_SZA OPR_CMA
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#define OPR_SZA OPR_CMA
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#define OPR_SNL OPR_CML
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#define OPR_SNL OPR_CML
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#define OPR_REVSKIP OPR_ROR
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#define OPR_REVSKIP OPR_ROR
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#define OPR_OSR OPR_ROL
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#define OPR_OSR OPR_ROL
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#define OPR_HLT OPR_ROT2
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#define OPR_HLT OPR_ROT2
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#define OPR_GROUP_MASK 0401
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#define OPR_GROUP_MASK 0401
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#define OPR_GROUP1_VAL 0000
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#define OPR_GROUP1_VAL 0000
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#define OPR_GROUP2_VAL 0400
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#define OPR_GROUP2_VAL 0400
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const device_type PDP8CPU = &device_creator<pdp8_device>;
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const device_type PDP8CPU = &device_creator<pdp8_device>;
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@ -465,7 +465,7 @@ void tms32082_mp_device::execute_short_imm()
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break;
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break;
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}
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}
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case 0x12: // and.tf
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case 0x12: // and.tf
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{
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{
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int rd = OP_RD();
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int rd = OP_RD();
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int rs = OP_RS();
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int rs = OP_RS();
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@ -692,7 +692,7 @@ void tms32082_mp_device::execute_short_imm()
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break;
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break;
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}
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}
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case 0x45: // jsr.a
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case 0x45: // jsr.a
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{
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{
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int link = OP_LINK();
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int link = OP_LINK();
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int base = OP_BASE();
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int base = OP_BASE();
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@ -929,12 +929,12 @@ void tms32082_mp_device::execute_reg_long_imm()
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UINT32 compmask = endmask & shiftmask;
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UINT32 compmask = endmask & shiftmask;
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UINT32 res = 0;
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UINT32 res = 0;
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if (r) // right
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if (r) // right
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{
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{
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res = ROTATE_R(source, rot) & compmask;
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res = ROTATE_R(source, rot) & compmask;
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res = SIGN_EXTEND(res, rot);
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res = SIGN_EXTEND(res, rot);
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}
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}
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else // left
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else // left
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{
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{
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res = ROTATE_L(source, rot) & compmask;
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res = ROTATE_L(source, rot) & compmask;
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}
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}
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@ -1022,7 +1022,7 @@ void tms32082_mp_device::execute_reg_long_imm()
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}
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}
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case 0x3a:
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case 0x3a:
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case 0x3b: // or.ft
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case 0x3b: // or.ft
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{
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{
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int rd = OP_RD();
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int rd = OP_RD();
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int rs = OP_RS();
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int rs = OP_RS();
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@ -298,19 +298,19 @@ void tms32082_mp_device::processor_command(UINT32 command)
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for (int i=0; i < num; i++)
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for (int i=0; i < num; i++)
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{
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{
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printf("Entry %d:\n", i);
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printf("Entry %d:\n", i);
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for (int k=0; k < 6; k++)
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for (int k=0; k < 6; k++)
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{
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{
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for (int l=0; l < 4; l++)
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for (int l=0; l < 4; l++)
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{
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{
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UINT32 dd = m_program->read_dword(ra);
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UINT32 dd = m_program->read_dword(ra);
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ra += 4;
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ra += 4;
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printf("%08X(%f) ", dd, u2f(dd));
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printf("%08X(%f) ", dd, u2f(dd));
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}
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}
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printf("\n");
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printf("\n");
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}
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}
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printf("\n");
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printf("\n");
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}
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}
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*/
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*/
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@ -367,7 +367,7 @@ UINT32 tms32082_mp_device::read_creg(int reg)
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case 0xa: // PPERROR
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case 0xa: // PPERROR
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return 0xe0000;
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return 0xe0000;
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case 0xe: // TCOUNT
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case 0xe: // TCOUNT
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return m_tcount;
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return m_tcount;
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case 0x4000: // IN0P
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case 0x4000: // IN0P
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@ -413,7 +413,7 @@ void tms32082_mp_device::write_creg(int reg, UINT32 data)
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printf("IE = %08X\n", data);
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printf("IE = %08X\n", data);
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break;
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break;
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case 0xe: // TCOUNT
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case 0xe: // TCOUNT
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m_tcount = data;
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m_tcount = data;
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break;
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break;
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@ -595,4 +595,3 @@ void emu_options::update_cached_options()
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m_sleep = bool_value(OPTION_SLEEP);
|
m_sleep = bool_value(OPTION_SLEEP);
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m_refresh_speed = bool_value(OPTION_REFRESHSPEED);
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m_refresh_speed = bool_value(OPTION_REFRESHSPEED);
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}
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}
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@ -692,7 +692,7 @@ WRITE8_MEMBER(i8251_device::data_w)
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{
|
{
|
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m_tx_data = data;
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m_tx_data = data;
|
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|
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||||||
LOG(("data_w %02x\n" , data));
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LOG(("data_w %02x\n" , data));
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// printf("i8251 transmit char: %02x\n",data);
|
// printf("i8251 transmit char: %02x\n",data);
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||||||
|
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||||||
/* writing clears */
|
/* writing clears */
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@ -714,7 +714,6 @@ WRITE8_MEMBER(i8251_device::data_w)
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|||||||
|
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||||||
void i8251_device::receive_character(UINT8 ch)
|
void i8251_device::receive_character(UINT8 ch)
|
||||||
{
|
{
|
||||||
|
|
||||||
m_rx_data = ch;
|
m_rx_data = ch;
|
||||||
|
|
||||||
/* char has not been read and another has arrived! */
|
/* char has not been read and another has arrived! */
|
||||||
@ -735,7 +734,7 @@ void i8251_device::receive_character(UINT8 ch)
|
|||||||
|
|
||||||
READ8_MEMBER(i8251_device::data_r)
|
READ8_MEMBER(i8251_device::data_r)
|
||||||
{
|
{
|
||||||
LOG(("read data: %02x, STATUS=%02x\n",m_rx_data,m_status));
|
LOG(("read data: %02x, STATUS=%02x\n",m_rx_data,m_status));
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/* reading clears */
|
/* reading clears */
|
||||||
m_status &= ~I8251_STATUS_RX_READY;
|
m_status &= ~I8251_STATUS_RX_READY;
|
||||||
|
|
||||||
|
|||||||
@ -133,7 +133,7 @@ private:
|
|||||||
|
|
||||||
/* data being received */
|
/* data being received */
|
||||||
UINT8 m_rx_data;
|
UINT8 m_rx_data;
|
||||||
UINT8 m_tx_data;
|
UINT8 m_tx_data;
|
||||||
bool m_tx_busy;
|
bool m_tx_busy;
|
||||||
bool m_disable_tx_pending;
|
bool m_disable_tx_pending;
|
||||||
};
|
};
|
||||||
|
|||||||
@ -211,7 +211,7 @@ WRITE_LINE_MEMBER(tms6100_device::tms6100_romclock_w)
|
|||||||
/* read bit at address */
|
/* read bit at address */
|
||||||
if (m_variant == TMS6110_IS_M58819)
|
if (m_variant == TMS6110_IS_M58819)
|
||||||
{
|
{
|
||||||
m_data = (m_rom[m_address >> 3] >> (7-(m_address & 0x07))) & 1;
|
m_data = (m_rom[m_address >> 3] >> (7-(m_address & 0x07))) & 1;
|
||||||
}
|
}
|
||||||
else // m_variant == (TMS6110_IS_TMS6100 || TMS6110_IS_TMS6125)
|
else // m_variant == (TMS6110_IS_TMS6100 || TMS6110_IS_TMS6125)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -19,7 +19,6 @@ const netlist::netlist_time netlist::netlist_time::zero = netlist::netlist_time:
|
|||||||
|
|
||||||
namespace netlist
|
namespace netlist
|
||||||
{
|
{
|
||||||
|
|
||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
// logic_family_ttl_t
|
// logic_family_ttl_t
|
||||||
// ----------------------------------------------------------------------------------------
|
// ----------------------------------------------------------------------------------------
|
||||||
|
|||||||
@ -1238,7 +1238,7 @@ namespace netlist
|
|||||||
protected:
|
protected:
|
||||||
|
|
||||||
// any derived netlist must override vlog inherited from plog_base
|
// any derived netlist must override vlog inherited from plog_base
|
||||||
// virtual void vlog(const plog_level &l, const pstring &ls) = 0;
|
// virtual void vlog(const plog_level &l, const pstring &ls) = 0;
|
||||||
|
|
||||||
/* from netlist_object */
|
/* from netlist_object */
|
||||||
virtual void reset();
|
virtual void reset();
|
||||||
@ -1256,7 +1256,7 @@ namespace netlist
|
|||||||
|
|
||||||
netlist_time m_time;
|
netlist_time m_time;
|
||||||
bool m_use_deactivate;
|
bool m_use_deactivate;
|
||||||
queue_t m_queue;
|
queue_t m_queue;
|
||||||
|
|
||||||
|
|
||||||
devices::NETLIB_NAME(mainclock) * m_mainclock;
|
devices::NETLIB_NAME(mainclock) * m_mainclock;
|
||||||
|
|||||||
@ -101,7 +101,7 @@ typedef __int128_t INT128;
|
|||||||
#define ATTR_HOT __attribute__((hot))
|
#define ATTR_HOT __attribute__((hot))
|
||||||
#define ATTR_COLD __attribute__((cold))
|
#define ATTR_COLD __attribute__((cold))
|
||||||
|
|
||||||
#define RESTRICT __restrict__
|
#define RESTRICT __restrict__
|
||||||
#define EXPECTED(x) (x)
|
#define EXPECTED(x) (x)
|
||||||
#define UNEXPECTED(x) (x)
|
#define UNEXPECTED(x) (x)
|
||||||
#define ATTR_PRINTF(x,y) __attribute__((format(printf, x, y)))
|
#define ATTR_PRINTF(x,y) __attribute__((format(printf, x, y)))
|
||||||
|
|||||||
@ -264,4 +264,3 @@ pstream::pos_type pomemstream::vtell()
|
|||||||
{
|
{
|
||||||
return m_pos;
|
return m_pos;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -600,4 +600,3 @@ void pfmt::format_element(const char *f, const char *l, const char *fmt_spec, .
|
|||||||
|
|
||||||
template struct pstring_t<pu8_traits>;
|
template struct pstring_t<pu8_traits>;
|
||||||
template struct pstring_t<putf8_traits>;
|
template struct pstring_t<putf8_traits>;
|
||||||
|
|
||||||
|
|||||||
@ -241,7 +241,7 @@ struct putf8_traits
|
|||||||
return 2;
|
return 2;
|
||||||
else if (c < 0x10000)
|
else if (c < 0x10000)
|
||||||
return 3;
|
return 3;
|
||||||
else /* U+10000 U+1FFFFF */
|
else /* U+10000 U+1FFFFF */
|
||||||
return 4; /* no checks */
|
return 4; /* no checks */
|
||||||
}
|
}
|
||||||
static code_t code(const mem_t *p)
|
static code_t code(const mem_t *p)
|
||||||
@ -276,7 +276,7 @@ struct putf8_traits
|
|||||||
m[1] = 0x80 | ((c>>6) & 0x3f);
|
m[1] = 0x80 | ((c>>6) & 0x3f);
|
||||||
m[2] = 0x80 | (c & 0x3f);
|
m[2] = 0x80 | (c & 0x3f);
|
||||||
}
|
}
|
||||||
else /* U+10000 U+1FFFFF */
|
else /* U+10000 U+1FFFFF */
|
||||||
{
|
{
|
||||||
m[0] = 0xF0 | (c >> 18);
|
m[0] = 0xF0 | (c >> 18);
|
||||||
m[1] = 0x80 | ((c>>12) & 0x3f);
|
m[1] = 0x80 | ((c>>12) & 0x3f);
|
||||||
@ -622,11 +622,11 @@ public:
|
|||||||
|
|
||||||
plog_base(plog_dispatch_intf *proxy)
|
plog_base(plog_dispatch_intf *proxy)
|
||||||
: debug(proxy),
|
: debug(proxy),
|
||||||
info(proxy),
|
info(proxy),
|
||||||
verbose(proxy),
|
verbose(proxy),
|
||||||
warning(proxy),
|
warning(proxy),
|
||||||
error(proxy),
|
error(proxy),
|
||||||
fatal(proxy)
|
fatal(proxy)
|
||||||
{}
|
{}
|
||||||
virtual ~plog_base() {};
|
virtual ~plog_base() {};
|
||||||
|
|
||||||
|
|||||||
@ -98,12 +98,12 @@ class tool_options_t : public poptions
|
|||||||
public:
|
public:
|
||||||
tool_options_t() :
|
tool_options_t() :
|
||||||
poptions(),
|
poptions(),
|
||||||
opt_ttr ("t", "time_to_run", 1.0, "time to run the emulation (seconds)", this),
|
opt_ttr ("t", "time_to_run", 1.0, "time to run the emulation (seconds)", this),
|
||||||
opt_name("n", "name", "", "netlist in file to run; default is first one", this),
|
opt_name("n", "name", "", "netlist in file to run; default is first one", this),
|
||||||
opt_logs("l", "logs", "", "colon separated list of terminals to log", this),
|
opt_logs("l", "logs", "", "colon separated list of terminals to log", this),
|
||||||
opt_file("f", "file", "-", "file to process (default is stdin)", this),
|
opt_file("f", "file", "-", "file to process (default is stdin)", this),
|
||||||
opt_type("y", "type", "spice", "spice:eagle", "type of file to be converted: spice,eagle", this),
|
opt_type("y", "type", "spice", "spice:eagle", "type of file to be converted: spice,eagle", this),
|
||||||
opt_cmd ("c", "cmd", "run", "run|convert|listdevices", this),
|
opt_cmd ("c", "cmd", "run", "run|convert|listdevices", this),
|
||||||
opt_inp( "i", "input", "", "input file to process (default is none)", this),
|
opt_inp( "i", "input", "", "input file to process (default is none)", this),
|
||||||
opt_verb("v", "verbose", "be verbose - this produces lots of output", this),
|
opt_verb("v", "verbose", "be verbose - this produces lots of output", this),
|
||||||
opt_quiet("q", "quiet", "be quiet - no warnings", this),
|
opt_quiet("q", "quiet", "be quiet - no warnings", this),
|
||||||
@ -113,7 +113,7 @@ public:
|
|||||||
poption_double opt_ttr;
|
poption_double opt_ttr;
|
||||||
poption_str opt_name;
|
poption_str opt_name;
|
||||||
poption_str opt_logs;
|
poption_str opt_logs;
|
||||||
poption_str opt_file;
|
poption_str opt_file;
|
||||||
poption_str_limit opt_type;
|
poption_str_limit opt_type;
|
||||||
poption_str opt_cmd;
|
poption_str opt_cmd;
|
||||||
poption_str opt_inp;
|
poption_str opt_inp;
|
||||||
|
|||||||
@ -49,7 +49,7 @@ class wav_t
|
|||||||
public:
|
public:
|
||||||
wav_t(postream &strm, unsigned sr) : m_f(strm)
|
wav_t(postream &strm, unsigned sr) : m_f(strm)
|
||||||
{
|
{
|
||||||
// m_f = strm;
|
// m_f = strm;
|
||||||
initialize(sr);
|
initialize(sr);
|
||||||
m_f.write(&m_fh, sizeof(m_fh));
|
m_f.write(&m_fh, sizeof(m_fh));
|
||||||
m_f.write(&m_fmt, sizeof(m_fmt));
|
m_f.write(&m_fmt, sizeof(m_fmt));
|
||||||
|
|||||||
@ -488,7 +488,7 @@ ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::LE_back_subst_full(
|
|||||||
// ii=-1
|
// ii=-1
|
||||||
|
|
||||||
//for (int i=0; i < kN; i++)
|
//for (int i=0; i < kN; i++)
|
||||||
// x[i] = m_RHS[i];
|
// x[i] = m_RHS[i];
|
||||||
|
|
||||||
for (int i=0; i < kN; i++)
|
for (int i=0; i < kN; i++)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -429,7 +429,6 @@ ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::build_LE_RHS(nl_double *
|
|||||||
template <unsigned m_N, unsigned _storage_N>
|
template <unsigned m_N, unsigned _storage_N>
|
||||||
ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::LE_solve()
|
ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::LE_solve()
|
||||||
{
|
{
|
||||||
|
|
||||||
const unsigned kN = N();
|
const unsigned kN = N();
|
||||||
|
|
||||||
ATTR_UNUSED int imax;
|
ATTR_UNUSED int imax;
|
||||||
@ -501,7 +500,7 @@ ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::LE_solve()
|
|||||||
indx[j]=imax;
|
indx[j]=imax;
|
||||||
#endif
|
#endif
|
||||||
//if (m_A[j][j] == 0.0)
|
//if (m_A[j][j] == 0.0)
|
||||||
// m_A[j][j] = 1e-20;
|
// m_A[j][j] = 1e-20;
|
||||||
double dum = 1.0 / A(j,j);
|
double dum = 1.0 / A(j,j);
|
||||||
for (int i = j+1; i < kN; i++)
|
for (int i = j+1; i < kN; i++)
|
||||||
A(i,j) *= dum;
|
A(i,j) *= dum;
|
||||||
@ -521,7 +520,7 @@ ATTR_HOT void matrix_solver_direct_t<m_N, _storage_N>::LE_back_subst(
|
|||||||
// ii=-1
|
// ii=-1
|
||||||
|
|
||||||
//for (int i=0; i < kN; i++)
|
//for (int i=0; i < kN; i++)
|
||||||
// x[i] = m_RHS[i];
|
// x[i] = m_RHS[i];
|
||||||
|
|
||||||
for (int i=0; i < kN; i++)
|
for (int i=0; i < kN; i++)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -287,8 +287,8 @@ private:
|
|||||||
INT32 m_last_partial_scan; // scanline of last partial update
|
INT32 m_last_partial_scan; // scanline of last partial update
|
||||||
bitmap_argb32 m_screen_overlay_bitmap; // screen overlay bitmap
|
bitmap_argb32 m_screen_overlay_bitmap; // screen overlay bitmap
|
||||||
UINT32 m_unique_id; // unique id for this screen_device
|
UINT32 m_unique_id; // unique id for this screen_device
|
||||||
rgb_t m_color; // render color
|
rgb_t m_color; // render color
|
||||||
UINT8 m_brightness; // global brightness
|
UINT8 m_brightness; // global brightness
|
||||||
|
|
||||||
// screen timing
|
// screen timing
|
||||||
attoseconds_t m_frame_period; // attoseconds per frame
|
attoseconds_t m_frame_period; // attoseconds per frame
|
||||||
|
|||||||
@ -413,16 +413,16 @@ WRITE16_MEMBER( rf5c400_device::rf5c400_w )
|
|||||||
case 0x08: // relative to env attack (channel no)
|
case 0x08: // relative to env attack (channel no)
|
||||||
case 0x09: // relative to env attack (0x0c00/ 0x1c00)
|
case 0x09: // relative to env attack (0x0c00/ 0x1c00)
|
||||||
|
|
||||||
case 0x11: // ? counter for 0x13?
|
case 0x11: // ? counter for 0x13?
|
||||||
{
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case 0x13: // ? bujutsu writes sample data here
|
case 0x13: // ? bujutsu writes sample data here
|
||||||
{
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
case 0x14: // ? related to 0x11/0x13 ?
|
case 0x14: // ? related to 0x11/0x13 ?
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x21: // reverb(character).w
|
case 0x21: // reverb(character).w
|
||||||
|
|||||||
@ -1002,22 +1002,22 @@ void tms5110_device::parse_frame()
|
|||||||
|
|
||||||
if ((indx == 0) || (indx == 15))
|
if ((indx == 0) || (indx == 15))
|
||||||
{
|
{
|
||||||
if (DEBUG_5110) logerror(" (4-bit energy=%d frame)\n",m_new_energy);
|
if (DEBUG_5110) logerror(" (4-bit energy=%d frame)\n",m_new_energy);
|
||||||
|
|
||||||
// clear the k's
|
// clear the k's
|
||||||
if (indx == 0)
|
if (indx == 0)
|
||||||
{
|
{
|
||||||
for (i = 0; i < m_coeff->num_k; i++)
|
for (i = 0; i < m_coeff->num_k; i++)
|
||||||
m_new_k[i] = 0;
|
m_new_k[i] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
// clear fifo if stop frame encountered
|
// clear fifo if stop frame encountered
|
||||||
if (indx == 15)
|
if (indx == 15)
|
||||||
{
|
{
|
||||||
if (DEBUG_5110) logerror(" (4-bit energy=%d STOP frame)\n",m_new_energy);
|
if (DEBUG_5110) logerror(" (4-bit energy=%d STOP frame)\n",m_new_energy);
|
||||||
m_fifo_head = m_fifo_tail = m_fifo_count = 0;
|
m_fifo_head = m_fifo_tail = m_fifo_count = 0;
|
||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
}*/
|
}*/
|
||||||
// if the energy index is 0 or 15, we're done
|
// if the energy index is 0 or 15, we're done
|
||||||
if ((m_new_frame_energy_idx == 0) || (m_new_frame_energy_idx == 15))
|
if ((m_new_frame_energy_idx == 0) || (m_new_frame_energy_idx == 15))
|
||||||
|
|||||||
@ -336,7 +336,7 @@ monsterz // (c) 1982 Nihon (Arcade TV Game List - P.102, Left, 20 from to
|
|||||||
mimonkey // (c) 1982 Universal Video Games (US Copyright Office info - http://cocatalog.loc.gov)
|
mimonkey // (c) 1982 Universal Video Games (US Copyright Office info - http://cocatalog.loc.gov)
|
||||||
mimonsco // (c) 1982 bootleg
|
mimonsco // (c) 1982 bootleg
|
||||||
mimonscr // (c) 1982 bootleg
|
mimonscr // (c) 1982 bootleg
|
||||||
mimonscra // (c) 1982 bootleg
|
mimonscra // (c) 1982 bootleg
|
||||||
scobra // GX316 (c) 1981 Konami
|
scobra // GX316 (c) 1981 Konami
|
||||||
scobras // GX316 (c) 1981 Stern
|
scobras // GX316 (c) 1981 Stern
|
||||||
scobrase // GX316 (c) 1981 Sega
|
scobrase // GX316 (c) 1981 Sega
|
||||||
@ -3040,7 +3040,7 @@ whizz // (c) 1989 Philko (NOT A CAPCOM GAME but runs on modified Sidea
|
|||||||
avengers // 2/1987 (c) 1987 (US)
|
avengers // 2/1987 (c) 1987 (US)
|
||||||
avengers2 // 2/1987 (c) 1987 (US)
|
avengers2 // 2/1987 (c) 1987 (US)
|
||||||
buraiken // 2/1987 (c) 1987 (Japan)
|
buraiken // 2/1987 (c) 1987 (Japan)
|
||||||
buraikenb // 2/1987 (c) 1987 (Japan)
|
buraikenb // 2/1987 (c) 1987 (Japan)
|
||||||
bionicc // 3/1987 (c) 1987 (Euro)
|
bionicc // 3/1987 (c) 1987 (Euro)
|
||||||
bionicc1 // 3/1987 (c) 1987 (US)
|
bionicc1 // 3/1987 (c) 1987 (US)
|
||||||
bionicc2 // 3/1987 (c) 1987 (US)
|
bionicc2 // 3/1987 (c) 1987 (US)
|
||||||
@ -3514,7 +3514,7 @@ mvscb // 23/01/1998 (c) 1998 (Brazil)
|
|||||||
sfa3 // 04/09/1998 (c) 1998 (USA)
|
sfa3 // 04/09/1998 (c) 1998 (USA)
|
||||||
sfa3u // 04/09/1998 (c) 1998 (USA)
|
sfa3u // 04/09/1998 (c) 1998 (USA)
|
||||||
sfa3ur1 // 29/06/1998 (c) 1998 (USA)
|
sfa3ur1 // 29/06/1998 (c) 1998 (USA)
|
||||||
sfa3us // 16/06/1998 (c) 1998 (USA)
|
sfa3us // 16/06/1998 (c) 1998 (USA)
|
||||||
sfa3h // 04/09/1998 (c) 1998 (Hispanic)
|
sfa3h // 04/09/1998 (c) 1998 (Hispanic)
|
||||||
sfa3hr1 // 29/06/1998 (c) 1998 (Hispanic)
|
sfa3hr1 // 29/06/1998 (c) 1998 (Hispanic)
|
||||||
sfa3b // 29/06/1998 (c) 1998 (Brazil)
|
sfa3b // 29/06/1998 (c) 1998 (Brazil)
|
||||||
@ -3845,7 +3845,7 @@ soulclbrwb // 1998.?? Soul Calibur (World, SOC14/VER.B)
|
|||||||
soulclbrub // 1998.?? Soul Calibur (US, SOC13/VER.B)
|
soulclbrub // 1998.?? Soul Calibur (US, SOC13/VER.B)
|
||||||
soulclbrjb // 1998.?? Soul Calibur (Japan, SOC11/VER.B)
|
soulclbrjb // 1998.?? Soul Calibur (Japan, SOC11/VER.B)
|
||||||
soulclbrja // 1998.?? Soul Calibur (Japan, SOC11/VER.A2)
|
soulclbrja // 1998.?? Soul Calibur (Japan, SOC11/VER.A2)
|
||||||
technodr // 1998.07 Techno Drive
|
technodr // 1998.07 Techno Drive
|
||||||
mdhorse // 1998.11 Derby Quiz My Dream Horse (Japan, MDH1/VER.A2)
|
mdhorse // 1998.11 Derby Quiz My Dream Horse (Japan, MDH1/VER.A2)
|
||||||
// 1998.12 Attack Pla Rail
|
// 1998.12 Attack Pla Rail
|
||||||
tenkomor // 1998.?? Tenkomori Shooting (Asia, TKM2/VER.A1)
|
tenkomor // 1998.?? Tenkomori Shooting (Asia, TKM2/VER.A1)
|
||||||
@ -9535,7 +9535,7 @@ puzzlet // (c) 2000 Yunizu Corporation (Japan)
|
|||||||
spcforce // (c) 1980 Venture Line
|
spcforce // (c) 1980 Venture Line
|
||||||
spcforc2 // bootleg
|
spcforc2 // bootleg
|
||||||
meteor // (c) 1981 Venture Line
|
meteor // (c) 1981 Venture Line
|
||||||
meteors // (c) 1981 Amusement World
|
meteors // (c) 1981 Amusement World
|
||||||
looping // (c) 1982 Video Games GmbH
|
looping // (c) 1982 Video Games GmbH
|
||||||
loopingv // (c) 1982 Video Games GmbH (Venture Line license)
|
loopingv // (c) 1982 Video Games GmbH (Venture Line license)
|
||||||
loopingva // (c) 1982 Video Games GmbH (Venture Line license)
|
loopingva // (c) 1982 Video Games GmbH (Venture Line license)
|
||||||
|
|||||||
@ -182,7 +182,7 @@ static MACHINE_CONFIG_START( ajax, ajax_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(ajax_state, screen_update_ajax)
|
MCFG_SCREEN_UPDATE_DRIVER(ajax_state, screen_update_ajax)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
|
|||||||
@ -209,7 +209,7 @@ static MACHINE_CONFIG_START( aliens, aliens_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240) // measured 59.17
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240) // measured 59.17
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(aliens_state, screen_update_aliens)
|
MCFG_SCREEN_UPDATE_DRIVER(aliens_state, screen_update_aliens)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
|
|||||||
@ -7,13 +7,13 @@
|
|||||||
Original driver by Nicola Salmoria
|
Original driver by Nicola Salmoria
|
||||||
|
|
||||||
Notes:
|
Notes:
|
||||||
- To advance to the next screen in service mode, press P1 and P2 start
|
- To advance to the next screen in service mode, press P1 and P2 start
|
||||||
simultaneously
|
simultaneously
|
||||||
|
|
||||||
Todo:
|
Todo:
|
||||||
- How is the sound irq cleared (currently using HOLD_LINE)?
|
- How is the sound irq cleared (currently using HOLD_LINE)?
|
||||||
- Do bit 2 and 7 of the bankswitch port have any meaning?
|
- Do bit 2 and 7 of the bankswitch port have any meaning?
|
||||||
- Verify raw screen parameters
|
- Verify raw screen parameters
|
||||||
|
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
|
|
||||||
@ -285,7 +285,7 @@ static MACHINE_CONFIG_START( blockhl, blockhl_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(blockhl_state, screen_update_blockhl)
|
MCFG_SCREEN_UPDATE_DRIVER(blockhl_state, screen_update_blockhl)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
@ -318,48 +318,48 @@ MACHINE_CONFIG_END
|
|||||||
//**************************************************************************
|
//**************************************************************************
|
||||||
|
|
||||||
ROM_START( blockhl )
|
ROM_START( blockhl )
|
||||||
ROM_REGION( 0x10000, "maincpu", 0 ) // code + banked roms
|
ROM_REGION( 0x10000, "maincpu", 0 ) // code + banked roms
|
||||||
ROM_LOAD( "973l02.e21", 0x00000, 0x10000, CRC(e14f849a) SHA1(d44cf178cc98998b72ed32c6e20b6ebdf1f97579) )
|
ROM_LOAD( "973l02.e21", 0x00000, 0x10000, CRC(e14f849a) SHA1(d44cf178cc98998b72ed32c6e20b6ebdf1f97579) )
|
||||||
|
|
||||||
ROM_REGION( 0x08000, "audiocpu", 0 ) // 32k for the sound CPU
|
ROM_REGION( 0x08000, "audiocpu", 0 ) // 32k for the sound CPU
|
||||||
ROM_LOAD( "973d01.g6", 0x00000, 0x08000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
|
ROM_LOAD( "973d01.g6", 0x00000, 0x08000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
|
||||||
|
|
||||||
ROM_REGION( 0x20000, "k052109", 0 ) // tiles
|
ROM_REGION( 0x20000, "k052109", 0 ) // tiles
|
||||||
ROM_LOAD32_BYTE( "973f07.k15", 0x00000, 0x08000, CRC(1a8cd9b4) SHA1(7cb7944d24ac51fa6b610542d9dec68697cacf0f) )
|
ROM_LOAD32_BYTE( "973f07.k15", 0x00000, 0x08000, CRC(1a8cd9b4) SHA1(7cb7944d24ac51fa6b610542d9dec68697cacf0f) )
|
||||||
ROM_LOAD32_BYTE( "973f08.k18", 0x00001, 0x08000, CRC(952b51a6) SHA1(017575738d444b688b137cad5611638d53be84f2) )
|
ROM_LOAD32_BYTE( "973f08.k18", 0x00001, 0x08000, CRC(952b51a6) SHA1(017575738d444b688b137cad5611638d53be84f2) )
|
||||||
ROM_LOAD32_BYTE( "973f09.k20", 0x00002, 0x08000, CRC(77841594) SHA1(e1bfdc5bb598d865868d578ef7faba8078becd7a) )
|
ROM_LOAD32_BYTE( "973f09.k20", 0x00002, 0x08000, CRC(77841594) SHA1(e1bfdc5bb598d865868d578ef7faba8078becd7a) )
|
||||||
ROM_LOAD32_BYTE( "973f10.k23", 0x00003, 0x08000, CRC(09039fab) SHA1(a9dea17aacf4484d21ef3b16470263447b51b6b5) )
|
ROM_LOAD32_BYTE( "973f10.k23", 0x00003, 0x08000, CRC(09039fab) SHA1(a9dea17aacf4484d21ef3b16470263447b51b6b5) )
|
||||||
|
|
||||||
ROM_REGION( 0x20000, "k051960", 0 ) // sprites
|
ROM_REGION( 0x20000, "k051960", 0 ) // sprites
|
||||||
ROM_LOAD32_BYTE( "973f06.k12", 0x00000, 0x08000, CRC(51acfdb6) SHA1(94d243f341b490684f5297d95d4835bd522ece35) )
|
ROM_LOAD32_BYTE( "973f06.k12", 0x00000, 0x08000, CRC(51acfdb6) SHA1(94d243f341b490684f5297d95d4835bd522ece35) )
|
||||||
ROM_LOAD32_BYTE( "973f05.k9", 0x00001, 0x08000, CRC(4cfea298) SHA1(4772b5b99f5fd8174d8884bd84173512e1edabf4) )
|
ROM_LOAD32_BYTE( "973f05.k9", 0x00001, 0x08000, CRC(4cfea298) SHA1(4772b5b99f5fd8174d8884bd84173512e1edabf4) )
|
||||||
ROM_LOAD32_BYTE( "973f04.k7", 0x00002, 0x08000, CRC(69ca41bd) SHA1(9b0b1c888efd2f2d5525f14778e18fb4a7353eb6) )
|
ROM_LOAD32_BYTE( "973f04.k7", 0x00002, 0x08000, CRC(69ca41bd) SHA1(9b0b1c888efd2f2d5525f14778e18fb4a7353eb6) )
|
||||||
ROM_LOAD32_BYTE( "973f03.k4", 0x00003, 0x08000, CRC(21e98472) SHA1(8c697d369a1f57be0825c33b4e9107ce1b02a130) )
|
ROM_LOAD32_BYTE( "973f03.k4", 0x00003, 0x08000, CRC(21e98472) SHA1(8c697d369a1f57be0825c33b4e9107ce1b02a130) )
|
||||||
|
|
||||||
ROM_REGION( 0x0100, "priority", 0 ) // priority encoder (not used)
|
ROM_REGION( 0x0100, "priority", 0 ) // priority encoder (not used)
|
||||||
ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) )
|
ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
ROM_START( quarth )
|
ROM_START( quarth )
|
||||||
ROM_REGION( 0x10000, "maincpu", 0 ) // code + banked roms
|
ROM_REGION( 0x10000, "maincpu", 0 ) // code + banked roms
|
||||||
ROM_LOAD( "973j02.e21", 0x00000, 0x10000, CRC(27a90118) SHA1(51309385b93db29b9277d14252166c4ea1746303) )
|
ROM_LOAD( "973j02.e21", 0x00000, 0x10000, CRC(27a90118) SHA1(51309385b93db29b9277d14252166c4ea1746303) )
|
||||||
|
|
||||||
ROM_REGION( 0x08000, "audiocpu", 0 ) // 32k for the sound CPU
|
ROM_REGION( 0x08000, "audiocpu", 0 ) // 32k for the sound CPU
|
||||||
ROM_LOAD( "973d01.g6", 0x00000, 0x08000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
|
ROM_LOAD( "973d01.g6", 0x00000, 0x08000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
|
||||||
|
|
||||||
ROM_REGION( 0x20000, "k052109", 0 ) // tiles
|
ROM_REGION( 0x20000, "k052109", 0 ) // tiles
|
||||||
ROM_LOAD32_BYTE( "973e07.k15", 0x00000, 0x08000, CRC(0bd6b0f8) SHA1(6c59cf637354fe2df424eaa89feb9c1bc1f66a92) )
|
ROM_LOAD32_BYTE( "973e07.k15", 0x00000, 0x08000, CRC(0bd6b0f8) SHA1(6c59cf637354fe2df424eaa89feb9c1bc1f66a92) )
|
||||||
ROM_LOAD32_BYTE( "973e08.k18", 0x00001, 0x08000, CRC(104d0d5f) SHA1(595698911513113d01e5b565f5b073d1bd033d3f) )
|
ROM_LOAD32_BYTE( "973e08.k18", 0x00001, 0x08000, CRC(104d0d5f) SHA1(595698911513113d01e5b565f5b073d1bd033d3f) )
|
||||||
ROM_LOAD32_BYTE( "973e09.k20", 0x00002, 0x08000, CRC(bd3a6f24) SHA1(eb45db3a6a52bb2b25df8c2dace877e59b4130a6) )
|
ROM_LOAD32_BYTE( "973e09.k20", 0x00002, 0x08000, CRC(bd3a6f24) SHA1(eb45db3a6a52bb2b25df8c2dace877e59b4130a6) )
|
||||||
ROM_LOAD32_BYTE( "973e10.k23", 0x00003, 0x08000, CRC(cf5e4b86) SHA1(43348753894c1763b26dbfc70245dac92048db8f) )
|
ROM_LOAD32_BYTE( "973e10.k23", 0x00003, 0x08000, CRC(cf5e4b86) SHA1(43348753894c1763b26dbfc70245dac92048db8f) )
|
||||||
|
|
||||||
ROM_REGION( 0x20000, "k051960", 0 ) // sprites
|
ROM_REGION( 0x20000, "k051960", 0 ) // sprites
|
||||||
ROM_LOAD32_BYTE( "973e06.k12", 0x00000, 0x08000, CRC(0d58af85) SHA1(2efd661d614fb305a14cfe1aa4fb17714f215d4f) )
|
ROM_LOAD32_BYTE( "973e06.k12", 0x00000, 0x08000, CRC(0d58af85) SHA1(2efd661d614fb305a14cfe1aa4fb17714f215d4f) )
|
||||||
ROM_LOAD32_BYTE( "973e05.k9", 0x00001, 0x08000, CRC(15d822cb) SHA1(70ecad5e0a461df0da6e6eb23f43a7b643297f0d) )
|
ROM_LOAD32_BYTE( "973e05.k9", 0x00001, 0x08000, CRC(15d822cb) SHA1(70ecad5e0a461df0da6e6eb23f43a7b643297f0d) )
|
||||||
ROM_LOAD32_BYTE( "973e04.k7", 0x00002, 0x08000, CRC(d70f4a2c) SHA1(25f835a17bacf2b8debb2eb8a3cff90cab3f402a) )
|
ROM_LOAD32_BYTE( "973e04.k7", 0x00002, 0x08000, CRC(d70f4a2c) SHA1(25f835a17bacf2b8debb2eb8a3cff90cab3f402a) )
|
||||||
ROM_LOAD32_BYTE( "973e03.k4", 0x00003, 0x08000, CRC(2c5a4b4b) SHA1(e2991dd78b9cd96cf93ebd6de0d4e060d346ab9c) )
|
ROM_LOAD32_BYTE( "973e03.k4", 0x00003, 0x08000, CRC(2c5a4b4b) SHA1(e2991dd78b9cd96cf93ebd6de0d4e060d346ab9c) )
|
||||||
|
|
||||||
ROM_REGION( 0x0100, "priority", 0 ) // priority encoder (not used)
|
ROM_REGION( 0x0100, "priority", 0 ) // priority encoder (not used)
|
||||||
ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) )
|
ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|||||||
@ -40,7 +40,7 @@ public:
|
|||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<via6522_device> m_via;
|
required_device<via6522_device> m_via;
|
||||||
required_device<digitalker_device> m_digitalker;
|
required_device<digitalker_device> m_digitalker;
|
||||||
optional_device<ay8910_device> m_aysnd; // only faceoffh
|
optional_device<ay8910_device> m_aysnd; // only faceoffh
|
||||||
|
|
||||||
// vars
|
// vars
|
||||||
UINT8 m_port_a, m_port_b;
|
UINT8 m_port_a, m_port_b;
|
||||||
@ -95,11 +95,11 @@ READ8_MEMBER(chexx_state::via_b_in)
|
|||||||
|
|
||||||
WRITE8_MEMBER(chexx_state::via_a_out)
|
WRITE8_MEMBER(chexx_state::via_a_out)
|
||||||
{
|
{
|
||||||
m_port_a = data; // multiplexer
|
m_port_a = data; // multiplexer
|
||||||
|
|
||||||
m_digitalker->digitalker_data_w(space, 0, data, 0);
|
m_digitalker->digitalker_data_w(space, 0, data, 0);
|
||||||
|
|
||||||
// logerror("%s: VIA write A = %02X\n", machine().describe_context(), data);
|
// logerror("%s: VIA write A = %02X\n", machine().describe_context(), data);
|
||||||
}
|
}
|
||||||
WRITE8_MEMBER(chexx_state::via_b_out)
|
WRITE8_MEMBER(chexx_state::via_b_out)
|
||||||
{
|
{
|
||||||
@ -111,7 +111,7 @@ WRITE8_MEMBER(chexx_state::via_b_out)
|
|||||||
// bit 4 is EJECT
|
// bit 4 is EJECT
|
||||||
// bit 7 is related to speaker out
|
// bit 7 is related to speaker out
|
||||||
|
|
||||||
// logerror("%s: VIA write B = %02X\n", machine().describe_context(), data);
|
// logerror("%s: VIA write B = %02X\n", machine().describe_context(), data);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(chexx_state::via_ca2_out)
|
WRITE_LINE_MEMBER(chexx_state::via_ca2_out)
|
||||||
@ -120,11 +120,11 @@ WRITE_LINE_MEMBER(chexx_state::via_ca2_out)
|
|||||||
m_digitalker->digitalker_0_cs_w(CLEAR_LINE);
|
m_digitalker->digitalker_0_cs_w(CLEAR_LINE);
|
||||||
m_digitalker->digitalker_0_wr_w(state ? ASSERT_LINE : CLEAR_LINE);
|
m_digitalker->digitalker_0_wr_w(state ? ASSERT_LINE : CLEAR_LINE);
|
||||||
|
|
||||||
// logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state);
|
// logerror("%s: VIA write CA2 = %02X\n", machine().describe_context(), state);
|
||||||
}
|
}
|
||||||
WRITE_LINE_MEMBER(chexx_state::via_cb1_out)
|
WRITE_LINE_MEMBER(chexx_state::via_cb1_out)
|
||||||
{
|
{
|
||||||
// logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state);
|
// logerror("%s: VIA write CB1 = %02X\n", machine().describe_context(), state);
|
||||||
}
|
}
|
||||||
WRITE_LINE_MEMBER(chexx_state::via_cb2_out)
|
WRITE_LINE_MEMBER(chexx_state::via_cb2_out)
|
||||||
{
|
{
|
||||||
@ -144,18 +144,18 @@ WRITE_LINE_MEMBER(chexx_state::via_cb2_out)
|
|||||||
output_set_led_value(1, BIT(m_shift,1));
|
output_set_led_value(1, BIT(m_shift,1));
|
||||||
output_set_led_value(2, BIT(m_shift,0));
|
output_set_led_value(2, BIT(m_shift,0));
|
||||||
|
|
||||||
// logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state);
|
// logerror("%s: VIA write CB2 = %02X\n", machine().describe_context(), state);
|
||||||
}
|
}
|
||||||
WRITE_LINE_MEMBER(chexx_state::via_irq_out)
|
WRITE_LINE_MEMBER(chexx_state::via_irq_out)
|
||||||
{
|
{
|
||||||
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
|
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
|
||||||
// logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state);
|
// logerror("%s: VIA write IRQ = %02X\n", machine().describe_context(), state);
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(chexx_state::input_r)
|
READ8_MEMBER(chexx_state::input_r)
|
||||||
{
|
{
|
||||||
UINT8 ret = ioport("DSW")->read(); // bits 0-3
|
UINT8 ret = ioport("DSW")->read(); // bits 0-3
|
||||||
UINT8 inp = ioport("INPUT")->read(); // bit 7 (multiplexed)
|
UINT8 inp = ioport("INPUT")->read(); // bit 7 (multiplexed)
|
||||||
|
|
||||||
for (int i = 0; i < 8; ++i)
|
for (int i = 0; i < 8; ++i)
|
||||||
if ( ((~m_port_a) & (1 << i)) && ((~inp) & (1 << i)) )
|
if ( ((~m_port_a) & (1 << i)) && ((~inp) & (1 << i)) )
|
||||||
@ -193,12 +193,12 @@ WRITE8_MEMBER(chexx_state::ay_w)
|
|||||||
if (m_ay_cmd == 0x00 && data == 0x03)
|
if (m_ay_cmd == 0x00 && data == 0x03)
|
||||||
{
|
{
|
||||||
m_aysnd->address_w(space, offset, m_ay_data, mem_mask);
|
m_aysnd->address_w(space, offset, m_ay_data, mem_mask);
|
||||||
// logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data);
|
// logerror("%s: AY addr = %02X\n", machine().describe_context(), m_ay_data);
|
||||||
}
|
}
|
||||||
else if (m_ay_cmd == 0x00 && data == 0x02)
|
else if (m_ay_cmd == 0x00 && data == 0x02)
|
||||||
{
|
{
|
||||||
m_aysnd->data_w(space, offset, m_ay_data, mem_mask);
|
m_aysnd->data_w(space, offset, m_ay_data, mem_mask);
|
||||||
// logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data);
|
// logerror("%s: AY data = %02X\n", machine().describe_context(), m_ay_data);
|
||||||
}
|
}
|
||||||
m_ay_cmd = data;
|
m_ay_cmd = data;
|
||||||
}
|
}
|
||||||
@ -403,13 +403,13 @@ ROM_START( faceoffh )
|
|||||||
// bank switched (from samples region)
|
// bank switched (from samples region)
|
||||||
|
|
||||||
ROM_REGION( 0x10000, "samples", 0 )
|
ROM_REGION( 0x10000, "samples", 0 )
|
||||||
ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header
|
ROM_LOAD( "9.2a", 0x0000, 0x2000, CRC(059b3725) SHA1(5837bee1ef34ce19a3101b851ca55029776e4b3e) ) // digitalker header
|
||||||
ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) )
|
ROM_LOAD( "8.2b", 0x2000, 0x2000, CRC(679da4e1) SHA1(01a5b9dd132c1b0de97c153d7de226f5bf357338) )
|
||||||
|
|
||||||
ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header
|
ROM_LOAD( "7.2c", 0x4000, 0x2000, CRC(f8461b33) SHA1(717a8842e0ce9ba94dd59504a324bede4844e389) ) // digitalker header
|
||||||
ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) )
|
ROM_LOAD( "6.2d", 0x6000, 0x2000, CRC(156c91e0) SHA1(6017d4b5609b214a6e66dcd76493a7d1442c04d4) )
|
||||||
|
|
||||||
ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header
|
ROM_LOAD( "5.3a", 0x8000, 0x2000, CRC(19904604) SHA1(633c211a9a822cdf597a6f3c221ae9c8d6482e82) ) // digitalker header
|
||||||
ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) )
|
ROM_LOAD( "4.3b", 0xa000, 0x2000, CRC(c3386d51) SHA1(7882e88db55ba914be81075e4b2d76e246c34d3b) )
|
||||||
|
|
||||||
ROM_FILL( 0xc000, 0x2000, 0xff ) // unpopulated
|
ROM_FILL( 0xc000, 0x2000, 0xff ) // unpopulated
|
||||||
|
|||||||
@ -306,7 +306,7 @@ static MACHINE_CONFIG_START( chqflag, chqflag_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 96, 400, 256, 16, 240) // measured Vsync 59.17hz Hsync 15.13 / 15.19khz
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 96, 400, 256, 16, 240) // measured Vsync 59.17hz Hsync 15.13 / 15.19khz
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(chqflag_state, screen_update_chqflag)
|
MCFG_SCREEN_UPDATE_DRIVER(chqflag_state, screen_update_chqflag)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
|
|||||||
@ -1586,13 +1586,13 @@ WRITE64_MEMBER(cobra_state::main_fifo_w)
|
|||||||
UINT32 *sub_ram = (UINT32*)m_sub_ram;
|
UINT32 *sub_ram = (UINT32*)m_sub_ram;
|
||||||
UINT32 *gfx_ram = (UINT32*)(UINT64*)m_gfx_ram0;
|
UINT32 *gfx_ram = (UINT32*)(UINT64*)m_gfx_ram0;
|
||||||
|
|
||||||
main_ram[(0x0005ac^4) / 4] = 0x60000000; // skip IRQ fail
|
main_ram[(0x0005ac^4) / 4] = 0x60000000; // skip IRQ fail
|
||||||
main_ram[(0x001ec4^4) / 4] = 0x60000000; // waiting for IRQ?
|
main_ram[(0x001ec4^4) / 4] = 0x60000000; // waiting for IRQ?
|
||||||
main_ram[(0x001f00^4) / 4] = 0x60000000; // waiting for IRQ?
|
main_ram[(0x001f00^4) / 4] = 0x60000000; // waiting for IRQ?
|
||||||
|
|
||||||
sub_ram[0x568 / 4] = 0x60000000; // skip IRQ fail
|
sub_ram[0x568 / 4] = 0x60000000; // skip IRQ fail
|
||||||
|
|
||||||
gfx_ram[(0x38632c^4) / 4] = 0x38600000; // skip check_one_scene()
|
gfx_ram[(0x38632c^4) / 4] = 0x38600000; // skip check_one_scene()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -302,7 +302,7 @@ static MACHINE_CONFIG_START( crimfght, crimfght_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 96, 416, 256, 16, 240) // measured 59.17
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 96, 416, 256, 16, 240) // measured 59.17
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(crimfght_state, screen_update_crimfght)
|
MCFG_SCREEN_UPDATE_DRIVER(crimfght_state, screen_update_crimfght)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|
||||||
|
|||||||
@ -1064,8 +1064,8 @@ static ADDRESS_MAP_START( spu_map, AS_PROGRAM, 16, firebeat_state )
|
|||||||
AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs0, write_cs0)
|
AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs0, write_cs0)
|
||||||
AM_RANGE(0x340000, 0x34000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs1, write_cs1)
|
AM_RANGE(0x340000, 0x34000f) AM_DEVREADWRITE("spu_ata", ata_interface_device, read_cs1, write_cs1)
|
||||||
AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rf5c400", rf5c400_device, rf5c400_r, rf5c400_w)
|
AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE("rf5c400", rf5c400_device, rf5c400_r, rf5c400_w)
|
||||||
AM_RANGE(0x800000, 0x83ffff) AM_RAM // SDRAM
|
AM_RANGE(0x800000, 0x83ffff) AM_RAM // SDRAM
|
||||||
AM_RANGE(0xfc0000, 0xffffff) AM_RAM // SDRAM
|
AM_RANGE(0xfc0000, 0xffffff) AM_RAM // SDRAM
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|||||||
@ -340,10 +340,10 @@ UINT32 joystand_state::screen_update( screen_device &screen, bitmap_rgb32 &bitma
|
|||||||
draw_bg15_tilemap();
|
draw_bg15_tilemap();
|
||||||
|
|
||||||
bitmap.fill(m_palette->black_pen(), cliprect);
|
bitmap.fill(m_palette->black_pen(), cliprect);
|
||||||
if (layers_ctrl & 4) copybitmap_trans(bitmap, m_bg15_bitmap[0], 0, 0, 1, 0, cliprect, BG15_TRANSPARENT);
|
if (layers_ctrl & 4) copybitmap_trans(bitmap, m_bg15_bitmap[0], 0, 0, 1, 0, cliprect, BG15_TRANSPARENT);
|
||||||
if (layers_ctrl & 8) copybitmap_trans(bitmap, m_bg15_bitmap[1], 0, 0, 0, 0, cliprect, BG15_TRANSPARENT);
|
if (layers_ctrl & 8) copybitmap_trans(bitmap, m_bg15_bitmap[1], 0, 0, 0, 0, cliprect, BG15_TRANSPARENT);
|
||||||
if (layers_ctrl & 1) m_bg1_tmap->draw(screen, bitmap, cliprect, 0, 0);
|
if (layers_ctrl & 1) m_bg1_tmap->draw(screen, bitmap, cliprect, 0, 0);
|
||||||
if (layers_ctrl & 2) m_bg2_tmap->draw(screen, bitmap, cliprect, 0, 0);
|
if (layers_ctrl & 2) m_bg2_tmap->draw(screen, bitmap, cliprect, 0, 0);
|
||||||
|
|
||||||
popmessage("S0: %04X S1: %04X EN: %04X OUT: %04X", m_scroll[0], m_scroll[1], m_enable[0], m_outputs[0]);
|
popmessage("S0: %04X S1: %04X EN: %04X OUT: %04X", m_scroll[0], m_scroll[1], m_enable[0], m_outputs[0]);
|
||||||
return 0;
|
return 0;
|
||||||
@ -394,17 +394,17 @@ WRITE16_MEMBER(joystand_state::outputs_w)
|
|||||||
COMBINE_DATA(&m_outputs[0]);
|
COMBINE_DATA(&m_outputs[0]);
|
||||||
if (ACCESSING_BITS_8_15)
|
if (ACCESSING_BITS_8_15)
|
||||||
{
|
{
|
||||||
coin_counter_w(machine(), 0, BIT(data, 0)); // coin counter 1
|
coin_counter_w(machine(), 0, BIT(data, 0)); // coin counter 1
|
||||||
coin_counter_w(machine(), 1, BIT(data, 1)); // coin counter 2
|
coin_counter_w(machine(), 1, BIT(data, 1)); // coin counter 2
|
||||||
|
|
||||||
output_set_value("blocker", BIT(data, 2));
|
output_set_value("blocker", BIT(data, 2));
|
||||||
output_set_value("error_lamp", BIT(data, 3)); // counter error
|
output_set_value("error_lamp", BIT(data, 3)); // counter error
|
||||||
output_set_value("photo_lamp", BIT(data, 4)); // during photo
|
output_set_value("photo_lamp", BIT(data, 4)); // during photo
|
||||||
}
|
}
|
||||||
if (ACCESSING_BITS_8_15)
|
if (ACCESSING_BITS_8_15)
|
||||||
{
|
{
|
||||||
output_set_value("ok_button_led", BIT(data, 8));
|
output_set_value("ok_button_led", BIT(data, 8));
|
||||||
output_set_value("cancel_button_led", BIT(data, 9));
|
output_set_value("cancel_button_led", BIT(data, 9));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -449,7 +449,7 @@ static ADDRESS_MAP_START( joystand_map, AS_PROGRAM, 16, joystand_state )
|
|||||||
AM_RANGE(0x200010, 0x200011) AM_READ_PORT("IN0") // r/w
|
AM_RANGE(0x200010, 0x200011) AM_READ_PORT("IN0") // r/w
|
||||||
AM_RANGE(0x200012, 0x200013) AM_RAM_WRITE(outputs_w) AM_SHARE("outputs") // r/w
|
AM_RANGE(0x200012, 0x200013) AM_RAM_WRITE(outputs_w) AM_SHARE("outputs") // r/w
|
||||||
AM_RANGE(0x200014, 0x200015) AM_READWRITE(fpga_r, oki_bank_w) // r/w
|
AM_RANGE(0x200014, 0x200015) AM_READWRITE(fpga_r, oki_bank_w) // r/w
|
||||||
// AM_RANGE(0x200016, 0x200017) // write $9190 at boot
|
// AM_RANGE(0x200016, 0x200017) // write $9190 at boot
|
||||||
|
|
||||||
AM_RANGE(0x400000, 0x47ffff) AM_RAM_WRITE(bg15_0_w) AM_SHARE("bg15_0_ram") // r5g5b5 200x200 pixel-based
|
AM_RANGE(0x400000, 0x47ffff) AM_RAM_WRITE(bg15_0_w) AM_SHARE("bg15_0_ram") // r5g5b5 200x200 pixel-based
|
||||||
AM_RANGE(0x480000, 0x4fffff) AM_RAM // more rgb layers? (writes at offset 0)
|
AM_RANGE(0x480000, 0x4fffff) AM_RAM // more rgb layers? (writes at offset 0)
|
||||||
@ -464,7 +464,7 @@ static ADDRESS_MAP_START( joystand_map, AS_PROGRAM, 16, joystand_state )
|
|||||||
AM_RANGE(0x60c00c, 0x60c00d) AM_RAM AM_SHARE("enable") // write
|
AM_RANGE(0x60c00c, 0x60c00d) AM_RAM AM_SHARE("enable") // write
|
||||||
|
|
||||||
AM_RANGE(0x800000, 0xdfffff) AM_READWRITE(cart_r, cart_w) // r/w (cart flash)
|
AM_RANGE(0x800000, 0xdfffff) AM_READWRITE(cart_r, cart_w) // r/w (cart flash)
|
||||||
// AM_RANGE(0xe00080, 0xe00081) // write (bit 0 = cart? bit 1 = ? bit 3 = ?)
|
// AM_RANGE(0xe00080, 0xe00081) // write (bit 0 = cart? bit 1 = ? bit 3 = ?)
|
||||||
AM_RANGE(0xe00000, 0xe00001) AM_READ(e00000_r) // copy slot
|
AM_RANGE(0xe00000, 0xe00001) AM_READ(e00000_r) // copy slot
|
||||||
AM_RANGE(0xe00020, 0xe00021) AM_READ(e00020_r) // master slot
|
AM_RANGE(0xe00020, 0xe00021) AM_READ(e00020_r) // master slot
|
||||||
|
|
||||||
@ -559,12 +559,12 @@ GFXDECODE_END
|
|||||||
|
|
||||||
void joystand_state::machine_start()
|
void joystand_state::machine_start()
|
||||||
{
|
{
|
||||||
m_cart_flash[0] = m_cart_u11; m_cart_flash[1] = m_cart_u5;
|
m_cart_flash[0] = m_cart_u11; m_cart_flash[1] = m_cart_u5;
|
||||||
m_cart_flash[2] = m_cart_u12; m_cart_flash[3] = m_cart_u6;
|
m_cart_flash[2] = m_cart_u12; m_cart_flash[3] = m_cart_u6;
|
||||||
m_cart_flash[4] = m_cart_u9; m_cart_flash[5] = m_cart_u3;
|
m_cart_flash[4] = m_cart_u9; m_cart_flash[5] = m_cart_u3;
|
||||||
m_cart_flash[6] = m_cart_u10; m_cart_flash[7] = m_cart_u4;
|
m_cart_flash[6] = m_cart_u10; m_cart_flash[7] = m_cart_u4;
|
||||||
m_cart_flash[8] = m_cart_u7; m_cart_flash[9] = m_cart_u1;
|
m_cart_flash[8] = m_cart_u7; m_cart_flash[9] = m_cart_u1;
|
||||||
m_cart_flash[10] = m_cart_u8; m_cart_flash[11] = m_cart_u2;
|
m_cart_flash[10] = m_cart_u8; m_cart_flash[11] = m_cart_u2;
|
||||||
}
|
}
|
||||||
|
|
||||||
void joystand_state::machine_reset()
|
void joystand_state::machine_reset()
|
||||||
|
|||||||
@ -36,7 +36,7 @@ Year + Game PCB Notes
|
|||||||
94 Great 1000 Miles Rally Z09AF-005 TBSOP01 MCU protection (EEPROM handling etc.)
|
94 Great 1000 Miles Rally Z09AF-005 TBSOP01 MCU protection (EEPROM handling etc.)
|
||||||
Bonk's Adventure Z09AF-003 TBSOP01 MCU protection (EEPROM handling, 68k code snippet, data)
|
Bonk's Adventure Z09AF-003 TBSOP01 MCU protection (EEPROM handling, 68k code snippet, data)
|
||||||
Blood Warrior Z09AF-005 TBSOP01 MCU protection (EEPROM handling etc.)
|
Blood Warrior Z09AF-005 TBSOP01 MCU protection (EEPROM handling etc.)
|
||||||
Pack'n Bang Bang BW-002 (prototype)
|
Pack'n Bang Bang BW-002 (prototype)
|
||||||
95 Great 1000 Miles Rally 2 M201F00138 TBSOP02 MCU protection (EEPROM handling etc.)
|
95 Great 1000 Miles Rally 2 M201F00138 TBSOP02 MCU protection (EEPROM handling etc.)
|
||||||
----------------------------------------------------------------------------------------
|
----------------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@ -84,7 +84,7 @@ READ32_MEMBER(konendev_state::mcu2_r)
|
|||||||
|
|
||||||
if (ACCESSING_BITS_24_31)
|
if (ACCESSING_BITS_24_31)
|
||||||
{
|
{
|
||||||
r |= 0x11000000; // MCU2 version
|
r |= 0x11000000; // MCU2 version
|
||||||
}
|
}
|
||||||
if (ACCESSING_BITS_16_23)
|
if (ACCESSING_BITS_16_23)
|
||||||
{
|
{
|
||||||
@ -92,15 +92,15 @@ READ32_MEMBER(konendev_state::mcu2_r)
|
|||||||
}
|
}
|
||||||
if (ACCESSING_BITS_8_15)
|
if (ACCESSING_BITS_8_15)
|
||||||
{
|
{
|
||||||
r &= ~0x4000; // MCU2 presence
|
r &= ~0x4000; // MCU2 presence
|
||||||
r &= ~0x2000; // IFU2 presence
|
r &= ~0x2000; // IFU2 presence
|
||||||
r &= ~0x1000; // FMU2 presence
|
r &= ~0x1000; // FMU2 presence
|
||||||
}
|
}
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
{
|
{
|
||||||
r |= 0x40; // logic door
|
r |= 0x40; // logic door
|
||||||
r |= 0x04; // battery 1 status
|
r |= 0x04; // battery 1 status
|
||||||
r |= 0x10; // battery 2 status
|
r |= 0x10; // battery 2 status
|
||||||
}
|
}
|
||||||
|
|
||||||
return r;
|
return r;
|
||||||
@ -112,7 +112,7 @@ READ32_MEMBER(konendev_state::ifu2_r)
|
|||||||
|
|
||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
{
|
{
|
||||||
r |= 0x11; // IFU2 version
|
r |= 0x11; // IFU2 version
|
||||||
}
|
}
|
||||||
|
|
||||||
return r;
|
return r;
|
||||||
@ -151,9 +151,9 @@ static ADDRESS_MAP_START( konendev_map, AS_PROGRAM, 32, konendev_state )
|
|||||||
AM_RANGE(0x78800004, 0x78800007) AM_READ(unk_78800004_r)
|
AM_RANGE(0x78800004, 0x78800007) AM_READ(unk_78800004_r)
|
||||||
AM_RANGE(0x78a00000, 0x78a0001f) AM_READ(unk_78a00000_r)
|
AM_RANGE(0x78a00000, 0x78a0001f) AM_READ(unk_78a00000_r)
|
||||||
AM_RANGE(0x78e00000, 0x78e00003) AM_READ(unk_78e00000_r)
|
AM_RANGE(0x78e00000, 0x78e00003) AM_READ(unk_78e00000_r)
|
||||||
// AM_RANGE(0x78000000, 0x78000003) AM_READNOP
|
// AM_RANGE(0x78000000, 0x78000003) AM_READNOP
|
||||||
// AM_RANGE(0x78100000, 0x7810001b) AM_RAM
|
// AM_RANGE(0x78100000, 0x7810001b) AM_RAM
|
||||||
// AM_RANGE(0x78a00014, 0x78a00017) AM_WRITENOP
|
// AM_RANGE(0x78a00014, 0x78a00017) AM_WRITENOP
|
||||||
AM_RANGE(0x79000000, 0x79000003) AM_DEVWRITE("gcu", k057714_device, fifo_w)
|
AM_RANGE(0x79000000, 0x79000003) AM_DEVWRITE("gcu", k057714_device, fifo_w)
|
||||||
AM_RANGE(0x79800000, 0x798000ff) AM_DEVREADWRITE("gcu", k057714_device, read, write)
|
AM_RANGE(0x79800000, 0x798000ff) AM_DEVREADWRITE("gcu", k057714_device, read, write)
|
||||||
AM_RANGE(0x7a000000, 0x7a01ffff) AM_RAM AM_SHARE("nvram0")
|
AM_RANGE(0x7a000000, 0x7a01ffff) AM_RAM AM_SHARE("nvram0")
|
||||||
@ -218,7 +218,7 @@ ROM_START( enchlamp )
|
|||||||
ROM_LOAD( "enl5r211.fmu.bin", 0x0000, 0x1800000, CRC(592c3c7f) SHA1(119b3c6223d656981c399c399d7edccfdbb50dc7) )
|
ROM_LOAD( "enl5r211.fmu.bin", 0x0000, 0x1800000, CRC(592c3c7f) SHA1(119b3c6223d656981c399c399d7edccfdbb50dc7) )
|
||||||
|
|
||||||
ROM_REGION32_BE( 0x100, "eeprom", 0 )
|
ROM_REGION32_BE( 0x100, "eeprom", 0 )
|
||||||
ROM_LOAD( "93c56.u98", 0x00, 0x100, CRC(b2521a6a) SHA1(f44711545bee7e9c772a3dc23b79f0ea8059ec50) ) // empty eeprom with Konami header
|
ROM_LOAD( "93c56.u98", 0x00, 0x100, CRC(b2521a6a) SHA1(f44711545bee7e9c772a3dc23b79f0ea8059ec50) ) // empty eeprom with Konami header
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
@ -348,7 +348,7 @@ ROM_START( konzero )
|
|||||||
ROM_REGION32_BE( 0x1800000, "flash", ROMREGION_ERASE00 )
|
ROM_REGION32_BE( 0x1800000, "flash", ROMREGION_ERASE00 )
|
||||||
|
|
||||||
ROM_REGION32_BE( 0x100, "eeprom", 0 )
|
ROM_REGION32_BE( 0x100, "eeprom", 0 )
|
||||||
ROM_LOAD( "93c56.u98", 0x00, 0x100, CRC(b2521a6a) SHA1(f44711545bee7e9c772a3dc23b79f0ea8059ec50) ) // empty eeprom with Konami header
|
ROM_LOAD( "93c56.u98", 0x00, 0x100, CRC(b2521a6a) SHA1(f44711545bee7e9c772a3dc23b79f0ea8059ec50) ) // empty eeprom with Konami header
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
DRIVER_INIT_MEMBER(konendev_state,konendev)
|
DRIVER_INIT_MEMBER(konendev_state,konendev)
|
||||||
@ -358,9 +358,9 @@ DRIVER_INIT_MEMBER(konendev_state,konendev)
|
|||||||
DRIVER_INIT_MEMBER(konendev_state,enchlamp)
|
DRIVER_INIT_MEMBER(konendev_state,enchlamp)
|
||||||
{
|
{
|
||||||
UINT32 *rom = (UINT32*)memregion("program")->base();
|
UINT32 *rom = (UINT32*)memregion("program")->base();
|
||||||
rom[0x24/4] = 0x00002743; // patch flash checksum for now
|
rom[0x24/4] = 0x00002743; // patch flash checksum for now
|
||||||
|
|
||||||
rom[0] = 0xd43eb930; // new checksum for program rom
|
rom[0] = 0xd43eb930; // new checksum for program rom
|
||||||
}
|
}
|
||||||
|
|
||||||
// has a flash dump?
|
// has a flash dump?
|
||||||
|
|||||||
@ -474,7 +474,7 @@ READ16_MEMBER(namcos10_state::sprot_r)
|
|||||||
READ16_MEMBER(namcos10_state::i2c_clock_r)
|
READ16_MEMBER(namcos10_state::i2c_clock_r)
|
||||||
{
|
{
|
||||||
UINT16 res = i2c_dev_clock & i2c_host_clock & 1;
|
UINT16 res = i2c_dev_clock & i2c_host_clock & 1;
|
||||||
// logerror("i2c_clock_r %d (%x)\n", res, space.device().safe_pc());
|
// logerror("i2c_clock_r %d (%x)\n", res, space.device().safe_pc());
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -482,14 +482,14 @@ READ16_MEMBER(namcos10_state::i2c_clock_r)
|
|||||||
WRITE16_MEMBER(namcos10_state::i2c_clock_w)
|
WRITE16_MEMBER(namcos10_state::i2c_clock_w)
|
||||||
{
|
{
|
||||||
COMBINE_DATA(&i2c_host_clock);
|
COMBINE_DATA(&i2c_host_clock);
|
||||||
// logerror("i2c_clock_w %d (%x)\n", data, space.device().safe_pc());
|
// logerror("i2c_clock_w %d (%x)\n", data, space.device().safe_pc());
|
||||||
i2c_update();
|
i2c_update();
|
||||||
}
|
}
|
||||||
|
|
||||||
READ16_MEMBER(namcos10_state::i2c_data_r)
|
READ16_MEMBER(namcos10_state::i2c_data_r)
|
||||||
{
|
{
|
||||||
UINT16 res = i2c_dev_data & i2c_host_data & 1;
|
UINT16 res = i2c_dev_data & i2c_host_data & 1;
|
||||||
// logerror("i2c_data_r %d (%x)\n", res, space.device().safe_pc());
|
// logerror("i2c_data_r %d (%x)\n", res, space.device().safe_pc());
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -497,7 +497,7 @@ READ16_MEMBER(namcos10_state::i2c_data_r)
|
|||||||
WRITE16_MEMBER(namcos10_state::i2c_data_w)
|
WRITE16_MEMBER(namcos10_state::i2c_data_w)
|
||||||
{
|
{
|
||||||
COMBINE_DATA(&i2c_host_data);
|
COMBINE_DATA(&i2c_host_data);
|
||||||
// logerror("i2c_data_w %d (%x)\n", data, space.device().safe_pc());
|
// logerror("i2c_data_w %d (%x)\n", data, space.device().safe_pc());
|
||||||
i2c_update();
|
i2c_update();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -524,7 +524,7 @@ void namcos10_state::i2c_update()
|
|||||||
i2cp_mode = I2CP_IDLE;
|
i2cp_mode = I2CP_IDLE;
|
||||||
} else if(clock && !i2c_prev_clock) {
|
} else if(clock && !i2c_prev_clock) {
|
||||||
i2c_byte |= (data << i2c_bit);
|
i2c_byte |= (data << i2c_bit);
|
||||||
// logerror("i2c_byte = %02x (%d)\n", i2c_byte, i2c_bit);
|
// logerror("i2c_byte = %02x (%d)\n", i2c_byte, i2c_bit);
|
||||||
i2c_bit--;
|
i2c_bit--;
|
||||||
if(i2c_bit < 0) {
|
if(i2c_bit < 0) {
|
||||||
i2cp_mode = I2CP_RECIEVE_ACK_1;
|
i2cp_mode = I2CP_RECIEVE_ACK_1;
|
||||||
@ -536,13 +536,13 @@ void namcos10_state::i2c_update()
|
|||||||
break;
|
break;
|
||||||
case I2CP_RECIEVE_ACK_1:
|
case I2CP_RECIEVE_ACK_1:
|
||||||
if(clock && !i2c_prev_clock) {
|
if(clock && !i2c_prev_clock) {
|
||||||
// logerror("i2c ack on\n");
|
// logerror("i2c ack on\n");
|
||||||
i2cp_mode = I2CP_RECIEVE_ACK_0;
|
i2cp_mode = I2CP_RECIEVE_ACK_0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case I2CP_RECIEVE_ACK_0:
|
case I2CP_RECIEVE_ACK_0:
|
||||||
if(!clock && i2c_prev_clock) {
|
if(!clock && i2c_prev_clock) {
|
||||||
// logerror("i2c ack off\n");
|
// logerror("i2c ack off\n");
|
||||||
i2c_dev_data = 1;
|
i2c_dev_data = 1;
|
||||||
data = i2c_host_data & 1;
|
data = i2c_host_data & 1;
|
||||||
i2c_byte = 0;
|
i2c_byte = 0;
|
||||||
|
|||||||
@ -1878,7 +1878,7 @@ static INPUT_PORTS_START( technodr )
|
|||||||
PORT_BIT( 0x7eff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT( 0x7eff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
|
|
||||||
PORT_START("IN23")
|
PORT_START("IN23")
|
||||||
PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_COIN1 ) // coin switch
|
PORT_BIT(0x0800, IP_ACTIVE_LOW, IPT_COIN1 ) // coin switch
|
||||||
PORT_BIT(0xf7ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
PORT_BIT(0xf7ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||||
|
|
||||||
PORT_START("SERVICE")
|
PORT_START("SERVICE")
|
||||||
@ -3000,7 +3000,7 @@ GAME( 1998, ehrgeizaa, ehrgeiz, coh700, namcos12, namcos12_state, namcos12, R
|
|||||||
GAME( 1998, ehrgeizja, ehrgeiz, coh700, namcos12, namcos12_state, namcos12, ROT0, "Square / Namco", "Ehrgeiz (Japan, EG1/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC021 */
|
GAME( 1998, ehrgeizja, ehrgeiz, coh700, namcos12, namcos12_state, namcos12, ROT0, "Square / Namco", "Ehrgeiz (Japan, EG1/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC021 */
|
||||||
GAME( 1998, mdhorse, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "MOSS / Namco", "Derby Quiz My Dream Horse (Japan, MDH1/VER.A2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* KC035 */
|
GAME( 1998, mdhorse, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "MOSS / Namco", "Derby Quiz My Dream Horse (Japan, MDH1/VER.A2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* KC035 */
|
||||||
GAME( 1998, sws98, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "Namco", "Super World Stadium '98 (Japan, SS81/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC0?? */
|
GAME( 1998, sws98, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "Namco", "Super World Stadium '98 (Japan, SS81/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC0?? */
|
||||||
GAME( 1998, technodr, 0, technodr, technodr, namcos12_state, namcos12, ROT0, "Namco", "Techno Drive (Japan, TD2/VER.B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* KC056 */
|
GAME( 1998, technodr, 0, technodr, technodr, namcos12_state, namcos12, ROT0, "Namco", "Techno Drive (Japan, TD2/VER.B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) /* KC056 */
|
||||||
GAME( 1998, tenkomor, 0, coh700, namcos12, namcos12_state, namcos12, ROT90,"Namco", "Tenkomori Shooting (Asia, TKM2/VER.A1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC036 */
|
GAME( 1998, tenkomor, 0, coh700, namcos12, namcos12_state, namcos12, ROT90,"Namco", "Tenkomori Shooting (Asia, TKM2/VER.A1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC036 */
|
||||||
GAME( 1998, tenkomorja,tenkomor, coh700, namcos12, namcos12_state, namcos12, ROT90,"Namco", "Tenkomori Shooting (Japan, TKM1/VER.A1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC036 */
|
GAME( 1998, tenkomorja,tenkomor, coh700, namcos12, namcos12_state, namcos12, ROT90,"Namco", "Tenkomori Shooting (Japan, TKM1/VER.A1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC036 */
|
||||||
GAME( 1998, fgtlayer, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "Arika / Namco", "Fighting Layer (Japan, FTL1/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC037 */
|
GAME( 1998, fgtlayer, 0, coh700, namcos12, namcos12_state, namcos12, ROT0, "Arika / Namco", "Fighting Layer (Japan, FTL1/VER.A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) /* KC037 */
|
||||||
|
|||||||
@ -5091,7 +5091,7 @@ ROM_START( otrigger )
|
|||||||
NAOMI_BIOS
|
NAOMI_BIOS
|
||||||
NAOMI_DEFAULT_EEPROM
|
NAOMI_DEFAULT_EEPROM
|
||||||
|
|
||||||
ROM_REGION( 0x10000, "io_board", 0)
|
ROM_REGION( 0x10000, "io_board", 0)
|
||||||
ROM_LOAD("epr-22084.ic3", 0x0000, 0x10000, CRC(18cf58bb) SHA1(1494f8215231929e41bbe2a133658d01882fbb0f) )
|
ROM_LOAD("epr-22084.ic3", 0x0000, 0x10000, CRC(18cf58bb) SHA1(1494f8215231929e41bbe2a133658d01882fbb0f) )
|
||||||
|
|
||||||
ROM_REGION( 0xa000000, "rom_board", ROMREGION_ERASEFF)
|
ROM_REGION( 0xa000000, "rom_board", ROMREGION_ERASEFF)
|
||||||
|
|||||||
@ -3437,16 +3437,16 @@ ROM_END
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
ROM_START( pkii_dm )
|
ROM_START( pkii_dm )
|
||||||
ROM_REGION( 0x10000, "maincpu", 0 ) // no stack, call's RET go to PC=0
|
ROM_REGION( 0x10000, "maincpu", 0 ) // no stack, call's RET go to PC=0
|
||||||
ROM_LOAD( "12.u12", 0x0000, 0x1000, CRC(048e70d8) SHA1(f0eb16ba68455638de2ce68f51f305a13d0df287) )
|
ROM_LOAD( "12.u12", 0x0000, 0x1000, CRC(048e70d8) SHA1(f0eb16ba68455638de2ce68f51f305a13d0df287) )
|
||||||
ROM_LOAD( "13.u18", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
|
ROM_LOAD( "13.u18", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
|
||||||
|
|
||||||
ROM_REGION( 0x1000, "gfx", 0 )
|
ROM_REGION( 0x1000, "gfx", 0 )
|
||||||
ROM_FILL( 0x0000, 0x0800, 0xff )
|
ROM_FILL( 0x0000, 0x0800, 0xff )
|
||||||
ROM_LOAD( "cgw-f506.u31", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) )
|
ROM_LOAD( "cgw-f506.u31", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) )
|
||||||
|
|
||||||
ROM_REGION( 0x0200, "proms", 0 )
|
ROM_REGION( 0x0200, "proms", 0 )
|
||||||
ROM_LOAD( "63s141n.u51", 0x0000, 0x0100, CRC(88302127) SHA1(aed1273974917673405f1234ab64e6f8b3856c34) )
|
ROM_LOAD( "63s141n.u51", 0x0000, 0x0100, CRC(88302127) SHA1(aed1273974917673405f1234ab64e6f8b3856c34) )
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -1,11 +1,11 @@
|
|||||||
// license:BSD-3-Clause
|
// license:BSD-3-Clause
|
||||||
// copyright-holders:Ville Linde
|
// copyright-holders:Ville Linde
|
||||||
/*
|
/*
|
||||||
Rolling Extreme
|
Rolling Extreme
|
||||||
Gaelco, 1999
|
Gaelco, 1999
|
||||||
|
|
||||||
PCB Layout
|
PCB Layout
|
||||||
----------
|
----------
|
||||||
|
|
||||||
REF.991015
|
REF.991015
|
||||||
|--------------------------------------------------|
|
|--------------------------------------------------|
|
||||||
@ -39,33 +39,33 @@
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
MP Interrupts:
|
MP Interrupts:
|
||||||
|
|
||||||
External Interrupt 1: 0x4003ef78
|
External Interrupt 1: 0x4003ef78
|
||||||
External Interrupt 2: -
|
External Interrupt 2: -
|
||||||
External Interrupt 3: 0x40041d30
|
External Interrupt 3: 0x40041d30
|
||||||
Memory Fault: 0x40043ae8
|
Memory Fault: 0x40043ae8
|
||||||
|
|
||||||
PP0 Interrupts:
|
PP0 Interrupts:
|
||||||
Task: 0x400010a0 / 0x400001a0
|
Task: 0x400010a0 / 0x400001a0
|
||||||
|
|
||||||
PP1 Interrupts:
|
PP1 Interrupts:
|
||||||
Task: 0x4004c6e8
|
Task: 0x4004c6e8
|
||||||
|
|
||||||
|
|
||||||
Memory locations:
|
Memory locations:
|
||||||
|
|
||||||
[0x00000084] PP0 busy flag?
|
[0x00000084] PP0 busy flag?
|
||||||
[0x00000090] PP0 fifo write pointer?
|
[0x00000090] PP0 fifo write pointer?
|
||||||
[0x00000094] PP0 fifo read pointer?
|
[0x00000094] PP0 fifo read pointer?
|
||||||
[0x00000320] 2000000-TCOUNT in XINT3 handler
|
[0x00000320] 2000000-TCOUNT in XINT3 handler
|
||||||
[0x01010668] copied from (word)0xb0000004 in XINT3 handler
|
[0x01010668] copied from (word)0xb0000004 in XINT3 handler
|
||||||
|
|
||||||
|
|
||||||
Texture ROM decode:
|
Texture ROM decode:
|
||||||
|
|
||||||
{ic45} {ic47} {ic58} {ic60}
|
{ic45} {ic47} {ic58} {ic60}
|
||||||
[2,0][0,0] [2,1][0,1] [3,0][1,0] [3,1][1,1]
|
[2,0][0,0] [2,1][0,1] [3,0][1,0] [3,1][1,1]
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -250,7 +250,7 @@ READ32_MEMBER(rollext_state::a0000000_r)
|
|||||||
{
|
{
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
case 0: // ??
|
case 0: // ??
|
||||||
{
|
{
|
||||||
UINT32 data = 0x20200;
|
UINT32 data = 0x20200;
|
||||||
|
|
||||||
@ -276,9 +276,9 @@ READ32_MEMBER(rollext_state::b0000000_r)
|
|||||||
{
|
{
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
case 0: // ??
|
case 0: // ??
|
||||||
return 0xffff;
|
return 0xffff;
|
||||||
case 1: // ??
|
case 1: // ??
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -290,8 +290,8 @@ READ32_MEMBER(rollext_state::b0000000_r)
|
|||||||
static ADDRESS_MAP_START(memmap, AS_PROGRAM, 32, rollext_state)
|
static ADDRESS_MAP_START(memmap, AS_PROGRAM, 32, rollext_state)
|
||||||
AM_RANGE(0x40000000, 0x40ffffff) AM_RAM AM_SHARE("main_ram")
|
AM_RANGE(0x40000000, 0x40ffffff) AM_RAM AM_SHARE("main_ram")
|
||||||
AM_RANGE(0x60000000, 0x600fffff) AM_RAM AM_SHARE("disp_ram")
|
AM_RANGE(0x60000000, 0x600fffff) AM_RAM AM_SHARE("disp_ram")
|
||||||
AM_RANGE(0x80000000, 0x8000ffff) AM_RAM AM_SHARE("palette_ram")
|
AM_RANGE(0x80000000, 0x8000ffff) AM_RAM AM_SHARE("palette_ram")
|
||||||
AM_RANGE(0x90000000, 0x9007ffff) AM_RAM AM_SHARE("texture_mask")
|
AM_RANGE(0x90000000, 0x9007ffff) AM_RAM AM_SHARE("texture_mask")
|
||||||
AM_RANGE(0xa0000000, 0xa00000ff) AM_READWRITE(a0000000_r, a0000000_w)
|
AM_RANGE(0xa0000000, 0xa00000ff) AM_READWRITE(a0000000_r, a0000000_w)
|
||||||
AM_RANGE(0xb0000000, 0xb0000007) AM_READ(b0000000_r)
|
AM_RANGE(0xb0000000, 0xb0000007) AM_READ(b0000000_r)
|
||||||
AM_RANGE(0xc0000000, 0xc03fffff) AM_ROM AM_REGION("rom1", 0)
|
AM_RANGE(0xc0000000, 0xc03fffff) AM_ROM AM_REGION("rom1", 0)
|
||||||
@ -355,7 +355,7 @@ ROM_START(rollext)
|
|||||||
ROM_REGION32_BE(0x400000, "rom1", 0)
|
ROM_REGION32_BE(0x400000, "rom1", 0)
|
||||||
ROM_LOAD32_DWORD("roe.ic38", 0x000000, 0x400000, CRC(d9bcfb7c) SHA1(eda9870881732d4dc7cdacb65c6d40af3451dc9d))
|
ROM_LOAD32_DWORD("roe.ic38", 0x000000, 0x400000, CRC(d9bcfb7c) SHA1(eda9870881732d4dc7cdacb65c6d40af3451dc9d))
|
||||||
|
|
||||||
ROM_REGION32_BE(0x2000000, "texture", 0) // Texture ROMs
|
ROM_REGION32_BE(0x2000000, "texture", 0) // Texture ROMs
|
||||||
ROM_LOAD32_BYTE("roe.ic45", 0x000000, 0x800000, CRC(0f7fe365) SHA1(ed50fd2b76840eac6ce394a0c748109f615b775a))
|
ROM_LOAD32_BYTE("roe.ic45", 0x000000, 0x800000, CRC(0f7fe365) SHA1(ed50fd2b76840eac6ce394a0c748109f615b775a))
|
||||||
ROM_LOAD32_BYTE("roe.ic47", 0x000001, 0x800000, CRC(44d7ccee) SHA1(2fec682396e4cca704bd1237016acec0e7b4b428))
|
ROM_LOAD32_BYTE("roe.ic47", 0x000001, 0x800000, CRC(44d7ccee) SHA1(2fec682396e4cca704bd1237016acec0e7b4b428))
|
||||||
ROM_LOAD32_BYTE("roe.ic58", 0x000002, 0x800000, CRC(67ad4561) SHA1(56f41b4ebd827fec49902f377c5ed054c02d9e6c))
|
ROM_LOAD32_BYTE("roe.ic58", 0x000002, 0x800000, CRC(67ad4561) SHA1(56f41b4ebd827fec49902f377c5ed054c02d9e6c))
|
||||||
|
|||||||
@ -346,7 +346,7 @@ static MACHINE_CONFIG_START( simpsons, simpsons_state )
|
|||||||
MCFG_SCREEN_ADD("screen", RASTER)
|
MCFG_SCREEN_ADD("screen", RASTER)
|
||||||
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/3, 528, 112, 400, 256, 16, 240)
|
||||||
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
// 6MHz dotclock is more realistic, however needs drawing updates. replace when ready
|
||||||
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
// MCFG_SCREEN_RAW_PARAMS(XTAL_24MHz/4, 396, hbend, hbstart, 256, 16, 240)
|
||||||
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
|
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
|
||||||
MCFG_SCREEN_UPDATE_DRIVER(simpsons_state, screen_update_simpsons)
|
MCFG_SCREEN_UPDATE_DRIVER(simpsons_state, screen_update_simpsons)
|
||||||
MCFG_SCREEN_PALETTE("palette")
|
MCFG_SCREEN_PALETTE("palette")
|
||||||
|
|||||||
@ -272,7 +272,6 @@ PALETTE_INIT_MEMBER(spcforce_state, spcforce)
|
|||||||
|
|
||||||
INTERRUPT_GEN_MEMBER(spcforce_state::vblank_irq)
|
INTERRUPT_GEN_MEMBER(spcforce_state::vblank_irq)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(m_irq_mask)
|
if(m_irq_mask)
|
||||||
device.execute().set_input_line(3, HOLD_LINE);
|
device.execute().set_input_line(3, HOLD_LINE);
|
||||||
}
|
}
|
||||||
|
|||||||
@ -1897,15 +1897,15 @@ static INPUT_PORTS_START( kbashk )
|
|||||||
PORT_CONFSETTING( 0x0040, DEF_STR( Hong_Kong ) )
|
PORT_CONFSETTING( 0x0040, DEF_STR( Hong_Kong ) )
|
||||||
PORT_CONFSETTING( 0x0050, DEF_STR( Taiwan ) )
|
PORT_CONFSETTING( 0x0050, DEF_STR( Taiwan ) )
|
||||||
PORT_CONFSETTING( 0x0060, DEF_STR( Southeast_Asia ) )
|
PORT_CONFSETTING( 0x0060, DEF_STR( Southeast_Asia ) )
|
||||||
PORT_CONFSETTING( 0x0070, DEF_STR( Unused ) )
|
PORT_CONFSETTING( 0x0070, DEF_STR( Unused ) )
|
||||||
PORT_CONFSETTING( 0x0080, DEF_STR( Japan ) ) // no Taito license
|
PORT_CONFSETTING( 0x0080, DEF_STR( Japan ) ) // no Taito license
|
||||||
PORT_CONFSETTING( 0x0090, DEF_STR( Unused ) )
|
PORT_CONFSETTING( 0x0090, DEF_STR( Unused ) )
|
||||||
PORT_CONFSETTING( 0x00a0, DEF_STR( Unused ) )
|
PORT_CONFSETTING( 0x00a0, DEF_STR( Unused ) )
|
||||||
PORT_CONFSETTING( 0x00b0, DEF_STR( Korea ) )
|
PORT_CONFSETTING( 0x00b0, DEF_STR( Korea ) )
|
||||||
PORT_CONFSETTING( 0x00c0, DEF_STR( Hong_Kong ))
|
PORT_CONFSETTING( 0x00c0, DEF_STR( Hong_Kong ))
|
||||||
PORT_CONFSETTING( 0x00d0, DEF_STR( Taiwan ))
|
PORT_CONFSETTING( 0x00d0, DEF_STR( Taiwan ))
|
||||||
PORT_CONFSETTING( 0x00e0, DEF_STR( Southeast_Asia ))
|
PORT_CONFSETTING( 0x00e0, DEF_STR( Southeast_Asia ))
|
||||||
PORT_CONFSETTING( 0x00f0, DEF_STR( Unused ) )
|
PORT_CONFSETTING( 0x00f0, DEF_STR( Unused ) )
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
static INPUT_PORTS_START( kbash2 )
|
static INPUT_PORTS_START( kbash2 )
|
||||||
|
|||||||
@ -2454,7 +2454,7 @@ MACHINE_CONFIG_END
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
// there is a socket next to the main bios roms for updates, this is what the update region is.
|
// there is a socket next to the main bios roms for updates, this is what the update region is.
|
||||||
|
|
||||||
|
|
||||||
ROM_START( gauntleg )
|
ROM_START( gauntleg )
|
||||||
|
|||||||
@ -274,4 +274,3 @@ ROM_END
|
|||||||
/* GAME drivers **************************************************************/
|
/* GAME drivers **************************************************************/
|
||||||
|
|
||||||
GAME( 1989, xyonix, 0, xyonix, xyonix, driver_device, 0, ROT0, "Philko", "Xyonix", MACHINE_SUPPORTS_SAVE )
|
GAME( 1989, xyonix, 0, xyonix, xyonix, driver_device, 0, ROT0, "Philko", "Xyonix", MACHINE_SUPPORTS_SAVE )
|
||||||
|
|
||||||
|
|||||||
@ -107,4 +107,3 @@ public:
|
|||||||
DECLARE_WRITE16_MEMBER(wrally2_adc_cs);
|
DECLARE_WRITE16_MEMBER(wrally2_adc_cs);
|
||||||
DECLARE_CUSTOM_INPUT_MEMBER(wrally2_analog_bit_r);
|
DECLARE_CUSTOM_INPUT_MEMBER(wrally2_analog_bit_r);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -125,7 +125,7 @@ public:
|
|||||||
m_com_ram(*this, "com_ram"),
|
m_com_ram(*this, "com_ram"),
|
||||||
m_gfxdecode(*this, "gfxdecode"),
|
m_gfxdecode(*this, "gfxdecode"),
|
||||||
m_screen(*this, "screen"),
|
m_screen(*this, "screen"),
|
||||||
m_palette(*this, "palette") { }
|
m_palette(*this, "palette") { }
|
||||||
|
|
||||||
required_device<mips3_device> m_maincpu;
|
required_device<mips3_device> m_maincpu;
|
||||||
required_device<v53a_device> m_audiocpu;
|
required_device<v53a_device> m_audiocpu;
|
||||||
|
|||||||
@ -1,75 +1,75 @@
|
|||||||
<?xml version="1.0"?>
|
<?xml version="1.0"?>
|
||||||
<mamelayout version="2">
|
<mamelayout version="2">
|
||||||
|
|
||||||
<!-- 7segs -->
|
<!-- 7segs -->
|
||||||
<element name="digit">
|
<element name="digit">
|
||||||
<led7seg>
|
<led7seg>
|
||||||
<color red="1.0" green="0.0" blue="0.0"/>
|
<color red="1.0" green="0.0" blue="0.0"/>
|
||||||
</led7seg>
|
</led7seg>
|
||||||
</element>
|
</element>
|
||||||
|
|
||||||
<!-- Led -->
|
<!-- Led -->
|
||||||
<element name="led" defstate="0">
|
<element name="led" defstate="0">
|
||||||
<rect>
|
<rect>
|
||||||
<bounds x="0" y="0" width="1.5" height="1.0"/>
|
<bounds x="0" y="0" width="1.5" height="1.0"/>
|
||||||
<color red="1.0" green="0.96" blue="0.94"/>
|
<color red="1.0" green="0.96" blue="0.94"/>
|
||||||
</rect>
|
</rect>
|
||||||
<rect state="0">
|
<rect state="0">
|
||||||
<bounds x="0.05" y="0.05" width="1.4" height="0.9"/>
|
<bounds x="0.05" y="0.05" width="1.4" height="0.9"/>
|
||||||
<color red="0.5" green="0.0" blue="0.0"/>
|
<color red="0.5" green="0.0" blue="0.0"/>
|
||||||
</rect>
|
</rect>
|
||||||
<rect state="1">
|
<rect state="1">
|
||||||
<bounds x="0.05" y="0.05" width="1.4" height="0.9"/>
|
<bounds x="0.05" y="0.05" width="1.4" height="0.9"/>
|
||||||
<color red="1.0" green="0.0" blue="0.0"/>
|
<color red="1.0" green="0.0" blue="0.0"/>
|
||||||
</rect>
|
</rect>
|
||||||
</element>
|
</element>
|
||||||
|
|
||||||
<!-- Lamp -->
|
<!-- Lamp -->
|
||||||
<element name="lamp" defstate="0">
|
<element name="lamp" defstate="0">
|
||||||
<disk state="0">
|
<disk state="0">
|
||||||
<color red="0.2" green="0.0" blue="0.0"/>
|
<color red="0.2" green="0.0" blue="0.0"/>
|
||||||
</disk>
|
</disk>
|
||||||
<disk state="1">
|
<disk state="1">
|
||||||
<color red="1.0" green="0.0" blue="0.0"/>
|
<color red="1.0" green="0.0" blue="0.0"/>
|
||||||
</disk>
|
</disk>
|
||||||
</element>
|
</element>
|
||||||
|
|
||||||
<view name="Score Board (No Artwork)">
|
<view name="Score Board (No Artwork)">
|
||||||
<!-- P1 score -->
|
<!-- P1 score -->
|
||||||
<backdrop name="digit0" element="digit">
|
<backdrop name="digit0" element="digit">
|
||||||
<bounds x="0" y="0" width="1" height="2"/>
|
<bounds x="0" y="0" width="1" height="2"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
<backdrop name="digit1" element="digit">
|
<backdrop name="digit1" element="digit">
|
||||||
<bounds x="1" y="0" width="1" height="2"/>
|
<bounds x="1" y="0" width="1" height="2"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
|
|
||||||
<!-- P1 goal lamp -->
|
<!-- P1 goal lamp -->
|
||||||
<backdrop name="lamp0" element="lamp">
|
<backdrop name="lamp0" element="lamp">
|
||||||
<bounds x="0.75" y="-0.5" width="0.5" height="0.5"/>
|
<bounds x="0.75" y="-0.5" width="0.5" height="0.5"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
|
|
||||||
<!-- Period being played -->
|
<!-- Period being played -->
|
||||||
<backdrop name="led0" element="led">
|
<backdrop name="led0" element="led">
|
||||||
<bounds x="3.0" y="-0.33" width="0.5" height="0.33"/>
|
<bounds x="3.0" y="-0.33" width="0.5" height="0.33"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
<backdrop name="led1" element="led">
|
<backdrop name="led1" element="led">
|
||||||
<bounds x="3.5" y="-0.33" width="0.5" height="0.33"/>
|
<bounds x="3.5" y="-0.33" width="0.5" height="0.33"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
<backdrop name="led2" element="led">
|
<backdrop name="led2" element="led">
|
||||||
<bounds x="4.0" y="-0.33" width="0.5" height="0.33"/>
|
<bounds x="4.0" y="-0.33" width="0.5" height="0.33"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
|
|
||||||
<!-- P2 score -->
|
<!-- P2 score -->
|
||||||
<backdrop name="digit2" element="digit">
|
<backdrop name="digit2" element="digit">
|
||||||
<bounds x="5.5" y="0" width="1" height="2"/>
|
<bounds x="5.5" y="0" width="1" height="2"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
<backdrop name="digit3" element="digit">
|
<backdrop name="digit3" element="digit">
|
||||||
<bounds x="6.5" y="0" width="1" height="2"/>
|
<bounds x="6.5" y="0" width="1" height="2"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
|
|
||||||
<!-- P2 goal lamp -->
|
<!-- P2 goal lamp -->
|
||||||
<backdrop name="lamp1" element="lamp">
|
<backdrop name="lamp1" element="lamp">
|
||||||
<bounds x="6.25" y="-0.5" width="0.5" height="0.5"/>
|
<bounds x="6.25" y="-0.5" width="0.5" height="0.5"/>
|
||||||
</backdrop>
|
</backdrop>
|
||||||
</view>
|
</view>
|
||||||
</mamelayout>
|
</mamelayout>
|
||||||
|
|||||||
@ -119,4 +119,3 @@ void dc_controller_device::device_start()
|
|||||||
port[i] = ioport(port_tag[i]);
|
port[i] = ioport(port_tag[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -731,7 +731,7 @@ READ32_MEMBER( iteagle_ide_device::ide_r )
|
|||||||
{
|
{
|
||||||
UINT32 result = m_ide->read_cs0(space, offset, mem_mask);
|
UINT32 result = m_ide->read_cs0(space, offset, mem_mask);
|
||||||
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
||||||
if (m_irq_num!=-1 && m_irq_status==1) {
|
if (m_irq_num!=-1 && m_irq_status==1) {
|
||||||
m_irq_status = 0;
|
m_irq_status = 0;
|
||||||
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
||||||
if (LOG_IDE)
|
if (LOG_IDE)
|
||||||
@ -746,7 +746,7 @@ WRITE32_MEMBER( iteagle_ide_device::ide_w )
|
|||||||
{
|
{
|
||||||
m_ide->write_cs0(space, offset, data, mem_mask);
|
m_ide->write_cs0(space, offset, data, mem_mask);
|
||||||
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
||||||
if (m_irq_num!=-1 && m_irq_status==1) {
|
if (m_irq_num!=-1 && m_irq_status==1) {
|
||||||
m_irq_status = 0;
|
m_irq_status = 0;
|
||||||
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
||||||
if (LOG_IDE)
|
if (LOG_IDE)
|
||||||
@ -783,7 +783,7 @@ READ32_MEMBER( iteagle_ide_device::ide2_r )
|
|||||||
{
|
{
|
||||||
UINT32 result = m_ide2->read_cs0(space, offset, mem_mask);
|
UINT32 result = m_ide2->read_cs0(space, offset, mem_mask);
|
||||||
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
||||||
if (m_irq_num!=-1 && m_irq_status==1) {
|
if (m_irq_num!=-1 && m_irq_status==1) {
|
||||||
m_irq_status = 0;
|
m_irq_status = 0;
|
||||||
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
||||||
if (LOG_IDE_CTRL)
|
if (LOG_IDE_CTRL)
|
||||||
@ -798,7 +798,7 @@ WRITE32_MEMBER( iteagle_ide_device::ide2_w )
|
|||||||
{
|
{
|
||||||
m_ide2->write_cs0(space, offset, data, mem_mask);
|
m_ide2->write_cs0(space, offset, data, mem_mask);
|
||||||
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
if (offset==0x4/4 && ACCESSING_BITS_24_31) {
|
||||||
if (m_irq_num!=-1 && m_irq_status==1) {
|
if (m_irq_num!=-1 && m_irq_status==1) {
|
||||||
m_irq_status = 0;
|
m_irq_status = 0;
|
||||||
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
||||||
if (LOG_IDE_CTRL)
|
if (LOG_IDE_CTRL)
|
||||||
|
|||||||
@ -220,7 +220,7 @@ int gf2_reducer::gf2_reduce(UINT64 num)const
|
|||||||
// static UINT16 panikuru_nonlinear_calc(UINT64 previous_cipherwords, UINT64 previous_plainwords, const gf2_reducer& reducer)
|
// static UINT16 panikuru_nonlinear_calc(UINT64 previous_cipherwords, UINT64 previous_plainwords, const gf2_reducer& reducer)
|
||||||
// {
|
// {
|
||||||
// return ((reducer.gf2_reduce(0x0000000088300281ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000004600281ull & previous_plainwords))
|
// return ((reducer.gf2_reduce(0x0000000088300281ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000000004600281ull & previous_plainwords))
|
||||||
// & (reducer.gf2_reduce(0x0000a13140090000ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000806240090000ull & previous_plainwords))) << 2;
|
// & (reducer.gf2_reduce(0x0000a13140090000ull & previous_cipherwords) ^ reducer.gf2_reduce(0x0000806240090000ull & previous_plainwords))) << 2;
|
||||||
// }
|
// }
|
||||||
|
|
||||||
static UINT16 chocovdr_nonlinear_calc(UINT64 previous_cipherwords, UINT64 previous_plainwords, const gf2_reducer& reducer)
|
static UINT16 chocovdr_nonlinear_calc(UINT64 previous_cipherwords, UINT64 previous_plainwords, const gf2_reducer& reducer)
|
||||||
|
|||||||
@ -1527,22 +1527,22 @@ void slqz3_decrypt(running_machine &machine)
|
|||||||
}
|
}
|
||||||
|
|
||||||
static const UINT8 fruitpar_tab[0x100] = {
|
static const UINT8 fruitpar_tab[0x100] = {
|
||||||
0xe9, 0x0b, 0x95, 0x7e, 0x0d, 0x7d, 0x5c, 0x1e, 0x81, 0x0e, 0xa6, 0xd4, 0x8e, 0x90, 0xd8, 0x54,
|
0xe9, 0x0b, 0x95, 0x7e, 0x0d, 0x7d, 0x5c, 0x1e, 0x81, 0x0e, 0xa6, 0xd4, 0x8e, 0x90, 0xd8, 0x54,
|
||||||
0x27, 0x65, 0x51, 0x08, 0x1c, 0xa0, 0x3b, 0x51, 0x83, 0x60, 0x93, 0x02, 0x64, 0x69, 0x77, 0x1a,
|
0x27, 0x65, 0x51, 0x08, 0x1c, 0xa0, 0x3b, 0x51, 0x83, 0x60, 0x93, 0x02, 0x64, 0x69, 0x77, 0x1a,
|
||||||
0xa4, 0x03, 0xb0, 0xc2, 0x34, 0x18, 0x80, 0x87, 0x7a, 0x88, 0xad, 0xd9, 0xff, 0xd0, 0xce, 0xc4,
|
0xa4, 0x03, 0xb0, 0xc2, 0x34, 0x18, 0x80, 0x87, 0x7a, 0x88, 0xad, 0xd9, 0xff, 0xd0, 0xce, 0xc4,
|
||||||
0x5b, 0xdc, 0xd5, 0xed, 0x5e, 0x29, 0xdd, 0xcf, 0x80, 0x1f, 0x36, 0x38, 0x8b, 0xae, 0xae, 0xfe,
|
0x5b, 0xdc, 0xd5, 0xed, 0x5e, 0x29, 0xdd, 0xcf, 0x80, 0x1f, 0x36, 0x38, 0x8b, 0xae, 0xae, 0xfe,
|
||||||
0x87, 0x27, 0x22, 0x07, 0xe6, 0x5d, 0x46, 0x79, 0xf1, 0xfc, 0xb1, 0x3d, 0x72, 0x29, 0x2c, 0xba,
|
0x87, 0x27, 0x22, 0x07, 0xe6, 0x5d, 0x46, 0x79, 0xf1, 0xfc, 0xb1, 0x3d, 0x72, 0x29, 0x2c, 0xba,
|
||||||
0xa3, 0x5b, 0x3c, 0xcf, 0x57, 0x79, 0xed, 0x12, 0x67, 0x34, 0xe1, 0x48, 0x5f, 0xa7, 0x9a, 0x24,
|
0xa3, 0x5b, 0x3c, 0xcf, 0x57, 0x79, 0xed, 0x12, 0x67, 0x34, 0xe1, 0x48, 0x5f, 0xa7, 0x9a, 0x24,
|
||||||
0x6a, 0x2e, 0x04, 0x44, 0x7b, 0x84, 0x46, 0x6a, 0xbd, 0x20, 0xca, 0xf7, 0x3e, 0xd1, 0x8b, 0xad,
|
0x6a, 0x2e, 0x04, 0x44, 0x7b, 0x84, 0x46, 0x6a, 0xbd, 0x20, 0xca, 0xf7, 0x3e, 0xd1, 0x8b, 0xad,
|
||||||
0xd7, 0x98, 0x9e, 0xa6, 0x5e, 0xc6, 0x04, 0x90, 0x0f, 0x57, 0xae, 0x2b, 0x38, 0x8d, 0xd2, 0x0c,
|
0xd7, 0x98, 0x9e, 0xa6, 0x5e, 0xc6, 0x04, 0x90, 0x0f, 0x57, 0xae, 0x2b, 0x38, 0x8d, 0xd2, 0x0c,
|
||||||
0x25, 0xd1, 0x6d, 0x73, 0x4b, 0xc6, 0x19, 0xd3, 0xb8, 0xae, 0x11, 0x01, 0xba, 0x02, 0x82, 0x17,
|
0x25, 0xd1, 0x6d, 0x73, 0x4b, 0xc6, 0x19, 0xd3, 0xb8, 0xae, 0x11, 0x01, 0xba, 0x02, 0x82, 0x17,
|
||||||
0xcf, 0x4d, 0x14, 0x6a, 0xcd, 0x4a, 0xb9, 0xc1, 0x52, 0x3e, 0xb5, 0xd8, 0x6f, 0x98, 0xee, 0x16,
|
0xcf, 0x4d, 0x14, 0x6a, 0xcd, 0x4a, 0xb9, 0xc1, 0x52, 0x3e, 0xb5, 0xd8, 0x6f, 0x98, 0xee, 0x16,
|
||||||
0x90, 0xc6, 0x76, 0x8a, 0xaf, 0x5a, 0x56, 0x2b, 0xb9, 0x5e, 0x9e, 0x51, 0x40, 0xf4, 0xaa, 0x6e,
|
0x90, 0xc6, 0x76, 0x8a, 0xaf, 0x5a, 0x56, 0x2b, 0xb9, 0x5e, 0x9e, 0x51, 0x40, 0xf4, 0xaa, 0x6e,
|
||||||
0x63, 0x32, 0xb6, 0x12, 0xfb, 0x3c, 0xa5, 0x1f, 0x07, 0xa3, 0x0d, 0x49, 0x5a, 0xfe, 0x88, 0xd1,
|
0x63, 0x32, 0xb6, 0x12, 0xfb, 0x3c, 0xa5, 0x1f, 0x07, 0xa3, 0x0d, 0x49, 0x5a, 0xfe, 0x88, 0xd1,
|
||||||
0x83, 0xc7, 0x37, 0x82, 0xfd, 0x78, 0x97, 0xec, 0x98, 0xe6, 0x88, 0xe0, 0x27, 0xde, 0x9a, 0x2c,
|
0x83, 0xc7, 0x37, 0x82, 0xfd, 0x78, 0x97, 0xec, 0x98, 0xe6, 0x88, 0xe0, 0x27, 0xde, 0x9a, 0x2c,
|
||||||
0x6b, 0xfd, 0x9b, 0x98, 0x40, 0xd5, 0x5f, 0x20, 0x06, 0x3e, 0xcf, 0x74, 0x52, 0xf9, 0x35, 0xae,
|
0x6b, 0xfd, 0x9b, 0x98, 0x40, 0xd5, 0x5f, 0x20, 0x06, 0x3e, 0xcf, 0x74, 0x52, 0xf9, 0x35, 0xae,
|
||||||
0xd6, 0x8c, 0xc7, 0x53, 0x8e, 0x59, 0x71, 0x8c, 0x2d, 0x00, 0xe7, 0xa5, 0xc7, 0xf8, 0xeb, 0xc7,
|
0xd6, 0x8c, 0xc7, 0x53, 0x8e, 0x59, 0x71, 0x8c, 0x2d, 0x00, 0xe7, 0xa5, 0xc7, 0xf8, 0xeb, 0xc7,
|
||||||
0xbf, 0x68, 0xdc, 0xf2, 0xf4, 0x4c, 0x80, 0x3e, 0x27, 0xc5, 0x13, 0x52, 0xb0, 0xc0, 0x90, 0x2d
|
0xbf, 0x68, 0xdc, 0xf2, 0xf4, 0x4c, 0x80, 0x3e, 0x27, 0xc5, 0x13, 0x52, 0xb0, 0xc0, 0x90, 0x2d
|
||||||
};
|
};
|
||||||
|
|
||||||
void fruitpar_decrypt(running_machine &machine)
|
void fruitpar_decrypt(running_machine &machine)
|
||||||
|
|||||||
@ -99,7 +99,7 @@ multmega // 1994 Sega Multi-Mega (Europe)
|
|||||||
32xe
|
32xe
|
||||||
32xj
|
32xj
|
||||||
32x_scd // 1994 Sega Sega CD (USA w/32X addon)
|
32x_scd // 1994 Sega Sega CD (USA w/32X addon)
|
||||||
segapm // 1996 Sega Picture Magic (32x type hardware)
|
segapm // 1996 Sega Picture Magic (32x type hardware)
|
||||||
|
|
||||||
saturnjp // 1994 Sega Saturn (Japan)
|
saturnjp // 1994 Sega Saturn (Japan)
|
||||||
saturn // 1995 Sega Saturn (USA)
|
saturn // 1995 Sega Saturn (USA)
|
||||||
@ -2729,4 +2729,3 @@ bitgrphb
|
|||||||
tvgame
|
tvgame
|
||||||
aussieby
|
aussieby
|
||||||
hp_ipc
|
hp_ipc
|
||||||
|
|
||||||
|
|||||||
@ -20,7 +20,7 @@ typedef device_delegate<void (int layer, int bank, int *code, int *color, int *f
|
|||||||
devcb = &k052109_device::set_irq_handler(*device, DEVCB_##_devcb);
|
devcb = &k052109_device::set_irq_handler(*device, DEVCB_##_devcb);
|
||||||
|
|
||||||
|
|
||||||
class k052109_device : public device_t, public device_gfx_interface
|
class k052109_device : public device_t, public device_gfx_interface
|
||||||
{
|
{
|
||||||
static const gfx_layout charlayout;
|
static const gfx_layout charlayout;
|
||||||
static const gfx_layout charlayout_ram;
|
static const gfx_layout charlayout_ram;
|
||||||
|
|||||||
@ -116,7 +116,7 @@ WRITE32_MEMBER(k057714_device::write)
|
|||||||
case 0x18: // ?
|
case 0x18: // ?
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x1c: // set to 1 on "media bus" access
|
case 0x1c: // set to 1 on "media bus" access
|
||||||
if ((data >> 16) == 1)
|
if ((data >> 16) == 1)
|
||||||
{
|
{
|
||||||
m_ext_fifo_count = 0;
|
m_ext_fifo_count = 0;
|
||||||
@ -278,7 +278,7 @@ WRITE32_MEMBER(k057714_device::fifo_w)
|
|||||||
{
|
{
|
||||||
if (ACCESSING_BITS_16_31)
|
if (ACCESSING_BITS_16_31)
|
||||||
{
|
{
|
||||||
if (m_ext_fifo_count != 0) // first access is a dummy write
|
if (m_ext_fifo_count != 0) // first access is a dummy write
|
||||||
{
|
{
|
||||||
int count = m_ext_fifo_count - 1;
|
int count = m_ext_fifo_count - 1;
|
||||||
UINT32 addr = (((m_ext_fifo_addr >> 10) + m_ext_fifo_line) * 1024) + count;
|
UINT32 addr = (((m_ext_fifo_addr >> 10) + m_ext_fifo_line) * 1024) + count;
|
||||||
|
|||||||
@ -294,9 +294,9 @@ void macrossp_state::draw_sprites(screen_device &screen, bitmap_rgb32 &bitmap, c
|
|||||||
if(yzoom < 0x100) fudged_yzoom += 0x600;
|
if(yzoom < 0x100) fudged_yzoom += 0x600;
|
||||||
|
|
||||||
gfx->prio_zoom_alpha(bitmap,cliprect,tileno+loopno,col,
|
gfx->prio_zoom_alpha(bitmap,cliprect,tileno+loopno,col,
|
||||||
flipx,flipy,xpos+(xoffset>>8),ypos+(yoffset>>8),
|
flipx,flipy,xpos+(xoffset>>8),ypos+(yoffset>>8),
|
||||||
fudged_xzoom,fudged_yzoom,
|
fudged_xzoom,fudged_yzoom,
|
||||||
screen.priority(),primask,0,alpha);
|
screen.priority(),primask,0,alpha);
|
||||||
|
|
||||||
xoffset += ((xzoom*16) * xinc);
|
xoffset += ((xzoom*16) * xinc);
|
||||||
loopno++;
|
loopno++;
|
||||||
@ -357,10 +357,10 @@ void macrossp_state::draw_layer( screen_device &screen, bitmap_rgb32 &bitmap, co
|
|||||||
starty -= (240/2) * (incy - 0x10000);
|
starty -= (240/2) * (incy - 0x10000);
|
||||||
|
|
||||||
// previous logic, which gives mostly comparable results, vr[1] is now unused
|
// previous logic, which gives mostly comparable results, vr[1] is now unused
|
||||||
// startx = (vr[1] & 0x0000ffff) << 16;
|
// startx = (vr[1] & 0x0000ffff) << 16;
|
||||||
// starty = (vr[1] & 0xffff0000) >> 0;
|
// starty = (vr[1] & 0xffff0000) >> 0;
|
||||||
// startx -= (368/2) * incx;
|
// startx -= (368/2) * incx;
|
||||||
// starty -= (240/2) * incy;
|
// starty -= (240/2) * incy;
|
||||||
|
|
||||||
tm->draw_roz(screen, bitmap, cliprect,
|
tm->draw_roz(screen, bitmap, cliprect,
|
||||||
startx,starty,incx,0,0,incy,
|
startx,starty,incx,0,0,incy,
|
||||||
|
|||||||
@ -27,14 +27,14 @@
|
|||||||
#define WAVERAM1_WIDTH 512
|
#define WAVERAM1_WIDTH 512
|
||||||
#define WAVERAM1_HEIGHT 512
|
#define WAVERAM1_HEIGHT 512
|
||||||
|
|
||||||
#define BLEND_OPAQUE1 0x00000000
|
#define BLEND_OPAQUE1 0x00000000
|
||||||
#define BLEND_OPAQUE2 0x4b23cb00
|
#define BLEND_OPAQUE2 0x4b23cb00
|
||||||
#define BLEND_OPAQUE3 0x4b23dd00
|
#define BLEND_OPAQUE3 0x4b23dd00
|
||||||
#define BLEND_OPAQUE4 0x00004800
|
#define BLEND_OPAQUE4 0x00004800
|
||||||
#define BLEND_OPAQUE5 0xdd23dd00
|
#define BLEND_OPAQUE5 0xdd23dd00
|
||||||
#define BLEND_ADD1 0x40b68800
|
#define BLEND_ADD1 0x40b68800
|
||||||
#define BLEND_ADD2 0xc9b78800
|
#define BLEND_ADD2 0xc9b78800
|
||||||
#define BLEND_MUL1 0x4093c800
|
#define BLEND_MUL1 0x4093c800
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
@ -45,21 +45,21 @@
|
|||||||
|
|
||||||
struct mz_poly_extra_data
|
struct mz_poly_extra_data
|
||||||
{
|
{
|
||||||
const void * palbase;
|
const void * palbase;
|
||||||
const void * texbase;
|
const void * texbase;
|
||||||
UINT16 solidcolor;
|
UINT16 solidcolor;
|
||||||
UINT16 voffset;
|
UINT16 voffset;
|
||||||
INT16 zoffset;
|
INT16 zoffset;
|
||||||
UINT16 transcolor;
|
UINT16 transcolor;
|
||||||
UINT16 texwidth;
|
UINT16 texwidth;
|
||||||
UINT16 color;
|
UINT16 color;
|
||||||
UINT32 alpha;
|
UINT32 alpha;
|
||||||
UINT32 ctrl_word;
|
UINT32 ctrl_word;
|
||||||
bool blend_enable;
|
bool blend_enable;
|
||||||
bool depth_test_enable;
|
bool depth_test_enable;
|
||||||
bool depth_write_enable;
|
bool depth_write_enable;
|
||||||
UINT32 blend;
|
UINT32 blend;
|
||||||
UINT8 (*get_texel)(const void *, int, int, int);
|
UINT8 (*get_texel)(const void *, int, int, int);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
@ -1180,7 +1180,7 @@ void midzeus_state::zeus_draw_quad(int long_fmt, const UINT32 *databuffer, UINT3
|
|||||||
{
|
{
|
||||||
logerror("\t\t(%f,%f,%f) UV:(%02X,%02X) UV_SCALE:(%02X,%02X) (%03X,%03X,%03X) dot=%08X\n",
|
logerror("\t\t(%f,%f,%f) UV:(%02X,%02X) UV_SCALE:(%02X,%02X) (%03X,%03X,%03X) dot=%08X\n",
|
||||||
(double) vert[i].x * (1.0 / 65536.0), (double) vert[i].y * (1.0 / 65536.0), (double) vert[i].p[0] * (1.0 / 65536.0),
|
(double) vert[i].x * (1.0 / 65536.0), (double) vert[i].y * (1.0 / 65536.0), (double) vert[i].p[0] * (1.0 / 65536.0),
|
||||||
(iuvz >> 16) & 0xff, (iuvz >> 24) & 0xff,
|
(iuvz >> 16) & 0xff, (iuvz >> 24) & 0xff,
|
||||||
(int)(vert[i].p[1] / 256.0f), (int)(vert[i].p[2] / 256.0f),
|
(int)(vert[i].p[1] / 256.0f), (int)(vert[i].p[2] / 256.0f),
|
||||||
(databuffer[10 + i] >> 20) & 0x3ff, (databuffer[10 + i] >> 10) & 0x3ff, (databuffer[10 + i] >> 0) & 0x3ff,
|
(databuffer[10 + i] >> 20) & 0x3ff, (databuffer[10 + i] >> 10) & 0x3ff, (databuffer[10 + i] >> 0) & 0x3ff,
|
||||||
0);
|
0);
|
||||||
|
|||||||
@ -216,21 +216,21 @@ public:
|
|||||||
|
|
||||||
DECLARE_READ16_MEMBER(hp64k_usart_r);
|
DECLARE_READ16_MEMBER(hp64k_usart_r);
|
||||||
DECLARE_WRITE16_MEMBER(hp64k_usart_w);
|
DECLARE_WRITE16_MEMBER(hp64k_usart_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_rxrdy_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_rxrdy_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_txrdy_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_txrdy_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_txd_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_txd_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_dtr_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_dtr_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_rts_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_rts_w);
|
||||||
DECLARE_WRITE16_MEMBER(hp64k_loopback_w);
|
DECLARE_WRITE16_MEMBER(hp64k_loopback_w);
|
||||||
void hp64k_update_loopback(void);
|
void hp64k_update_loopback(void);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_rxd_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_rxd_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_dcd_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_dcd_w);
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_cts_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_rs232_cts_w);
|
||||||
|
|
||||||
DECLARE_WRITE16_MEMBER(hp64k_beep_w);
|
DECLARE_WRITE16_MEMBER(hp64k_beep_w);
|
||||||
TIMER_DEVICE_CALLBACK_MEMBER(hp64k_beeper_off);
|
TIMER_DEVICE_CALLBACK_MEMBER(hp64k_beeper_off);
|
||||||
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(hp64k_baud_clk_w);
|
DECLARE_WRITE_LINE_MEMBER(hp64k_baud_clk_w);
|
||||||
private:
|
private:
|
||||||
required_device<hp_5061_3011_cpu_device> m_cpu;
|
required_device<hp_5061_3011_cpu_device> m_cpu;
|
||||||
required_device<i8275_device> m_crtc;
|
required_device<i8275_device> m_crtc;
|
||||||
@ -248,10 +248,10 @@ private:
|
|||||||
required_ioport m_rs232_sw;
|
required_ioport m_rs232_sw;
|
||||||
required_device<beep_device> m_beeper;
|
required_device<beep_device> m_beeper;
|
||||||
required_device<timer_device> m_beep_timer;
|
required_device<timer_device> m_beep_timer;
|
||||||
required_device<clock_device> m_baud_rate;
|
required_device<clock_device> m_baud_rate;
|
||||||
required_ioport m_s5_sw;
|
required_ioport m_s5_sw;
|
||||||
required_device<i8251_device> m_uart;
|
required_device<i8251_device> m_uart;
|
||||||
required_device<rs232_port_device> m_rs232;
|
required_device<rs232_port_device> m_rs232;
|
||||||
|
|
||||||
// Character generator
|
// Character generator
|
||||||
const UINT8 *m_chargen;
|
const UINT8 *m_chargen;
|
||||||
@ -302,14 +302,14 @@ private:
|
|||||||
floppy_state_t m_floppy_if_state;
|
floppy_state_t m_floppy_if_state;
|
||||||
floppy_image_device *m_current_floppy;
|
floppy_image_device *m_current_floppy;
|
||||||
|
|
||||||
// RS232 I/F
|
// RS232 I/F
|
||||||
bool m_16x_clk;
|
bool m_16x_clk;
|
||||||
bool m_baud_clk;
|
bool m_baud_clk;
|
||||||
UINT8 m_16x_div;
|
UINT8 m_16x_div;
|
||||||
bool m_loopback;
|
bool m_loopback;
|
||||||
bool m_txd_state;
|
bool m_txd_state;
|
||||||
bool m_dtr_state;
|
bool m_dtr_state;
|
||||||
bool m_rts_state;
|
bool m_rts_state;
|
||||||
};
|
};
|
||||||
|
|
||||||
static ADDRESS_MAP_START(cpu_mem_map , AS_PROGRAM , 16 , hp64k_state)
|
static ADDRESS_MAP_START(cpu_mem_map , AS_PROGRAM , 16 , hp64k_state)
|
||||||
@ -329,15 +329,15 @@ static ADDRESS_MAP_START(cpu_io_map , AS_IO , 16 , hp64k_state)
|
|||||||
// PA = 4, IC = [0..3]
|
// PA = 4, IC = [0..3]
|
||||||
// Floppy I/F
|
// Floppy I/F
|
||||||
AM_RANGE(HP_MAKE_IOADDR(4 , 0) , HP_MAKE_IOADDR(4 , 3)) AM_READWRITE(hp64k_flp_r , hp64k_flp_w)
|
AM_RANGE(HP_MAKE_IOADDR(4 , 0) , HP_MAKE_IOADDR(4 , 3)) AM_READWRITE(hp64k_flp_r , hp64k_flp_w)
|
||||||
// PA = 5, IC = [0..3]
|
// PA = 5, IC = [0..3]
|
||||||
// Write to USART
|
// Write to USART
|
||||||
AM_RANGE(HP_MAKE_IOADDR(5 , 0) , HP_MAKE_IOADDR(5 , 3)) AM_WRITE(hp64k_usart_w)
|
AM_RANGE(HP_MAKE_IOADDR(5 , 0) , HP_MAKE_IOADDR(5 , 3)) AM_WRITE(hp64k_usart_w)
|
||||||
// PA = 6, IC = [0..3]
|
// PA = 6, IC = [0..3]
|
||||||
// Read from USART
|
// Read from USART
|
||||||
AM_RANGE(HP_MAKE_IOADDR(6 , 0) , HP_MAKE_IOADDR(6 , 3)) AM_READ(hp64k_usart_r)
|
AM_RANGE(HP_MAKE_IOADDR(6 , 0) , HP_MAKE_IOADDR(6 , 3)) AM_READ(hp64k_usart_r)
|
||||||
// PA = 7, IC = 2
|
// PA = 7, IC = 2
|
||||||
// Rear-panel switches and loopback relay control
|
// Rear-panel switches and loopback relay control
|
||||||
AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READWRITE(hp64k_rear_sw_r , hp64k_loopback_w)
|
AM_RANGE(HP_MAKE_IOADDR(7 , 2) , HP_MAKE_IOADDR(7 , 2)) AM_READWRITE(hp64k_rear_sw_r , hp64k_loopback_w)
|
||||||
// PA = 9, IC = [0..3]
|
// PA = 9, IC = [0..3]
|
||||||
// Beeper control & interrupt status read
|
// Beeper control & interrupt status read
|
||||||
AM_RANGE(HP_MAKE_IOADDR(9 , 0) , HP_MAKE_IOADDR(9 , 3)) AM_WRITE(hp64k_beep_w)
|
AM_RANGE(HP_MAKE_IOADDR(9 , 0) , HP_MAKE_IOADDR(9 , 3)) AM_WRITE(hp64k_beep_w)
|
||||||
@ -366,11 +366,11 @@ hp64k_state::hp64k_state(const machine_config &mconfig, device_type type, const
|
|||||||
m_rear_panel_sw(*this , "rear_sw"),
|
m_rear_panel_sw(*this , "rear_sw"),
|
||||||
m_rs232_sw(*this , "rs232_sw"),
|
m_rs232_sw(*this , "rs232_sw"),
|
||||||
m_beeper(*this , "beeper"),
|
m_beeper(*this , "beeper"),
|
||||||
m_beep_timer(*this , "beep_timer"),
|
m_beep_timer(*this , "beep_timer"),
|
||||||
m_baud_rate(*this , "baud_rate"),
|
m_baud_rate(*this , "baud_rate"),
|
||||||
m_s5_sw(*this , "s5_sw"),
|
m_s5_sw(*this , "s5_sw"),
|
||||||
m_uart(*this , "uart"),
|
m_uart(*this , "uart"),
|
||||||
m_rs232(*this , "rs232")
|
m_rs232(*this , "rs232")
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -387,22 +387,22 @@ void hp64k_state::video_start()
|
|||||||
|
|
||||||
// Divisors of K1135 baud rate generator
|
// Divisors of K1135 baud rate generator
|
||||||
static unsigned baud_rate_divisors[] = {
|
static unsigned baud_rate_divisors[] = {
|
||||||
6336,
|
6336,
|
||||||
4224,
|
4224,
|
||||||
2880,
|
2880,
|
||||||
2355,
|
2355,
|
||||||
2112,
|
2112,
|
||||||
1056,
|
1056,
|
||||||
528,
|
528,
|
||||||
264,
|
264,
|
||||||
176,
|
176,
|
||||||
158,
|
158,
|
||||||
132,
|
132,
|
||||||
88,
|
88,
|
||||||
66,
|
66,
|
||||||
44,
|
44,
|
||||||
33,
|
33,
|
||||||
16
|
16
|
||||||
};
|
};
|
||||||
|
|
||||||
void hp64k_state::machine_reset()
|
void hp64k_state::machine_reset()
|
||||||
@ -428,12 +428,12 @@ void hp64k_state::machine_reset()
|
|||||||
m_floppy0_wpt = false;
|
m_floppy0_wpt = false;
|
||||||
m_floppy1_wpt = false;
|
m_floppy1_wpt = false;
|
||||||
m_beeper->set_state(0);
|
m_beeper->set_state(0);
|
||||||
m_baud_rate->set_unscaled_clock(BAUD_RATE_GEN_CLOCK / baud_rate_divisors[ (m_s5_sw->read() >> 1) & 0xf ]);
|
m_baud_rate->set_unscaled_clock(BAUD_RATE_GEN_CLOCK / baud_rate_divisors[ (m_s5_sw->read() >> 1) & 0xf ]);
|
||||||
m_16x_clk = (m_rs232_sw->read() & 0x02) != 0;
|
m_16x_clk = (m_rs232_sw->read() & 0x02) != 0;
|
||||||
m_loopback = false;
|
m_loopback = false;
|
||||||
m_txd_state = true;
|
m_txd_state = true;
|
||||||
m_dtr_state = true;
|
m_dtr_state = true;
|
||||||
m_rts_state = true;
|
m_rts_state = true;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -958,125 +958,125 @@ void hp64k_state::hp64k_floppy_wpt_cb(floppy_image_device *floppy , int state)
|
|||||||
|
|
||||||
READ16_MEMBER(hp64k_state::hp64k_usart_r)
|
READ16_MEMBER(hp64k_state::hp64k_usart_r)
|
||||||
{
|
{
|
||||||
UINT16 tmp;
|
UINT16 tmp;
|
||||||
|
|
||||||
if ((offset & 1) == 0) {
|
if ((offset & 1) == 0) {
|
||||||
tmp = m_uart->status_r(space , 0);
|
tmp = m_uart->status_r(space , 0);
|
||||||
} else {
|
} else {
|
||||||
tmp = m_uart->data_r(space , 0);
|
tmp = m_uart->data_r(space , 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
// bit 8 == bit 7 rear panel switches (modem/terminal) ???
|
// bit 8 == bit 7 rear panel switches (modem/terminal) ???
|
||||||
|
|
||||||
tmp |= (m_rs232_sw->read() << 8);
|
tmp |= (m_rs232_sw->read() << 8);
|
||||||
|
|
||||||
if (BIT(m_rear_panel_sw->read() , 7)) {
|
if (BIT(m_rear_panel_sw->read() , 7)) {
|
||||||
BIT_SET(tmp , 8);
|
BIT_SET(tmp , 8);
|
||||||
}
|
}
|
||||||
|
|
||||||
return tmp;
|
return tmp;
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(hp64k_state::hp64k_usart_w)
|
WRITE16_MEMBER(hp64k_state::hp64k_usart_w)
|
||||||
{
|
{
|
||||||
if ((offset & 1) == 0) {
|
if ((offset & 1) == 0) {
|
||||||
m_uart->control_w(space , 0 , (UINT8)(data & 0xff));
|
m_uart->control_w(space , 0 , (UINT8)(data & 0xff));
|
||||||
} else {
|
} else {
|
||||||
m_uart->data_w(space , 0 , (UINT8)(data & 0xff));
|
m_uart->data_w(space , 0 , (UINT8)(data & 0xff));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_rxrdy_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_rxrdy_w)
|
||||||
{
|
{
|
||||||
if (state) {
|
if (state) {
|
||||||
BIT_SET(m_irl_pending , 6);
|
BIT_SET(m_irl_pending , 6);
|
||||||
} else {
|
} else {
|
||||||
BIT_CLR(m_irl_pending , 6);
|
BIT_CLR(m_irl_pending , 6);
|
||||||
}
|
}
|
||||||
|
|
||||||
hp64k_update_irl();
|
hp64k_update_irl();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_txrdy_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_txrdy_w)
|
||||||
{
|
{
|
||||||
if (state) {
|
if (state) {
|
||||||
BIT_SET(m_irl_pending , 5);
|
BIT_SET(m_irl_pending , 5);
|
||||||
} else {
|
} else {
|
||||||
BIT_CLR(m_irl_pending , 5);
|
BIT_CLR(m_irl_pending , 5);
|
||||||
}
|
}
|
||||||
|
|
||||||
hp64k_update_irl();
|
hp64k_update_irl();
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_txd_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_txd_w)
|
||||||
{
|
{
|
||||||
m_txd_state = state;
|
m_txd_state = state;
|
||||||
if (m_loopback) {
|
if (m_loopback) {
|
||||||
m_uart->write_rxd(state);
|
m_uart->write_rxd(state);
|
||||||
}
|
}
|
||||||
m_rs232->write_txd(state);
|
m_rs232->write_txd(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_dtr_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_dtr_w)
|
||||||
{
|
{
|
||||||
m_dtr_state = state;
|
m_dtr_state = state;
|
||||||
if (m_loopback) {
|
if (m_loopback) {
|
||||||
m_uart->write_dsr(state);
|
m_uart->write_dsr(state);
|
||||||
}
|
}
|
||||||
m_rs232->write_dtr(state);
|
m_rs232->write_dtr(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_rts_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_rts_w)
|
||||||
{
|
{
|
||||||
if (BIT(m_s5_sw->read() , 0)) {
|
if (BIT(m_s5_sw->read() , 0)) {
|
||||||
// Full duplex, RTS/ = 0
|
// Full duplex, RTS/ = 0
|
||||||
state = 0;
|
state = 0;
|
||||||
}
|
}
|
||||||
m_rts_state = state;
|
m_rts_state = state;
|
||||||
if (m_loopback) {
|
if (m_loopback) {
|
||||||
m_uart->write_cts(state);
|
m_uart->write_cts(state);
|
||||||
}
|
}
|
||||||
m_rs232->write_rts(state);
|
m_rs232->write_rts(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(hp64k_state::hp64k_loopback_w)
|
WRITE16_MEMBER(hp64k_state::hp64k_loopback_w)
|
||||||
{
|
{
|
||||||
m_loopback = BIT(data , 11);
|
m_loopback = BIT(data , 11);
|
||||||
hp64k_update_loopback();
|
hp64k_update_loopback();
|
||||||
}
|
}
|
||||||
|
|
||||||
void hp64k_state::hp64k_update_loopback(void)
|
void hp64k_state::hp64k_update_loopback(void)
|
||||||
{
|
{
|
||||||
if (m_loopback) {
|
if (m_loopback) {
|
||||||
m_uart->write_rxd(m_txd_state);
|
m_uart->write_rxd(m_txd_state);
|
||||||
m_uart->write_dsr(m_dtr_state);
|
m_uart->write_dsr(m_dtr_state);
|
||||||
m_uart->write_cts(m_rts_state);
|
m_uart->write_cts(m_rts_state);
|
||||||
} else {
|
} else {
|
||||||
m_uart->write_rxd(m_rs232->rxd_r());
|
m_uart->write_rxd(m_rs232->rxd_r());
|
||||||
m_uart->write_dsr(m_rs232->dcd_r());
|
m_uart->write_dsr(m_rs232->dcd_r());
|
||||||
m_uart->write_cts(m_rs232->cts_r());
|
m_uart->write_cts(m_rs232->cts_r());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_rxd_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_rxd_w)
|
||||||
{
|
{
|
||||||
if (!m_loopback) {
|
if (!m_loopback) {
|
||||||
m_uart->write_rxd(state);
|
m_uart->write_rxd(state);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_dcd_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_dcd_w)
|
||||||
{
|
{
|
||||||
if (!m_loopback) {
|
if (!m_loopback) {
|
||||||
m_uart->write_dsr(state);
|
m_uart->write_dsr(state);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_cts_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_rs232_cts_w)
|
||||||
{
|
{
|
||||||
if (!m_loopback) {
|
if (!m_loopback) {
|
||||||
m_uart->write_cts(state);
|
m_uart->write_cts(state);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE16_MEMBER(hp64k_state::hp64k_beep_w)
|
WRITE16_MEMBER(hp64k_state::hp64k_beep_w)
|
||||||
@ -1095,15 +1095,15 @@ TIMER_DEVICE_CALLBACK_MEMBER(hp64k_state::hp64k_beeper_off)
|
|||||||
|
|
||||||
WRITE_LINE_MEMBER(hp64k_state::hp64k_baud_clk_w)
|
WRITE_LINE_MEMBER(hp64k_state::hp64k_baud_clk_w)
|
||||||
{
|
{
|
||||||
if (!m_16x_clk) {
|
if (!m_16x_clk) {
|
||||||
if (state && !m_baud_clk) {
|
if (state && !m_baud_clk) {
|
||||||
m_16x_div++;
|
m_16x_div++;
|
||||||
}
|
}
|
||||||
m_baud_clk = !!state;
|
m_baud_clk = !!state;
|
||||||
state = BIT(m_16x_div , 3);
|
state = BIT(m_16x_div , 3);
|
||||||
}
|
}
|
||||||
m_uart->write_txc(state);
|
m_uart->write_txc(state);
|
||||||
m_uart->write_rxc(state);
|
m_uart->write_rxc(state);
|
||||||
}
|
}
|
||||||
|
|
||||||
static INPUT_PORTS_START(hp64k)
|
static INPUT_PORTS_START(hp64k)
|
||||||
@ -1321,29 +1321,29 @@ static INPUT_PORTS_START(hp64k)
|
|||||||
PORT_DIPSETTING(0x00 , "1x")
|
PORT_DIPSETTING(0x00 , "1x")
|
||||||
PORT_DIPSETTING(0x02 , "16x")
|
PORT_DIPSETTING(0x02 , "16x")
|
||||||
|
|
||||||
PORT_START("s5_sw")
|
PORT_START("s5_sw")
|
||||||
PORT_DIPNAME(0x01 , 0x00 , "Duplex")
|
PORT_DIPNAME(0x01 , 0x00 , "Duplex")
|
||||||
PORT_DIPLOCATION("S5 IO:!1")
|
PORT_DIPLOCATION("S5 IO:!1")
|
||||||
PORT_DIPSETTING(0x00 , "Half duplex")
|
PORT_DIPSETTING(0x00 , "Half duplex")
|
||||||
PORT_DIPSETTING(0x01 , "Full duplex")
|
PORT_DIPSETTING(0x01 , "Full duplex")
|
||||||
PORT_DIPNAME(0x1e , 0x00 , "Baud rate")
|
PORT_DIPNAME(0x1e , 0x00 , "Baud rate")
|
||||||
PORT_DIPLOCATION("S5 IO:!5,!4,!3,!2")
|
PORT_DIPLOCATION("S5 IO:!5,!4,!3,!2")
|
||||||
PORT_DIPSETTING(0x00 , "50")
|
PORT_DIPSETTING(0x00 , "50")
|
||||||
PORT_DIPSETTING(0x02 , "75")
|
PORT_DIPSETTING(0x02 , "75")
|
||||||
PORT_DIPSETTING(0x04 , "110")
|
PORT_DIPSETTING(0x04 , "110")
|
||||||
PORT_DIPSETTING(0x06 , "134.5")
|
PORT_DIPSETTING(0x06 , "134.5")
|
||||||
PORT_DIPSETTING(0x08 , "150")
|
PORT_DIPSETTING(0x08 , "150")
|
||||||
PORT_DIPSETTING(0x0a , "300")
|
PORT_DIPSETTING(0x0a , "300")
|
||||||
PORT_DIPSETTING(0x0c , "600")
|
PORT_DIPSETTING(0x0c , "600")
|
||||||
PORT_DIPSETTING(0x0e , "1200")
|
PORT_DIPSETTING(0x0e , "1200")
|
||||||
PORT_DIPSETTING(0x10 , "1800")
|
PORT_DIPSETTING(0x10 , "1800")
|
||||||
PORT_DIPSETTING(0x12 , "2000")
|
PORT_DIPSETTING(0x12 , "2000")
|
||||||
PORT_DIPSETTING(0x14 , "2400")
|
PORT_DIPSETTING(0x14 , "2400")
|
||||||
PORT_DIPSETTING(0x16 , "3600")
|
PORT_DIPSETTING(0x16 , "3600")
|
||||||
PORT_DIPSETTING(0x18 , "4800")
|
PORT_DIPSETTING(0x18 , "4800")
|
||||||
PORT_DIPSETTING(0x1a , "7200")
|
PORT_DIPSETTING(0x1a , "7200")
|
||||||
PORT_DIPSETTING(0x1c , "9600")
|
PORT_DIPSETTING(0x1c , "9600")
|
||||||
PORT_DIPSETTING(0x1e , "19200")
|
PORT_DIPSETTING(0x1e , "19200")
|
||||||
|
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
@ -1366,7 +1366,7 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state)
|
|||||||
|
|
||||||
// Clock = 25 MHz / 9 * (112/114)
|
// Clock = 25 MHz / 9 * (112/114)
|
||||||
MCFG_DEVICE_ADD("crtc" , I8275 , 2729045)
|
MCFG_DEVICE_ADD("crtc" , I8275 , 2729045)
|
||||||
MCFG_VIDEO_SET_SCREEN("screen")
|
MCFG_VIDEO_SET_SCREEN("screen")
|
||||||
MCFG_I8275_CHARACTER_WIDTH(9)
|
MCFG_I8275_CHARACTER_WIDTH(9)
|
||||||
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(hp64k_state , crtc_display_pixels)
|
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(hp64k_state , crtc_display_pixels)
|
||||||
MCFG_I8275_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_crtc_drq_w))
|
MCFG_I8275_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_crtc_drq_w))
|
||||||
@ -1375,10 +1375,10 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state)
|
|||||||
MCFG_SCREEN_ADD("screen" , RASTER)
|
MCFG_SCREEN_ADD("screen" , RASTER)
|
||||||
MCFG_SCREEN_UPDATE_DEVICE("crtc" , i8275_device , screen_update)
|
MCFG_SCREEN_UPDATE_DEVICE("crtc" , i8275_device , screen_update)
|
||||||
MCFG_SCREEN_REFRESH_RATE(60)
|
MCFG_SCREEN_REFRESH_RATE(60)
|
||||||
MCFG_SCREEN_SIZE(720 , 390)
|
MCFG_SCREEN_SIZE(720 , 390)
|
||||||
MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette")
|
MCFG_PALETTE_ADD_MONOCHROME_GREEN_HIGHLIGHT("palette")
|
||||||
|
|
||||||
MCFG_FD1791_ADD("fdc" , XTAL_4MHz / 4)
|
MCFG_FD1791_ADD("fdc" , XTAL_4MHz / 4)
|
||||||
MCFG_WD_FDC_FORCE_READY
|
MCFG_WD_FDC_FORCE_READY
|
||||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w))
|
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_intrq_w))
|
||||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w))
|
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(hp64k_state , hp64k_flp_drq_w))
|
||||||
@ -1410,20 +1410,20 @@ static MACHINE_CONFIG_START(hp64k , hp64k_state)
|
|||||||
|
|
||||||
MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off);
|
MCFG_TIMER_DRIVER_ADD("beep_timer" , hp64k_state , hp64k_beeper_off);
|
||||||
|
|
||||||
MCFG_DEVICE_ADD("baud_rate" , CLOCK , 0)
|
MCFG_DEVICE_ADD("baud_rate" , CLOCK , 0)
|
||||||
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(hp64k_state , hp64k_baud_clk_w));
|
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(hp64k_state , hp64k_baud_clk_w));
|
||||||
|
|
||||||
MCFG_DEVICE_ADD("uart" , I8251 , 0)
|
MCFG_DEVICE_ADD("uart" , I8251 , 0)
|
||||||
MCFG_I8251_RXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_rxrdy_w));
|
MCFG_I8251_RXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_rxrdy_w));
|
||||||
MCFG_I8251_TXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_txrdy_w));
|
MCFG_I8251_TXRDY_HANDLER(WRITELINE(hp64k_state , hp64k_txrdy_w));
|
||||||
MCFG_I8251_TXD_HANDLER(WRITELINE(hp64k_state , hp64k_txd_w));
|
MCFG_I8251_TXD_HANDLER(WRITELINE(hp64k_state , hp64k_txd_w));
|
||||||
MCFG_I8251_DTR_HANDLER(WRITELINE(hp64k_state , hp64k_dtr_w));
|
MCFG_I8251_DTR_HANDLER(WRITELINE(hp64k_state , hp64k_dtr_w));
|
||||||
MCFG_I8251_RTS_HANDLER(WRITELINE(hp64k_state , hp64k_rts_w));
|
MCFG_I8251_RTS_HANDLER(WRITELINE(hp64k_state , hp64k_rts_w));
|
||||||
|
|
||||||
MCFG_RS232_PORT_ADD("rs232" , default_rs232_devices , NULL)
|
MCFG_RS232_PORT_ADD("rs232" , default_rs232_devices , NULL)
|
||||||
MCFG_RS232_RXD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_rxd_w))
|
MCFG_RS232_RXD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_rxd_w))
|
||||||
MCFG_RS232_DCD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_dcd_w))
|
MCFG_RS232_DCD_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_dcd_w))
|
||||||
MCFG_RS232_CTS_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_cts_w))
|
MCFG_RS232_CTS_HANDLER(WRITELINE(hp64k_state , hp64k_rs232_cts_w))
|
||||||
|
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
|
|||||||
@ -356,4 +356,3 @@ ROM_END
|
|||||||
|
|
||||||
|
|
||||||
COMP(1985, hp_ipc, 0, 0, hp_ipc, hp_ipc, driver_device, 0, "HP", "Integral Personal Computer", MACHINE_IS_SKELETON)
|
COMP(1985, hp_ipc, 0, 0, hp_ipc, hp_ipc, driver_device, 0, "HP", "Integral Personal Computer", MACHINE_IS_SKELETON)
|
||||||
|
|
||||||
|
|||||||
@ -893,7 +893,7 @@ ADDRESS_MAP_END
|
|||||||
|
|
||||||
static ADDRESS_MAP_START( ngen386_io, AS_IO, 32, ngen_state )
|
static ADDRESS_MAP_START( ngen386_io, AS_IO, 32, ngen_state )
|
||||||
AM_RANGE(0x0000, 0x0003) AM_READWRITE16(xbus_r, xbus_w, 0x0000ffff)
|
AM_RANGE(0x0000, 0x0003) AM_READWRITE16(xbus_r, xbus_w, 0x0000ffff)
|
||||||
// AM_RANGE(0xf800, 0xfeff) AM_READWRITE16(peripheral_r, peripheral_w,0xffffffff)
|
// AM_RANGE(0xf800, 0xfeff) AM_READWRITE16(peripheral_r, peripheral_w,0xffffffff)
|
||||||
AM_RANGE(0xfd08, 0xfd0b) AM_READWRITE16(b38_crtc_r, b38_crtc_w,0xffffffff)
|
AM_RANGE(0xfd08, 0xfd0b) AM_READWRITE16(b38_crtc_r, b38_crtc_w,0xffffffff)
|
||||||
AM_RANGE(0xfd0c, 0xfd0f) AM_READWRITE16(b38_keyboard_r, b38_keyboard_w,0xffffffff)
|
AM_RANGE(0xfd0c, 0xfd0f) AM_READWRITE16(b38_keyboard_r, b38_keyboard_w,0xffffffff)
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|||||||
@ -130,11 +130,11 @@ void xbox_state::hack_eeprom()
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*static const struct {
|
/*static const struct {
|
||||||
const char *game_name;
|
const char *game_name;
|
||||||
struct {
|
struct {
|
||||||
UINT32 address;
|
UINT32 address;
|
||||||
UINT8 write_byte;
|
UINT8 write_byte;
|
||||||
} modify[16];
|
} modify[16];
|
||||||
} hacks[] = { { "chihiro",{ { 0x6a79f, 0x01 },{ 0x6a7a0, 0x00 },{ 0x6b575, 0x00 },{ 0x6b576, 0x00 },{ 0x6b5af, 0x75 },{ 0x6b78a, 0x75 },{ 0x6b7ca, 0x00 },{ 0x6b7b8, 0x00 },{ 0x8f5b2, 0x75 },{ 0x79a9e, 0x74 },{ 0x79b80, 0x74 },{ 0x79b97, 0x74 },{ 0, 0 } } },
|
} hacks[] = { { "chihiro",{ { 0x6a79f, 0x01 },{ 0x6a7a0, 0x00 },{ 0x6b575, 0x00 },{ 0x6b576, 0x00 },{ 0x6b5af, 0x75 },{ 0x6b78a, 0x75 },{ 0x6b7ca, 0x00 },{ 0x6b7b8, 0x00 },{ 0x8f5b2, 0x75 },{ 0x79a9e, 0x74 },{ 0x79b80, 0x74 },{ 0x79b97, 0x74 },{ 0, 0 } } },
|
||||||
{ "outr2",{ { 0x12e4cf, 0x01 },{ 0x12e4d0, 0x00 },{ 0x4793e, 0x01 },{ 0x4793f, 0x00 },{ 0x47aa3, 0x01 },{ 0x47aa4, 0x00 },{ 0x14f2b6, 0x84 },{ 0x14f2d1, 0x75 },{ 0x8732f, 0x7d },{ 0x87384, 0x7d },{ 0x87388, 0xeb },{ 0, 0 } } } };*/
|
{ "outr2",{ { 0x12e4cf, 0x01 },{ 0x12e4d0, 0x00 },{ 0x4793e, 0x01 },{ 0x4793f, 0x00 },{ 0x47aa3, 0x01 },{ 0x47aa4, 0x00 },{ 0x14f2b6, 0x84 },{ 0x14f2d1, 0x75 },{ 0x8732f, 0x7d },{ 0x87384, 0x7d },{ 0x87388, 0xeb },{ 0, 0 } } } };*/
|
||||||
|
|
||||||
@ -150,9 +150,9 @@ void xbox_state::hack_usb()
|
|||||||
p = -1;
|
p = -1;
|
||||||
if (p >= 0) {
|
if (p >= 0) {
|
||||||
/*for (int a = 0; a < 16; a++) {
|
/*for (int a = 0; a < 16; a++) {
|
||||||
if (hacks[p].modify[a].address == 0)
|
if (hacks[p].modify[a].address == 0)
|
||||||
break;
|
break;
|
||||||
m_maincpu->space(0).write_byte(hacks[p].modify[a].address, hacks[p].modify[a].write_byte);
|
m_maincpu->space(0).write_byte(hacks[p].modify[a].address, hacks[p].modify[a].write_byte);
|
||||||
}*/
|
}*/
|
||||||
}
|
}
|
||||||
usbhack_counter++;
|
usbhack_counter++;
|
||||||
@ -164,10 +164,10 @@ void xbox_state::machine_start()
|
|||||||
xbox_devs.ide = machine().device<bus_master_ide_controller_device>("ide");
|
xbox_devs.ide = machine().device<bus_master_ide_controller_device>("ide");
|
||||||
usbhack_index = -1;
|
usbhack_index = -1;
|
||||||
/*for (int a = 1; a < 2; a++)
|
/*for (int a = 1; a < 2; a++)
|
||||||
if (strcmp(machine().basename(), hacks[a].game_name) == 0) {
|
if (strcmp(machine().basename(), hacks[a].game_name) == 0) {
|
||||||
usbhack_index = a;
|
usbhack_index = a;
|
||||||
break;
|
break;
|
||||||
}*/
|
}*/
|
||||||
usbhack_counter = 0;
|
usbhack_counter = 0;
|
||||||
// savestates
|
// savestates
|
||||||
save_item(NAME(usbhack_counter));
|
save_item(NAME(usbhack_counter));
|
||||||
|
|||||||
@ -124,4 +124,3 @@ private:
|
|||||||
required_device<speaker_sound_device> m_speaker;
|
required_device<speaker_sound_device> m_speaker;
|
||||||
required_device<votrax_sc01_device> m_votrax;
|
required_device<votrax_sc01_device> m_votrax;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -705,7 +705,7 @@ void coco_state::update_sound(void)
|
|||||||
*/
|
*/
|
||||||
if ((status & SOUNDMUX_ENABLE) != 0)
|
if ((status & SOUNDMUX_ENABLE) != 0)
|
||||||
{
|
{
|
||||||
m_analog_audio_level = dac_sound + cassette_sound + cart_sound;
|
m_analog_audio_level = dac_sound + cassette_sound + cart_sound;
|
||||||
}
|
}
|
||||||
|
|
||||||
m_dac->write_unsigned8(single_bit_sound + m_analog_audio_level);
|
m_dac->write_unsigned8(single_bit_sound + m_analog_audio_level);
|
||||||
|
|||||||
@ -70,7 +70,7 @@ READ8_MEMBER( aussiebyte_state::port37_r )
|
|||||||
MC6845_ON_UPDATE_ADDR_CHANGED( aussiebyte_state::crtc_update_addr )
|
MC6845_ON_UPDATE_ADDR_CHANGED( aussiebyte_state::crtc_update_addr )
|
||||||
{
|
{
|
||||||
/* not sure what goes in here - parameters passed are device, address, strobe */
|
/* not sure what goes in here - parameters passed are device, address, strobe */
|
||||||
// m_video_address = address;// & 0x7ff;
|
// m_video_address = address;// & 0x7ff;
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER( aussiebyte_state::address_w )
|
WRITE8_MEMBER( aussiebyte_state::address_w )
|
||||||
@ -194,4 +194,3 @@ MC6845_UPDATE_ROW( aussiebyte_state::crtc_update_row )
|
|||||||
*p++ = palette[BIT(gfx, 0)];
|
*p++ = palette[BIT(gfx, 0)];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -8,7 +8,7 @@
|
|||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
#define BARE_BUILD_VERSION "0.164"
|
#define BARE_BUILD_VERSION "0.165"
|
||||||
|
|
||||||
extern const char bare_build_version[];
|
extern const char bare_build_version[];
|
||||||
extern const char build_version[];
|
extern const char build_version[];
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user