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jaleco/jaleco_vj_q.cpp: Get DMA space from up the PCI chain.

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This commit is contained in:
Vas Crabb 2024-02-21 23:19:17 +11:00
parent e1059dfd03
commit f01e142ea3
3 changed files with 7 additions and 12 deletions
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1
src/mame/jaleco/jaleco_vj_pc.cpp
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@ -127,7 +127,6 @@ void jaleco_vj_pc_device::device_add_mconfig(machine_config &config)
// TODO: pci:07.3 0x30401106 VIA VT83C572, VT86C586/A/B Power Management Controller
JALECO_VJ_KING_QTARO(config, m_king_qtaro, 0);
m_king_qtaro->set_bus_master_space(m_maincpu, AS_PROGRAM); // FIXME: remove this workaround when PCI framework grows bus mastering support
// TODO: Should actually be pci:0a.0 but it only shows a black screen
PCI_SLOT(config, "pci:2", pci_cards, 16, 1, 2, 3, 0, "virgedx").set_fixed(true);

12
src/mame/jaleco/jaleco_vj_qtaro.cpp
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@ -390,14 +390,15 @@ void jaleco_vj_king_qtaro_device::dma_running_w(offs_t offset, uint32_t data)
TIMER_CALLBACK_MEMBER(jaleco_vj_king_qtaro_device::video_dma_callback)
{
address_space &dma_space = *get_pci_busmaster_space();
for (int device_id = 0; device_id < 3; device_id++) {
if (!m_dma_running[device_id] || BIT(m_dma_descriptor_addr[device_id], 0)) {
m_dma_running[device_id] = false;
continue;
}
const uint32_t dmaLength = m_dma_space->read_dword(m_dma_descriptor_addr[device_id] + 4);
const uint32_t bufferPhysAddr = m_dma_space->read_dword(m_dma_descriptor_addr[device_id] + 8);
const uint32_t dmaLength = dma_space.read_dword(m_dma_descriptor_addr[device_id] + 4);
const uint32_t bufferPhysAddr = dma_space.read_dword(m_dma_descriptor_addr[device_id] + 8);
const uint32_t burstLength = std::min(dmaLength - m_dma_descriptor_length[device_id], DMA_BURST_SIZE);
if (burstLength == 0)
@ -407,15 +408,15 @@ TIMER_CALLBACK_MEMBER(jaleco_vj_king_qtaro_device::video_dma_callback)
uint8_t buf[DMA_BURST_SIZE];
for (int i = 0; i < burstLength; i++) {
buf[i] = m_dma_space->read_byte(bufferPhysAddr + m_dma_descriptor_length[device_id]);
buf[i] = dma_space.read_byte(bufferPhysAddr + m_dma_descriptor_length[device_id]);
m_dma_descriptor_length[device_id]++;
}
m_qtaro[device_id]->write(buf, burstLength);
if (m_dma_running[device_id] && m_dma_descriptor_length[device_id] >= dmaLength) {
const uint32_t nextDescriptorPhysAddr = m_dma_space->read_dword(m_dma_descriptor_addr[device_id]);
const uint32_t flags = m_dma_space->read_dword(m_dma_descriptor_addr[device_id] + 12); // Bit 24 is set to denote the last entry at the same time as bit 0 of the next descriptor addr is set
const uint32_t nextDescriptorPhysAddr = dma_space.read_dword(m_dma_descriptor_addr[device_id]);
const uint32_t flags = dma_space.read_dword(m_dma_descriptor_addr[device_id] + 12); // Bit 24 is set to denote the last entry at the same time as bit 0 of the next descriptor addr is set
LOGMASKED(LOG_DMA, "DMA %d: %08x -> %08x %08x (%d %d)\n", device_id, m_dma_descriptor_addr[device_id], nextDescriptorPhysAddr, m_dma_descriptor_length[device_id], BIT(nextDescriptorPhysAddr, 0), BIT(flags, 24));
@ -470,7 +471,6 @@ jaleco_vj_king_qtaro_device::jaleco_vj_king_qtaro_device(const machine_config &m
jaleco_vj_king_qtaro_device::jaleco_vj_king_qtaro_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
pci_device(mconfig, type, tag, owner, clock),
m_dma_space(*this, finder_base::DUMMY_TAG, -1, 32),
m_qtaro(*this, "qtaro%u", 1)
{
}

6
src/mame/jaleco/jaleco_vj_qtaro.h
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@ -47,9 +47,6 @@ class jaleco_vj_king_qtaro_device : public pci_device
public:
jaleco_vj_king_qtaro_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// FIXME: this is a workaround for the PCI framework’s lack of bus mastering DMA support
template <typename... T> void set_bus_master_space(T &&... args) { m_dma_space.set_tag(std::forward<T>(args)...); }
template <int DeviceId> void video_mix_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_qtaro[DeviceId]->video_mix_w(offset, data, mem_mask); }
void video_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
@ -106,10 +103,9 @@ private:
TIMER_CALLBACK_MEMBER(video_dma_callback);
required_address_space m_dma_space;
required_device_array<jaleco_vj_qtaro_device, 3> m_qtaro;
emu_timer* m_dma_timer;
emu_timer *m_dma_timer;
uint32_t m_int;
uint32_t m_int_fpga;