From f06282380a6c531913f4dc4318a9ab5bb61602c9 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 1 Dec 2019 17:24:26 -0500 Subject: [PATCH] dp8344: Unconditional RET only takes 2 T-states (nw) --- src/devices/cpu/bcp/dp8344.cpp | 12 +++++++++--- src/devices/cpu/bcp/dp8344.h | 2 +- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/bcp/dp8344.cpp b/src/devices/cpu/bcp/dp8344.cpp index 669f3957b67..5fa49d871c6 100644 --- a/src/devices/cpu/bcp/dp8344.cpp +++ b/src/devices/cpu/bcp/dp8344.cpp @@ -1494,8 +1494,14 @@ dp8344_device::inst_state dp8344_device::decode_instruction() else if ((m_latched_instr & 0xff00) == 0xaf00) { // RET or RETF - if (BIT(m_latched_instr, 7) || get_flag(m_latched_instr & 0x0007) == BIT(m_latched_instr, 3)) - return TX_RET; + if (BIT(m_latched_instr, 7)) + { + address_stack_pop((m_latched_instr & 0x0060) >> 5, BIT(m_latched_instr, 4)); + instruction_wait(); + return T2_NEXT; + } + else if (get_flag(m_latched_instr & 0x0007) == BIT(m_latched_instr, 3)) + return TX_RETF; else { instruction_wait(); @@ -1832,7 +1838,7 @@ void dp8344_device::execute_run() m_inst_state = T2_NEXT; break; - case TX_RET: + case TX_RETF: address_stack_pop((m_latched_instr & 0x0060) >> 5, BIT(m_latched_instr, 4)); instruction_wait(); m_inst_state = T2_NEXT; diff --git a/src/devices/cpu/bcp/dp8344.h b/src/devices/cpu/bcp/dp8344.h index c141271d999..1e3c369cc1a 100644 --- a/src/devices/cpu/bcp/dp8344.h +++ b/src/devices/cpu/bcp/dp8344.h @@ -89,7 +89,7 @@ private: enum inst_state : u8 { T1_DECODE, T1_START, T1_SKIP, T1_LJMP, T1_LCALL, TX_READ, TX_WRITE, - TX1_JRMK, TX1_JMP, TX2_JMP, TX_CALL, TX_RET, + TX1_JRMK, TX1_JMP, TX2_JMP, TX_CALL, TX_RETF, T2_NEXT, T2_STORE, T2_READ, T2_WRITE, T2_ABSOLUTE };