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i82371sb.cpp: add interrupt input lines (nw)

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Also added eisa interrupt registers
pcipc.cpp is updated accordingly
This commit is contained in:
yz70s 2018-08-20 21:56:10 +02:00
parent 970c812877
commit f10af0683b
4 changed files with 205 additions and 29 deletions
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8
src/devices/bus/lpci/southbridge.cpp
View File

@ -90,15 +90,15 @@ MACHINE_CONFIG_START(southbridge_device::device_add_mconfig)
MCFG_DEVICE_ADD("isabus", ISA16, 0) MCFG_DEVICE_ADD("isabus", ISA16, 0)
MCFG_ISA16_CPU(":maincpu") MCFG_ISA16_CPU(":maincpu")
MCFG_ISA_OUT_IRQ2_CB(WRITELINE("pic8259_slave", pic8259_device, ir2_w)) // in place of irq 2 on at irq 9 is used
MCFG_ISA_OUT_IRQ3_CB(WRITELINE("pic8259_master", pic8259_device, ir3_w)) MCFG_ISA_OUT_IRQ3_CB(WRITELINE("pic8259_master", pic8259_device, ir3_w))
MCFG_ISA_OUT_IRQ4_CB(WRITELINE("pic8259_master", pic8259_device, ir4_w)) MCFG_ISA_OUT_IRQ4_CB(WRITELINE("pic8259_master", pic8259_device, ir4_w))
MCFG_ISA_OUT_IRQ5_CB(WRITELINE("pic8259_master", pic8259_device, ir5_w)) MCFG_ISA_OUT_IRQ5_CB(WRITELINE("pic8259_master", pic8259_device, ir5_w))
MCFG_ISA_OUT_IRQ6_CB(WRITELINE("pic8259_master", pic8259_device, ir6_w)) MCFG_ISA_OUT_IRQ6_CB(WRITELINE("pic8259_master", pic8259_device, ir6_w))
MCFG_ISA_OUT_IRQ7_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w)) MCFG_ISA_OUT_IRQ7_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w))
MCFG_ISA_OUT_IRQ10_CB(WRITELINE("pic8259_slave", pic8259_device, ir3_w)) MCFG_ISA_OUT_IRQ2_CB(WRITELINE("pic8259_slave", pic8259_device, ir1_w)) // in place of irq 2 on at irq 9 is used
MCFG_ISA_OUT_IRQ11_CB(WRITELINE("pic8259_slave", pic8259_device, ir4_w)) MCFG_ISA_OUT_IRQ10_CB(WRITELINE("pic8259_slave", pic8259_device, ir2_w))
MCFG_ISA_OUT_IRQ12_CB(WRITELINE("pic8259_slave", pic8259_device, ir5_w)) MCFG_ISA_OUT_IRQ11_CB(WRITELINE("pic8259_slave", pic8259_device, ir3_w))
MCFG_ISA_OUT_IRQ12_CB(WRITELINE("pic8259_slave", pic8259_device, ir4_w))
MCFG_ISA_OUT_IRQ14_CB(WRITELINE("pic8259_slave", pic8259_device, ir6_w)) MCFG_ISA_OUT_IRQ14_CB(WRITELINE("pic8259_slave", pic8259_device, ir6_w))
MCFG_ISA_OUT_IRQ15_CB(WRITELINE("pic8259_slave", pic8259_device, ir7_w)) MCFG_ISA_OUT_IRQ15_CB(WRITELINE("pic8259_slave", pic8259_device, ir7_w))
MCFG_ISA_OUT_DRQ0_CB(WRITELINE("dma8237_1", am9517a_device, dreq0_w)) MCFG_ISA_OUT_DRQ0_CB(WRITELINE("dma8237_1", am9517a_device, dreq0_w))

186
src/devices/machine/i82371sb.cpp
View File

@ -17,7 +17,7 @@ void i82371sb_isa_device::config_map(address_map &map)
map(0x60, 0x63).rw(FUNC(i82371sb_isa_device::pirqrc_r), FUNC(i82371sb_isa_device::pirqrc_w)); map(0x60, 0x63).rw(FUNC(i82371sb_isa_device::pirqrc_r), FUNC(i82371sb_isa_device::pirqrc_w));
map(0x68, 0x68).rw(FUNC(i82371sb_isa_device::tom_r), FUNC(i82371sb_isa_device::tom_w)); map(0x68, 0x68).rw(FUNC(i82371sb_isa_device::tom_r), FUNC(i82371sb_isa_device::tom_w));
map(0x6a, 0x6b).rw(FUNC(i82371sb_isa_device::mstat_r), FUNC(i82371sb_isa_device::mstat_w)); map(0x6a, 0x6b).rw(FUNC(i82371sb_isa_device::mstat_r), FUNC(i82371sb_isa_device::mstat_w));
map(0x70, 0x70).rw(FUNC(i82371sb_isa_device::mbirq0_r), FUNC(i82371sb_isa_device::mbirq0_w)); map(0x70, 0x71).rw(FUNC(i82371sb_isa_device::mbirq01_r), FUNC(i82371sb_isa_device::mbirq01_w));
map(0x76, 0x77).rw(FUNC(i82371sb_isa_device::mbdma_r), FUNC(i82371sb_isa_device::mbdma_w)); map(0x76, 0x77).rw(FUNC(i82371sb_isa_device::mbdma_r), FUNC(i82371sb_isa_device::mbdma_w));
map(0x82, 0x82).rw(FUNC(i82371sb_isa_device::dlc_r), FUNC(i82371sb_isa_device::dlc_w)); map(0x82, 0x82).rw(FUNC(i82371sb_isa_device::dlc_r), FUNC(i82371sb_isa_device::dlc_w));
map(0xa0, 0xa0).rw(FUNC(i82371sb_isa_device::smicntl_r), FUNC(i82371sb_isa_device::smicntl_w)); map(0xa0, 0xa0).rw(FUNC(i82371sb_isa_device::smicntl_r), FUNC(i82371sb_isa_device::smicntl_w));
@ -39,6 +39,7 @@ void i82371sb_isa_device::internal_io_map(address_map &map)
map(0x00a0, 0x00bf).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write)); map(0x00a0, 0x00bf).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x00b2, 0x00b3).rw(FUNC(i82371sb_isa_device::read_apmcapms), FUNC(i82371sb_isa_device::write_apmcapms)); map(0x00b2, 0x00b3).rw(FUNC(i82371sb_isa_device::read_apmcapms), FUNC(i82371sb_isa_device::write_apmcapms));
map(0x00c0, 0x00df).rw(FUNC(i82371sb_isa_device::at_dma8237_2_r), FUNC(i82371sb_isa_device::at_dma8237_2_w)); map(0x00c0, 0x00df).rw(FUNC(i82371sb_isa_device::at_dma8237_2_r), FUNC(i82371sb_isa_device::at_dma8237_2_w));
map(0x04d0, 0x04d1).rw(FUNC(i82371sb_isa_device::eisa_irq_read), FUNC(i82371sb_isa_device::eisa_irq_write));
map(0x00e0, 0x00ef).noprw(); map(0x00e0, 0x00ef).noprw();
} }
@ -103,17 +104,17 @@ MACHINE_CONFIG_START(i82371sb_isa_device::device_add_mconfig)
MCFG_DEVICE_ADD("isabus", ISA16, 0) MCFG_DEVICE_ADD("isabus", ISA16, 0)
MCFG_ISA16_CPU(":maincpu") MCFG_ISA16_CPU(":maincpu")
MCFG_ISA_OUT_IRQ3_CB(WRITELINE("pic8259_master", pic8259_device, ir3_w)) MCFG_ISA_OUT_IRQ3_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq3_w))
MCFG_ISA_OUT_IRQ4_CB(WRITELINE("pic8259_master", pic8259_device, ir4_w)) MCFG_ISA_OUT_IRQ4_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq4_w))
MCFG_ISA_OUT_IRQ5_CB(WRITELINE("pic8259_master", pic8259_device, ir5_w)) MCFG_ISA_OUT_IRQ5_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq5_w))
MCFG_ISA_OUT_IRQ6_CB(WRITELINE("pic8259_master", pic8259_device, ir6_w)) MCFG_ISA_OUT_IRQ6_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq6_w))
MCFG_ISA_OUT_IRQ7_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w)) MCFG_ISA_OUT_IRQ7_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq7_w))
MCFG_ISA_OUT_IRQ2_CB(WRITELINE("pic8259_slave", pic8259_device, ir1_w)) // in place of irq 2 on at irq 9 is used MCFG_ISA_OUT_IRQ2_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq9_w))
MCFG_ISA_OUT_IRQ10_CB(WRITELINE("pic8259_slave", pic8259_device, ir2_w)) MCFG_ISA_OUT_IRQ10_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq10_w))
MCFG_ISA_OUT_IRQ11_CB(WRITELINE("pic8259_slave", pic8259_device, ir3_w)) MCFG_ISA_OUT_IRQ11_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq11_w))
MCFG_ISA_OUT_IRQ12_CB(WRITELINE("pic8259_slave", pic8259_device, ir4_w)) MCFG_ISA_OUT_IRQ12_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq12m_w))
MCFG_ISA_OUT_IRQ14_CB(WRITELINE("pic8259_slave", pic8259_device, ir6_w)) MCFG_ISA_OUT_IRQ14_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq14_w))
MCFG_ISA_OUT_IRQ15_CB(WRITELINE("pic8259_slave", pic8259_device, ir7_w)) MCFG_ISA_OUT_IRQ15_CB(WRITELINE(*this, i82371sb_isa_device, pc_irq15_w))
MCFG_ISA_OUT_DRQ0_CB(WRITELINE("dma8237_1", am9517a_device, dreq0_w)) MCFG_ISA_OUT_DRQ0_CB(WRITELINE("dma8237_1", am9517a_device, dreq0_w))
MCFG_ISA_OUT_DRQ1_CB(WRITELINE("dma8237_1", am9517a_device, dreq1_w)) MCFG_ISA_OUT_DRQ1_CB(WRITELINE("dma8237_1", am9517a_device, dreq1_w))
MCFG_ISA_OUT_DRQ2_CB(WRITELINE("dma8237_1", am9517a_device, dreq2_w)) MCFG_ISA_OUT_DRQ2_CB(WRITELINE("dma8237_1", am9517a_device, dreq2_w))
@ -135,7 +136,7 @@ i82371sb_isa_device::i82371sb_isa_device(const machine_config &mconfig, const ch
m_pit8254(*this, "pit8254"), m_pit8254(*this, "pit8254"),
m_isabus(*this, "isabus"), m_isabus(*this, "isabus"),
m_speaker(*this, "speaker"), m_speaker(*this, "speaker"),
m_at_spkrdata(0), m_pit_out2(0), m_dma_channel(0), m_cur_eop(false), m_dma_high_byte(0), m_at_speaker(0), m_refresh(false), m_channel_check(0), m_nmi_enabled(0) m_at_spkrdata(0), m_pit_out2(0), m_dma_channel(0), m_cur_eop(false), m_dma_high_byte(0), m_eisa_irq_mode(0), m_at_speaker(0), m_refresh(false), m_channel_check(0), m_nmi_enabled(0)
{ {
set_ids(0x80867000, 0x03, 0x060100, 0x00000000); set_ids(0x80867000, 0x03, 0x060100, 0x00000000);
} }
@ -157,6 +158,7 @@ void i82371sb_isa_device::device_reset()
tom = 0x02; tom = 0x02;
mstat = 0x0000; mstat = 0x0000;
mbirq0 = 0x80; mbirq0 = 0x80;
mbirq1 = 0x80;
memset(mbdma, 0x0c, sizeof(mbdma)); memset(mbdma, 0x0c, sizeof(mbdma));
pcsc = 0x0002; pcsc = 0x0002;
apicbase = 0x00; apicbase = 0x00;
@ -248,15 +250,26 @@ WRITE16_MEMBER(i82371sb_isa_device::mstat_w)
logerror("mstat = %04x\n", mstat); logerror("mstat = %04x\n", mstat);
} }
READ8_MEMBER (i82371sb_isa_device::mbirq0_r) READ8_MEMBER (i82371sb_isa_device::mbirq01_r)
{ {
return mbirq0; if (offset == 0)
return mbirq0;
else
return mbirq1;
} }
WRITE8_MEMBER(i82371sb_isa_device::mbirq0_w) WRITE8_MEMBER(i82371sb_isa_device::mbirq01_w)
{ {
mbirq0 = data; if (offset == 0)
logerror("mbirq0 = %02x\n", mbirq0); {
mbirq0 = data;
logerror("mbirq0 = %02x\n", mbirq0);
}
else if (offset == 1)
{
mbirq1 = data;
logerror("mbirq1 = %02x\n", mbirq1);
}
} }
READ8_MEMBER (i82371sb_isa_device::mbdma_r) READ8_MEMBER (i82371sb_isa_device::mbdma_r)
@ -663,6 +676,126 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dack5_w ) { pc_select_dma_channel(5,
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dack6_w ) { pc_select_dma_channel(6, state); } WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dack6_w ) { pc_select_dma_channel(6, state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dack7_w ) { pc_select_dma_channel(7, state); } WRITE_LINE_MEMBER( i82371sb_isa_device::pc_dack7_w ) { pc_select_dma_channel(7, state); }
void i82371sb_isa_device::redirect_irq(int irq, int state)
{
switch (irq)
{
case 0:
case 1:
case 2:
case 8:
case 13:
break;
case 3:
m_pic8259_master->ir3_w(state);
break;
case 4:
m_pic8259_master->ir4_w(state);
break;
case 5:
m_pic8259_master->ir5_w(state);
break;
case 6:
m_pic8259_master->ir6_w(state);
break;
case 7:
m_pic8259_master->ir7_w(state);
break;
case 9:
m_pic8259_slave->ir1_w(state);
break;
case 10:
m_pic8259_slave->ir2_w(state);
break;
case 11:
m_pic8259_slave->ir3_w(state);
break;
case 12:
m_pic8259_slave->ir4_w(state);
break;
case 14:
m_pic8259_slave->ir6_w(state);
break;
case 15:
m_pic8259_slave->ir7_w(state);
break;
}
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_pirqa_w)
{
int irq = pirqrc[0] & 15;
if (pirqrc[0] & 128)
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_pirqb_w )
{
int irq = pirqrc[1] & 15;
if (pirqrc[1] & 128)
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_pirqc_w )
{
int irq = pirqrc[2] & 15;
if (pirqrc[2] & 128)
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_pirqd_w )
{
int irq = pirqrc[3] & 15;
if (pirqrc[3] & 128)
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_mirq0_w )
{
int irq = mbirq0 & 15;
if (mbirq0 & (128 | 32))
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_mirq1_w )
{
int irq = mbirq1 & 15;
if (mbirq1 & 128)
return;
redirect_irq(irq, state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_ferr_w )
{
m_pic8259_slave->ir5_w(state);
}
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq1_w ) { m_pic8259_master->ir1_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq3_w ) { m_pic8259_master->ir3_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq4_w ) { m_pic8259_master->ir4_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq5_w ) { m_pic8259_master->ir5_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq6_w ) { m_pic8259_master->ir6_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq7_w ) { m_pic8259_master->ir7_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq8n_w ) { m_pic8259_slave->ir0_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq9_w ) { m_pic8259_slave->ir1_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq10_w ) { m_pic8259_slave->ir2_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq11_w ) { m_pic8259_slave->ir3_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq12m_w ) { m_pic8259_slave->ir4_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq14_w ) { m_pic8259_slave->ir6_w(state); }
WRITE_LINE_MEMBER( i82371sb_isa_device::pc_irq15_w ) { m_pic8259_slave->ir7_w(state); }
READ8_MEMBER( i82371sb_isa_device::at_portb_r ) READ8_MEMBER( i82371sb_isa_device::at_portb_r )
{ {
uint8_t data = m_at_speaker; uint8_t data = m_at_speaker;
@ -697,6 +830,23 @@ WRITE8_MEMBER( i82371sb_isa_device::at_dma8237_2_w )
m_dma8237_2->write( space, offset / 2, data); m_dma8237_2->write( space, offset / 2, data);
} }
READ8_MEMBER(i82371sb_isa_device::eisa_irq_read)
{
if (offset == 0)
return m_eisa_irq_mode & 0xff;
else
return m_eisa_irq_mode >> 8;
}
WRITE8_MEMBER(i82371sb_isa_device::eisa_irq_write)
{
if (offset == 0)
m_eisa_irq_mode = (m_eisa_irq_mode & 0xff00) | data;
else
m_eisa_irq_mode = (m_eisa_irq_mode & 0x00ff) | (data << 8);
// TODO: update m_pic8259_master and m_pic8259_slave with the new configuration
}
READ8_MEMBER( i82371sb_isa_device::read_apmcapms ) READ8_MEMBER( i82371sb_isa_device::read_apmcapms )
{ {
if (offset == 0) if (offset == 0)

32
src/devices/machine/i82371sb.h
View File

@ -37,6 +37,28 @@ public:
template <class Object> devcb_base &set_smi_callback(Object &&cb) { return m_smi_callback.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_smi_callback(Object &&cb) { return m_smi_callback.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_boot_state_hook(Object &&cb) { return m_boot_state_hook.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_boot_state_hook(Object &&cb) { return m_boot_state_hook.set_callback(std::forward<Object>(cb)); }
DECLARE_WRITE_LINE_MEMBER(pc_pirqa_w);
DECLARE_WRITE_LINE_MEMBER(pc_pirqb_w);
DECLARE_WRITE_LINE_MEMBER(pc_pirqc_w);
DECLARE_WRITE_LINE_MEMBER(pc_pirqd_w);
DECLARE_WRITE_LINE_MEMBER(pc_mirq0_w);
DECLARE_WRITE_LINE_MEMBER(pc_mirq1_w);
DECLARE_WRITE_LINE_MEMBER(pc_ferr_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq1_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq3_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq4_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq5_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq6_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq7_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq8n_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq9_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq10_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq11_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq12m_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq14_w);
DECLARE_WRITE_LINE_MEMBER(pc_irq15_w);
protected: protected:
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override; virtual void device_reset() override;
@ -100,8 +122,8 @@ private:
DECLARE_WRITE8_MEMBER (tom_w); DECLARE_WRITE8_MEMBER (tom_w);
DECLARE_READ16_MEMBER (mstat_r); DECLARE_READ16_MEMBER (mstat_r);
DECLARE_WRITE16_MEMBER(mstat_w); DECLARE_WRITE16_MEMBER(mstat_w);
DECLARE_READ8_MEMBER (mbirq0_r); DECLARE_READ8_MEMBER (mbirq01_r);
DECLARE_WRITE8_MEMBER (mbirq0_w); DECLARE_WRITE8_MEMBER (mbirq01_w);
DECLARE_READ8_MEMBER (mbdma_r); DECLARE_READ8_MEMBER (mbdma_r);
DECLARE_WRITE8_MEMBER (mbdma_w); DECLARE_WRITE8_MEMBER (mbdma_w);
DECLARE_READ16_MEMBER (pcsc_r); DECLARE_READ16_MEMBER (pcsc_r);
@ -136,6 +158,8 @@ private:
DECLARE_WRITE8_MEMBER(ide2_write_cs1_w); DECLARE_WRITE8_MEMBER(ide2_write_cs1_w);
DECLARE_READ8_MEMBER(at_dma8237_2_r); DECLARE_READ8_MEMBER(at_dma8237_2_r);
DECLARE_WRITE8_MEMBER(at_dma8237_2_w); DECLARE_WRITE8_MEMBER(at_dma8237_2_w);
DECLARE_READ8_MEMBER(eisa_irq_read);
DECLARE_WRITE8_MEMBER(eisa_irq_write);
DECLARE_READ8_MEMBER(read_apmcapms); DECLARE_READ8_MEMBER(read_apmcapms);
DECLARE_WRITE8_MEMBER(write_apmcapms); DECLARE_WRITE8_MEMBER(write_apmcapms);
@ -147,7 +171,7 @@ private:
uint32_t see; uint32_t see;
uint16_t xbcs, mstat, pcsc, smien, smireq; uint16_t xbcs, mstat, pcsc, smien, smireq;
uint8_t apmc, apms; uint8_t apmc, apms;
uint8_t iort, pirqrc[4], tom, mbirq0, mbdma[2], apicbase; uint8_t iort, pirqrc[4], tom, mbirq0, mbirq1, mbdma[2], apicbase;
uint8_t dlc, smicntl, ftmr, ctlmtr, cthmtr; uint8_t dlc, smicntl, ftmr, ctlmtr, cthmtr;
void map_bios(address_space *memory_space, uint32_t start, uint32_t end); void map_bios(address_space *memory_space, uint32_t start, uint32_t end);
@ -169,6 +193,7 @@ private:
uint8_t m_dma_offset[2][4]; uint8_t m_dma_offset[2][4];
uint8_t m_at_pages[0x10]; uint8_t m_at_pages[0x10];
uint16_t m_dma_high_byte; uint16_t m_dma_high_byte;
uint16_t m_eisa_irq_mode;
uint8_t m_at_speaker; uint8_t m_at_speaker;
bool m_refresh; bool m_refresh;
void at_speaker_set_spkrdata(uint8_t data); void at_speaker_set_spkrdata(uint8_t data);
@ -177,6 +202,7 @@ private:
uint8_t m_nmi_enabled; uint8_t m_nmi_enabled;
void pc_select_dma_channel(int channel, bool state); void pc_select_dma_channel(int channel, bool state);
void redirect_irq(int irq, int state);
}; };
DECLARE_DEVICE_TYPE(I82371SB_ISA, i82371sb_isa_device) DECLARE_DEVICE_TYPE(I82371SB_ISA, i82371sb_isa_device)

8
src/mame/drivers/pcipc.cpp
View File

@ -492,8 +492,8 @@ void pcipc_state::superio_config(device_t *device)
MCFG_FDC37C93X_SYSOPT(1) MCFG_FDC37C93X_SYSOPT(1)
MCFG_FDC37C93X_GP20_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET)) MCFG_FDC37C93X_GP20_RESET_CB(INPUTLINE(":maincpu", INPUT_LINE_RESET))
MCFG_FDC37C93X_GP25_GATEA20_CB(INPUTLINE(":maincpu", INPUT_LINE_A20)) MCFG_FDC37C93X_GP25_GATEA20_CB(INPUTLINE(":maincpu", INPUT_LINE_A20))
MCFG_FDC37C93X_IRQ1_CB(WRITELINE(":pci:07.0:pic8259_master", pic8259_device, ir1_w)) MCFG_FDC37C93X_IRQ1_CB(WRITELINE(":pci:07.0", i82371sb_isa_device, pc_irq1_w))
MCFG_FDC37C93X_IRQ8_CB(WRITELINE(":pci:07.0:pic8259_slave", pic8259_device, ir0_w)) MCFG_FDC37C93X_IRQ8_CB(WRITELINE(":pci:07.0", i82371sb_isa_device, pc_irq8n_w))
MCFG_FDC37C93X_TXD1_CB(WRITELINE(":serport0", rs232_port_device, write_txd)) MCFG_FDC37C93X_TXD1_CB(WRITELINE(":serport0", rs232_port_device, write_txd))
MCFG_FDC37C93X_NDTR1_CB(WRITELINE(":serport0", rs232_port_device, write_dtr)) MCFG_FDC37C93X_NDTR1_CB(WRITELINE(":serport0", rs232_port_device, write_dtr))
MCFG_FDC37C93X_NRTS1_CB(WRITELINE(":serport0", rs232_port_device, write_rts)) MCFG_FDC37C93X_NRTS1_CB(WRITELINE(":serport0", rs232_port_device, write_rts))
@ -513,7 +513,7 @@ MACHINE_CONFIG_START(pcipc_state::pcipc)
MCFG_I82371SB_BOOT_STATE_HOOK(WRITE8(*this, pcipc_state, boot_state_phoenix_ver40_rev6_w)) MCFG_I82371SB_BOOT_STATE_HOOK(WRITE8(*this, pcipc_state, boot_state_phoenix_ver40_rev6_w))
MCFG_I82371SB_SMI_CB(INPUTLINE(":maincpu", INPUT_LINE_SMI)) MCFG_I82371SB_SMI_CB(INPUTLINE(":maincpu", INPUT_LINE_SMI))
MCFG_DEVICE_ADD( ":pci:07.1", I82371SB_IDE, 0) MCFG_DEVICE_ADD( ":pci:07.1", I82371SB_IDE, 0)
MCFG_I82371SB_IDE_INTERRUPTS(":pci:07.0:pic8259_slave", pic8259_device, ir6_w, ir7_w) MCFG_I82371SB_IDE_INTERRUPTS(":pci:07.0", i82371sb_isa_device, pc_irq14_w, pc_irq15_w)
// MCFG_DEVICE_ADD( ":pci:12.0", MGA2064W, 0) // MCFG_DEVICE_ADD( ":pci:12.0", MGA2064W, 0)
MCFG_DEVICE_ADD("board4", ISA16_SLOT, 0, "pci:07.0:isabus", isa_internal_devices, "fdc37c93x", true) MCFG_DEVICE_ADD("board4", ISA16_SLOT, 0, "pci:07.0:isabus", isa_internal_devices, "fdc37c93x", true)
@ -535,7 +535,7 @@ MACHINE_CONFIG_START(pcipc_state::pcipc)
MCFG_RS232_DSR_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ndsr2_w)) MCFG_RS232_DSR_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ndsr2_w))
MCFG_RS232_RI_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, nri2_w)) MCFG_RS232_RI_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, nri2_w))
MCFG_RS232_CTS_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ncts2_w)) MCFG_RS232_CTS_HANDLER(WRITELINE("board4:fdc37c93x", fdc37c93x_device, ncts2_w))
MACHINE_CONFIG_END MACHINE_CONFIG_END
MACHINE_CONFIG_START(pcipc_state::pcipctx) MACHINE_CONFIG_START(pcipc_state::pcipctx)
MCFG_DEVICE_ADD("maincpu", PENTIUM, 60000000) MCFG_DEVICE_ADD("maincpu", PENTIUM, 60000000)