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gah, need to add (nw)
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Vas Crabb
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67
src/devices/bus/intellec4/prommemory.cpp
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67
src/devices/bus/intellec4/prommemory.cpp
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// license:BSD-3-Clause
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// copyright-holders:Vas Crabb
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#include "emu.h"
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#include "prommemory.h"
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DEFINE_DEVICE_TYPE_NS(INTELLEC4_PROM_MEMORY, bus::intellec4, imm6_26_device, "intlc4_imm6_26", "Intel imm6-26 PROM Memory Module")
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namespace bus { namespace intellec4 {
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imm6_26_device::imm6_26_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
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: device_t(mconfig, INTELLEC4_PROM_MEMORY, tag, owner, clock)
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, device_univ_card_interface(mconfig, *this)
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, device_image_interface(mconfig, *this)
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, m_data()
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{
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}
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image_init_result imm6_26_device::call_load()
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{
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if ((length() > 4096U) || (length() % 256U))
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return image_init_result::FAIL;
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unmap();
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allocate();
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if (fread(m_data.get(), length()) != length())
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return image_init_result::FAIL;
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// FIXME: gimme a cookie!
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rom_space().install_rom(0x1000U, offs_t(0x1000U + length()), m_data.get());
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return image_init_result::PASS;
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}
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void imm6_26_device::call_unload()
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{
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unmap();
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}
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void imm6_26_device::device_start()
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{
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allocate();
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save_pointer(NAME(m_data.get()), 4096U);
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}
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void imm6_26_device::allocate()
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{
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if (!m_data)
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{
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m_data = std::make_unique<u8 []>(4096U);
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std::fill(m_data.get(), m_data.get() + 4096U, 0U);
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}
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}
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void imm6_26_device::unmap()
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{
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// FIXME: where's my magic cookie?
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rom_space().unmap_read(0x1000U, 0x1fffU);
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}
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} } // namespace bus::intellec4
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124
src/devices/bus/intellec4/prommemory.h
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124
src/devices/bus/intellec4/prommemory.h
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// license:BSD-3-Clause
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// copyright-holders:Vas Crabb
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/*
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imm6-26 PROM Memory Module
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This card has sockets for sixteen 1702A or similar 256×8 PROMs providing
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up to 4KiB of program storage. This card has additional features for
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INTELLEC 8 systems, including module select lines and DIP switches for
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mapping PROMs in place of console RAM. These features are not emulated
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by this class.
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In theory you could populate any combination of sockets, and use
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multiple cards provided you don't populate corresponding sockets on two
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cards. To simplify things, we assume contiguous sockets are populated
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starting with PROM 0 (A2). In practice, you'd want to populate this
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socket as the boot vector is at address zero. If you want to simulate
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unpopulated sockets, just zero the corresponding area in your image
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file.
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Universal edge connector
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1 2
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GND 3 4 GND
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5 6
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7 8
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9 10
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MAD 0 11 12 MAD 1
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MAD 2 13 14 MAD 3
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MAD 4 15 16 MAD 5
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MAD 6 17 18 MAD 7
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MAD 8 19 20 MAD 9
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21 22
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MDI 0 23 24
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MDI 1 25 26
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MDI 3 27 28
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MDI 2 29 30
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MDI 5 31 32
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MDI 4 33 34
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MDI 7 35 36
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MDI 6 37 38
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39 40
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41 42
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-10V 43 44 -10V
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45 46
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47 48
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49 50
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51 52
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53 54
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55 56
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/MAD 12 57 58 MS 12
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MAD 13 59 60 MAD 12
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MS 13 61 62 /MAD 13
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/MAD 14 63 64 MS 14
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MAD 15 65 66 MAD 14
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MS 15 67 68 /MAD 15
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69 70
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71 72
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73 74
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75 76
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77 78
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79 80
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81 82 /ASMB
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83 84
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85 86
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87 88
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89 90
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/ADR STB 91 92
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RAM MOD ENBL 93 94 MAD 11
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95 96 MAD 10
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/PROM MOD ENBL 97 98
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+5V 99 100 +5V
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MAD 0...MAD 7 mapped to MA0...MA7 on INTELLEC 4
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MAD 8...MAD 11 mapped to C0...C3 on INTELLEC 4
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MAD 12...MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
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/MAD 12.../MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
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MS 12...MS 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
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MDI 0...7 data outputs
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/ASMB global enable mapped to /PROM SEL on INTELLEC 4, not jumpered in on INTELLEC 8
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/ADR STB not jumpered in on INTELLEC 4 and INTELLEC 8, latch enables jumpered to GND
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RAM MOD ENBL not jumpered in on INTELLEC 4, allows PROM to overlay RAM on INTELLEC 8
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/PROM MOD ENBL not jumpered in on INTELLEC 4, used as global enable on INTELLEC 8
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*/
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#ifndef MAME_BUS_INTELLEC4_PROMMEMORY_H
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#define MAME_BUS_INTELLEC4_PROMMEMORY_H
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#pragma once
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#include "intellec4.h"
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namespace bus { namespace intellec4 {
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class imm6_26_device : public device_t, public device_univ_card_interface, public device_image_interface
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{
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public:
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imm6_26_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
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virtual image_init_result call_load() override;
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virtual void call_unload() override;
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virtual iodevice_t image_type() const override { return IO_ROM; }
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virtual bool is_readable() const override { return true; }
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virtual bool is_writeable() const override { return false; }
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virtual bool is_creatable() const override { return false; }
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virtual bool must_be_loaded() const override { return false; }
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virtual bool is_reset_on_load() const override { return false; }
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virtual char const *file_extensions() const override { return "rom,bin"; }
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protected:
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virtual void device_start() override;
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private:
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void allocate();
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void unmap();
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std::unique_ptr<u8 []> m_data;
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};
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} } // namespace bus::intellec4
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DECLARE_DEVICE_TYPE_NS(INTELLEC4_PROM_MEMORY, bus::intellec4, imm6_26_device)
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#endif // MAME_BUS_INTELLEC4_PROMMEMORY_H
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