diff --git a/src/mame/drivers/legionna.c b/src/mame/drivers/legionna.c index 8e557d6f8f0..cedc82f2d24 100644 --- a/src/mame/drivers/legionna.c +++ b/src/mame/drivers/legionna.c @@ -85,14 +85,14 @@ extern READ16_HANDLER( legionna_mcu_r ); extern WRITE16_HANDLER( legionna_mcu_w ); extern READ16_HANDLER( heatbrl_mcu_r ); extern WRITE16_HANDLER( heatbrl_mcu_w ); -extern READ16_HANDLER( godzilla_cop_mcu_r ); -extern WRITE16_HANDLER( godzilla_cop_mcu_w ); -extern READ16_HANDLER( denjinmk_cop_mcu_r ); -extern WRITE16_HANDLER( denjinmk_cop_mcu_w ); -extern READ16_HANDLER( sdgndmrb_cop_mcu_r ); -extern WRITE16_HANDLER( sdgndmrb_cop_mcu_w ); -extern READ16_HANDLER( cupsoc_cop_mcu_r ); -extern WRITE16_HANDLER( cupsoc_cop_mcu_w ); +extern READ16_HANDLER( godzilla_mcu_r ); +extern WRITE16_HANDLER( godzilla_mcu_w ); +extern READ16_HANDLER( denjinmk_mcu_r ); +extern WRITE16_HANDLER( denjinmk_mcu_w ); +extern READ16_HANDLER( sdgndmrb_mcu_r ); +extern WRITE16_HANDLER( sdgndmrb_mcu_w ); +extern READ16_HANDLER( cupsoc_mcu_r ); +extern WRITE16_HANDLER( cupsoc_mcu_w ); extern READ16_HANDLER( copdxbl_0_r ); extern WRITE16_HANDLER( copdxbl_0_w ); @@ -130,8 +130,8 @@ static WRITE16_HANDLER( legionna_paletteram16_w ) /* xBBBBxRRRRxGGGGx */ static ADDRESS_MAP_START( legionna_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ AM_RANGE(0x101000, 0x1017ff) AM_RAM AM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x101800, 0x101fff) AM_RAM AM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data) AM_RANGE(0x102000, 0x1027ff) AM_RAM AM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data) @@ -146,8 +146,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( heatbrl_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ AM_RANGE(0x100800, 0x100fff) AM_RAM AM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x101000, 0x1017ff) AM_RAM AM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data) AM_RANGE(0x101800, 0x101fff) AM_RAM AM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data) @@ -159,8 +159,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( godzilla_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(godzilla_cop_mcu_r, godzilla_cop_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(godzilla_mcu_r, godzilla_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ AM_RANGE(0x100800, 0x100fff) AM_RAM AM_RANGE(0x101000, 0x101fff) AM_RAM AM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x102000, 0x1027ff) AM_RAM AM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data) @@ -176,8 +176,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( denjinmk_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(denjinmk_cop_mcu_r, denjinmk_cop_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ AM_RANGE(0x100800, 0x100fff) AM_RAM AM_RANGE(0x101000, 0x1017ff) AM_RAM AM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x101800, 0x101fff) AM_RAM AM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data) @@ -193,8 +193,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( sdgndmrb_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(sdgndmrb_cop_mcu_r, sdgndmrb_cop_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(sdgndmrb_mcu_r, sdgndmrb_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */ AM_RANGE(0x100800, 0x100fff) AM_RAM AM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x101000, 0x1017ff) AM_RAM AM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data) AM_RANGE(0x101800, 0x101fff) AM_RAM AM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data) @@ -209,8 +209,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( cupsoc_mem, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - //AM_RANGE(0x100000, 0x1003ff) AM_RAM - AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(cupsoc_cop_mcu_r,cupsoc_cop_mcu_w) AM_BASE(&cop_mcu_ram) + AM_RANGE(0x100000, 0x1003ff) AM_RAM + AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE(&cop_mcu_ram) AM_RANGE(0x100800, 0x100fff) AM_RAM AM_READWRITE(SMH_RAM,legionna_background_w) AM_BASE(&legionna_back_data) AM_RANGE(0x101000, 0x1017ff) AM_RAM AM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data) AM_RANGE(0x101800, 0x101fff) AM_RAM AM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data) diff --git a/src/mame/drivers/raiden2.c b/src/mame/drivers/raiden2.c index 2756e9fbac1..fd1139b9c57 100644 --- a/src/mame/drivers/raiden2.c +++ b/src/mame/drivers/raiden2.c @@ -75,7 +75,7 @@ static void combine32(UINT32 *val, int offset, UINT16 data, UINT16 mem_mask) /* machine/seicop.c */ extern READ16_HANDLER( raiden2_cop2_r ); extern WRITE16_HANDLER( raiden2_cop2_w ); -extern void cop_init(void); +//extern void cop_init(void); @@ -482,14 +482,6 @@ static VIDEO_UPDATE ( raiden2 ) static INTERRUPT_GEN( raiden2_interrupt ) { - mainram[0x740/2] = input_port_read_indexed(machine, 2) | (input_port_read_indexed(machine, 3) << 8); - mainram[0x742/2] = 0xffff; - mainram[0x744/2] = input_port_read_indexed(machine, 0) | (input_port_read_indexed(machine, 1) << 8); - mainram[0x746/2] = 0xffff; - mainram[0x748/2] = 0xffff; - mainram[0x74a/2] = 0xffff; - mainram[0x74c/2] = input_port_read_indexed(machine, 4) | 0xff00; - mainram[0x74e/2] = 0xffff; cpunum_set_input_line_and_vector(machine, cpunum, 0, HOLD_LINE, 0xc0/4); /* VBL */ logerror("VSYNC\n"); @@ -518,22 +510,22 @@ static void sprcpt_init(void) } -static WRITE16_HANDLER(sprcpt_adr_w) +WRITE16_HANDLER(sprcpt_adr_w) { combine32(&sprcpt_adr, offset, data, mem_mask); } -static WRITE16_HANDLER(sprcpt_data_1_w) +WRITE16_HANDLER(sprcpt_data_1_w) { combine32(sprcpt_data_1+sprcpt_adr, offset, data, mem_mask); } -static WRITE16_HANDLER(sprcpt_data_2_w) +WRITE16_HANDLER(sprcpt_data_2_w) { combine32(sprcpt_data_2+sprcpt_adr, offset, data, mem_mask); } -static WRITE16_HANDLER(sprcpt_data_3_w) +WRITE16_HANDLER(sprcpt_data_3_w) { combine32(sprcpt_data_3+sprcpt_idx, offset, data, mem_mask); if(offset == 1) { @@ -543,7 +535,7 @@ static WRITE16_HANDLER(sprcpt_data_3_w) } } -static WRITE16_HANDLER(sprcpt_data_4_w) +WRITE16_HANDLER(sprcpt_data_4_w) { combine32(sprcpt_data_4+sprcpt_idx, offset, data, mem_mask); if(offset == 1) { @@ -553,17 +545,17 @@ static WRITE16_HANDLER(sprcpt_data_4_w) } } -static WRITE16_HANDLER(sprcpt_val_1_w) +WRITE16_HANDLER(sprcpt_val_1_w) { combine32(sprcpt_val+0, offset, data, mem_mask); } -static WRITE16_HANDLER(sprcpt_val_2_w) +WRITE16_HANDLER(sprcpt_val_2_w) { combine32(sprcpt_val+1, offset, data, mem_mask); } -static WRITE16_HANDLER(sprcpt_flags_1_w) +WRITE16_HANDLER(sprcpt_flags_1_w) { combine32(&sprcpt_flags1, offset, data, mem_mask); if(offset == 1) { @@ -592,7 +584,7 @@ static WRITE16_HANDLER(sprcpt_flags_1_w) } } -static WRITE16_HANDLER(sprcpt_flags_2_w) +WRITE16_HANDLER(sprcpt_flags_2_w) { COMBINE_DATA(&sprcpt_flags2); if(offset == 0) { @@ -741,24 +733,18 @@ static void r2_6f6c(UINT16 cc, UINT16 v1, UINT16 v2) static MACHINE_RESET(raiden2) { sprcpt_init(); - cop_init(); + //cop_init(); } /* MEMORY MAPS */ -static ADDRESS_MAP_START( raiden2_mem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x00400, 0x005ff) AM_READWRITE(raiden2_cop2_r, raiden2_cop2_w) +extern UINT16* cop_mcu_ram; +extern WRITE16_HANDLER( raiden2_mcu_w ); +extern READ16_HANDLER( raiden2_mcu_r ); - AM_RANGE(0x006a0, 0x006a3) AM_WRITE(sprcpt_val_1_w) - AM_RANGE(0x006a4, 0x006a7) AM_WRITE(sprcpt_data_3_w) - AM_RANGE(0x006a8, 0x006ab) AM_WRITE(sprcpt_data_4_w) - AM_RANGE(0x006ac, 0x006af) AM_WRITE(sprcpt_flags_1_w) - AM_RANGE(0x006b0, 0x006b3) AM_WRITE(sprcpt_data_1_w) - AM_RANGE(0x006b4, 0x006b7) AM_WRITE(sprcpt_data_2_w) - AM_RANGE(0x006b8, 0x006bb) AM_WRITE(sprcpt_val_2_w) - AM_RANGE(0x006bc, 0x006bf) AM_WRITE(sprcpt_adr_w) - AM_RANGE(0x006ce, 0x006cf) AM_WRITE(sprcpt_flags_2_w) +static ADDRESS_MAP_START( raiden2_mem, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x00400, 0x007ff) AM_READWRITE(raiden2_mcu_r, raiden2_mcu_w) AM_BASE(&cop_mcu_ram) AM_RANGE(0x00000, 0x0bfff) AM_READWRITE(any_r, any_w) AM_BASE(&mainram) // AM_RANGE(0x00000, 0x003ff) AM_RAM @@ -1052,7 +1038,9 @@ YM2151 OKI M6295 VOI2 Z8400A ROM_START( raiden2 ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("prg0", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("prg1", 0x000001, 0x80000, CRC(4609b5f2) SHA1(272d2aa75b8ea4d133daddf42c4fc9089093df2e) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "snd", 0x000000, 0x10000, CRC(f51a28f9) SHA1(7ae2e2ba0c8159a544a8fd2bb0c2c694ba849302) ) @@ -1100,7 +1088,9 @@ S5 U0724 27C1024 ROM7 966D ROM_START( raiden2a ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("prg0", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) // rom1 + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("rom2e", 0x000001, 0x80000, CRC(458d619c) SHA1(842bf0eeb5d192a6b188f4560793db8dad697683) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "rom5", 0x000000, 0x10000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) ) @@ -1127,7 +1117,9 @@ ROM_END ROM_START( raiden2b ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("prg0", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) // rom1 + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("rom2j", 0x000001, 0x80000, CRC(e4e4fb4c) SHA1(7ccf33fe9a1cddf0c7e80d7ed66d615a828b3bb9) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "rom5", 0x000000, 0x10000, CRC(8f130589) SHA1(e58c8beaf9f27f063ffbcb0ab4600123c25ce6f3) ) @@ -1193,7 +1185,9 @@ CUSTOM: SEI150 ROM_START( raiden2c ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("prg0", 0x000000, 0x80000, CRC(09475ec4) SHA1(05027f2d8f9e11fcbd485659eda68ada286dae32) ) // rom1 + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("rom2j", 0x000001, 0x80000, CRC(e4e4fb4c) SHA1(7ccf33fe9a1cddf0c7e80d7ed66d615a828b3bb9) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "rd2_5.110", 0x000000, 0x10000, CRC(c2028ba2) SHA1(f6a9322b669ff82dea6ecf52ad3bd5d0901cce1b) ) @@ -1221,7 +1215,9 @@ ROM_END ROM_START( raiden2d ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("seibu1", 0x000000, 0x80000, CRC(c1fc70f5) SHA1(a054f5ae9583972c406d9cf871340d5e072d71a3) ) + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("seibu2", 0x000001, 0x80000, CRC(28d5365f) SHA1(21efe29c2d373229c2ff302d86e59c2c94fa6d03) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "seibu5", 0x000000, 0x10000, CRC(5db9f922) SHA1(8257aab98657fe44df19d2a48d85fcf65b3d98c6) ) @@ -1289,7 +1285,9 @@ r2_voi2.bin 262144 0x8cf0d17e TC534000P Dumped as 27C040. 1'st and ROM_START( raiden2e ) ROM_REGION( 0x200000, REGION_USER1, 0 ) /* v30 main cpu */ ROM_LOAD16_BYTE("r2_prg_0.bin", 0x000000, 0x80000, CRC(2abc848c) SHA1(1df4276d0074fcf1267757fa0b525a980a520f3d) ) + ROM_RELOAD(0x100000, 0x80000) ROM_LOAD16_BYTE("r2_prg_1.bin", 0x000001, 0x80000, CRC(509ade43) SHA1(7cdee7bb00a6a1c7899d10b96385d54c261f6f5a) ) + ROM_RELOAD(0x100001, 0x80000) ROM_REGION( 0x20000, REGION_CPU2, 0 ) /* 64k code for sound Z80 */ ROM_LOAD( "r2_snd.bin", 0x000000, 0x10000, CRC(6bad0a3e) SHA1(eb7ae42353e1984cd60b569c26cdbc3b025a7da6) ) @@ -1822,7 +1820,7 @@ static DRIVER_INIT (raiden2) /* wrong , there must be some banking this just stops it crashing */ UINT8 *RAM = memory_region(REGION_USER1); - memory_set_bankptr(1,&RAM[0x000000]); + memory_set_bankptr(1,&RAM[0x100000]); memory_set_bankptr(2,&RAM[0x040000]); raiden2_decrypt_sprites(); diff --git a/src/mame/machine/seicop.c b/src/mame/machine/seicop.c index ef2c4b2d8a2..b58b7b8bd08 100644 --- a/src/mame/machine/seicop.c +++ b/src/mame/machine/seicop.c @@ -49,6 +49,7 @@ #include "driver.h" #include "audio/seibu.h" + UINT16 *cop_mcu_ram; static UINT16 copd2_table[0x100]; @@ -141,134 +142,18 @@ void copd2_set_tabledata(UINT16 data, running_machine *machine) } } -/* Mcu reads in attract in Legionnaire game demo -Guess the 0x400-0x5ff area of the COP is protection related. - -CPU0 PC 0032a2 unknown MCU write offset: 0260 data: 9c6c -CPU0 PC 0032a8 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 0032c8 unknown MCU write offset: 0261 data: 987c -CPU0 PC 0032ce unknown MCU write offset: 0251 data: 0010 -CPU0 PC 003546 unknown MCU write offset: 0262 data: 02c4 -CPU0 PC 00354a unknown MCU write offset: 0252 data: 0004 -CPU0 PC 00355c unknown MCU write offset: 0263 data: 0000 -CPU0 PC 003560 unknown MCU write offset: 0253 data: 0004 -CPU0 PC 003568 unknown MCU write offset: 0280 data: a180 -CPU0 PC 00356e unknown MCU write offset: 0280 data: a980 -CPU0 PC 003574 unknown MCU write offset: 0280 data: b100 -CPU0 PC 00357a unknown MCU write offset: 0280 data: b900 -CPU0 PC 003580 unknown MCU read offset: 02c4 -CPU0 PC 003588 unknown MCU read offset: 02c2 -CPU0 PC 003594 unknown MCU read offset: 02c1 -CPU0 PC 0035a0 unknown MCU read offset: 02c3 -CPU0 PC 0032a2 unknown MCU write offset: 0260 data: 9c6c -CPU0 PC 0032a8 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 0032c8 unknown MCU write offset: 0261 data: 987c -CPU0 PC 0032ce unknown MCU write offset: 0251 data: 0010 -CPU0 PC 003422 unknown MCU write offset: 0280 data: 138e -CPU0 PC 003428 unknown MCU read offset: 02da -CPU0 PC 00342e unknown MCU read offset: 02d8 -CPU0 PC 00346c unknown MCU write offset: 0280 data: 3bb0 -CPU0 PC 0032a2 unknown MCU write offset: 0260 data: 987c -CPU0 PC 0032a8 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 003306 unknown MCU write offset: 0280 data: 8100 -CPU0 PC 00330c unknown MCU write offset: 0280 data: 8900 - - -Mcu reads in attract in Heated Barrel game demo (note -partial similarity) - -(i) This sequence repeats a number of times early on: - -CPU0 PC 0085b4 unknown MCU write offset: 0210 data: 0064 -CPU0 PC 0085ba unknown MCU write offset: 0211 data: 0000 -CPU0 PC 0085be unknown MCU read offset: 02ca -CPU0 PC 0085ee unknown MCU read offset: 02c9 -CPU0 PC 008622 unknown MCU read offset: 02c8 -[Protection BCD,see protection_bcd_jsr()] - -(ii) This happens a few times: - -CPU0 PC 0017ac unknown MCU write offset: 0260 data: b6cc -CPU0 PC 0017b2 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 0017d2 unknown MCU write offset: 0261 data: babc -CPU0 PC 0017d8 unknown MCU write offset: 0251 data: 0010 -CPU0 PC 00192c unknown MCU write offset: 0280 data: 138e -CPU0 PC 001932 unknown MCU read offset: 02da -CPU0 PC 001938 unknown MCU read offset: 02d8 -CPU0 PC 001976 unknown MCU write offset: 0280 data: 3bb0 -CPU0 PC 0017ac unknown MCU write offset: 0260 data: b6cc -CPU0 PC 0017b2 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 0017d2 unknown MCU write offset: 0261 data: bb9c -CPU0 PC 0017d8 unknown MCU write offset: 0251 data: 0010 -CPU0 PC 00192c unknown MCU write offset: 0280 data: 138e -CPU0 PC 001932 unknown MCU read offset: 02da -CPU0 PC 001938 unknown MCU read offset: 02d8 -CPU0 PC 001976 unknown MCU write offset: 0280 data: 3bb0 - - - -(iii) Later on this happens a lot: - -CPU0 PC 0017ac unknown MCU write offset: 0260 data: c61c -CPU0 PC 0017b2 unknown MCU write offset: 0250 data: 0010 -CPU0 PC 0017d2 unknown MCU write offset: 0261 data: bb9c -CPU0 PC 0017d8 unknown MCU write offset: 0251 data: 0010 -CPU0 PC 001a5c unknown MCU write offset: 0262 data: aa48 -CPU0 PC 001a62 unknown MCU write offset: 0252 data: 0003 -CPU0 PC 001a7c unknown MCU write offset: 0263 data: a0c8 -CPU0 PC 001a82 unknown MCU write offset: 0253 data: 0003 -CPU0 PC 001a86 unknown MCU write offset: 0280 data: a100 -CPU0 PC 001a8c unknown MCU write offset: 0280 data: b080 -CPU0 PC 001a92 unknown MCU write offset: 0280 data: a900 -CPU0 PC 001a98 unknown MCU write offset: 0280 data: b880 -CPU0 PC 001a9e unknown MCU read offset: 02c0 -CPU0 PC 001aa6 unknown MCU read offset: 02c2 -CPU0 PC 001ab2 unknown MCU read offset: 02c1 - -write to $500 these values to determine the kind of sub-routine to do -hit_check -a180 -a980 -b100 -b900 -|| b880 (heatbrl) - -movement protection -8100 -8900 - -00DB2A: D6A8 0048 add.l ($48,A0), D3 -00DB2E: D8A8 0044 add.l ($44,A0), D4 -00DB32: 0C83 FFF0 0000 cmpi.l #-$100000, D3 -00DB38: 6D2E blt $db68 -00DB3A: 0C83 0100 0000 cmpi.l #$1000000, D3 -00DB40: 6C26 bge $db68 -00DB42: 2143 003C move.l D3, ($3c,A0) -00DB46: 0C84 FFF0 0000 cmpi.l #-$100000, D4 -00DB4C: 6D1A blt $db68 -00DB4E: 0C84 0100 0000 cmpi.l #$1000000, D4 -00DB54: 6E12 bgt $db68 -00DB56: 2144 0038 move.l D4, ($38,A0) -00DB5A: 3168 003C 0022 move.w ($3c,A0), ($22,A0) -00DB60: 3168 0038 0024 move.w ($38,A0), ($24,A0) -00DB66: 4E75 rts - - -sprite DMA - -*/ /*Movement protection*//*Legionnaire,Heated Barrel*/ -static UINT32 ram_addr[2],rom_addr[2]; +static UINT32 ram_addr[5]; /*Sprite DMA protection*//*SD Gundam*/ static UINT8 dma_status; -static UINT32 dma_src,dma_dst; +static UINT32 dma_src; static UINT16 prot_data[2],dma_size; /*Number protection*//*Heated Barrel,SD Gundam,Godzilla,Denjin Makai*/ static UINT32 prot_bcd[4]; /*Hit check protection*//*Legionnaire,Heated Barrel,SD Gundam*/ static UINT8 xy_check; -static UINT32 hit_check_x,hit_check_y; + @@ -376,13 +261,6 @@ static void protection_move_jsr(UINT32 work_ram,UINT8 k) program_write_word(work_ram+0x4,y_data); } -#ifdef UNUSED_FUNCTION -static void protection_move2_jsr(void) -{ -// static UINT32 move_data; -// popmessage("%08x %08x %08x %08x",ram_addr[0],ram_addr[1],rom_addr[0],rom_addr[1]); -} -#endif static UINT16 hit_check; @@ -527,129 +405,7 @@ static void move3y_prot_jsr(void) #endif -READ16_HANDLER( legionna_mcu_r ) -{ - UINT16 retvalue = cop_mcu_ram[offset]; - switch (offset) - { - default: - { - logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", activecpu_get_pc(), retvalue, offset*2); - return retvalue; - } - - /********************************************************************* - 400-5ff - Protection reads - *********************************************************************/ - - case (0x470/2): return (mame_rand(machine) &0xffff); /* read PC $110a, could be some sort of control word: sometimes a bit is changed then it's poked back in... */ - case (0x582/2): return (0); /* read PC $3594 */ - case (0x584/2): return (0); /* read PC $3588 */ - case (0x586/2): return (0); /* read PC $35a0 */ - case (0x588/2): return hit_check; /* read PC $3580 */ - case (0x5b0/2): return (0); /* bit 15 is branched on a few times in the $3300 area */ - case (0x5b4/2): return (0); /* read and stored in ram before +0x5b0 bit 15 tested */ - - - /********************************************************************* - 700-7ff - Non-protection reads - *********************************************************************/ - - /* Seibu Sound System */ - case (0x708/2): return seibu_main_word_r(machine,2,0); - case (0x70c/2): return seibu_main_word_r(machine,3,0); - case (0x714/2): return seibu_main_word_r(machine,5,0); - - /* Inputs */ - case (0x740/2): return input_port_1_word_r(machine,0,0); - case (0x744/2): return input_port_2_word_r(machine,0,0); - case (0x748/2): return input_port_0_word_r(machine,0,0); - case (0x74c/2): return input_port_3_word_r(machine,0,0); - - } -} - - -WRITE16_HANDLER( legionna_mcu_w ) -{ - COMBINE_DATA(&cop_mcu_ram[offset]); - - switch (offset) - { - default: - { - logerror("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - /* Trigger Table upload */ - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): { cop_438 = data; break; } - case (0x43a/2): { cop_43a = data; break; } - case (0x43c/2): { cop_43c = data; break; } - - /* Registers */ - case (0x4c0/2): { prot_data[0] = cop_mcu_ram[offset]; ram_addr[0] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4a0/2): { prot_data[1] = cop_mcu_ram[offset]; ram_addr[0] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4c2/2): { prot_data[0] = cop_mcu_ram[offset]; ram_addr[1] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4a2/2): { prot_data[1] = cop_mcu_ram[offset]; ram_addr[1] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4c4/2): { prot_data[0] = cop_mcu_ram[offset]; rom_addr[0] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4a4/2): { prot_data[1] = cop_mcu_ram[offset]; rom_addr[0] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4c6/2): { prot_data[0] = cop_mcu_ram[offset]; rom_addr[1] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x4a6/2): { prot_data[1] = cop_mcu_ram[offset]; rom_addr[1] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - - /* Execute Macro command from table */ - case (0x500/2): - { - /*Movement protection*/ - if(cop_mcu_ram[0x500/2] == 0x8900 || cop_mcu_ram[0x500/2] == 0x0205) - { - static UINT16 xy_data[2]; - static UINT8 k; - xy_data[0] = program_read_word(rom_addr[0]); - xy_data[1] = program_read_word(rom_addr[1]); - k = (cop_mcu_ram[0x500/2] == 0x0205) ? ENEMY : PLAYER; - protection_move_jsr(ram_addr[0],k); - //protection_move_jsr(ram_addr[1]); //??? - //popmessage("%08x %08x %04x %04x",ram_addr[0],ram_addr[1],xy_data[0],xy_data[1]); - } - else if(cop_mcu_ram[0x500/2] == 0x3bb0 || cop_mcu_ram[0x500/2] == 0x138e) - { - protection_hit_jsr(ram_addr[0],ram_addr[1]); - } - break; - } - - /********************************************************************* - 600-6ff - Video Registers - *********************************************************************/ - - // 61a bit 0 is flipscreen - // 61c probably layer disables, like Dcon - - case (0x620/2): { legionna_scrollram16[0] = cop_mcu_ram[offset]; break; } - case (0x622/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; } - case (0x624/2): { legionna_scrollram16[2] = cop_mcu_ram[offset]; break; } - case (0x626/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; } - case (0x628/2): { legionna_scrollram16[4] = cop_mcu_ram[offset]; break; } - case (0x62a/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; } - - /********************************************************************* - 700-7ff - Output (Seibu Sound System) - *********************************************************************/ - - case (0x700/2): { seibu_main_word_w(machine,0,cop_mcu_ram[offset],0xff00); break; } - case (0x704/2): { seibu_main_word_w(machine,1,cop_mcu_ram[offset],0xff00); break; } - case (0x710/2): { seibu_main_word_w(machine,4,cop_mcu_ram[offset],0xff00); break; } - case (0x718/2): { seibu_main_word_w(machine,6,cop_mcu_ram[offset],0xff00); break; } - } -} @@ -760,26 +516,26 @@ static void dma_transfer(void) /*Sprite Color*/ param = program_read_word(0x100400) & 0x3f; /*Write the entire parameters [offs+0]*/ - program_write_word(dma_dst,program_read_word(dma_src) + param); + program_write_word(ram_addr[5]+4,program_read_word(dma_src) + param); /*Sprite Priority (guess)*/ //param = ((program_read_word(0x100400) & 0x40) ? 0x4000 : 0); /*Write the sprite number [offs+1]*/ - program_write_word(dma_dst+2,program_read_word(dma_src+2)); + program_write_word(ram_addr[5]+6,program_read_word(dma_src+2)); /*Sprite Relative x/y coords*/ rel_xy = program_read_word(dma_src+4); /*???*/ /*temporary hardwired,it should point to 0x4c0/0x4a0*/ abs_x = (program_read_word(0x110008) - program_read_word(0x10048e)); abs_y = (program_read_word(0x110004) - program_read_word(0x10048c)); - program_write_word(dma_dst+4,((rel_xy & 0x7f) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0)) & 0x1ff); - program_write_word(dma_dst+6,(((rel_xy & 0x7f00) >> 8) + (abs_y) + (0x10) - ((rel_xy & 0x8000) ? 0x80 : 0)) & 0x1ff); - dma_dst+=8; + program_write_word(ram_addr[5]+8,((rel_xy & 0x7f) + (abs_x) - ((rel_xy & 0x80) ? 0x80 : 0)) & 0x1ff); + program_write_word(ram_addr[5]+10,(((rel_xy & 0x7f00) >> 8) + (abs_y) + (0x10) - ((rel_xy & 0x8000) ? 0x80 : 0)) & 0x1ff); + ram_addr[5]+=8; dma_src+=6; } } /* - switch(program_read_word(hit_check_x)) + switch(program_read_word(ram_addr[2])) { case 0xb4: xparam = 0x0c/2; break; case 0xb8: xparam = 0x10/2; break; @@ -816,13 +572,13 @@ static UINT16 hit_check_jsr(void) /*Here we check the destination sprite width*/ /*0x4a4/0x4c4*/ - xparam = check_calc(program_read_word(hit_check_x)); + xparam = check_calc(program_read_word(ram_addr[2])); /*Here we check the destination sprite height*/ /*0x4a6/0x4c6*/ - yparam = check_calc(program_read_word(hit_check_y)); + yparam = check_calc(program_read_word(ram_addr[3])); if(!xparam || !yparam) - popmessage("SRC:%04x %04x DST:%04x %04x V:%08x %08x",xsrc,ysrc,xdst,ydst,program_read_word(hit_check_x),program_read_word(hit_check_y)); + popmessage("SRC:%04x %04x DST:%04x %04x V:%08x %08x",xsrc,ysrc,xdst,ydst,program_read_word(ram_addr[2]),program_read_word(ram_addr[3])); if(xdst >= (xsrc-xparam) && ydst >= (ysrc-yparam) && xdst <= (xsrc+xparam) && ydst <= (ysrc+yparam)) return 0;//sprites collide @@ -928,8 +684,8 @@ static UINT16 cop2_hit_prot(void) static INT16 param1,param2; static INT16 val; - param1 = program_read_word(rom_addr[0]); - param2 = program_read_word(rom_addr[1]); + param1 = program_read_word(ram_addr[2]); + param2 = program_read_word(ram_addr[3]); xsrc = program_read_word(ram_addr[0]+0x8) + program_read_word(ram_addr[0]+0x14); ysrc = program_read_word(ram_addr[0]+0x4) + program_read_word(ram_addr[0]+0x10); @@ -966,7 +722,7 @@ static void cop2_move2_prot(void) xsrc = program_read_word(ram_addr[0]+0x14); ysrc = program_read_word(ram_addr[0]+0x10); - param2 = program_read_word(rom_addr[1]); + param2 = program_read_word(ram_addr[3]); switch(param2) { @@ -984,1059 +740,8 @@ static void cop2_move2_prot(void) program_write_word(ram_addr[0]+0x10,ysrc); } -/****************************************************************************************** - Heated Barrel Specific -******************************************************************************************/ -READ16_HANDLER( heatbrl_mcu_r ) -{ - UINT16 retvalue = cop_mcu_ram[offset]; - switch (offset) - { - default: - { - printf("%06x: COPX unhandled read returning %04x from offset %04x\n", activecpu_get_pc(), retvalue, offset*2); - return retvalue; - } - - /********************************************************************* - 400-5ff - Protection reads - *********************************************************************/ - - case (0x580/2): { return xy_check; } /*hit protection*/ - case (0x582/2): { if(input_code_pressed(KEYCODE_X)) { return 0; } else { return 3; } } /*---- ---- ---- --xx used bits*/ - case (0x584/2): { if(input_code_pressed(KEYCODE_C)) { return 0; } else { return 3; } } /*---- ---- ---- --xx used bits*/ - - case (0x590/2): { return ((prot_bcd[0] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x592/2): { return ((prot_bcd[0] & 0xffff0000) >> 16) + 0x3030; } - case (0x594/2): { return ((prot_bcd[1] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x596/2): { return ((prot_bcd[1] & 0xffff0000) >> 16) + 0x3030; } - case (0x598/2): { return ((prot_bcd[2] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x59a/2): { return ((prot_bcd[2] & 0xffff0000) >> 16) + 0x3030; } - case (0x59c/2): { return 0x3030; } - - case (0x5b0/2): return (0xffff); /* bit 15 is branched on a few times in the $1938 area */ - case (0x5b4/2): return (0xffff); /* read at $1932 and stored in ram before +0x5b0 bit 15 tested */ - - /********************************************************************* - 700-7ff - Non-protection reads - *********************************************************************/ - - /* Seibu Sound System */ - case (0x7c8/2): return seibu_main_word_r(machine,2,0); - case (0x7cc/2): return seibu_main_word_r(machine,3,0); - case (0x7d4/2): return seibu_main_word_r(machine,5,0); - - /* Inputs */ - case (0x740/2): return input_port_1_word_r(machine,0,0); - case (0x744/2): return input_port_2_word_r(machine,0,0); - case (0x748/2): return input_port_4_word_r(machine,0,0); - case (0x74c/2): return input_port_3_word_r(machine,0,0); - - } -} - -WRITE16_HANDLER( heatbrl_mcu_w ) -{ - COMBINE_DATA(&cop_mcu_ram[offset]); - - switch (offset) - { - default: - { - printf("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - case (0x420/2): { prot_bcd[0] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x422/2): { prot_bcd[1] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x424/2): { prot_bcd[2] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - - - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): {cop_438 = data; break; } - case (0x43a/2): {cop_43a = data; break; } - case (0x43c/2): {cop_43c = data; break; } - - - /* Odd, this is a video register */ - case (0x470/2): { heatbrl_setgfxbank( cop_mcu_ram[offset] ); break; } - - /* Layer Clearing */ - case (0x478/2): /* clear address */ - { - cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address - printf("%06x: COPX set layer clear address to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - case (0x47a/2): /* clear length */ - { - cop_clearfill_length[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear length to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<5); - - break; - } - - case (0x47c/2): /* clear value? */ - { - cop_clearfill_value[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear value to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - /* unknown, related to clears? / DMA? */ - case (0x47e/2): - { - cop_clearfill_lasttrigger = data; - printf("%06x: COPX set layer clear trigger? to %04x\n", activecpu_get_pc(), data); - if (data>=0x1ff) - { - printf("invalid!, >0x1ff\n"); - cop_clearfill_lasttrigger = 0; - } - - break; - } - - /* hmm, this would be strange the 6xx range should be video regs?? */ - case (0x6fc/2): - { - printf("%06x: COPX execute current layer clear??? %04x\n", activecpu_get_pc(), data); - - // I think the value it writes here must match the other value for anything to happen.. maybe */ - //if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break; - if ((cop_clearfill_lasttrigger==0x14) || (cop_clearfill_lasttrigger==0x15)) return; - - /* do the fill */ - if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000) - { - UINT32 length, address; - int i; - address = cop_clearfill_address[cop_clearfill_lasttrigger] << 6; - length = (cop_clearfill_length[cop_clearfill_lasttrigger]+1) << 5; - - for (i=address;i> 0 ) + 0x3030; } - case (0x592/2): { return ((prot_bcd[0] & 0xffff0000) >> 16) + 0x3030; } - case (0x594/2): { return ((prot_bcd[1] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x596/2): { return ((prot_bcd[1] & 0xffff0000) >> 16) + 0x3030; } - case (0x598/2): { return ((prot_bcd[2] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x59a/2): { return ((prot_bcd[2] & 0xffff0000) >> 16) + 0x3030; } - case (0x59c/2): { return 0x3030; } - - case (0x5b0/2): - return 2; - /*check if the DMA has been finished*/ - if(dma_status == 1) - { - dma_status = 0; - return 2; - } - return cop_mcu_ram[offset]; - - /* Non-protection reads */ - case (0x708/2): return seibu_main_word_r(machine,2,0); - case (0x70c/2): return seibu_main_word_r(machine,3,0); - case (0x714/2): return seibu_main_word_r(machine,5,0); - - /* Inputs */ - case (0x740/2): return input_port_1_word_r(machine,0,0); - case (0x744/2): return input_port_2_word_r(machine,0,0); - case (0x748/2): return input_port_4_word_r(machine,0,0); - case (0x74c/2): return input_port_3_word_r(machine,0,0); - case (0x75c/2): return input_port_5_word_r(machine,0,0); - } -} - -WRITE16_HANDLER( sdgndmrb_cop_mcu_w ) -{ - COMBINE_DATA(&cop_mcu_ram[offset]); - - - switch (offset) - { - default: - { - logerror("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - case (0x40c/2): { dma_size = cop_mcu_ram[offset]; break; } - - /*DMA source address*/ - case (0x412/2): { prot_data[1] = cop_mcu_ram[offset]; dma_src = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - case (0x414/2): { prot_data[0] = cop_mcu_ram[offset]; dma_src = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); break; } - - case (0x420/2): { prot_bcd[0] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x422/2): { prot_bcd[1] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x424/2): { prot_bcd[2] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): {cop_438 = data; break; } - case (0x43a/2): {cop_43a = data; break; } - case (0x43c/2): {cop_43c = data; break; } - - - /* Odd, this is a video register */ - case (0x470/2): { heatbrl_setgfxbank( cop_mcu_ram[offset] ); break; } - - /* Layer Clearing */ - case (0x478/2): /* clear address */ - { - cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address - printf("%06x: COPX set layer clear address to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - case (0x47a/2): /* clear length */ - { - cop_clearfill_length[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear length to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<5); - - break; - } - - case (0x47c/2): /* clear value? */ - { - cop_clearfill_value[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear value to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - /* unknown, related to clears? / DMA? */ - case (0x47e/2): - { - cop_clearfill_lasttrigger = data; - printf("%06x: COPX set layer clear trigger? to %04x\n", activecpu_get_pc(), data); - if (data>=0x1ff) - { - printf("invalid!, >0x1ff\n"); - cop_clearfill_lasttrigger = 0; - } - - break; - } - - /* hmm, this would be strange the 6xx range should be video regs?? */ - case (0x6fc/2): - { - printf("%06x: COPX execute current layer clear??? %04x\n", activecpu_get_pc(), data); - - // I think the value it writes here must match the other value for anything to happen.. maybe */ - //if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break; - if ((cop_clearfill_lasttrigger==0x14) || (cop_clearfill_lasttrigger==0x15)) return; - - /* do the fill */ - if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000) - { - UINT32 length, address; - int i; - address = cop_clearfill_address[cop_clearfill_lasttrigger] << 6; - length = (cop_clearfill_length[cop_clearfill_lasttrigger]+1) << 5; - - for (i=address;i> 0 ) + 0x3030; } - case (0x592/2): { return ((prot_bcd[0] & 0xffff0000) >> 16) + 0x3030; } - case (0x594/2): { return ((prot_bcd[1] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x596/2): { return ((prot_bcd[1] & 0xffff0000) >> 16) + 0x3030; } - case (0x598/2): { return ((prot_bcd[2] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x59a/2): { return ((prot_bcd[2] & 0xffff0000) >> 16) + 0x3030; } - case (0x59c/2): { return 0x3030; } - - /* Non-protection reads */ - - case (0x708/2): return seibu_main_word_r(machine,2,0); - case (0x70c/2): return seibu_main_word_r(machine,3,0); - case (0x714/2): return seibu_main_word_r(machine,5,0); - - /* Inputs */ - case (0x740/2): return input_port_1_word_r(machine,0,0); - case (0x744/2): return input_port_2_word_r(machine,0,0); - case (0x748/2): return input_port_4_word_r(machine,0,0); - case (0x74c/2): return input_port_3_word_r(machine,0,0); - case (0x75c/2): return input_port_5_word_r(machine,0,0); - - } -} - -WRITE16_HANDLER( denjinmk_cop_mcu_w ) -{ - COMBINE_DATA(&cop_mcu_ram[offset]); - - switch (offset) - { - default: - { - logerror("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - case (0x420/2): { prot_bcd[0] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x422/2): { prot_bcd[1] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x424/2): { prot_bcd[2] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): {cop_438 = data; break; } - case (0x43a/2): {cop_43a = data; break; } - case (0x43c/2): {cop_43c = data; break; } - - - /* Layer Clearing */ - case (0x478/2): /* clear address */ - { - cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address - printf("%06x: COPX set layer clear address to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - case (0x47a/2): /* clear length */ - { - cop_clearfill_length[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear length to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<5); - - break; - } - - case (0x47c/2): /* clear value? */ - { - cop_clearfill_value[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear value to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - /* unknown, related to clears? / DMA? */ - case (0x47e/2): - { - cop_clearfill_lasttrigger = data; - printf("%06x: COPX set layer clear trigger? to %04x\n", activecpu_get_pc(), data); - if (data>=0x1ff) - { - printf("invalid!, >0x1ff\n"); - cop_clearfill_lasttrigger = 0; - } - - break; - } - - /* hmm, this would be strange the 6xx range should be video regs?? */ - case (0x6fc/2): - { - printf("%06x: COPX execute current layer clear??? %04x\n", activecpu_get_pc(), data); - - // I think the value it writes here must match the other value for anything to happen.. maybe */ - if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break; - - /* do the fill */ - if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000) - { - UINT32 length, address; - int i; - address = cop_clearfill_address[cop_clearfill_lasttrigger] << 6; - length = (cop_clearfill_length[cop_clearfill_lasttrigger]+1) << 5; - - for (i=address;i> 0 ) + 0x3030; } - case (0x592/2): { return ((prot_bcd[0] & 0xffff0000) >> 16) + 0x3030; } - case (0x594/2): { return ((prot_bcd[1] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x596/2): { return ((prot_bcd[1] & 0xffff0000) >> 16) + 0x3030; } - case (0x598/2): { return ((prot_bcd[2] & 0x0000ffff) >> 0 ) + 0x3030; } - case (0x59a/2): { return ((prot_bcd[2] & 0xffff0000) >> 16) + 0x3030; } - case (0x59c/2): { return 0x3030; } - - /* Non-protection reads */ - case (0x7c8/2): return seibu_main_word_r(machine,2,0); - case (0x7cc/2): return seibu_main_word_r(machine,3,0); - case (0x7d4/2): return seibu_main_word_r(machine,5,0); - - /* Inputs */ - case (0x740/2): return input_port_1_word_r(machine,0,0); - case (0x744/2): return input_port_2_word_r(machine,0,0); - case (0x748/2): return input_port_4_word_r(machine,0,0); - case (0x74c/2): return input_port_3_word_r(machine,0,0); - } -} - -WRITE16_HANDLER( godzilla_cop_mcu_w ) -{ - COMBINE_DATA(&cop_mcu_ram[offset]); - - switch (offset) - { - default: - { - logerror("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - case (0x420/2): { prot_bcd[0] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x422/2): { prot_bcd[1] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - case (0x424/2): { prot_bcd[2] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } - - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): {cop_438 = data; break; } - case (0x43a/2): {cop_43a = data; break; } - case (0x43c/2): {cop_43c = data; break; } - - - /* Layer Clear */ - case (0x478/2): - { - static UINT16 i; - /* - */ - switch(cop_mcu_ram[offset]) - { - /*txt layer clearance*/ - case 0x40a0: - for(i=0;i<0x1000;i+=2) - program_write_word(i+0x102800,0x0000); - break; - case 0x4040: break; - case 0x4140: break; - case 0x4180: break; - case 0x4100: break; - case 0x41c0: break; - //default: popmessage("%04x",cop_mcu_ram[offset]); - } - break; - } - - - - case (0x620/2): { legionna_scrollram16[0] = cop_mcu_ram[offset]; break; } - case (0x622/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; } - case (0x624/2): { legionna_scrollram16[2] = cop_mcu_ram[offset]; break; } - case (0x626/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; } - case (0x628/2): { legionna_scrollram16[4] = cop_mcu_ram[offset]; break; } - case (0x62a/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; } - - case (0x7c0/2): { seibu_main_word_w(machine,0,cop_mcu_ram[offset],0xff00); break; } - case (0x7c4/2): { seibu_main_word_w(machine,1,cop_mcu_ram[offset],0xff00); break; } - case (0x7d0/2): { seibu_main_word_w(machine,4,cop_mcu_ram[offset],0xff00); break; } - case (0x7d8/2): { seibu_main_word_w(machine,6,cop_mcu_ram[offset],0xff00); break; } - } -} - -/******************************************************************************************** - - COPX simulation - - Seibu Cup Soccer - - *******************************************************************************************/ - - -READ16_HANDLER( cupsoc_cop_mcu_r ) -{ - UINT16 retvalue = cop_mcu_ram[offset]; - - switch(offset) - { - default: - { - logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", activecpu_get_pc(), retvalue, offset*2); - return retvalue; - } - - //case (0x47e/2): - //case (0x5b0/2): - //case (0x5b4/2): - // return cop_mcu_ram[offset]; - - /* returning 0xffff for some inputs for now, breaks coinage but - allows cupsoc to boot */ - case (0x700/2): return input_port_1_word_r(machine,0,0); - case (0x704/2): return input_port_2_word_r(machine,0,0); - case (0x708/2): return input_port_4_word_r(machine,0,0); - case (0x70c/2): return input_port_3_word_r(machine,0,0); - case (0x714/2): return 0xffff; - case (0x71c/2): return input_port_5_word_r(machine,0,0); - - case (0x740/2): return 0xffff; - case (0x744/2): return 0xffff; - case (0x748/2): return 0xffff;//seibu_main_word_r(machine,2,0); - case (0x74c/2): return 0xffff;//seibu_main_word_r(machine,3,0); - case (0x754/2): return 0xffff;//seibu_main_word_r(machine,5,0); - case (0x75c/2): return 0xffff; - - } -} - -static UINT16 cop_fct; -static UINT32 cop_reg[8]; - -/*This is version 1,so some stuff is different (less complex)*/ -static void cop_run(void) -{ - switch(cop_fct) - { - /*???*/ - case 0x8100: - { - UINT32 src = cop_reg[0]; - program_write_word(src+0x36,0xffc0); - break; - } - case 0x8900: - { - UINT32 src = cop_reg[0]; - program_write_word(src+0x36,0xff80); - break; - } - /*Right*/ - case 0x0205: - { - UINT32 src = cop_reg[0]; - INT16 y = program_read_word(src+0x4); - INT16 x = program_read_word(src+0x8); - INT16 y_rel = program_read_word(src+0x10); - INT16 x_rel = program_read_word(src+0x14); - program_write_word(src+0x4,(y+y_rel)); - program_write_word(src+0x8,(x+x_rel)); - /*logerror("%08x %08x %08x %08x %08x\n",cop_reg[0], - program_read_word(cop_reg[0]+0x4), - program_read_word(cop_reg[0]+0x8), - program_read_word(cop_reg[0]+0x10), - program_read_word(cop_reg[0]+0x14));*/ - break; - } - /*???*/ - case 0x3bb0: - { - //UINT32 dst = cop_reg[0]; - //UINT32 dst = cop_reg[1]; - //program_write_word(dst, mame_rand(Machine)/*program_read_word(src)*/); - //program_write_word(dst+2,mame_rand(Machine)/*program_read_word(src+2)*/); - //program_write_word(dst+4,mame_rand(Machine)/*program_read_word(src+4)*/); - //program_write_word(dst+6,mame_rand(Machine)/*program_read_word(src+6)*/); - //logerror("%04x\n",cop_reg[0]); - break; - } - default: - //logerror("%04x\n",cop_fct); - break; - } -} -//tmp_data[1] = cop_mcu_ram[offset]; -//cop_reg[0] = (prot_data[0]&0xffff)|((prot_data[1]&0xffff)<<16); - -static void cop_reg_w(UINT16 data,UINT8 offset,UINT8 mask) -{ - if(mask) - cop_reg[offset] = ((data&0xffff)<<16) | (cop_reg[offset]&0xffff); - else - cop_reg[offset] = (cop_reg[offset]&0xffff0000) | (data&0xffff); - - //popmessage("%08x",cop_reg[offset]); -} - -WRITE16_HANDLER( cupsoc_cop_mcu_w ) -{ - - COMBINE_DATA(&cop_mcu_ram[offset]); - - switch(offset) - { - default: - { - logerror("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); - break; - } - - /********************************************************************* - 400-5ff - Protection writes - *********************************************************************/ - - case (0x432/2): { copd2_set_tabledata(data, machine); break; } - case (0x434/2): { copd2_set_tableoffset(data, machine); break; } - case (0x438/2): {cop_438 = data; break; } - case (0x43a/2): {cop_43a = data; break; } - case (0x43c/2): {cop_43c = data; break; } - - case (0x4a0/2): - case (0x4a2/2): - case (0x4a4/2): - case (0x4a6/2): - case (0x4a8/2): - case (0x4aa/2): - case (0x4ac/2): - case (0x4ae/2): - case (0x4c0/2): - case (0x4c2/2): - case (0x4c4/2): - case (0x4c6/2): - case (0x4c8/2): - case (0x4ca/2): - case (0x4cc/2): - case (0x4ce/2): - cop_reg_w(cop_mcu_ram[offset],offset & 0x000f, (offset < (0x4b0/2)) ? 1 : 0); - break; - /*layer clearance,but the bootleg doesn't send values,so this function is an - original left-over.*/ - /* Odd, this is a video register */ - case (0x470/2): { heatbrl_setgfxbank( cop_mcu_ram[offset] ); break; } - - /* Layer Clearing */ - case (0x478/2): /* clear address */ - { - cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address - printf("%06x: COPX set layer clear address to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - case (0x47a/2): /* clear length */ - { - cop_clearfill_length[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear length to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<5); - - break; - } - - case (0x47c/2): /* clear value? */ - { - cop_clearfill_value[cop_clearfill_lasttrigger] = data; - printf("%06x: COPX set layer clear value to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); - break; - } - - /* unknown, related to clears? / DMA? */ - case (0x47e/2): - { - cop_clearfill_lasttrigger = data; - printf("%06x: COPX set layer clear trigger? to %04x\n", activecpu_get_pc(), data); - if (data>=0x1ff) - { - printf("invalid!, >0x1ff\n"); - cop_clearfill_lasttrigger = 0; - } - - break; - } - - /* hmm, this would be strange the 6xx range should be video regs?? */ - case (0x6fc/2): - { - printf("%06x: COPX execute current layer clear??? %04x\n", activecpu_get_pc(), data); - - // I think the value it writes here must match the other value for anything to happen.. maybe */ - //if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break; - if ((cop_clearfill_lasttrigger==0x14) || (cop_clearfill_lasttrigger==0x15)) return; - - /* do the fill */ - if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000) - { - UINT32 length, address; - int i; - address = cop_clearfill_address[cop_clearfill_lasttrigger] << 6; - length = (cop_clearfill_length[cop_clearfill_lasttrigger]+1) << 5; - - for (i=address;igamedrv->name); - fp=fopen(filename, "w+b"); - if (fp) - { - fwrite(cop->program, 0x200, 1, fp); - fclose(fp); - } - } - - { - FILE *fp; - char filename[256]; - sprintf(filename,"r2_cop_%s_value", machine->gamedrv->name); - fp=fopen(filename, "w+b"); - if (fp) - { - fwrite(cop->func_value, 0x200/8, 1, fp); - fclose(fp); - } - } - - { - FILE *fp; - char filename[256]; - sprintf(filename,"r2_cop_%s_mask", machine->gamedrv->name); - fp=fopen(filename, "w+b"); - if (fp) - { - fwrite(cop->func_mask, 0x200/8, 1, fp); - fclose(fp); - } - } - - { - FILE *fp; - char filename[256]; - sprintf(filename,"r2_cop_%s_trigger", machine->gamedrv->name); - fp=fopen(filename, "w+b"); - if (fp) - { - fwrite(cop->func_trigger, 0x200/8, 1, fp); - fclose(fp); - } -} -} - WRITE16_HANDLER( raiden2_cop2_w ) { cop_state *cop = &cop_data; @@ -2349,8 +1004,6 @@ WRITE16_HANDLER( raiden2_cop2_w ) cop->func_mask[temp32] = cop_ram_r(cop, 0x43a); cop->func_trigger[temp32] = cop_ram_r(cop, 0x43c); - raiden2_save_cop_table(machine); - break; case 0x438/2: /* COP program entry value (0,4,5,6,7,8,9,F) */ @@ -2451,4 +1104,888 @@ READ16_HANDLER( raiden2_cop2_r ) COP_LOG(("%05X:COP Read(%04X) = %04X\n", activecpu_get_pc(), offset*2 + 0x400, cop->ram[offset])); return cop->ram[offset]; } +#endif + + + + + +/* Generic COP functions + -- the game specific handlers fall through to these if there + isn't a specific case for them. these implement behavior + which seems common to all the agmes +*/ + +static READ16_HANDLER( generic_cop_r ) +{ + UINT16 retvalue; + retvalue = cop_mcu_ram[offset]; + + + switch (offset) + { + default: + logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", activecpu_get_pc(), retvalue, offset*2); + return retvalue; + break; + + /* BCD protection reads */ + case (0x190/2): { return ((prot_bcd[0] & 0x0000ffff) >> 0 ) + 0x3030; } + case (0x192/2): { return ((prot_bcd[0] & 0xffff0000) >> 16) + 0x3030; } + case (0x194/2): { return ((prot_bcd[1] & 0x0000ffff) >> 0 ) + 0x3030; } + case (0x196/2): { return ((prot_bcd[1] & 0xffff0000) >> 16) + 0x3030; } + case (0x198/2): { return ((prot_bcd[2] & 0x0000ffff) >> 0 ) + 0x3030; } + case (0x19a/2): { return ((prot_bcd[2] & 0xffff0000) >> 16) + 0x3030; } + case (0x19c/2): { return 0x3030; } + + + } +} + +static WRITE16_HANDLER( generic_cop_w ) +{ + switch (offset) + { + default: + printf("%06x: COPX unhandled write data %04x at offset %04x\n", activecpu_get_pc(), data, offset*2); + break; + + /* BCD Protection */ + case (0x020/2): { prot_bcd[0] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } + case (0x022/2): { prot_bcd[1] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } + case (0x024/2): { prot_bcd[2] = protection_bcd_jsr(cop_mcu_ram[offset]); break; } + + /* Command tables for 0x500 / 0x502 commands */ + case (0x032/2): { copd2_set_tabledata(data, machine); break; } + case (0x034/2): { copd2_set_tableoffset(data, machine); break; } + case (0x038/2): { cop_438 = data; break; } + case (0x03a/2): { cop_43a = data; break; } + case (0x03c/2): { cop_43c = data; break; } + + /* Layer Clearing */ + case (0x078/2): /* clear address */ + { + cop_clearfill_address[cop_clearfill_lasttrigger] = data; // << 6 to get actual address + printf("%06x: COPX set layer clear address to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); + break; + } + + case (0x07a/2): /* clear length */ + { + cop_clearfill_length[cop_clearfill_lasttrigger] = data; + printf("%06x: COPX set layer clear length to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<5); + + break; + } + + case (0x07c/2): /* clear value? */ + { + cop_clearfill_value[cop_clearfill_lasttrigger] = data; + printf("%06x: COPX set layer clear value to %04x (actual %08x)\n", activecpu_get_pc(), data, data<<6); + break; + } + + /* unknown, related to clears? / DMA? */ + case (0x07e/2): + { + cop_clearfill_lasttrigger = data; + printf("%06x: COPX set layer clear trigger? to %04x\n", activecpu_get_pc(), data); + if (data>=0x1ff) + { + printf("invalid!, >0x1ff\n"); + cop_clearfill_lasttrigger = 0; + } + + break; + } + + /* Registers */ + case (0x0a0/2): { ram_addr[0] = (ram_addr[0]&0x0000ffff)|(cop_mcu_ram[offset]<<16); break; } + case (0x0c0/2): { ram_addr[0] = (ram_addr[0]&0xffff0000)|(cop_mcu_ram[offset]<<0); break; } + + case (0x0a2/2): { ram_addr[1] = (ram_addr[1]&0x0000ffff)|(cop_mcu_ram[offset]<<16); break; } + case (0x0c2/2): { ram_addr[1] = (ram_addr[1]&0xffff0000)|(cop_mcu_ram[offset]<<0); break; } + + case (0x0a4/2): { ram_addr[2] = (ram_addr[2]&0x0000ffff)|(cop_mcu_ram[offset]<<16); break; } + case (0x0c4/2): { ram_addr[2] = (ram_addr[2]&0xffff0000)|(cop_mcu_ram[offset]<<0); break; } + + case (0x0a6/2): { ram_addr[3] = (ram_addr[3]&0x0000ffff)|(cop_mcu_ram[offset]<<16); break; } + case (0x0c6/2): { ram_addr[3] = (ram_addr[3]&0xffff0000)|(cop_mcu_ram[offset]<<0); break; } + + /* was dma_dst */ + case (0x0a8/2): { ram_addr[4] = (ram_addr[3]&0x0000ffff)|(cop_mcu_ram[offset]<<16); break; } + case (0x0c8/2): { ram_addr[4] = (ram_addr[3]&0xffff0000)|(cop_mcu_ram[offset]<<0); break; } + + /* hmm, this would be strange the 6xx range should be video regs?? */ + case (0x2fc/2): + { + printf("%06x: COPX execute current layer clear??? %04x\n", activecpu_get_pc(), data); + + // I think the value it writes here must match the other value for anything to happen.. maybe */ + //if (data!=cop_clearfill_value[cop_clearfill_lasttrigger]) break; + if ((cop_clearfill_lasttrigger==0x14) || (cop_clearfill_lasttrigger==0x15)) return; + + /* do the fill */ + if (cop_clearfill_value[cop_clearfill_lasttrigger]==0x0000) + { + UINT32 length, address; + int i; + address = cop_clearfill_address[cop_clearfill_lasttrigger] << 6; + length = (cop_clearfill_length[cop_clearfill_lasttrigger]+1) << 5; + + for (i=address;i