bankdev: Remove address_space argument from read/write handlers (nw)

src/devices/machine/bankdev.cpp

@@ -6,7 +6,7 @@
 // device type definition
 DEFINE_DEVICE_TYPE(ADDRESS_MAP_BANK, address_map_bank_device, "address_map_bank", "Address Map Bank")
 
-address_map_bank_device::address_map_bank_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
+address_map_bank_device::address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: device_t(mconfig, ADDRESS_MAP_BANK, tag, owner, clock),
 		device_memory_interface(mconfig, *this),
 		m_endianness(ENDIANNESS_NATIVE),
@@ -46,42 +46,42 @@ void address_map_bank_device::amap64(address_map &map)
 	map(0x00000000, 0xffffffff).rw(FUNC(address_map_bank_device::read64), FUNC(address_map_bank_device::write64));
 }
 
-WRITE8_MEMBER(address_map_bank_device::write8)
+void address_map_bank_device::write8(offs_t offset, u8 data)
 {
 	m_program->write_byte(m_offset + offset, data);
 }
 
-WRITE16_MEMBER(address_map_bank_device::write16)
+void address_map_bank_device::write16(offs_t offset, u16 data, u16 mem_mask)
 {
 	m_program->write_word(m_offset + (offset << (m_shift+1)), data, mem_mask);
 }
 
-WRITE32_MEMBER(address_map_bank_device::write32)
+void address_map_bank_device::write32(offs_t offset, u32 data, u32 mem_mask)
 {
 	m_program->write_dword(m_offset + (offset << (m_shift+2)), data, mem_mask);
 }
 
-WRITE64_MEMBER(address_map_bank_device::write64)
+void address_map_bank_device::write64(offs_t offset, u64 data, u64 mem_mask)
 {
 	m_program->write_qword(m_offset + (offset << (m_shift+3)), data, mem_mask);
 }
 
-READ8_MEMBER(address_map_bank_device::read8)
+u8 address_map_bank_device::read8(offs_t offset)
 {
 	return m_program->read_byte(m_offset + offset);
 }
 
-READ16_MEMBER(address_map_bank_device::read16)
+u16 address_map_bank_device::read16(offs_t offset, u16 mem_mask)
 {
 	return m_program->read_word(m_offset + (offset << (m_shift+1)), mem_mask);
 }
 
-READ32_MEMBER(address_map_bank_device::read32)
+u32 address_map_bank_device::read32(offs_t offset, u32 mem_mask)
 {
 	return m_program->read_dword(m_offset + (offset << (m_shift+2)), mem_mask);
 }
 
-READ64_MEMBER(address_map_bank_device::read64)
+u64 address_map_bank_device::read64(offs_t offset, u64 mem_mask)
 {
 	return m_program->read_qword(m_offset + (offset << (m_shift+3)), mem_mask);
 }

src/devices/machine/bankdev.h

@@ -12,16 +12,16 @@ class address_map_bank_device :
 {
 public:
 	// construction/destruction
-	address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+	address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
 
 	// configuration helpers
 	template <typename... T> address_map_bank_device& set_map(T &&... args) { set_addrmap(0, std::forward<T>(args)...); return *this; }
 	address_map_bank_device& set_endianness(endianness_t endianness) { m_endianness = endianness; return *this; }
-	address_map_bank_device& set_data_width(uint8_t data_width) { m_data_width = data_width; return *this; }
+	address_map_bank_device& set_data_width(u8 data_width) { m_data_width = data_width; return *this; }
-	address_map_bank_device& set_addr_width(uint8_t addr_width) { m_addr_width = addr_width; return *this; }
+	address_map_bank_device& set_addr_width(u8 addr_width) { m_addr_width = addr_width; return *this; }
-	address_map_bank_device& set_stride(uint32_t stride) { m_stride = stride; return *this; }
+	address_map_bank_device& set_stride(u32 stride) { m_stride = stride; return *this; }
-	address_map_bank_device& set_shift(uint32_t shift) { m_shift = shift; return *this; }
+	address_map_bank_device& set_shift(u32 shift) { m_shift = shift; return *this; }
-	address_map_bank_device& set_options(endianness_t endianness, uint8_t data_width, uint8_t addr_width, uint32_t stride = 1)
+	address_map_bank_device& set_options(endianness_t endianness, u8 data_width, u8 addr_width, u32 stride = 1)
 	{
 		set_endianness(endianness);
 		set_data_width(data_width);
@@ -32,25 +32,25 @@ public:
 
 	template <typename... T> address_map_bank_device& map(T &&... args) { set_addrmap(0, std::forward<T>(args)...); return *this; }
 	address_map_bank_device& endianness(endianness_t endianness) { m_endianness = endianness; return *this; }
-	address_map_bank_device& data_width(uint8_t data_width) { m_data_width = data_width; return *this; }
+	address_map_bank_device& data_width(u8 data_width) { m_data_width = data_width; return *this; }
-	address_map_bank_device& addr_width(uint8_t addr_width) { m_addr_width = addr_width; return *this; }
+	address_map_bank_device& addr_width(u8 addr_width) { m_addr_width = addr_width; return *this; }
-	address_map_bank_device& stride(uint32_t stride) { m_stride = stride; return *this; }
+	address_map_bank_device& stride(u32 stride) { m_stride = stride; return *this; }
-	address_map_bank_device& shift(uint32_t shift) { m_shift = shift; return *this; }
+	address_map_bank_device& shift(u32 shift) { m_shift = shift; return *this; }
 
 	void amap8(address_map &map);
 	void amap16(address_map &map);
 	void amap32(address_map &map);
 	void amap64(address_map &map);
 
-	DECLARE_WRITE8_MEMBER(write8);
+	void write8(offs_t offset, u8 data);
-	DECLARE_WRITE16_MEMBER(write16);
+	void write16(offs_t offset, u16 data, u16 mem_mask = 0xffff);
-	DECLARE_WRITE32_MEMBER(write32);
+	void write32(offs_t offset, u32 data, u32 mem_mask = 0xffffffff);
-	DECLARE_WRITE64_MEMBER(write64);
+	void write64(offs_t offset, u64 data, u64 mem_mask = ~u64(0));
 
-	DECLARE_READ8_MEMBER(read8);
+	u8 read8(offs_t offset);
-	DECLARE_READ16_MEMBER(read16);
+	u16 read16(offs_t offset, u16 mem_mask = 0xffff);
-	DECLARE_READ32_MEMBER(read32);
+	u32 read32(offs_t offset, u32 mem_mask = 0xffffffff);
-	DECLARE_READ64_MEMBER(read64);
+	u64 read64(offs_t offset, u64 mem_mask = ~u64(0));
 
 	void set_bank(offs_t offset);
 
@@ -64,9 +64,9 @@ protected:
 private:
 	// internal state
 	endianness_t m_endianness;
-	uint8_t m_data_width;
+	u8 m_data_width;
-	uint8_t m_addr_width;
+	u8 m_addr_width;
-	uint32_t m_stride;
+	u32 m_stride;
 	address_space_config m_program_config;
 	address_space *m_program;
 	offs_t m_offset;

src/mame/drivers/cedar_magnet.cpp

@@ -172,34 +172,34 @@ private:
 	required_device<z80pio_device> m_ic48_pio;
 	required_device<z80pio_device> m_ic49_pio;
 
-	DECLARE_READ8_MEMBER(ic48_pio_pa_r);
+	uint8_t ic48_pio_pa_r();
-	DECLARE_WRITE8_MEMBER(ic48_pio_pa_w);
+	void ic48_pio_pa_w(uint8_t data);
 
-	DECLARE_READ8_MEMBER(ic48_pio_pb_r);
+	uint8_t ic48_pio_pb_r();
-	DECLARE_WRITE8_MEMBER(ic48_pio_pb_w);
+	void ic48_pio_pb_w(uint8_t data);
 
-	DECLARE_READ8_MEMBER(ic49_pio_pb_r);
+	uint8_t ic49_pio_pb_r();
-	DECLARE_WRITE8_MEMBER(ic49_pio_pb_w);
+	void ic49_pio_pb_w(uint8_t data);
 
 	// 1x range ports
-	DECLARE_WRITE8_MEMBER(port18_w);
+	void port18_w(uint8_t data);
-	DECLARE_WRITE8_MEMBER(port19_w);
+	void port19_w(uint8_t data);
-	DECLARE_WRITE8_MEMBER(port1b_w);
+	void port1b_w(uint8_t data);
 
-	DECLARE_READ8_MEMBER(port18_r);
+	uint8_t port18_r();
-	DECLARE_READ8_MEMBER(port19_r);
+	uint8_t port19_r();
-	DECLARE_READ8_MEMBER(port1a_r);
+	uint8_t port1a_r();
 
 	// 7x range ports
-	DECLARE_WRITE8_MEMBER(rambank_palbank_w);
+	void rambank_palbank_w(uint8_t data);
-	DECLARE_WRITE8_MEMBER(palupload_w);
+	void palupload_w(uint8_t data);
-	DECLARE_WRITE8_MEMBER(paladdr_w);
+	void paladdr_w(uint8_t data);
-	DECLARE_READ8_MEMBER(watchdog_r);
+	uint8_t watchdog_r();
-	DECLARE_READ8_MEMBER(port7c_r);
+	uint8_t port7c_r();
 
 	// other ports
-	DECLARE_READ8_MEMBER(other_cpu_r);
+	uint8_t other_cpu_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(other_cpu_w);
+	void other_cpu_w(offs_t offset, uint8_t data);
 
 	uint8_t m_paladdr;
 	int m_palbank;
@@ -209,9 +209,9 @@ private:
 	uint8_t m_ic49_pio_pb_val;
 
 	void set_palette(int offset);
-	DECLARE_WRITE8_MEMBER(palette_r_w);
+	void palette_r_w(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER(palette_g_w);
+	void palette_g_w(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER(palette_b_w);
+	void palette_b_w(offs_t offset, uint8_t data);
 
 	void handle_sub_board_cpu_lines(cedar_magnet_board_interface &dev, int old_data, int data);
 	INTERRUPT_GEN_MEMBER(irq);
@@ -317,7 +317,7 @@ void cedar_magnet_state::cedar_bank0(address_map &map)
 
 ***********************/
 
-WRITE8_MEMBER(cedar_magnet_state::rambank_palbank_w)
+void cedar_magnet_state::rambank_palbank_w(uint8_t data)
 {
 	// ---- --xx
 	// xx = program bank
@@ -329,17 +329,17 @@ WRITE8_MEMBER(cedar_magnet_state::rambank_palbank_w)
 	m_sub_pal_bankdev->set_bank(palbank);
 }
 
-WRITE8_MEMBER(cedar_magnet_state::palupload_w)
+void cedar_magnet_state::palupload_w(uint8_t data)
 {
-	m_sub_pal_bankdev->write8(space, m_paladdr, data);
+	m_sub_pal_bankdev->write8(m_paladdr, data);
 }
 
-WRITE8_MEMBER(cedar_magnet_state::paladdr_w)
+void cedar_magnet_state::paladdr_w(uint8_t data)
 {
 	m_paladdr = data;
 }
 
-READ8_MEMBER(cedar_magnet_state::watchdog_r)
+uint8_t cedar_magnet_state::watchdog_r()
 {
 	// watchdog
 	return 0x00;
@@ -352,7 +352,7 @@ READ8_MEMBER(cedar_magnet_state::watchdog_r)
 
 ***********************/
 
-READ8_MEMBER(cedar_magnet_state::port7c_r)
+uint8_t cedar_magnet_state::port7c_r()
 {
 	//logerror("%s: port7c_r\n", machine().describe_context());
 	return 0x01;
@@ -366,18 +366,18 @@ READ8_MEMBER(cedar_magnet_state::port7c_r)
 
 ***********************/
 
-READ8_MEMBER(cedar_magnet_state::port18_r)
+uint8_t cedar_magnet_state::port18_r()
 {
 //  logerror("%s: port18_r\n", machine().describe_context());
 	return 0x00;
 }
 
-WRITE8_MEMBER(cedar_magnet_state::port18_w)
+void cedar_magnet_state::port18_w(uint8_t data)
 {
 //  logerror("%s: port18_w %02x\n", machine().describe_context(), data);
 }
 
-READ8_MEMBER(cedar_magnet_state::port19_r)
+uint8_t cedar_magnet_state::port19_r()
 {
 	uint8_t ret = 0x00;
 //  logerror("%s: port19_r\n", machine().describe_context());
@@ -390,19 +390,19 @@ READ8_MEMBER(cedar_magnet_state::port19_r)
 	return ret;
 }
 
-READ8_MEMBER(cedar_magnet_state::port1a_r)
+uint8_t cedar_magnet_state::port1a_r()
 {
 //  logerror("%s: port1a_r\n", machine().describe_context());
 	return 0x00;
 }
 
 
-WRITE8_MEMBER(cedar_magnet_state::port19_w)
+void cedar_magnet_state::port19_w(uint8_t data)
 {
 //  logerror("%s: port19_w %02x\n", machine().describe_context(), data);
 }
 
-WRITE8_MEMBER(cedar_magnet_state::port1b_w)
+void cedar_magnet_state::port1b_w(uint8_t data)
 {
 //  logerror("%s: port1b_w %02x\n", machine().describe_context(), data);
 }
@@ -418,19 +418,19 @@ void cedar_magnet_state::set_palette(int offset)
 	m_palette->set_pen_color(offset^0xff, pal4bit(m_pal_r[offset]), pal4bit(m_pal_g[offset]), pal4bit(m_pal_b[offset]));
 }
 
-WRITE8_MEMBER(cedar_magnet_state::palette_r_w)
+void cedar_magnet_state::palette_r_w(offs_t offset, uint8_t data)
 {
 	m_pal_r[offset] = data;
 	set_palette(offset);
 }
 
-WRITE8_MEMBER(cedar_magnet_state::palette_g_w)
+void cedar_magnet_state::palette_g_w(offs_t offset, uint8_t data)
 {
 	m_pal_g[offset] = data;
 	set_palette(offset);
 }
 
-WRITE8_MEMBER(cedar_magnet_state::palette_b_w)
+void cedar_magnet_state::palette_b_w(offs_t offset, uint8_t data)
 {
 	m_pal_b[offset] = data;
 	set_palette(offset);
@@ -460,7 +460,7 @@ void cedar_magnet_state::video_start()
 
 ***********************/
 
-READ8_MEMBER(cedar_magnet_state::other_cpu_r)
+uint8_t cedar_magnet_state::other_cpu_r(offs_t offset)
 {
 	int bankbit0 = (m_ic48_pio_pa_val & 0x60) >> 5;
 	int plane0select = (m_ic48_pio_pa_val & 0x07) >> 0;
@@ -509,7 +509,7 @@ READ8_MEMBER(cedar_magnet_state::other_cpu_r)
 	return ret;
 }
 
-WRITE8_MEMBER(cedar_magnet_state::other_cpu_w)
+void cedar_magnet_state::other_cpu_w(offs_t offset, uint8_t data)
 {
 	int bankbit0 = (m_ic48_pio_pa_val & 0x60) >> 5;
 	int plane0select = (m_ic48_pio_pa_val & 0x07) >> 0;
@@ -579,7 +579,7 @@ void cedar_magnet_state::handle_sub_board_cpu_lines(cedar_magnet_board_interface
 
 ***********************/
 
-READ8_MEMBER( cedar_magnet_state::ic48_pio_pa_r ) // 0x20
+uint8_t cedar_magnet_state::ic48_pio_pa_r() // 0x20
 {
 	uint8_t ret = m_ic48_pio_pa_val & ~0x08;
 
@@ -593,7 +593,7 @@ READ8_MEMBER( cedar_magnet_state::ic48_pio_pa_r ) // 0x20
 	return ret;
 }
 
-WRITE8_MEMBER( cedar_magnet_state::ic48_pio_pa_w ) // 0x20
+void cedar_magnet_state::ic48_pio_pa_w(uint8_t data) // 0x20
 {
 	int oldplane0select = (m_ic48_pio_pa_val & 0x07) >> 0;
 
@@ -621,7 +621,7 @@ WRITE8_MEMBER( cedar_magnet_state::ic48_pio_pa_w ) // 0x20
 }
 
 
-READ8_MEMBER( cedar_magnet_state::ic48_pio_pb_r ) // 0x22
+uint8_t cedar_magnet_state::ic48_pio_pb_r() // 0x22
 {
 	uint8_t ret = m_ic48_pio_pb_val & ~0x80;
 
@@ -634,7 +634,7 @@ READ8_MEMBER( cedar_magnet_state::ic48_pio_pb_r ) // 0x22
 	return ret;
 }
 
-WRITE8_MEMBER(cedar_magnet_state::ic48_pio_pb_w) // 0x22
+void cedar_magnet_state::ic48_pio_pb_w(uint8_t data) // 0x22
 {
 	int oldplane1select = (m_ic48_pio_pb_val & 0x07) >> 0;
 	int oldspriteselect = (m_ic48_pio_pb_val & 0x70) >> 4;
@@ -667,7 +667,7 @@ WRITE8_MEMBER(cedar_magnet_state::ic48_pio_pb_w) // 0x22
 
 ***********************/
 
-READ8_MEMBER( cedar_magnet_state::ic49_pio_pb_r ) // 0x42
+uint8_t cedar_magnet_state::ic49_pio_pb_r() // 0x42
 {
 	uint8_t ret = m_ic49_pio_pb_val;
 
@@ -677,7 +677,7 @@ READ8_MEMBER( cedar_magnet_state::ic49_pio_pb_r ) // 0x42
 	return ret;
 }
 
-WRITE8_MEMBER( cedar_magnet_state::ic49_pio_pb_w ) // 0x42
+void cedar_magnet_state::ic49_pio_pb_w(uint8_t data) // 0x42
 {
 	int oldsoundselect = (m_ic49_pio_pb_val & 0x70) >> 4;
 

src/mame/drivers/ckz80.cpp

@@ -88,11 +88,11 @@ public:
 	void display_matrix(int maxx, int maxy, u32 setx, u32 sety, bool update = true);
 
 	// Master
-	DECLARE_READ8_MEMBER(master_input_r);
+	u8 master_input_r();
-	DECLARE_WRITE8_MEMBER(master_control_w);
+	void master_control_w(u8 data);
 	void init_master();
-	DECLARE_READ8_MEMBER(master_trampoline_r);
+	u8 master_trampoline_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(master_trampoline_w);
+	void master_trampoline_w(offs_t offset, u8 data);
 	void master_map(address_map &map);
 	void master_trampoline(address_map &map);
 	void master(machine_config &config);
@@ -234,7 +234,7 @@ u16 ckz80_state::read_inputs(int columns)
 
 // TTL/generic
 
-WRITE8_MEMBER(ckz80_state::master_control_w)
+void ckz80_state::master_control_w(u8 data)
 {
 	// d0-d3: 74145 A-D
 	// 74145 0-9: input mux, led select
@@ -248,7 +248,7 @@ WRITE8_MEMBER(ckz80_state::master_control_w)
 	m_dac->write(data >> 6 & 3);
 }
 
-READ8_MEMBER(ckz80_state::master_input_r)
+u8 ckz80_state::master_input_r()
 {
 	// d0-d7: multiplexed inputs (active low)
 	return ~read_inputs(10);
@@ -286,23 +286,23 @@ void ckz80_state::master_map(address_map &map)
 }
 
 // PCB design is prone to bus conflicts, but should be fine if software obeys
-WRITE8_MEMBER(ckz80_state::master_trampoline_w)
+void ckz80_state::master_trampoline_w(offs_t offset, u8 data)
 {
 	if (offset & 0x2000)
-		m_master_map->write8(space, (offset & 0x3fff) | 0x8000, data);
+		m_master_map->write8((offset & 0x3fff) | 0x8000, data);
 	if (offset & 0x4000)
-		m_master_map->write8(space, (offset & 0x7fff) | 0x8000, data);
+		m_master_map->write8((offset & 0x7fff) | 0x8000, data);
 }
 
-READ8_MEMBER(ckz80_state::master_trampoline_r)
+u8 ckz80_state::master_trampoline_r(offs_t offset)
 {
 	u8 data = 0xff;
 	if (~offset & 0x8000)
-		data &= m_master_map->read8(space, offset);
+		data &= m_master_map->read8(offset);
 	if (offset & 0x2000)
-		data &= m_master_map->read8(space, (offset & 0x3fff) | 0x8000);
+		data &= m_master_map->read8((offset & 0x3fff) | 0x8000);
 	if (offset & 0x4000)
-		data &= m_master_map->read8(space, (offset & 0x7fff) | 0x8000);
+		data &= m_master_map->read8((offset & 0x7fff) | 0x8000);
 
 	return data;
 }

src/mame/drivers/elwro800.cpp

@@ -60,7 +60,7 @@ private:
 	/* NR signal */
 	uint8_t m_NR;
 
-	DECLARE_READ8_MEMBER(nmi_r);
+	uint8_t nmi_r();
 	DECLARE_WRITE8_MEMBER(elwro800jr_fdc_control_w);
 	DECLARE_READ8_MEMBER(elwro800jr_io_r);
 	DECLARE_WRITE8_MEMBER(elwro800jr_io_w);
@@ -99,12 +99,12 @@ private:
  *
  *************************************/
 
-READ8_MEMBER(elwro800_state::nmi_r)
+uint8_t elwro800_state::nmi_r()
 {
 	if (m_ram_at_0000)
 		return 0xdf;
 	else
-		return m_bank1->read8(space, 0x66);
+		return m_bank1->read8(0x66);
 }
 
 /*************************************

src/mame/drivers/fidel6502.cpp

@@ -536,8 +536,8 @@ private:
 	TIMER_DEVICE_CALLBACK_MEMBER(irq_off) { m_maincpu->set_input_line(M6502_IRQ_LINE, CLEAR_LINE); }
 	TIMER_DEVICE_CALLBACK_MEMBER(dummy) { ; } // MCFG_QUANTUM_PERFECT_CPU("maincpu") didn't work
 
-	DECLARE_WRITE8_MEMBER(div_trampoline_w);
+	void div_trampoline_w(offs_t offset, u8 data);
-	DECLARE_READ8_MEMBER(div_trampoline_r);
+	u8 div_trampoline_r(offs_t offset);
 	void div_set_cpu_freq(offs_t offset);
 	void div_trampoline(address_map &map);
 	u16 m_div_status;
@@ -670,18 +670,18 @@ void fidel6502_state::div_set_cpu_freq(offs_t offset)
 	m_div_status = status;
 }
 
-WRITE8_MEMBER(fidel6502_state::div_trampoline_w)
+void fidel6502_state::div_trampoline_w(offs_t offset, u8 data)
 {
 	div_set_cpu_freq(offset);
-	m_mainmap->write8(space, offset, data);
+	m_mainmap->write8(offset, data);
 }
 
-READ8_MEMBER(fidel6502_state::div_trampoline_r)
+u8 fidel6502_state::div_trampoline_r(offs_t offset)
 {
 	if (!machine().side_effects_disabled())
 		div_set_cpu_freq(offset);
 
-	return m_mainmap->read8(space, offset);
+	return m_mainmap->read8(offset);
 }
 
 void fidel6502_state::div_trampoline(address_map &map)

src/mame/drivers/fm7.cpp

@@ -1148,7 +1148,7 @@ void fm7_state::fm7_mmr_refresh(address_space& space)
 	}
 	else
 	{
-		space.install_readwrite_handler(0x7000,0x7fff,read8_delegate(FUNC(address_map_bank_device::read8),(address_map_bank_device*)m_avbank[7]),write8_delegate(FUNC(address_map_bank_device::write8),(address_map_bank_device*)m_avbank[7]));
+		space.install_readwrite_handler(0x7000,0x7fff,read8sm_delegate(FUNC(address_map_bank_device::read8),(address_map_bank_device*)m_avbank[7]),write8sm_delegate(FUNC(address_map_bank_device::write8),(address_map_bank_device*)m_avbank[7]));
 	}
 	if(m_init_rom_en)
 	{

src/mame/drivers/fs3216.cpp

@@ -50,8 +50,8 @@ private:
 	MC6845_UPDATE_ROW(crt_update_row);
 
 	void mmu_reg_w(offs_t offset, u16 data);
-	DECLARE_READ16_MEMBER(mmu_read);
+	u16 mmu_read(offs_t offset, u16 mem_mask);
-	DECLARE_WRITE16_MEMBER(mmu_write);
+	void mmu_write(offs_t offset, u16 data, u16 mem_mask);
 	DECLARE_WRITE_LINE_MEMBER(mmu_reset_w);
 	void mmu_init_w(u16 data);
 
@@ -171,7 +171,7 @@ void fs3216_state::mmu_reg_w(offs_t offset, u16 data)
 		reg = (reg & 0x00ffff) | (data & 0x00ff) << 16;
 }
 
-READ16_MEMBER(fs3216_state::mmu_read)
+u16 fs3216_state::mmu_read(offs_t offset, u16 mem_mask)
 {
 	const bool a23 = BIT(offset, 22);
 	const bool mmu_disable = !a23 && BIT(m_maincpu->get_fc(), 2);
@@ -184,10 +184,10 @@ READ16_MEMBER(fs3216_state::mmu_read)
 
 	offs_t clbaddr = offset + ((mmu_reg & 0x000fff) << 9);
 	clbaddr = (clbaddr & 0x1fffff) | (clbaddr & 0x100000) << 1;
-	return m_clb->read16(space, clbaddr, mem_mask);
+	return m_clb->read16(clbaddr, mem_mask);
 }
 
-WRITE16_MEMBER(fs3216_state::mmu_write)
+void fs3216_state::mmu_write(offs_t offset, u16 data, u16 mem_mask)
 {
 	const bool a23 = BIT(offset, 22);
 	const bool mmu_disable = !a23 && BIT(m_maincpu->get_fc(), 2);
@@ -200,7 +200,7 @@ WRITE16_MEMBER(fs3216_state::mmu_write)
 
 	offs_t clbaddr = offset + ((mmu_reg & 0x000fff) << 9);
 	clbaddr = (clbaddr & 0x1fffff) | (clbaddr & 0x100000) << 1;
-	m_clb->write16(space, clbaddr, data, mem_mask);
+	m_clb->write16(clbaddr, data, mem_mask);
 }
 
 WRITE_LINE_MEMBER(fs3216_state::mmu_reset_w)

src/mame/drivers/hp_ipc.cpp

@@ -400,17 +400,17 @@ private:
 	virtual void machine_start() override;
 	virtual void machine_reset() override;
 
-	DECLARE_READ16_MEMBER(mem_r);
+	uint16_t mem_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(mem_w);
+	void mem_w(offs_t offset, uint16_t data, uint16_t mem_mask);
-	DECLARE_READ16_MEMBER(mmu_r);
+	uint16_t mmu_r(offs_t offset);
-	DECLARE_WRITE16_MEMBER(mmu_w);
+	void mmu_w(offs_t offset, uint16_t data);
-	DECLARE_READ16_MEMBER(ram_r);
+	uint16_t ram_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(ram_w);
+	void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask);
-	DECLARE_READ16_MEMBER(trap_r);
+	uint16_t trap_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(trap_w);
+	void trap_w(offs_t offset, uint16_t data, uint16_t mem_mask);
 
-	DECLARE_READ8_MEMBER(floppy_id_r);
+	uint8_t floppy_id_r();
-	DECLARE_WRITE8_MEMBER(floppy_id_w);
+	void floppy_id_w(uint8_t data);
 	DECLARE_FLOPPY_FORMATS(floppy_formats);
 
 	DECLARE_WRITE_LINE_MEMBER(irq_1);
@@ -523,19 +523,19 @@ static INPUT_PORTS_START(hp_ipc)
 INPUT_PORTS_END
 
 
-READ16_MEMBER(hp_ipc_state::mmu_r)
+uint16_t hp_ipc_state::mmu_r(offs_t offset)
 {
 	uint16_t data = (m_mmu[offset & 3] >> 10);
 
 	return data;
 }
 
-WRITE16_MEMBER(hp_ipc_state::mmu_w)
+void hp_ipc_state::mmu_w(offs_t offset, uint16_t data)
 {
 	m_mmu[offset & 3] = (data & 0xFFF) << 10;
 }
 
-READ16_MEMBER(hp_ipc_state::mem_r)
+uint16_t hp_ipc_state::mem_r(offs_t offset, uint16_t mem_mask)
 {
 	int fc = m_maincpu->get_fc() & 4;
 
@@ -545,10 +545,10 @@ READ16_MEMBER(hp_ipc_state::mem_r)
 		m_bankdev->set_bank(m_fc ? 0 : 1);
 	}
 
-	return m_bankdev->read16(space, offset, mem_mask);
+	return m_bankdev->read16(offset, mem_mask);
 }
 
-WRITE16_MEMBER(hp_ipc_state::mem_w)
+void hp_ipc_state::mem_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	int fc = m_maincpu->get_fc() & 4;
 
@@ -558,23 +558,23 @@ WRITE16_MEMBER(hp_ipc_state::mem_w)
 		m_bankdev->set_bank(m_fc ? 0 : 1);
 	}
 
-	m_bankdev->write16(space, offset, data, mem_mask);
+	m_bankdev->write16(offset, data, mem_mask);
 }
 
-READ16_MEMBER(hp_ipc_state::trap_r)
+uint16_t hp_ipc_state::trap_r(offs_t offset, uint16_t mem_mask)
 {
 	if (!machine().side_effects_disabled()) set_bus_error((offset << 1) & 0xFFFFFF, true, mem_mask);
 
 	return 0xffff;
 }
 
-WRITE16_MEMBER(hp_ipc_state::trap_w)
+void hp_ipc_state::trap_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	if (!machine().side_effects_disabled()) set_bus_error((offset << 1) & 0xFFFFFF, false, mem_mask);
 }
 
 
-READ16_MEMBER(hp_ipc_state::ram_r)
+uint16_t hp_ipc_state::ram_r(offs_t offset, uint16_t mem_mask)
 {
 	uint32_t ram_address = get_ram_address(offset);
 	uint16_t data = 0xffff;
@@ -592,7 +592,7 @@ READ16_MEMBER(hp_ipc_state::ram_r)
 	return data;
 }
 
-WRITE16_MEMBER(hp_ipc_state::ram_w)
+void hp_ipc_state::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	uint32_t ram_address = get_ram_address(offset);
 
@@ -613,7 +613,7 @@ WRITE16_MEMBER(hp_ipc_state::ram_w)
  * bit 1 -- disk changed (from drive)
  * bit 0 -- write protect (from drive)
  */
-READ8_MEMBER(hp_ipc_state::floppy_id_r)
+uint8_t hp_ipc_state::floppy_id_r()
 {
 	uint8_t data = 0;
 
@@ -634,7 +634,7 @@ READ8_MEMBER(hp_ipc_state::floppy_id_r)
  * bit 1 -- 1: drive select (via inverter to drive's /DRIVE SEL 1)
  * bit 0 -- 1: reset disc_changed (via inverter to drive's /DSKRST)
  */
-WRITE8_MEMBER(hp_ipc_state::floppy_id_w)
+void hp_ipc_state::floppy_id_w(uint8_t data)
 {
 	floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
 

src/mame/drivers/mbc55x.cpp

@@ -67,33 +67,33 @@ void mbc55x_state::mbc55x_iodecode(address_map &map)
 	map(0x1c, 0x1d).mirror(0x02).rw(m_kb_uart, FUNC(i8251_device::read), FUNC(i8251_device::write));
 }
 
-READ8_MEMBER(mbc55x_state::iodecode_r)
+uint8_t mbc55x_state::iodecode_r(offs_t offset)
 {
-	return m_iodecode->read8(space, offset >> 1);
+	return m_iodecode->read8(offset >> 1);
 }
 
-WRITE8_MEMBER(mbc55x_state::iodecode_w)
+void mbc55x_state::iodecode_w(offs_t offset, uint8_t data)
 {
-	m_iodecode->write8(space, offset >> 1, data);
+	m_iodecode->write8(offset >> 1, data);
 }
 
 /* 8255 Configuration */
 
-READ8_MEMBER(mbc55x_state::game_io_r)
+uint8_t mbc55x_state::game_io_r()
 {
 	return 0xff;
 }
 
-WRITE8_MEMBER(mbc55x_state::game_io_w)
+void mbc55x_state::game_io_w(uint8_t data)
 {
 }
 
-READ8_MEMBER( mbc55x_state::printer_status_r)
+uint8_t mbc55x_state::printer_status_r()
 {
 	return m_printer_status;
 }
 
-WRITE8_MEMBER(mbc55x_state::printer_data_w)
+void mbc55x_state::printer_data_w(uint8_t data)
 {
 	m_printer->write_data7(!BIT(data, 7));
 	m_printer->write_data6(!BIT(data, 6));
@@ -105,7 +105,7 @@ WRITE8_MEMBER(mbc55x_state::printer_data_w)
 	m_printer->write_data0(!BIT(data, 0));
 }
 
-WRITE8_MEMBER(mbc55x_state::disk_select_w)
+void mbc55x_state::disk_select_w(uint8_t data)
 {
 	floppy_image_device *floppy = nullptr;
 

src/mame/drivers/pasogo.cpp

@@ -141,12 +141,12 @@ private:
 	required_shared_ptr<uint16_t> m_vram;
 	required_device<palette_device> m_palette;
 
-	DECLARE_READ16_MEMBER(ems_r);
+	uint16_t ems_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(ems_w);
+	void ems_w(offs_t offset, uint16_t data, uint16_t mem_mask);
-	DECLARE_READ16_MEMBER(emsram_r);
+	uint16_t emsram_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(emsram_w);
+	void emsram_w(offs_t offset, uint16_t data, uint16_t mem_mask);
-	DECLARE_READ8_MEMBER(vg230_io_r);
+	uint8_t vg230_io_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(vg230_io_w);
+	void vg230_io_w(offs_t offset, uint8_t data);
 
 	struct
 	{
@@ -229,7 +229,7 @@ void pasogo_state::machine_start()
 	m_vg230.bios_timer.data=0x7200; // HACK
 }
 
-READ8_MEMBER( pasogo_state::vg230_io_r )
+uint8_t pasogo_state::vg230_io_r(offs_t offset)
 {
 	int log = true;
 	uint8_t data = 0;
@@ -315,7 +315,7 @@ READ8_MEMBER( pasogo_state::vg230_io_r )
 }
 
 
-WRITE8_MEMBER( pasogo_state::vg230_io_w )
+void pasogo_state::vg230_io_w(offs_t offset, uint8_t data)
 {
 	int log = true;
 
@@ -387,7 +387,7 @@ WRITE8_MEMBER( pasogo_state::vg230_io_w )
 }
 
 
-READ16_MEMBER( pasogo_state::ems_r )
+uint16_t pasogo_state::ems_r(offs_t offset, uint16_t mem_mask)
 {
 	uint8_t data = 0;
 	uint8_t index;
@@ -407,7 +407,7 @@ READ16_MEMBER( pasogo_state::ems_r )
 }
 
 
-WRITE16_MEMBER( pasogo_state::ems_w )
+void pasogo_state::ems_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	uint8_t index;
 
@@ -434,16 +434,16 @@ WRITE16_MEMBER( pasogo_state::ems_w )
 	}
 }
 
-READ16_MEMBER( pasogo_state::emsram_r )
+uint16_t pasogo_state::emsram_r(offs_t offset, uint16_t mem_mask)
 {
 	m_ems->set_bank(m_ems_bank[(offset >> 13) & 0x1f] & 0x7fff);
-	return m_ems->read16(space, offset & 0x1fff, mem_mask);
+	return m_ems->read16(offset & 0x1fff, mem_mask);
 }
 
-WRITE16_MEMBER( pasogo_state::emsram_w )
+void pasogo_state::emsram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	m_ems->set_bank(m_ems_bank[(offset >> 13) & 0x1f] & 0x7fff);
-	m_ems->write16(space, offset & 0x1fff, data, mem_mask);
+	m_ems->write16(offset & 0x1fff, data, mem_mask);
 }
 
 void pasogo_state::emsbank_map(address_map &map)

src/mame/drivers/pengadvb.cpp

@@ -54,15 +54,15 @@ public:
 	void init_pengadvb();
 
 private:
-	DECLARE_READ8_MEMBER(mem_r);
+	uint8_t mem_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(mem_w);
+	void mem_w(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER(megarom_bank_w);
+	void megarom_bank_w(offs_t offset, uint8_t data);
 
-	DECLARE_WRITE8_MEMBER(pengadvb_psg_port_b_w);
+	void psg_port_b_w(uint8_t data);
-	DECLARE_READ8_MEMBER(pengadvb_ppi_port_a_r);
+	uint8_t ppi_port_a_r();
-	DECLARE_WRITE8_MEMBER(pengadvb_ppi_port_a_w);
+	void ppi_port_a_w(uint8_t data);
-	DECLARE_READ8_MEMBER(pengadvb_ppi_port_b_r);
+	uint8_t ppi_port_b_r();
-	DECLARE_WRITE8_MEMBER(pengadvb_ppi_port_c_w);
+	void ppi_port_c_w(uint8_t data);
 
 	virtual void machine_start() override;
 	virtual void machine_reset() override;
@@ -86,17 +86,17 @@ private:
 
 ***************************************************************************/
 
-READ8_MEMBER(pengadvb_state::mem_r)
+uint8_t pengadvb_state::mem_r(offs_t offset)
 {
-	return m_page[offset >> 14 & 3]->read8(space, offset);
+	return m_page[offset >> 14 & 3]->read8(offset);
 }
 
-WRITE8_MEMBER(pengadvb_state::mem_w)
+void pengadvb_state::mem_w(offs_t offset, uint8_t data)
 {
-	m_page[offset >> 14 & 3]->write8(space, offset, data);
+	m_page[offset >> 14 & 3]->write8(offset, data);
 }
 
-WRITE8_MEMBER(pengadvb_state::megarom_bank_w)
+void pengadvb_state::megarom_bank_w(offs_t offset, uint8_t data)
 {
 	m_bank[offset >> 13 & 3]->set_entry(data & 0xf);
 }
@@ -165,7 +165,7 @@ INPUT_PORTS_END
 ***************************************************************************/
 
 // AY8910
-WRITE8_MEMBER(pengadvb_state::pengadvb_psg_port_b_w)
+void pengadvb_state::psg_port_b_w(uint8_t data)
 {
 	// leftover from msx ver?
 }
@@ -173,12 +173,12 @@ WRITE8_MEMBER(pengadvb_state::pengadvb_psg_port_b_w)
 /**************************************************************************/
 
 // I8255
-READ8_MEMBER(pengadvb_state::pengadvb_ppi_port_a_r)
+uint8_t pengadvb_state::ppi_port_a_r()
 {
 	return m_primary_slot_reg;
 }
 
-WRITE8_MEMBER(pengadvb_state::pengadvb_ppi_port_a_w)
+void pengadvb_state::ppi_port_a_w(uint8_t data)
 {
 	if (data != m_primary_slot_reg)
 	{
@@ -189,7 +189,7 @@ WRITE8_MEMBER(pengadvb_state::pengadvb_ppi_port_a_w)
 	}
 }
 
-READ8_MEMBER(pengadvb_state::pengadvb_ppi_port_b_r)
+uint8_t pengadvb_state::ppi_port_b_r()
 {
 	// TODO: dipswitch
 	switch (m_kb_matrix_row)
@@ -204,7 +204,7 @@ READ8_MEMBER(pengadvb_state::pengadvb_ppi_port_b_r)
 	return 0xff;
 }
 
-WRITE8_MEMBER(pengadvb_state::pengadvb_ppi_port_c_w)
+void pengadvb_state::ppi_port_c_w(uint8_t data)
 {
 	m_kb_matrix_row = data & 0x0f;
 }
@@ -227,10 +227,10 @@ void pengadvb_state::pengadvb(machine_config &config)
 	ADDRESS_MAP_BANK(config, "page3").set_map(&pengadvb_state::bank_mem).set_options(ENDIANNESS_LITTLE, 8, 18, 0x10000);
 
 	i8255_device &ppi(I8255(config, "ppi8255"));
-	ppi.in_pa_callback().set(FUNC(pengadvb_state::pengadvb_ppi_port_a_r));
+	ppi.in_pa_callback().set(FUNC(pengadvb_state::ppi_port_a_r));
-	ppi.out_pa_callback().set(FUNC(pengadvb_state::pengadvb_ppi_port_a_w));
+	ppi.out_pa_callback().set(FUNC(pengadvb_state::ppi_port_a_w));
-	ppi.in_pb_callback().set(FUNC(pengadvb_state::pengadvb_ppi_port_b_r));
+	ppi.in_pb_callback().set(FUNC(pengadvb_state::ppi_port_b_r));
-	ppi.out_pc_callback().set(FUNC(pengadvb_state::pengadvb_ppi_port_c_w));
+	ppi.out_pc_callback().set(FUNC(pengadvb_state::ppi_port_c_w));
 
 	/* video hardware */
 	tms9128_device &vdp(TMS9128(config, "tms9128", XTAL(10'738'635)));
@@ -243,7 +243,7 @@ void pengadvb_state::pengadvb(machine_config &config)
 	SPEAKER(config, "mono").front_center();
 	ay8910_device &aysnd(AY8910(config, "aysnd", XTAL(10'738'635)/6));
 	aysnd.port_a_read_callback().set_ioport("IN0");
-	aysnd.port_b_write_callback().set(FUNC(pengadvb_state::pengadvb_psg_port_b_w));
+	aysnd.port_b_write_callback().set(FUNC(pengadvb_state::psg_port_b_w));
 	aysnd.add_route(ALL_OUTPUTS, "mono", 0.50);
 }
 

src/mame/drivers/sdk51.cpp

@@ -45,9 +45,9 @@ private:
 	void datamem_map(address_map &map);
 	void mem0_map(address_map &map);
 
-	DECLARE_READ8_MEMBER(psen_r);
+	u8 psen_r(offs_t offset);
-	DECLARE_READ8_MEMBER(datamem_r);
+	u8 datamem_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(datamem_w);
+	void datamem_w(offs_t offset, u8 data);
 
 	u8 brkmem_r(offs_t offset);
 	void brkmem_w(offs_t offset, u8 data);
@@ -73,19 +73,19 @@ private:
 	bool m_display_clock;
 };
 
-READ8_MEMBER(sdk51_state::psen_r)
+u8 sdk51_state::psen_r(offs_t offset)
 {
-	return m_progmem->read8(space, offset);
+	return m_progmem->read8(offset);
 }
 
-READ8_MEMBER(sdk51_state::datamem_r)
+u8 sdk51_state::datamem_r(offs_t offset)
 {
-	return m_datamem->read8(space, offset);
+	return m_datamem->read8(offset);
 }
 
-WRITE8_MEMBER(sdk51_state::datamem_w)
+void sdk51_state::datamem_w(offs_t offset, u8 data)
 {
-	m_datamem->write8(space, offset, data);
+	m_datamem->write8(offset, data);
 }
 
 u8 sdk51_state::brkmem_r(offs_t offset)

src/mame/drivers/sun2.cpp

@@ -300,7 +300,7 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
 		switch ((m_pagemap[entry] >> 22) & 7)
 		{
 			case 0: // type 0 space
-				return m_type0space->read16(space, tmp, mem_mask);
+				return m_type0space->read16(tmp, mem_mask);
 
 			case 1: // type 1 space
 				// EPROM space is special: the MMU has a trap door
@@ -326,13 +326,13 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
 				}
 
 				//printf("read device space @ %x\n", tmp<<1);
-				return m_type1space->read16(space, tmp, mem_mask);
+				return m_type1space->read16(tmp, mem_mask);
 
 			case 2: // type 2 space
-				return m_type2space->read16(space, tmp, mem_mask);
+				return m_type2space->read16(tmp, mem_mask);
 
 			case 3: // type 3 space
-				return m_type3space->read16(space, tmp, mem_mask);
+				return m_type3space->read16(tmp, mem_mask);
 		}
 	}
 	else
@@ -445,20 +445,20 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
 		switch ((m_pagemap[entry] >> 22) & 7)
 		{
 			case 0: // type 0
-				m_type0space->write16(space, tmp, data, mem_mask);
+				m_type0space->write16(tmp, data, mem_mask);
 				return;
 
 			case 1: // type 1
 				//printf("write device space @ %x\n", tmp<<1);
-				m_type1space->write16(space, tmp, data, mem_mask);
+				m_type1space->write16(tmp, data, mem_mask);
 				return;
 
 			case 2: // type 2
-				m_type2space->write16(space, tmp, data, mem_mask);
+				m_type2space->write16(tmp, data, mem_mask);
 				return;
 
 			case 3: // type 3
-				m_type3space->write16(space, tmp, data, mem_mask);
+				m_type3space->write16(tmp, data, mem_mask);
 				return;
 		}
 	}

src/mame/drivers/sun3.cpp

@@ -543,7 +543,7 @@ READ32_MEMBER( sun3_state::tl_mmu_r )
 		switch ((m_pagemap[entry] >> 26) & 3)
 		{
 			case 0: // type 0 space
-				return m_type0space->read32(space, tmp, mem_mask);
+				return m_type0space->read32(tmp, mem_mask);
 
 			case 1: // type 1 space
 				// magic ROM bypass
@@ -551,13 +551,13 @@ READ32_MEMBER( sun3_state::tl_mmu_r )
 				{
 					return m_rom_ptr[offset & 0x3fff];
 				}
-				return m_type1space->read32(space, tmp, mem_mask);
+				return m_type1space->read32(tmp, mem_mask);
 
 			case 2: // type 2 space
-				return m_type2space->read32(space, tmp, mem_mask);
+				return m_type2space->read32(tmp, mem_mask);
 
 			case 3: // type 3 space
-				return m_type3space->read32(space, tmp, mem_mask);
+				return m_type3space->read32(tmp, mem_mask);
 		}
 	}
 	else
@@ -693,20 +693,20 @@ WRITE32_MEMBER( sun3_state::tl_mmu_w )
 		switch ((m_pagemap[entry] >> 26) & 3)
 		{
 			case 0: // type 0
-				m_type0space->write32(space, tmp, data, mem_mask);
+				m_type0space->write32(tmp, data, mem_mask);
 				return;
 
 			case 1: // type 1
 				//printf("write device space @ %x\n", tmp<<1);
-				m_type1space->write32(space, tmp, data, mem_mask);
+				m_type1space->write32(tmp, data, mem_mask);
 				return;
 
 			case 2: // type 2
-				m_type2space->write32(space, tmp, data, mem_mask);
+				m_type2space->write32(tmp, data, mem_mask);
 				return;
 
 			case 3: // type 3
-				m_type3space->write32(space, tmp, data, mem_mask);
+				m_type3space->write32(tmp, data, mem_mask);
 				return;
 		}
 	}

src/mame/drivers/sun4.cpp

@@ -956,7 +956,7 @@ READ32_MEMBER( sun4_state::sun4_insn_data_r )
 		switch (entry.type)
 		{
 		case 0: // type 0 space
-			return m_type0space->read32(space, tmp, mem_mask);
+			return m_type0space->read32(tmp, mem_mask);
 
 		case 1: // type 1 space
 			// magic EPROM bypass
@@ -965,7 +965,7 @@ READ32_MEMBER( sun4_state::sun4_insn_data_r )
 				return m_rom_ptr[offset & 0x1ffff];
 			}
 			//printf("Read type 1 @ VA %08x, phys %08x\n", offset<<2, tmp<<2);
-			return m_type1space->read32(space, tmp, mem_mask);
+			return m_type1space->read32(tmp, mem_mask);
 
 		default:
 			//logerror("sun4: access to unhandled memory type\n");
@@ -1019,12 +1019,12 @@ WRITE32_MEMBER( sun4_state::sun4_insn_data_w )
 		switch (entry.type)
 		{
 		case 0: // type 0
-			m_type0space->write32(space, tmp, data, mem_mask);
+			m_type0space->write32(tmp, data, mem_mask);
 			return;
 
 		case 1: // type 1
 			//printf("write device space @ %x\n", tmp<<1);
-			m_type1space->write32(space, tmp, data, mem_mask);
+			m_type1space->write32(tmp, data, mem_mask);
 			return;
 
 		default:

src/mame/drivers/vt240.cpp

@@ -106,8 +106,8 @@ private:
 	DECLARE_WRITE8_MEMBER(lu_w);
 	DECLARE_WRITE8_MEMBER(hbscrl_w);
 	DECLARE_WRITE8_MEMBER(lbscrl_w);
-	DECLARE_READ16_MEMBER(mem_r);
+	uint16_t mem_r(offs_t offset, uint16_t mem_mask);
-	DECLARE_WRITE16_MEMBER(mem_w);
+	void mem_w(offs_t offset, uint16_t data, uint16_t mem_mask);
 
 	void init_vt240();
 	virtual void machine_reset() override;
@@ -321,23 +321,23 @@ WRITE8_MEMBER(vt240_state::mem_map_sel_w)
 	m_mem_map_sel = data & 1;
 }
 
-READ16_MEMBER(vt240_state::mem_r)
+uint16_t vt240_state::mem_r(offs_t offset, uint16_t mem_mask)
 {
 	if(m_mem_map_sel)
 	{
 		m_bank->set_bank(m_mem_map[(offset >> 11) & 0xf]);
-		return m_bank->read16(space, offset & 0x7ff, mem_mask);
+		return m_bank->read16(offset & 0x7ff, mem_mask);
 	}
 	else
 		return m_rom[offset];
 }
 
-WRITE16_MEMBER(vt240_state::mem_w)
+void vt240_state::mem_w(offs_t offset, uint16_t data, uint16_t mem_mask)
 {
 	if(m_mem_map_sel)
 	{
 		m_bank->set_bank(m_mem_map[(offset >> 11) & 0xf]);
-		m_bank->write16(space, offset & 0x7ff, data, mem_mask);
+		m_bank->write16(offset & 0x7ff, data, mem_mask);
 	}
 }
 

src/mame/drivers/x1.cpp

@@ -1009,7 +1009,7 @@ READ8_MEMBER( x1_state::x1_ex_gfxram_r )
 	if (!machine().side_effects_disabled())
 	{
 		m_iobank->set_bank(0); // any read disables the extended mode
-		return m_iobank->read8(space, offset);
+		return m_iobank->read8(offset);
 	}
 	else
 	{

src/mame/includes/mbc55x.h

@@ -102,16 +102,16 @@ protected:
 private:
 	DECLARE_FLOPPY_FORMATS(floppy_formats);
 
-	DECLARE_READ8_MEMBER(iodecode_r);
+	uint8_t iodecode_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(iodecode_w);
+	void iodecode_w(offs_t offset, uint8_t data);
 
-	DECLARE_READ8_MEMBER(vram_page_r);
+	uint8_t vram_page_r();
-	DECLARE_WRITE8_MEMBER(vram_page_w);
+	void vram_page_w(uint8_t data);
-	DECLARE_READ8_MEMBER(game_io_r);
+	uint8_t game_io_r();
-	DECLARE_WRITE8_MEMBER(game_io_w);
+	void game_io_w(uint8_t data);
-	DECLARE_READ8_MEMBER(printer_status_r);
+	uint8_t printer_status_r();
-	DECLARE_WRITE8_MEMBER(printer_data_w);
+	void printer_data_w(uint8_t data);
-	DECLARE_WRITE8_MEMBER(disk_select_w);
+	void disk_select_w(uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER(printer_busy_w);
 	DECLARE_WRITE_LINE_MEMBER(printer_paper_end_w);
 	DECLARE_WRITE_LINE_MEMBER(printer_select_w);

src/mame/includes/ti85.h

@@ -226,8 +226,8 @@ private:
 	DECLARE_WRITE8_MEMBER(ti83pse_ctimer3_loop_w);
 	DECLARE_READ8_MEMBER(ti83pse_ctimer3_count_r);
 	DECLARE_WRITE8_MEMBER(ti83pse_ctimer3_count_w);
-	DECLARE_READ8_MEMBER(ti83p_membank2_r);
+	uint8_t ti83p_membank2_r(offs_t offset);
-	DECLARE_READ8_MEMBER(ti83p_membank3_r);
+	uint8_t ti83p_membank3_r(offs_t offset);
 
 	void ti8x_update_bank(address_space &space, uint8_t bank, uint8_t *base, uint8_t page, bool is_ram);
 	void update_ti85_memory();

src/mame/includes/vcs80.h

@@ -49,16 +49,16 @@ private:
 	DECLARE_READ8_MEMBER( pio_pa_r );
 	DECLARE_WRITE8_MEMBER( pio_pb_w );
 
-	DECLARE_READ8_MEMBER( mem_r )
+	uint8_t mem_r(offs_t offset)
 	{
 		m_pio->port_b_write((!BIT(offset, 0)) << 7);
-		return m_bdmem->read8(space, offset);
+		return m_bdmem->read8(offset);
 	}
 
-	DECLARE_WRITE8_MEMBER( mem_w )
+	void mem_w(offs_t offset, uint8_t data)
 	{
 		m_pio->port_b_write((!BIT(offset, 0)) << 7);
-		m_bdmem->write8(space, offset, data);
+		m_bdmem->write8(offset, data);
 	}
 
 	DECLARE_READ8_MEMBER( io_r )

src/mame/includes/xavix.h

@@ -205,7 +205,7 @@ private:
 
 	virtual void video_start() override;
 
-	virtual DECLARE_READ8_MEMBER(opcodes_000000_r)
+	virtual uint8_t opcodes_000000_r(offs_t offset)
 	{
 		if (offset & 0x8000)
 		{
@@ -213,24 +213,24 @@ private:
 		}
 		else
 		{
-			return m_lowbus->read8(space, offset & 0x7fff);
+			return m_lowbus->read8(offset & 0x7fff);
 		}
 	}
 
-	virtual DECLARE_READ8_MEMBER(opcodes_800000_r)
+	virtual uint8_t opcodes_800000_r(offs_t offset)
 	{
 		// rad_fb, rad_madf confirm that for >0x800000 the CPU only sees ROM when executing opcodes
 		return m_rgn[(offset) & (m_rgnlen - 1)];
 	}
 
-	virtual DECLARE_READ8_MEMBER(extbus_r) { return m_rgn[(offset) & (m_rgnlen - 1)]; }
+	virtual uint8_t extbus_r(offs_t offset) { return m_rgn[(offset) & (m_rgnlen - 1)]; }
-	virtual DECLARE_WRITE8_MEMBER(extbus_w)
+	virtual void extbus_w(offs_t offset, uint8_t data)
 	{
 		logerror("%s: write to external bus %06x %02x\n", machine().describe_context(), offset, data);	
 	}
 
 
-	DECLARE_READ8_MEMBER(sample_read)
+	uint8_t sample_read(offs_t offset)
 	{
 		return read_full_data_sp_bypass(offset);
 	};
@@ -663,7 +663,7 @@ protected:
 
 	// for Cart cases this memory bypass becomes more complex
 
-	virtual DECLARE_READ8_MEMBER(opcodes_000000_r) override
+	virtual uint8_t opcodes_000000_r(offs_t offset) override
 	{
 		if (offset & 0x8000)
 		{
@@ -685,11 +685,11 @@ protected:
 		}
 		else
 		{
-			return m_lowbus->read8(space, offset & 0x7fff);
+			return m_lowbus->read8(offset & 0x7fff);
 		}
 	}
 
-	virtual DECLARE_READ8_MEMBER(opcodes_800000_r) override
+	virtual uint8_t opcodes_800000_r(offs_t offset) override
 	{
 		if (offset & 0x400000)
 		{
@@ -708,7 +708,7 @@ protected:
 		}
 	}
 
-	virtual DECLARE_READ8_MEMBER(extbus_r) override
+	virtual uint8_t extbus_r(offs_t offset) override
 	{
 		if (m_extbusctrl[1] & 0x08)
 		{
@@ -734,7 +734,7 @@ protected:
 			}
 		}
 	}
-	virtual DECLARE_WRITE8_MEMBER(extbus_w) override
+	virtual void extbus_w(offs_t offset, uint8_t data) override
 	{
 		if (m_extbusctrl[0] & 0x08)
 		{

src/mame/machine/coco.cpp

@@ -305,7 +305,7 @@ uint8_t coco_state::floating_space_read(offs_t offset)
 	//
 	// Most of the time, the read below will result in floating_bus_read() being
 	// invoked
-	return m_floating->read8(m_floating->space(0), offset);
+	return m_floating->read8(offset);
 }
 
 
@@ -315,7 +315,7 @@ uint8_t coco_state::floating_space_read(offs_t offset)
 
 void coco_state::floating_space_write(offs_t offset, uint8_t data)
 {
-	m_floating->write8(m_floating->space(0), offset, data);
+	m_floating->write8(offset, data);
 }
 
 

src/mame/machine/taitocchip.cpp

@@ -110,7 +110,7 @@ This chip *ALWAYS* has a bypass capacitor (ceramic, 104, 0.10 uF) soldered on to
 
 DEFINE_DEVICE_TYPE(TAITO_CCHIP, taito_cchip_device, "cchip", "Taito TC0030CMD (C-Chip)")
 
-taito_cchip_device::taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+taito_cchip_device::taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
 	device_t(mconfig, TAITO_CCHIP, tag, owner, clock),
 	m_upd7811(*this, "upd7811"),
 	m_upd4464_bank(*this, "upd4464_bank"),
@@ -148,7 +148,7 @@ void taito_cchip_device::cchip_ram_bank68(address_map &map)
 	map(0x0000, 0x1fff).ram().share("upd4464");
 }
 
-READ8_MEMBER(taito_cchip_device::asic_r)
+u8 taito_cchip_device::asic_r(offs_t offset)
 {
 	if ((offset != 0x001) && (!machine().side_effects_disabled())) // prevent logerror spam for now
 		logerror("%s: asic_r %04x\n", machine().describe_context(), offset);
@@ -157,7 +157,7 @@ READ8_MEMBER(taito_cchip_device::asic_r)
 	return 0x00; // 600-7ff is write-only(?) asic banking reg, may read as open bus or never assert /DTACK on read?
 }
 
-WRITE8_MEMBER(taito_cchip_device::asic_w)
+void taito_cchip_device::asic_w(offs_t offset, u8 data)
 {
 	//logerror("%s: asic_w %04x %02x\n", machine().describe_context(), offset, data);
 	if (offset == 0x200)
@@ -171,7 +171,7 @@ WRITE8_MEMBER(taito_cchip_device::asic_w)
 	}
 }
 
-WRITE8_MEMBER(taito_cchip_device::asic68_w)
+void taito_cchip_device::asic68_w(offs_t offset, u8 data)
 {
 	//logerror("%s: asic68_w %04x %02x\n", machine().describe_context(), offset, data);
 	if (offset == 0x200)
@@ -185,24 +185,24 @@ WRITE8_MEMBER(taito_cchip_device::asic68_w)
 	}
 }
 
-READ8_MEMBER(taito_cchip_device::mem_r)
+u8 taito_cchip_device::mem_r(offs_t offset)
 {
-	return m_upd4464_bank->read8(space, offset & 0x03ff);
+	return m_upd4464_bank->read8(offset & 0x03ff);
 }
 
-WRITE8_MEMBER(taito_cchip_device::mem_w)
+void taito_cchip_device::mem_w(offs_t offset, u8 data)
 {
-	return m_upd4464_bank->write8(space, offset & 0x03ff, data);
+	return m_upd4464_bank->write8(offset & 0x03ff, data);
 }
 
-READ8_MEMBER(taito_cchip_device::mem68_r)
+u8 taito_cchip_device::mem68_r(offs_t offset)
 {
-	return m_upd4464_bank68->read8(space, offset & 0x03ff);
+	return m_upd4464_bank68->read8(offset & 0x03ff);
 }
 
-WRITE8_MEMBER(taito_cchip_device::mem68_w)
+void taito_cchip_device::mem68_w(offs_t offset, u8 data)
 {
-	return m_upd4464_bank68->write8(space, offset & 0x03ff, data);
+	return m_upd4464_bank68->write8(offset & 0x03ff, data);
 }
 
 void taito_cchip_device::cchip_map(address_map &map)

src/mame/machine/taitocchip.h

@@ -14,7 +14,7 @@ class taito_cchip_device :  public device_t
 {
 public:
 	// construction/destruction
-	taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 
 	auto in_pa_callback()  { return m_in_pa_cb.bind(); }
 	auto in_pb_callback()  { return m_in_pb_cb.bind(); }
@@ -25,15 +25,15 @@ public:
 	auto out_pc_callback() { return m_out_pc_cb.bind(); }
 
 	// can be accessed externally
-	DECLARE_READ8_MEMBER(asic_r);
+	u8 asic_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(asic_w);
+	void asic_w(offs_t offset, u8 data);
-	DECLARE_WRITE8_MEMBER(asic68_w);
+	void asic68_w(offs_t offset, u8 data);
 
-	DECLARE_READ8_MEMBER(mem_r);
+	u8 mem_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(mem_w);
+	void mem_w(offs_t offset, u8 data);
 
-	DECLARE_READ8_MEMBER(mem68_r);
+	u8 mem68_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER(mem68_w);
+	void mem68_w(offs_t offset, u8 data);
 
 	void ext_interrupt(int state);
 
@@ -49,12 +49,12 @@ protected:
 	virtual void device_reset() override;
 
 private:
-	uint8_t m_asic_ram[4];
+	u8 m_asic_ram[4];
 
 	required_device<cpu_device> m_upd7811;
 	required_device<address_map_bank_device> m_upd4464_bank;
 	required_device<address_map_bank_device> m_upd4464_bank68;
-	required_shared_ptr<uint8_t> m_upd4464;
+	required_shared_ptr<u8> m_upd4464;
 
 	devcb_read8        m_in_pa_cb;
 	devcb_read8        m_in_pb_cb;

src/mame/machine/ti85.cpp

@@ -269,7 +269,7 @@ MACHINE_RESET_MEMBER(ti85_state,ti85)
 	m_PCR = 0xc0;
 }
 
-READ8_MEMBER(ti85_state::ti83p_membank2_r)
+uint8_t ti85_state::ti83p_membank2_r(offs_t offset)
 {
 	/// http://wikiti.brandonw.net/index.php?title=83Plus:State_of_the_calculator_at_boot
 	/// should only trigger when fetching opcodes
@@ -287,10 +287,10 @@ READ8_MEMBER(ti85_state::ti83p_membank2_r)
 		}
 	}
 
-	return m_membank2->read8(space, offset);
+	return m_membank2->read8(offset);
 }
 
-READ8_MEMBER(ti85_state::ti83p_membank3_r)
+uint8_t ti85_state::ti83p_membank3_r(offs_t offset)
 {
 	/// http://wikiti.brandonw.net/index.php?title=83Plus:State_of_the_calculator_at_boot
 	/// should only trigger when fetching opcodes
@@ -309,7 +309,7 @@ READ8_MEMBER(ti85_state::ti83p_membank3_r)
 		}
 	}
 
-	return m_membank3->read8(space, offset);
+	return m_membank3->read8(offset);
 }
 
 MACHINE_RESET_MEMBER(ti85_state,ti83p)

src/mame/video/mbc55x.cpp

@@ -185,12 +185,12 @@ void mbc55x_state::mbc55x_palette(palette_device &palette) const
 
 /* Video ram page register */
 
-READ8_MEMBER( mbc55x_state::vram_page_r )
+uint8_t mbc55x_state::vram_page_r()
 {
 	return m_vram_page;
 }
 
-WRITE8_MEMBER( mbc55x_state::vram_page_w )
+void mbc55x_state::vram_page_w(uint8_t data)
 {
 	logerror("%s : set vram page to %02X\n", machine().describe_context(),data);
 

src/mame/video/toaplan2.cpp

@@ -192,7 +192,7 @@ WRITE16_MEMBER(toaplan2_state::batrider_textdata_dma_w)
 	m_dma_space->set_bank(1);
 	for (int i = 0; i < (0x8000 >> 1); i++)
 	{
-		m_dma_space->write16(space, i, m_mainram[i]);
+		m_dma_space->write16(i, m_mainram[i]);
 	}
 }
 
@@ -204,7 +204,7 @@ WRITE16_MEMBER(toaplan2_state::batrider_pal_text_dma_w)
 	m_dma_space->set_bank(0);
 	for (int i = 0; i < (0x3400 >> 1); i++)
 	{
-		m_dma_space->write16(space, i, m_mainram[i]);
+		m_dma_space->write16(i, m_mainram[i]);
 	}
 }