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https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
wd_fdc: Simplify API. Plus some collateral damage [O. Galibert]
This commit is contained in:
parent
e78ca34bac
commit
f1b7a2f97e
@ -159,16 +159,16 @@ uint8_t a2bus_corvfdc01_device::read_c0nx(uint8_t offset)
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return m_fdc_local_status | LS_8IN_mask;
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case 8: // WD1793 at 8-11
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return m_wdfdc->read_status();
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return m_wdfdc->status_r();
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case 9:
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return m_wdfdc->read_track();
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return m_wdfdc->track_r();
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case 10:
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return m_wdfdc->read_sector();
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return m_wdfdc->sector_r();
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case 11:
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return m_wdfdc->read_data();
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return m_wdfdc->data_r();
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}
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return 0xff;
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@ -226,19 +226,19 @@ void a2bus_corvfdc01_device::write_c0nx(uint8_t offset, uint8_t data)
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break;
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case 8: // FDC COMMAMD REG
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m_wdfdc->write_cmd(data);
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m_wdfdc->cmd_w(data);
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break;
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case 9: // FDC TRACK REG
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m_wdfdc->write_track(data);
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m_wdfdc->track_w(data);
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break;
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case 10: // FDC SECTOR REG
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m_wdfdc->write_sector(data);
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m_wdfdc->sector_w(data);
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break;
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case 11: // FDC DATA REG
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m_wdfdc->write_data(data);
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m_wdfdc->data_w(data);
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break;
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}
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}
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@ -665,7 +665,7 @@ READ8_MEMBER( luxor_55_10828_device::fdc_r )
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if (m_wait_enable)
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{
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data = m_fdc->gen_r(offset);
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data = m_fdc->read(offset);
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}
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else if (!m_fdc_irq && !m_fdc_drq)
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{
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@ -673,7 +673,7 @@ READ8_MEMBER( luxor_55_10828_device::fdc_r )
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}
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else
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{
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data = m_fdc->gen_r(offset);
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data = m_fdc->read(offset);
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}
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return data;
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@ -689,7 +689,7 @@ WRITE8_MEMBER( luxor_55_10828_device::fdc_w )
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if (machine().side_effects_disabled())
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return;
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m_fdc->gen_w(offset, data);
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m_fdc->write(offset, data);
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if (!m_wait_enable && !m_fdc_irq && !m_fdc_drq)
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{
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@ -76,7 +76,7 @@ void cms_fdc_device::device_start()
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address_space &space = m_bus->memspace();
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space.install_readwrite_handler(0xfc50, 0xfc5f, read8_delegate(FUNC(cms_fdc_device::wd1770_state_r), this), write8_delegate(FUNC(cms_fdc_device::wd1770_control_w), this));
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space.install_readwrite_handler(0xfc40, 0xfc4f, read8_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8_delegate(FUNC(wd1770_device::write), m_fdc.target()));
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space.install_readwrite_handler(0xfc40, 0xfc4f, read8sm_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8sm_delegate(FUNC(wd1770_device::write), m_fdc.target()));
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}
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@ -210,7 +210,7 @@ void adam_fdc_device::adamnet_reset_w(int state)
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READ8_MEMBER( adam_fdc_device::data_r )
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{
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uint8_t data = m_fdc->read_data();
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uint8_t data = m_fdc->data_r();
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m_ram[offset & 0x3ff] = data;
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@ -130,7 +130,7 @@ void bbc_opus3_device::device_start()
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address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM);
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m_slot = dynamic_cast<bbc_1mhzbus_slot_device *>(owner());
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space.install_readwrite_handler(0xfcf8, 0xfcfb, READ8_DEVICE_DELEGATE(m_fdc, wd1770_device, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd1770_device, write));
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space.install_readwrite_handler(0xfcf8, 0xfcfb, read8sm_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8sm_delegate(FUNC(wd1770_device::write), m_fdc.target()));
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space.install_write_handler(0xfcfc, 0xfcfc, WRITE8_DELEGATE(bbc_opus3_device, wd1770l_write));
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space.install_write_handler(0xfcfe, 0xfcff, WRITE8_DELEGATE(bbc_opus3_device, page_w));
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space.install_readwrite_handler(0xfd00, 0xfdff, READ8_DELEGATE(bbc_opus3_device, ramdisk_r), WRITE8_DELEGATE(bbc_opus3_device, ramdisk_w));
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@ -203,7 +203,7 @@ void bbc_acorn1770_device::device_start()
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_acorn1770_device, wd1770l_read), WRITE8_DELEGATE(bbc_acorn1770_device, wd1770l_write));
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space.install_readwrite_handler(0xfe84, 0xfe9f, READ8_DEVICE_DELEGATE(m_fdc, wd1770_device, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd1770_device, write));
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space.install_readwrite_handler(0xfe84, 0xfe9f, read8sm_delegate(FUNC(wd1770_device::read), m_fdc.target()), write8sm_delegate(FUNC(wd1770_device::write), m_fdc.target()));
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m_drive_control = 0xfe;
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}
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@ -134,7 +134,7 @@ void bbc_cumanafdc_device::device_start()
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_cumanafdc_device, ctrl_r), WRITE8_DELEGATE(bbc_cumanafdc_device, ctrl_w));
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space.install_readwrite_handler(0xfe84, 0xfe9f, READ8_DEVICE_DELEGATE(m_fdc, mb8877_device, read), WRITE8_DEVICE_DELEGATE(m_fdc, mb8877_device, write));
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space.install_readwrite_handler(0xfe84, 0xfe9f, read8sm_delegate(FUNC(mb8877_device::read), m_fdc.target()), write8sm_delegate(FUNC(mb8877_device::write), m_fdc.target()));
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}
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//-------------------------------------------------
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@ -96,7 +96,7 @@ void bbc_cv1797_device::device_start()
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address_space& space = cpu->memory().space(AS_PROGRAM);
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe80, read8_delegate(FUNC(fd1797_device::read), (fd1797_device *)m_fdc), write8_delegate(FUNC(fd1797_device::write), (fd1797_device *)m_fdc));
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space.install_readwrite_handler(0xfe80, 0xfe80, read8sm_delegate(FUNC(fd1797_device::read), m_fdc.target()), write8sm_delegate(FUNC(fd1797_device::write), m_fdc.target()));
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space.install_readwrite_handler(0xfe84, 0xfe9f, read8_delegate(FUNC(bbc_cv1797_device::fd1797l_read), this), write8_delegate(FUNC(bbc_cv1797_device::fd1797l_write), this));
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}
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@ -210,7 +210,7 @@ void bbc_opusfdc_device::device_start()
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address_space& space = cpu->memory().space(AS_PROGRAM);
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, write));
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space.install_readwrite_handler(0xfe80, 0xfe83, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target()));
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space.install_readwrite_handler(0xfe84, 0xfe84, READ8_DELEGATE(bbc_opusfdc_device, ctrl_r), WRITE8_DELEGATE(bbc_opusfdc_device, ctrl_w));
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}
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@ -138,8 +138,8 @@ void bbc_weddb2_device::device_start()
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address_space& space = cpu->memory().space(AS_PROGRAM);
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_weddb2_device, wd177xl_read), WRITE8_DELEGATE(bbc_weddb2_device, wd177xl_write));
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space.install_readwrite_handler(0xfe84, 0xfe8f, READ8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, write));
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space.install_readwrite_handler(0xfe80, 0xfe83, read8_delegate(FUNC(bbc_weddb2_device::wd177xl_read), this), write8_delegate(FUNC(bbc_weddb2_device::wd177xl_write), this));
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space.install_readwrite_handler(0xfe84, 0xfe8f, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target()));
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}
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void bbc_weddb3_device::device_start()
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@ -148,8 +148,8 @@ void bbc_weddb3_device::device_start()
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address_space& space = cpu->memory().space(AS_PROGRAM);
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m_slot = dynamic_cast<bbc_fdc_slot_device *>(owner());
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space.install_readwrite_handler(0xfe80, 0xfe83, READ8_DELEGATE(bbc_weddb3_device, wd177xl_read), WRITE8_DELEGATE(bbc_weddb3_device, wd177xl_write));
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space.install_readwrite_handler(0xfe84, 0xfe8f, READ8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, write));
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space.install_readwrite_handler(0xfe80, 0xfe83, read8_delegate(FUNC(bbc_weddb3_device::wd177xl_read), this), write8_delegate(FUNC(bbc_weddb3_device::wd177xl_write), this));
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space.install_readwrite_handler(0xfe84, 0xfe8f, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target()));
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}
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//-------------------------------------------------
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@ -129,7 +129,7 @@ void bml3bus_mp1802_device::device_start()
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// install into memory
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address_space &space_prg = m_bml3bus->space();
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space_prg.install_readwrite_handler(0xff00, 0xff03, read8_delegate(FUNC(mb8866_device::read),(mb8866_device*)m_fdc), write8_delegate(FUNC(mb8866_device::write),(mb8866_device*)m_fdc));
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space_prg.install_readwrite_handler(0xff00, 0xff03, read8sm_delegate(FUNC(mb8866_device::read), m_fdc.target()), write8sm_delegate(FUNC(mb8866_device::write), m_fdc.target()));
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space_prg.install_readwrite_handler(0xff04, 0xff04, read8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_r), this), write8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_w), this));
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// overwriting the main ROM (rather than using e.g. install_rom) should mean that bank switches for RAM expansion still work...
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uint8_t *mainrom = device().machine().root_device().memregion("maincpu")->base();
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@ -219,5 +219,5 @@ WRITE8_MEMBER( cgenie_fdc_device::command_w )
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m_fdc->dden_w(!BIT(data, 0));
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// forward to the controller
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m_fdc->write_cmd(data);
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m_fdc->cmd_w(data);
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}
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@ -313,16 +313,16 @@ READ8_MEMBER(coco_fdc_device_base::scs_read)
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switch(offset & 0x1F)
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{
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case 8:
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result = m_wd17xx->status_r(space, 0);
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result = m_wd17xx->status_r();
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break;
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case 9:
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result = m_wd17xx->track_r(space, 0);
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result = m_wd17xx->track_r();
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break;
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case 10:
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result = m_wd17xx->sector_r(space, 0);
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result = m_wd17xx->sector_r();
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break;
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case 11:
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result = m_wd17xx->data_r(space, 0);
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result = m_wd17xx->data_r();
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break;
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}
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@ -366,16 +366,16 @@ WRITE8_MEMBER(coco_fdc_device_base::scs_write)
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dskreg_w(data);
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break;
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case 8:
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m_wd17xx->cmd_w(space, 0, data);
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m_wd17xx->cmd_w(data);
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break;
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case 9:
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m_wd17xx->track_w(space, 0, data);
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m_wd17xx->track_w(data);
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break;
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case 10:
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m_wd17xx->sector_w(space, 0, data);
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m_wd17xx->sector_w(data);
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break;
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case 11:
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m_wd17xx->data_w(space, 0, data);
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m_wd17xx->data_w(data);
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break;
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};
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@ -299,7 +299,7 @@ READ8_MEMBER(dragon_fdc_device_base::scs_read)
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case 1:
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case 2:
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case 3:
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result = m_wd2797->read(space, offset & 0xef);
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result = m_wd2797->read(offset & 0xef);
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break;
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}
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return result;
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@ -315,7 +315,7 @@ READ8_MEMBER(premier_fdc_device_base::scs_read)
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case 1:
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case 2:
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case 3:
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result = m_wd2791->read(space, offset);
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result = m_wd2791->read(offset);
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break;
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}
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return result;
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@ -334,7 +334,7 @@ WRITE8_MEMBER(dragon_fdc_device_base::scs_write)
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case 1:
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case 2:
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case 3:
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m_wd2797->write(space, offset & 0xef, data);
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m_wd2797->write(offset & 0xef, data);
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break;
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case 8: case 9: case 10: case 11:
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case 12: case 13: case 14: case 15:
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@ -352,7 +352,7 @@ WRITE8_MEMBER(premier_fdc_device_base::scs_write)
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case 1:
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case 2:
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case 3:
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m_wd2791->write(space, offset, data);
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m_wd2791->write(offset, data);
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break;
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case 4:
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dskreg_w(data);
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@ -221,7 +221,7 @@ uint8_t comx_fd_device::comx_io_r(address_space &space, offs_t offset)
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}
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else
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{
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data = m_fdc->gen_r(m_addr);
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data = m_fdc->read(m_addr);
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if (m_addr==3) logerror("%s FDC read %u:%02x\n", machine().describe_context(), m_addr,data);
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}
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}
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@ -271,7 +271,7 @@ void comx_fd_device::comx_io_w(address_space &space, offs_t offset, uint8_t data
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else
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{
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// write data to WD1770
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m_fdc->gen_w(m_addr, data);
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m_fdc->write(m_addr, data);
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}
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}
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}
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@ -94,7 +94,7 @@ uint8_t electron_ap34_device::read(address_space &space, offs_t offset, int infc
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case 0xc5:
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case 0xc6:
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case 0xc7:
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data = m_fdc->read(space, offset & 0x03);
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data = m_fdc->read(offset & 0x03);
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break;
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}
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}
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@ -132,7 +132,7 @@ void electron_ap34_device::write(address_space &space, offs_t offset, uint8_t da
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case 0xc5:
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case 0xc6:
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case 0xc7:
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m_fdc->write(space, offset & 0x03, data);
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m_fdc->write(offset & 0x03, data);
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break;
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}
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}
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@ -99,7 +99,7 @@ uint8_t electron_cumana_device::read(address_space &space, offs_t offset, int in
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case 0x91:
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case 0x92:
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case 0x93:
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data = m_fdc->read(space, offset & 0x03);
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data = m_fdc->read(offset & 0x03);
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break;
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case 0x98:
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case 0x9c:
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@ -145,7 +145,7 @@ void electron_cumana_device::write(address_space &space, offs_t offset, uint8_t
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case 0x91:
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case 0x92:
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case 0x93:
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m_fdc->write(space, offset & 0x03, data);
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m_fdc->write(offset & 0x03, data);
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break;
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case 0x94:
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wd1793_control_w(space, 0, data);
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@ -92,7 +92,7 @@ uint8_t electron_peg400_device::read(address_space &space, offs_t offset, int in
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case 0xc5:
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case 0xc6:
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case 0xc7:
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data = m_fdc->read(space, offset & 0x03);
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data = m_fdc->read(offset & 0x03);
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break;
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}
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}
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@ -137,7 +137,7 @@ void electron_peg400_device::write(address_space &space, offs_t offset, uint8_t
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case 0xc5:
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case 0xc6:
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case 0xc7:
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m_fdc->write(space, offset & 0x03, data);
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m_fdc->write(offset & 0x03, data);
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break;
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}
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}
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@ -96,7 +96,7 @@ uint8_t electron_stlefs_device::read(address_space &space, offs_t offset, int in
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case 0xc5:
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case 0xc6:
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case 0xc7:
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data = m_fdc->read(space, offset & 0x03);
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data = m_fdc->read(offset & 0x03);
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break;
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}
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}
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@ -129,7 +129,7 @@ void electron_stlefs_device::write(address_space &space, offs_t offset, uint8_t
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case 0xc5:
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case 0xc6:
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case 0xc7:
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m_fdc->write(space, offset & 0x03, data);
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m_fdc->write(offset & 0x03, data);
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break;
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//case 0xcb:
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//m_page_register = data;
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||||
|
@ -130,7 +130,7 @@ uint8_t electron_plus3_device::expbus_r(address_space &space, offs_t offset, uin
|
||||
}
|
||||
else if (offset >= 0xfcc4 && offset < 0xfcc8)
|
||||
{
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
}
|
||||
|
||||
data &= m_exp->expbus_r(space, offset, data);
|
||||
@ -152,7 +152,7 @@ void electron_plus3_device::expbus_w(address_space &space, offs_t offset, uint8_
|
||||
}
|
||||
else if (offset >= 0xfcc4 && offset < 0xfcc8)
|
||||
{
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
}
|
||||
else if (offset == 0xfe05)
|
||||
{
|
||||
|
@ -143,7 +143,7 @@ void ep64_exdos_device::device_start()
|
||||
{
|
||||
m_slot->program().install_rom(0x080000, 0x087fff, m_rom->base());
|
||||
|
||||
m_slot->io().install_readwrite_handler(0x10, 0x13, 0, 0x04, 0, READ8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, read), WRITE8_DEVICE_DELEGATE(m_fdc, wd_fdc_device_base, write));
|
||||
m_slot->io().install_readwrite_handler(0x10, 0x13, 0, 0x04, 0, read8sm_delegate(FUNC(wd_fdc_device_base::read), m_fdc.target()), write8sm_delegate(FUNC(wd_fdc_device_base::write), m_fdc.target()));
|
||||
m_slot->io().install_readwrite_handler(0x18, 0x18, 0, 0x04, 0, READ8_DELEGATE(ep64_exdos_device, read), WRITE8_DELEGATE(ep64_exdos_device, write));
|
||||
}
|
||||
|
||||
|
@ -13,17 +13,20 @@
|
||||
#include "ram.h"
|
||||
|
||||
|
||||
void generic_plain_slot(device_slot_interface &device)
|
||||
device_slot_interface &generic_plain_slot(device_slot_interface &device)
|
||||
{
|
||||
device.option_add_internal("rom", GENERIC_ROM_PLAIN);
|
||||
return device;
|
||||
}
|
||||
|
||||
void generic_linear_slot(device_slot_interface &device)
|
||||
device_slot_interface &generic_linear_slot(device_slot_interface &device)
|
||||
{
|
||||
device.option_add_internal("rom", GENERIC_ROM_LINEAR);
|
||||
return device;
|
||||
}
|
||||
|
||||
void generic_romram_plain_slot(device_slot_interface &device)
|
||||
device_slot_interface &generic_romram_plain_slot(device_slot_interface &device)
|
||||
{
|
||||
device.option_add_internal("rom", GENERIC_ROMRAM_PLAIN);
|
||||
return device;
|
||||
}
|
||||
|
@ -12,8 +12,8 @@
|
||||
#pragma once
|
||||
|
||||
|
||||
void generic_plain_slot(device_slot_interface &device);
|
||||
void generic_linear_slot(device_slot_interface &device);
|
||||
void generic_romram_plain_slot(device_slot_interface &device);
|
||||
device_slot_interface &generic_plain_slot(device_slot_interface &device);
|
||||
device_slot_interface &generic_linear_slot(device_slot_interface &device);
|
||||
device_slot_interface &generic_romram_plain_slot(device_slot_interface &device);
|
||||
|
||||
#endif // MAME_BUS_GENERIC_CARTS_H
|
||||
|
@ -207,7 +207,7 @@ public:
|
||||
set_extensions(exts);
|
||||
}
|
||||
|
||||
generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
generic_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
virtual iodevice_t image_type() const override { return IO_CARTSLOT; }
|
||||
};
|
||||
|
@ -245,7 +245,7 @@ void isa8_device::device_reset()
|
||||
}
|
||||
|
||||
|
||||
void isa8_device::install_space(int spacenum, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler)
|
||||
template<typename R, typename W> void isa8_device::install_space(int spacenum, offs_t start, offs_t end, R rhandler, W whandler)
|
||||
{
|
||||
int buswidth;
|
||||
address_space *space;
|
||||
@ -290,17 +290,37 @@ void isa8_device::install_space(int spacenum, offs_t start, offs_t end, read8_de
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void isa8_device::install_memory(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler)
|
||||
template<typename R, typename W> void isa8_device::install_memory(offs_t start, offs_t end, R rhandler, W whandler)
|
||||
{
|
||||
install_space(AS_ISA_MEM, start, end, rhandler, whandler);
|
||||
}
|
||||
|
||||
void isa8_device::install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler)
|
||||
template<typename R, typename W> void isa8_device::install_device(offs_t start, offs_t end, R rhandler, W whandler)
|
||||
{
|
||||
install_space(AS_ISA_IO, start, end, rhandler, whandler);
|
||||
}
|
||||
|
||||
template void isa8_device::install_space<read8_delegate, write8_delegate >(int spacenum, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template void isa8_device::install_space<read8m_delegate, write8m_delegate >(int spacenum, offs_t start, offs_t end, read8m_delegate rhandler, write8m_delegate whandler);
|
||||
template void isa8_device::install_space<read8s_delegate, write8s_delegate >(int spacenum, offs_t start, offs_t end, read8s_delegate rhandler, write8s_delegate whandler);
|
||||
template void isa8_device::install_space<read8sm_delegate, write8sm_delegate >(int spacenum, offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
|
||||
template void isa8_device::install_space<read8mo_delegate, write8mo_delegate >(int spacenum, offs_t start, offs_t end, read8mo_delegate rhandler, write8mo_delegate whandler);
|
||||
template void isa8_device::install_space<read8smo_delegate, write8smo_delegate>(int spacenum, offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler);
|
||||
|
||||
template void isa8_device::install_memory<read8_delegate, write8_delegate >(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template void isa8_device::install_memory<read8m_delegate, write8m_delegate >(offs_t start, offs_t end, read8m_delegate rhandler, write8m_delegate whandler);
|
||||
template void isa8_device::install_memory<read8s_delegate, write8s_delegate >(offs_t start, offs_t end, read8s_delegate rhandler, write8s_delegate whandler);
|
||||
template void isa8_device::install_memory<read8sm_delegate, write8sm_delegate >(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
|
||||
template void isa8_device::install_memory<read8mo_delegate, write8mo_delegate >(offs_t start, offs_t end, read8mo_delegate rhandler, write8mo_delegate whandler);
|
||||
template void isa8_device::install_memory<read8smo_delegate, write8smo_delegate>(offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler);
|
||||
|
||||
template void isa8_device::install_device<read8_delegate, write8_delegate >(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template void isa8_device::install_device<read8m_delegate, write8m_delegate >(offs_t start, offs_t end, read8m_delegate rhandler, write8m_delegate whandler);
|
||||
template void isa8_device::install_device<read8s_delegate, write8s_delegate >(offs_t start, offs_t end, read8s_delegate rhandler, write8s_delegate whandler);
|
||||
template void isa8_device::install_device<read8sm_delegate, write8sm_delegate >(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
|
||||
template void isa8_device::install_device<read8mo_delegate, write8mo_delegate >(offs_t start, offs_t end, read8mo_delegate rhandler, write8mo_delegate whandler);
|
||||
template void isa8_device::install_device<read8smo_delegate, write8smo_delegate>(offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler);
|
||||
|
||||
|
||||
void isa8_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
|
||||
{
|
||||
|
@ -211,14 +211,14 @@ public:
|
||||
// for ISA8, put the 8-bit configs in the primary slots and the 16-bit configs in the secondary
|
||||
virtual space_config_vector memory_space_config() const override;
|
||||
|
||||
void install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template<typename R, typename W> void install_device(offs_t start, offs_t end, R rhandler, W whandler);
|
||||
template<typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(class address_map &map), uint64_t unitmask = ~u64(0))
|
||||
{
|
||||
m_iospace->install_device(addrstart, addrend, device, map, unitmask);
|
||||
}
|
||||
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
|
||||
void install_rom(device_t *dev, offs_t start, offs_t end, const char *tag, const char *region);
|
||||
void install_memory(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template<typename R, typename W> void install_memory(offs_t start, offs_t end, R rhandler, W whandler);
|
||||
|
||||
void unmap_device(offs_t start, offs_t end) const { m_iospace->unmap_readwrite(start, end); }
|
||||
void unmap_bank(offs_t start, offs_t end);
|
||||
@ -263,7 +263,7 @@ public:
|
||||
protected:
|
||||
isa8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
void install_space(int spacenum, offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
|
||||
template<typename R, typename W> void install_space(int spacenum, offs_t start, offs_t end, R rhandler, W whandler);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
@ -217,14 +217,14 @@ void mc1502_fdc_device::device_start()
|
||||
|
||||
// BIOS 5.0-5.2x
|
||||
m_isa->install_device(0x010c, 0x010f,
|
||||
READ8_DEVICE_DELEGATE(m_fdc, fd1793_device, read),
|
||||
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_device, write) );
|
||||
read8sm_delegate(FUNC(fd1793_device::read), m_fdc.target()),
|
||||
write8sm_delegate(FUNC(fd1793_device::write), m_fdc.target()));
|
||||
m_isa->install_device(0x0100, 0x010b, read8_delegate( FUNC(mc1502_fdc_device::mc1502_fdc_r), this ), write8_delegate( FUNC(mc1502_fdc_device::mc1502_fdc_w), this ) );
|
||||
|
||||
// BIOS 5.3x
|
||||
m_isa->install_device(0x0048, 0x004b,
|
||||
READ8_DEVICE_DELEGATE(m_fdc, fd1793_device, read),
|
||||
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_device, write) );
|
||||
read8sm_delegate(FUNC(fd1793_device::read), m_fdc.target()),
|
||||
write8sm_delegate(FUNC(fd1793_device::write), m_fdc.target()));
|
||||
m_isa->install_device(0x004c, 0x004f, read8_delegate( FUNC(mc1502_fdc_device::mc1502_fdcv2_r), this ), write8_delegate( FUNC(mc1502_fdc_device::mc1502_fdc_w), this ) );
|
||||
|
||||
motor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_fdc_device::motor_callback),this));
|
||||
|
@ -226,12 +226,12 @@ WRITE_LINE_MEMBER( isa8_myb3k_fdc4711_device::drq_w )
|
||||
//-------------------------------------------------
|
||||
uint8_t isa8_myb3k_fdc4710_device::dack_r(int line)
|
||||
{
|
||||
return ~(m_fdc->read_data());
|
||||
return ~(m_fdc->data_r());
|
||||
}
|
||||
|
||||
uint8_t isa8_myb3k_fdc4711_device::dack_r(int line)
|
||||
{
|
||||
return ~(m_fdc->read_data());
|
||||
return ~(m_fdc->data_r());
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
@ -239,12 +239,12 @@ uint8_t isa8_myb3k_fdc4711_device::dack_r(int line)
|
||||
//-------------------------------------------------
|
||||
void isa8_myb3k_fdc4710_device::dack_w(int line, uint8_t data)
|
||||
{
|
||||
return m_fdc->write_data(data);
|
||||
return m_fdc->data_w(data);
|
||||
}
|
||||
|
||||
void isa8_myb3k_fdc4711_device::dack_w(int line, uint8_t data)
|
||||
{
|
||||
return m_fdc->write_data(data);
|
||||
return m_fdc->data_w(data);
|
||||
}
|
||||
|
||||
#if 0 // eop/tc is used to for logic around multi sector transfers
|
||||
@ -264,14 +264,14 @@ void isa8_myb3k_fdc4711_device::eop_w(int state)
|
||||
//--------------------------------------------------------
|
||||
READ8_MEMBER( isa8_myb3k_fdc4710_device::myb3k_inv_fdc_data_r )
|
||||
{
|
||||
uint8_t tmp = m_fdc->read(space, offset);
|
||||
uint8_t tmp = m_fdc->read(offset);
|
||||
LOGR("%s: %02x -> %02x\n", FUNCNAME, tmp, (~tmp) & 0xff);
|
||||
return ~tmp;
|
||||
}
|
||||
|
||||
READ8_MEMBER( isa8_myb3k_fdc4711_device::myb3k_inv_fdc_data_r )
|
||||
{
|
||||
uint8_t tmp = m_fdc->read(space, offset);
|
||||
uint8_t tmp = m_fdc->read(offset);
|
||||
LOGR("%s: %02x -> %02x\n", FUNCNAME, tmp, (~tmp) & 0xff);
|
||||
return ~tmp;
|
||||
}
|
||||
@ -282,13 +282,13 @@ READ8_MEMBER( isa8_myb3k_fdc4711_device::myb3k_inv_fdc_data_r )
|
||||
WRITE8_MEMBER( isa8_myb3k_fdc4710_device::myb3k_inv_fdc_data_w )
|
||||
{
|
||||
LOG("%s: %02x -> %02x\n", FUNCNAME, data, (~data) & 0xff);
|
||||
m_fdc->write(space, offset, (~data) & 0xff);
|
||||
m_fdc->write(offset, (~data) & 0xff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( isa8_myb3k_fdc4711_device::myb3k_inv_fdc_data_w )
|
||||
{
|
||||
LOG("%s: %02x -> %02x\n", FUNCNAME, data, (~data) & 0xff);
|
||||
m_fdc->write(space, offset, (~data) & 0xff);
|
||||
m_fdc->write(offset, (~data) & 0xff);
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
|
@ -189,8 +189,8 @@ void p1_fdc_device::device_start()
|
||||
set_isa_device();
|
||||
m_isa->install_rom(this, 0xe0000, 0xe07ff, "XXX", "p1_fdc");
|
||||
m_isa->install_device(0x00c0, 0x00c3,
|
||||
READ8_DEVICE_DELEGATE(m_fdc, fd1793_device, read),
|
||||
WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_device, write) );
|
||||
read8sm_delegate(FUNC(fd1793_device::read), m_fdc.target()),
|
||||
write8sm_delegate(FUNC(fd1793_device::write), m_fdc.target()));
|
||||
m_isa->install_device(0x00c4, 0x00c7, read8_delegate( FUNC(p1_fdc_device::p1_fdc_r), this ), write8_delegate( FUNC(p1_fdc_device::p1_fdc_w), this ) );
|
||||
}
|
||||
|
||||
|
@ -46,14 +46,18 @@ device_midi_port_interface::~device_midi_port_interface()
|
||||
|
||||
#include "bus/midi/midiinport.h"
|
||||
|
||||
void midiin_slot(device_slot_interface &device)
|
||||
device_slot_interface &midiin_slot(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("midiin", MIDIIN_PORT);
|
||||
device.set_default_option("midiin");
|
||||
return device;
|
||||
}
|
||||
|
||||
#include "bus/midi/midioutport.h"
|
||||
|
||||
void midiout_slot(device_slot_interface &device)
|
||||
device_slot_interface &midiout_slot(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("midiout", MIDIOUT_PORT);
|
||||
device.set_default_option("midiout");
|
||||
return device;
|
||||
}
|
||||
|
@ -21,11 +21,12 @@ class midi_port_device : public device_t,
|
||||
friend class device_midi_port_interface;
|
||||
|
||||
public:
|
||||
midi_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
midi_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
virtual ~midi_port_device();
|
||||
|
||||
// static configuration helpers
|
||||
template <class Object> devcb_base &set_rx_handler(Object &&cb) { return m_rxd_handler.set_callback(std::forward<Object>(cb)); }
|
||||
auto rxd_handler() { return m_rxd_handler.bind(); }
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( write_txd );
|
||||
|
||||
@ -61,7 +62,7 @@ protected:
|
||||
|
||||
DECLARE_DEVICE_TYPE(MIDI_PORT, midi_port_device)
|
||||
|
||||
void midiin_slot(device_slot_interface &device);
|
||||
void midiout_slot(device_slot_interface &device);
|
||||
device_slot_interface &midiin_slot(device_slot_interface &device);
|
||||
device_slot_interface &midiout_slot(device_slot_interface &device);
|
||||
|
||||
#endif // MAME_BUS_MIDI_MIDI_H
|
||||
|
@ -344,19 +344,19 @@ READ8_MEMBER(msx_cart_disk_type1_device::read_cart)
|
||||
{
|
||||
case 0x7ff8:
|
||||
case 0xbff8:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x7ff9:
|
||||
case 0xbff9:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x7ffa:
|
||||
case 0xbffa:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x7ffb:
|
||||
case 0xbffb:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x7ffc:
|
||||
case 0xbffc:
|
||||
@ -385,22 +385,22 @@ WRITE8_MEMBER(msx_cart_disk_type1_device::write_cart)
|
||||
{
|
||||
case 0x7ff8:
|
||||
case 0xbff8:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ff9:
|
||||
case 0xbff9:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffa:
|
||||
case 0xbffa:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffb:
|
||||
case 0xbffb:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffc:
|
||||
@ -489,19 +489,19 @@ READ8_MEMBER(msx_cart_disk_type2_device::read_cart)
|
||||
{
|
||||
case 0x7fb8:
|
||||
case 0xbfb8:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x7fb9:
|
||||
case 0xbfb9:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x7fba:
|
||||
case 0xbfba:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x7fbb:
|
||||
case 0xbfbb:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x7fbc:
|
||||
case 0xbfbc:
|
||||
@ -522,22 +522,22 @@ WRITE8_MEMBER(msx_cart_disk_type2_device::write_cart)
|
||||
{
|
||||
case 0x7fb8:
|
||||
case 0xbfb8:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fb9:
|
||||
case 0xbfb9:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fba:
|
||||
case 0xbfba:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fbb:
|
||||
case 0xbfbb:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fbc:
|
||||
|
@ -213,19 +213,19 @@ READ8_MEMBER(msx_slot_disk1_device::read)
|
||||
{
|
||||
case 0x7ff8:
|
||||
case 0xbff8:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x7ff9:
|
||||
case 0xbff9:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x7ffa:
|
||||
case 0xbffa:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x7ffb:
|
||||
case 0xbffb:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x7ffc:
|
||||
case 0xbffc:
|
||||
@ -250,22 +250,22 @@ WRITE8_MEMBER(msx_slot_disk1_device::write)
|
||||
{
|
||||
case 0x7ff8:
|
||||
case 0xbff8:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ff9:
|
||||
case 0xbff9:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffa:
|
||||
case 0xbffa:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffb:
|
||||
case 0xbffb:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ffc:
|
||||
@ -362,19 +362,19 @@ READ8_MEMBER(msx_slot_disk2_device::read)
|
||||
{
|
||||
case 0x7fb8:
|
||||
case 0xbfb8:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x7fb9:
|
||||
case 0xbfb9:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x7fba:
|
||||
case 0xbfba:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x7fbb:
|
||||
case 0xbfbb:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x7fbc:
|
||||
case 0xbfbc:
|
||||
@ -391,22 +391,22 @@ WRITE8_MEMBER(msx_slot_disk2_device::write)
|
||||
{
|
||||
case 0x7fb8:
|
||||
case 0xbfb8:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fb9:
|
||||
case 0xbfb9:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fba:
|
||||
case 0xbfba:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fbb:
|
||||
case 0xbfbb:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x7fbc:
|
||||
@ -599,16 +599,16 @@ READ8_MEMBER(msx_slot_disk5_device::io_read)
|
||||
switch (offset)
|
||||
{
|
||||
case 0x00:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x01:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x02:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x03:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x04:
|
||||
return 0x3f | (m_fdc->drq_r() ? 0 : 0x40) | (m_fdc->intrq_r() ? 0x80 : 0);
|
||||
@ -623,19 +623,19 @@ WRITE8_MEMBER(msx_slot_disk5_device::io_write)
|
||||
switch (offset)
|
||||
{
|
||||
case 0x00:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x01:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x02:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x03:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x04:
|
||||
@ -721,19 +721,19 @@ READ8_MEMBER(msx_slot_disk6_device::read)
|
||||
{
|
||||
case 0x7ff0: // status?
|
||||
case 0x7ff8:
|
||||
return m_fdc->read_status();
|
||||
return m_fdc->status_r();
|
||||
|
||||
case 0x7ff1: // track?
|
||||
case 0x7ff9:
|
||||
return m_fdc->read_track();
|
||||
return m_fdc->track_r();
|
||||
|
||||
case 0x7ff2: // sector?
|
||||
case 0x7ffa:
|
||||
return m_fdc->read_sector();
|
||||
return m_fdc->sector_r();
|
||||
|
||||
case 0x7ff3: // data?
|
||||
case 0x7ffb:
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
|
||||
case 0x7ff4:
|
||||
case 0x7ffc:
|
||||
@ -767,22 +767,22 @@ WRITE8_MEMBER(msx_slot_disk6_device::write)
|
||||
{
|
||||
case 0x7ff0: // cmd?
|
||||
case 0x7ff8:
|
||||
m_fdc->write_cmd(data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ff1: // track?
|
||||
case 0x7ff9:
|
||||
m_fdc->write_track(data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ff2: // sector?
|
||||
case 0x7ffa:
|
||||
m_fdc->write_sector(data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
|
||||
case 0x7ff3: // data?
|
||||
case 0x7ffb:
|
||||
m_fdc->write_data(data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
// Side and motort control
|
||||
|
@ -88,7 +88,7 @@ void nascom_fdc_device::device_start()
|
||||
|
||||
void nascom_fdc_device::device_reset()
|
||||
{
|
||||
io_space().install_readwrite_handler(0xe0, 0xe3, read8_delegate(FUNC(fd1793_device::read), m_fdc.target()), write8_delegate(FUNC(fd1793_device::write), m_fdc.target()));
|
||||
io_space().install_readwrite_handler(0xe0, 0xe3, read8sm_delegate(FUNC(fd1793_device::read), m_fdc.target()), write8sm_delegate(FUNC(fd1793_device::write), m_fdc.target()));
|
||||
io_space().install_readwrite_handler(0xe4, 0xe4, read8_delegate(FUNC(nascom_fdc_device::select_r), this), write8_delegate(FUNC(nascom_fdc_device::select_w), this));
|
||||
io_space().install_read_handler(0xe5, 0xe5, read8_delegate(FUNC(nascom_fdc_device::status_r), this));
|
||||
}
|
||||
|
@ -156,7 +156,7 @@ uint8_t sandy_super_disk_device::read(address_space &space, offs_t offset, uint8
|
||||
switch ((offset >> 2) & 0x03)
|
||||
{
|
||||
case 0:
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -202,7 +202,7 @@ void sandy_super_disk_device::write(address_space &space, offs_t offset, uint8_t
|
||||
switch ((offset >> 2) & 0x03)
|
||||
{
|
||||
case 0:
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
|
@ -292,7 +292,7 @@ uint8_t sandy_superqboard_device::read(address_space &space, offs_t offset, uint
|
||||
switch ((offset >> 2) & 0x07)
|
||||
{
|
||||
case 0:
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
@ -352,7 +352,7 @@ void sandy_superqboard_device::write(address_space &space, offs_t offset, uint8_
|
||||
switch ((offset >> 2) & 0x07)
|
||||
{
|
||||
case 0:
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
|
@ -182,7 +182,7 @@ uint8_t ql_trump_card_device::read(address_space &space, offs_t offset, uint8_t
|
||||
|
||||
if (offset >= 0x1c000 && offset <= 0x1c003)
|
||||
{
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
}
|
||||
|
||||
if (offset >= 0x40000 && offset < 0xc0000)
|
||||
@ -223,7 +223,7 @@ void ql_trump_card_device::write(address_space &space, offs_t offset, uint8_t da
|
||||
{
|
||||
if (offset >= 0x1c000 && offset <= 0x1c003)
|
||||
{
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
}
|
||||
|
||||
if (offset == 0x1e000)
|
||||
|
@ -359,7 +359,7 @@ uint8_t s100_dj2db_device::s100_smemr_r(address_space &space, offs_t offset)
|
||||
{
|
||||
m_bus->rdy_w(ASSERT_LINE);
|
||||
|
||||
data = m_fdc->gen_r(offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
}
|
||||
else if ((offset >= 0xfc00) && (offset < 0x10000))
|
||||
{
|
||||
@ -459,7 +459,7 @@ void s100_dj2db_device::s100_mwrt_w(address_space &space, offs_t offset, uint8_t
|
||||
}
|
||||
else if ((offset >= 0xfbfc) && (offset < 0xfc00))
|
||||
{
|
||||
m_fdc->gen_w(offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
}
|
||||
else if ((offset >= 0xfc00) && (offset < 0x10000))
|
||||
{
|
||||
|
@ -115,10 +115,10 @@ READ8_MEMBER( sv801_device::iorq_r )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0x30: return m_fdc->status_r(space, 0);
|
||||
case 0x31: return m_fdc->track_r(space, 0);
|
||||
case 0x32: return m_fdc->sector_r(space, 0);
|
||||
case 0x33: return m_fdc->data_r(space, 0);
|
||||
case 0x30: return m_fdc->status_r();
|
||||
case 0x31: return m_fdc->track_r();
|
||||
case 0x32: return m_fdc->sector_r();
|
||||
case 0x33: return m_fdc->data_r();
|
||||
case 0x34: return (m_drq << 6) | (m_irq << 7);
|
||||
}
|
||||
|
||||
@ -129,10 +129,10 @@ WRITE8_MEMBER( sv801_device::iorq_w )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0x30: m_fdc->cmd_w(space, 0, data); break;
|
||||
case 0x31: m_fdc->track_w(space, 0, data); break;
|
||||
case 0x32: m_fdc->sector_w(space, 0, data); break;
|
||||
case 0x33: m_fdc->data_w(space, 0, data); break;
|
||||
case 0x30: m_fdc->cmd_w(data); break;
|
||||
case 0x31: m_fdc->track_w(data); break;
|
||||
case 0x32: m_fdc->sector_w(data); break;
|
||||
case 0x33: m_fdc->data_w(data); break;
|
||||
case 0x34: motor_w(space, 0, data); break;
|
||||
case 0x38:
|
||||
m_fdc->dden_w(BIT(data, 0));
|
||||
|
@ -252,7 +252,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
|
||||
// .... ..11 1111 0xx0
|
||||
// Note that the value is inverted again on the board,
|
||||
// so we can drop the inversion
|
||||
*value = m_wd1773->gen_r((m_address >> 1)&0x03);
|
||||
*value = m_wd1773->read((m_address >> 1)&0x03);
|
||||
if (TRACE_RW) logerror("bwg: read FDC: %04x -> %02x\n", m_address & 0xffff, *value);
|
||||
if (TRACE_DATA)
|
||||
{
|
||||
@ -321,7 +321,7 @@ WRITE8_MEMBER(snug_bwg_device::write)
|
||||
// Note that the value is inverted again on the board,
|
||||
// so we can drop the inversion
|
||||
if (TRACE_RW) logerror("bwg: write FDC: %04x <- %02x\n", m_address & 0xffff, data);
|
||||
m_wd1773->gen_w((m_address >> 1)&0x03, data);
|
||||
m_wd1773->write((m_address >> 1)&0x03, data);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -161,7 +161,7 @@ READ8Z_MEMBER(ti_fdc_device::readz)
|
||||
|
||||
if (m_WDsel && ((m_address & 9)==0))
|
||||
{
|
||||
if (!machine().side_effects_disabled()) reply = m_fd1771->gen_r((offset >> 1)&0x03);
|
||||
if (!machine().side_effects_disabled()) reply = m_fd1771->read((offset >> 1)&0x03);
|
||||
if (TRACE_DATA)
|
||||
{
|
||||
if ((m_address & 0xffff)==0x5ff6)
|
||||
@ -206,7 +206,7 @@ WRITE8_MEMBER(ti_fdc_device::write)
|
||||
{
|
||||
// As this is a memory-mapped access we must prevent the debugger
|
||||
// from messing with the operation
|
||||
if (!machine().side_effects_disabled()) m_fd1771->gen_w((offset >> 1)&0x03, data);
|
||||
if (!machine().side_effects_disabled()) m_fd1771->write((offset >> 1)&0x03, data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -133,7 +133,7 @@ READ8_MEMBER(tvc_hbf_device::io_read)
|
||||
switch((offset>>2) & 0x03)
|
||||
{
|
||||
case 0x00:
|
||||
return m_fdc->read(space, offset & 3);
|
||||
return m_fdc->read(offset & 3);
|
||||
case 0x01:
|
||||
return (m_fdc->drq_r()<<7) | (m_fdc->intrq_r() ? 0x01 : 0x00);
|
||||
default:
|
||||
@ -150,7 +150,7 @@ WRITE8_MEMBER(tvc_hbf_device::io_write)
|
||||
switch((offset>>2) & 0x03)
|
||||
{
|
||||
case 0x00:
|
||||
m_fdc->write(space, offset & 3, data);
|
||||
m_fdc->write(offset & 3, data);
|
||||
break;
|
||||
case 0x01:
|
||||
{
|
||||
|
@ -417,12 +417,12 @@ WRITE8_MEMBER(vme_fcscsi1_card_device::fdc_irq)
|
||||
|
||||
READ8_MEMBER(vme_fcscsi1_card_device::fdc_read_byte)
|
||||
{
|
||||
return m_fdc->read_data();
|
||||
return m_fdc->data_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(vme_fcscsi1_card_device::fdc_write_byte)
|
||||
{
|
||||
m_fdc->write_data(data & 0xff);
|
||||
m_fdc->data_w(data & 0xff);
|
||||
}
|
||||
|
||||
READ8_MEMBER(vme_fcscsi1_card_device::scsi_r)
|
||||
|
@ -47,12 +47,13 @@ class cassette_image_device : public device_t,
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
cassette_image_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
cassette_image_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
virtual ~cassette_image_device();
|
||||
|
||||
void set_formats(const struct CassetteFormat* const *formats) { m_formats = formats; }
|
||||
void set_create_opts(const struct CassetteOptions *create_opts) { m_create_opts = create_opts; }
|
||||
void set_default_state(cassette_state default_state) { m_default_state = default_state; }
|
||||
void set_default_state(int default_state) { m_default_state = (cassette_state)default_state; }
|
||||
void set_interface(const char *interface) { m_interface = interface; }
|
||||
|
||||
// image-level overrides
|
||||
|
@ -326,6 +326,16 @@ public:
|
||||
set_fixed(fixed);
|
||||
set_formats(formats);
|
||||
}
|
||||
floppy_connector(const machine_config &mconfig, const char *tag, device_t *owner, const char *option, const device_type &devtype, bool is_default, const floppy_format_type *formats)
|
||||
: floppy_connector(mconfig, tag, owner, 0)
|
||||
{
|
||||
option_reset();
|
||||
option_add(option, devtype);
|
||||
if(is_default)
|
||||
set_default_option(option);
|
||||
set_fixed(false);
|
||||
set_formats(formats);
|
||||
}
|
||||
floppy_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
virtual ~floppy_connector();
|
||||
|
||||
|
@ -59,6 +59,11 @@ public:
|
||||
template <int Ch, class Object> devcb_base &set_dma_read_callback(Object &&cb) { return m_dma_read[Ch].set_callback(std::forward<Object>(cb)); }
|
||||
template <int Ch, class Object> devcb_base &set_dma_write_callback(Object &&cb) { return m_dma_write[Ch].set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
auto dma_end() { return m_dma_end.bind(); }
|
||||
auto dma_error() { return m_dma_error.bind(); }
|
||||
template<int Ch> auto dma_read() { return m_dma_read[Ch].bind(); }
|
||||
template<int Ch> auto dma_write() { return m_dma_write[Ch].bind(); }
|
||||
|
||||
template <typename T> void set_cpu_tag(T &&cpu_tag) { m_cpu.set_tag(std::forward<T>(cpu_tag)); }
|
||||
void set_our_clocks(const attotime &clk1, const attotime &clk2, const attotime &clk3, const attotime &clk4)
|
||||
{
|
||||
|
@ -124,6 +124,14 @@ public:
|
||||
|
||||
template <unsigned Ch, class Object> devcb_base &set_out_dack_callback(Object &&cb) { return m_out_dack_cb[Ch].set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
auto out_hrq_cb() { return m_out_hrq_cb.bind(); }
|
||||
auto out_tc_cb() { return m_out_tc_cb.bind(); }
|
||||
auto in_memr_cb() { return m_in_memr_cb.bind(); }
|
||||
auto out_memw_cb() { return m_out_memw_cb.bind(); }
|
||||
template <unsigned Ch> auto in_ior_cb() { return m_in_ior_cb[Ch].bind(); }
|
||||
template <unsigned Ch> auto out_iow_cb() { return m_out_iow_cb[Ch].bind(); }
|
||||
template <unsigned Ch> auto out_dack_cb() { return m_out_dack_cb[Ch].bind(); }
|
||||
|
||||
void set_reverse_rw_mode(bool flag) { m_reverse_rw = flag; }
|
||||
|
||||
protected:
|
||||
|
@ -1083,7 +1083,7 @@ void wd_fdc_device_base::do_cmd_w()
|
||||
}
|
||||
}
|
||||
|
||||
void wd_fdc_device_base::write_cmd(uint8_t val)
|
||||
void wd_fdc_device_base::cmd_w(uint8_t val)
|
||||
{
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
LOGCOMP("Initiating command %02x\n", val);
|
||||
@ -1113,7 +1113,7 @@ void wd_fdc_device_base::write_cmd(uint8_t val)
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t wd_fdc_device_base::read_status()
|
||||
uint8_t wd_fdc_device_base::status_r()
|
||||
{
|
||||
if(intrq && !(intrq_cond & I_IMM)) {
|
||||
intrq = false;
|
||||
@ -1162,7 +1162,7 @@ void wd_fdc_device_base::do_track_w()
|
||||
track_buffer = -1;
|
||||
}
|
||||
|
||||
void wd_fdc_device_base::write_track(uint8_t val)
|
||||
void wd_fdc_device_base::track_w(uint8_t val)
|
||||
{
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
|
||||
@ -1174,7 +1174,7 @@ void wd_fdc_device_base::write_track(uint8_t val)
|
||||
delay_cycles(t_track, dden ? delay_register_commit*2 : delay_register_commit);
|
||||
}
|
||||
|
||||
uint8_t wd_fdc_device_base::read_track()
|
||||
uint8_t wd_fdc_device_base::track_r()
|
||||
{
|
||||
uint8_t val = track;
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
@ -1188,7 +1188,7 @@ void wd_fdc_device_base::do_sector_w()
|
||||
sector_buffer = -1;
|
||||
}
|
||||
|
||||
void wd_fdc_device_base::write_sector(uint8_t val)
|
||||
void wd_fdc_device_base::sector_w(uint8_t val)
|
||||
{
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
|
||||
@ -1206,7 +1206,7 @@ void wd_fdc_device_base::write_sector(uint8_t val)
|
||||
delay_cycles(t_sector, dden ? delay_register_commit*2 : delay_register_commit);
|
||||
}
|
||||
|
||||
uint8_t wd_fdc_device_base::read_sector()
|
||||
uint8_t wd_fdc_device_base::sector_r()
|
||||
{
|
||||
uint8_t val = sector;
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
@ -1214,7 +1214,7 @@ uint8_t wd_fdc_device_base::read_sector()
|
||||
return val;
|
||||
}
|
||||
|
||||
void wd_fdc_device_base::write_data(uint8_t val)
|
||||
void wd_fdc_device_base::data_w(uint8_t val)
|
||||
{
|
||||
if (inverted_bus) val ^= 0xff;
|
||||
|
||||
@ -1222,7 +1222,7 @@ void wd_fdc_device_base::write_data(uint8_t val)
|
||||
drop_drq();
|
||||
}
|
||||
|
||||
uint8_t wd_fdc_device_base::read_data()
|
||||
uint8_t wd_fdc_device_base::data_r()
|
||||
{
|
||||
drop_drq();
|
||||
|
||||
@ -1232,24 +1232,24 @@ uint8_t wd_fdc_device_base::read_data()
|
||||
return val;
|
||||
}
|
||||
|
||||
void wd_fdc_device_base::gen_w(int reg, uint8_t val)
|
||||
void wd_fdc_device_base::write(offs_t reg, uint8_t val)
|
||||
{
|
||||
LOGFUNC("%s %02x: %02x\n", FUNCNAME, reg, val);
|
||||
switch(reg) {
|
||||
case 0: write_cmd(val); break;
|
||||
case 1: write_track(val); break;
|
||||
case 2: write_sector(val); break;
|
||||
case 3: write_data(val); break;
|
||||
case 0: cmd_w(val); break;
|
||||
case 1: track_w(val); break;
|
||||
case 2: sector_w(val); break;
|
||||
case 3: data_w(val); break;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t wd_fdc_device_base::gen_r(int reg)
|
||||
uint8_t wd_fdc_device_base::read(offs_t reg)
|
||||
{
|
||||
switch(reg) {
|
||||
case 0: return read_status();
|
||||
case 1: return read_track();
|
||||
case 2: return read_sector();
|
||||
case 3: return read_data();
|
||||
case 0: return status_r();
|
||||
case 1: return track_r();
|
||||
case 2: return sector_r();
|
||||
case 3: return data_r();
|
||||
}
|
||||
return 0xff;
|
||||
}
|
||||
|
@ -86,30 +86,20 @@ public:
|
||||
void set_force_ready(bool force_ready);
|
||||
void set_disable_motor_control(bool _disable_motor_control);
|
||||
|
||||
void write_cmd(uint8_t val);
|
||||
uint8_t read_status();
|
||||
DECLARE_READ8_MEMBER( status_r ) { return read_status(); }
|
||||
DECLARE_WRITE8_MEMBER( cmd_w ) { write_cmd(data); }
|
||||
void cmd_w(uint8_t val);
|
||||
uint8_t status_r();
|
||||
|
||||
void write_track(uint8_t val);
|
||||
uint8_t read_track();
|
||||
DECLARE_READ8_MEMBER( track_r ) { return read_track(); }
|
||||
DECLARE_WRITE8_MEMBER( track_w ) { write_track(data); }
|
||||
void track_w(uint8_t val);
|
||||
uint8_t track_r();
|
||||
|
||||
void write_sector(uint8_t val);
|
||||
uint8_t read_sector();
|
||||
DECLARE_READ8_MEMBER( sector_r ) { return read_sector(); }
|
||||
DECLARE_WRITE8_MEMBER( sector_w ) { write_sector(data); }
|
||||
void sector_w(uint8_t val);
|
||||
uint8_t sector_r();
|
||||
|
||||
void write_data(uint8_t val);
|
||||
uint8_t read_data();
|
||||
DECLARE_READ8_MEMBER( data_r ) { return read_data(); }
|
||||
DECLARE_WRITE8_MEMBER( data_w ) { write_data(data); }
|
||||
void data_w(uint8_t val);
|
||||
uint8_t data_r();
|
||||
|
||||
void gen_w(int reg, uint8_t val);
|
||||
uint8_t gen_r(int reg);
|
||||
DECLARE_READ8_MEMBER( read ) { return gen_r(offset); }
|
||||
DECLARE_WRITE8_MEMBER( write ) { gen_w(offset,data); }
|
||||
void write(offs_t reg, uint8_t val);
|
||||
uint8_t read(offs_t reg);
|
||||
|
||||
DECLARE_READ_LINE_MEMBER(intrq_r);
|
||||
DECLARE_READ_LINE_MEMBER(drq_r);
|
||||
|
@ -63,6 +63,9 @@ public:
|
||||
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> devcb_base &set_read_port_callback(Object &&cb) { return m_read_port_cb.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
auto irq_cb() { return m_irq_cb.bind(); }
|
||||
auto read_port_cb() { return m_read_port_cb.bind(); }
|
||||
|
||||
protected:
|
||||
// struct describing a single playing voice
|
||||
struct es550x_voice
|
||||
|
@ -1049,12 +1049,12 @@ READ8_MEMBER(alphatp_12_state::fdc_stat_r)
|
||||
|
||||
READ8_MEMBER(alphatp_12_state::fdc_r)
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(alphatp_12_state::fdc_w)
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
|
||||
@ -1128,12 +1128,12 @@ READ8_MEMBER(alphatp_34_state::fdc_stat_r)
|
||||
|
||||
READ8_MEMBER(alphatp_34_state::fdc_r)
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(alphatp_34_state::fdc_w)
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
@ -219,7 +219,6 @@ MACHINE_CONFIG_START(apogee_state::apogee)
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", I8080, XTAL(16'000'000) / 9)
|
||||
MCFG_DEVICE_PROGRAM_MAP(apogee_mem)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(apogee_state, radio86 )
|
||||
|
||||
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
|
||||
MCFG_PIT8253_CLK0(XTAL(16'000'000)/9)
|
||||
|
@ -573,11 +573,6 @@ FLOPPY_FORMATS_MEMBER( fp_state::floppy_formats )
|
||||
FLOPPY_APRIDISK_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
|
||||
static void fp_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("d32w", SONY_OA_D32W);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_CONFIG( fp )
|
||||
@ -631,8 +626,8 @@ MACHINE_CONFIG_START(fp_state::fp)
|
||||
|
||||
AM9517A(config, m_dmac, 250000);
|
||||
m_dmac->out_eop_callback().set(m_pic, FUNC(pic8259_device::ir7_w));
|
||||
m_dmac->in_ior_callback<1>().set(m_fdc, FUNC(wd_fdc_device_base::data_r));
|
||||
m_dmac->out_iow_callback<1>().set(m_fdc, FUNC(wd_fdc_device_base::data_w));
|
||||
m_dmac->in_ior_callback<1>().set(m_fdc, FUNC(wd2797_device::data_r));
|
||||
m_dmac->out_iow_callback<1>().set(m_fdc, FUNC(wd2797_device::data_w));
|
||||
|
||||
PIC8259(config, m_pic, 0);
|
||||
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
|
||||
@ -650,8 +645,8 @@ MACHINE_CONFIG_START(fp_state::fp)
|
||||
m_fdc->intrq_wr_callback().set(m_pic, FUNC(pic8259_device::ir1_w));
|
||||
m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq1_w));
|
||||
|
||||
FLOPPY_CONNECTOR(config, m_floppy0, fp_floppies, "d32w", fp_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, m_floppy1, fp_floppies, nullptr, fp_state::floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, m_floppy0, "d32w", SONY_OA_D32W, true, floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, m_floppy1, "d32w", SONY_OA_D32W, false, floppy_formats);
|
||||
|
||||
CENTRONICS(config, m_centronics, centronics_devices, "printer");
|
||||
m_centronics->busy_handler().set(FUNC(fp_state::write_centronics_busy));
|
||||
|
@ -167,7 +167,7 @@ void st_state::fdc_dma_transfer()
|
||||
if (m_fdc_fifo_msb)
|
||||
{
|
||||
// write LSB to disk
|
||||
m_fdc->write_data(data & 0xff);
|
||||
m_fdc->data_w(data & 0xff);
|
||||
|
||||
if (LOG) logerror("DMA Write to FDC %02x\n", data & 0xff);
|
||||
|
||||
@ -176,7 +176,7 @@ void st_state::fdc_dma_transfer()
|
||||
else
|
||||
{
|
||||
// write MSB to disk
|
||||
m_fdc->write_data(data >> 8);
|
||||
m_fdc->data_w(data >> 8);
|
||||
|
||||
if (LOG) logerror("DMA Write to FDC %02x\n", data >> 8);
|
||||
}
|
||||
@ -200,7 +200,7 @@ void st_state::fdc_dma_transfer()
|
||||
else
|
||||
{
|
||||
// read from controller to FIFO
|
||||
uint8_t data = m_fdc->read_data();
|
||||
uint8_t data = m_fdc->data_r();
|
||||
|
||||
m_fdc_fifo_empty[m_fdc_fifo_sel] = 0;
|
||||
|
||||
@ -250,9 +250,9 @@ READ16_MEMBER( st_state::fdc_data_r )
|
||||
if (!(m_fdc_mode & DMA_MODE_FDC_HDC_CS))
|
||||
{
|
||||
// floppy controller
|
||||
int offset = (m_fdc_mode & DMA_MODE_ADDRESS_MASK) >> 1;
|
||||
offs_t offset = (m_fdc_mode & DMA_MODE_ADDRESS_MASK) >> 1;
|
||||
|
||||
data = m_fdc->gen_r(offset);
|
||||
data = m_fdc->read(offset);
|
||||
|
||||
if (LOG) logerror("FDC Register %u Read %02x\n", offset, data);
|
||||
}
|
||||
@ -294,11 +294,11 @@ WRITE16_MEMBER( st_state::fdc_data_w )
|
||||
if (!(m_fdc_mode & DMA_MODE_FDC_HDC_CS))
|
||||
{
|
||||
// floppy controller
|
||||
int offset = (m_fdc_mode & DMA_MODE_ADDRESS_MASK) >> 1;
|
||||
offs_t offset = (m_fdc_mode & DMA_MODE_ADDRESS_MASK) >> 1;
|
||||
|
||||
if (LOG) logerror("FDC Register %u Write %02x\n", offset, data);
|
||||
|
||||
m_fdc->gen_w(offset, data);
|
||||
m_fdc->write(offset, data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1359,10 +1359,10 @@ WRITE8_MEMBER( cmi_state::fdc_w )
|
||||
case 0x6: m_fdc_dma_cnt.b.l = data; break;
|
||||
case 0x8: m_fdc_dma_cnt.b.h = data; break;
|
||||
case 0xa: dma_fdc_rom(); break;
|
||||
case 0xc: m_wd1791->write_cmd(data ^ 0xff); break;
|
||||
case 0xd: m_wd1791->write_track(data ^ 0xff); break;
|
||||
case 0xe: m_wd1791->write_sector(data ^ 0xff); break;
|
||||
case 0xf: m_wd1791->write_data(data ^ 0xff); break;
|
||||
case 0xc: m_wd1791->cmd_w(data ^ 0xff); break;
|
||||
case 0xd: m_wd1791->track_w(data ^ 0xff); break;
|
||||
case 0xe: m_wd1791->sector_w(data ^ 0xff); break;
|
||||
case 0xf: m_wd1791->data_w(data ^ 0xff); break;
|
||||
default: printf("fdc_w: Invalid access (%x with %x)", m_fdc_addr, data);
|
||||
}
|
||||
}
|
||||
@ -1379,10 +1379,10 @@ READ8_MEMBER( cmi_state::fdc_r )
|
||||
{
|
||||
switch (m_fdc_addr)
|
||||
{
|
||||
case 0xc: { return m_wd1791->read_status() ^ 0xff; }
|
||||
case 0xd: { return m_wd1791->read_track() ^ 0xff; }
|
||||
case 0xe: { return m_wd1791->read_sector() ^ 0xff; }
|
||||
case 0xf: { return m_wd1791->read_data() ^ 0xff; }
|
||||
case 0xc: { return m_wd1791->status_r() ^ 0xff; }
|
||||
case 0xd: { return m_wd1791->track_r() ^ 0xff; }
|
||||
case 0xe: { return m_wd1791->sector_r() ^ 0xff; }
|
||||
case 0xf: { return m_wd1791->data_r() ^ 0xff; }
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
@ -1414,7 +1414,7 @@ void cmi_state::fdc_dma_transfer()
|
||||
if (!BIT(m_fdc_ctrl, 4))
|
||||
{
|
||||
/* Read a byte at a time */
|
||||
uint8_t data = m_wd1791->read_data() ^ 0xff;
|
||||
uint8_t data = m_wd1791->data_r() ^ 0xff;
|
||||
|
||||
if (m_fdc_dma_cnt.w.l == 0xffff)
|
||||
return;
|
||||
@ -1446,7 +1446,7 @@ void cmi_state::fdc_dma_transfer()
|
||||
if (phys_page & 0x80)
|
||||
data = m_q256_ram[i][((phys_page & 0x7f) * PAGE_SIZE) + (m_fdc_dma_addr.w.l & PAGE_MASK)];
|
||||
|
||||
m_wd1791->write_data(data ^ 0xff);
|
||||
m_wd1791->data_w(data ^ 0xff);
|
||||
|
||||
if (!BIT(m_fdc_ctrl, 3))
|
||||
m_fdc_dma_addr.w.l++;
|
||||
|
@ -198,7 +198,7 @@ class esq1_filters : public device_t,
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
esq1_filters(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esq1_filters(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
void set_vca(int channel, uint8_t value);
|
||||
void set_vpan(int channel, uint8_t value);
|
||||
@ -456,12 +456,12 @@ void esq1_state::machine_reset()
|
||||
|
||||
READ8_MEMBER(esq1_state::wd1772_r)
|
||||
{
|
||||
return m_fdc->read(space, offset&3);
|
||||
return m_fdc->read(offset&3);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(esq1_state::wd1772_w)
|
||||
{
|
||||
m_fdc->write(space, offset&3, data);
|
||||
m_fdc->write(offset&3, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(esq1_state::mapper_w)
|
||||
@ -589,54 +589,55 @@ INPUT_CHANGED_MEMBER(esq1_state::key_stroke)
|
||||
}
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(esq1_state::esq1)
|
||||
MCFG_DEVICE_ADD("maincpu", MC6809, XTAL(8'000'000)) // XTAL not directly attached to CPU
|
||||
MCFG_DEVICE_PROGRAM_MAP(esq1_map)
|
||||
void esq1_state::esq1(machine_config &config)
|
||||
{
|
||||
MC6809(config, m_maincpu, XTAL(8'000'000)); // XTAL not directly attached to CPU
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq1_state::esq1_map);
|
||||
|
||||
MCFG_DEVICE_ADD("duart", SCN2681, XTAL(8'000'000) / 2)
|
||||
MCFG_MC68681_SET_EXTERNAL_CLOCKS(XTAL(8'000'000) / 16, XTAL(8'000'000) / 16, XTAL(8'000'000) / 8, XTAL(8'000'000) / 8)
|
||||
MCFG_MC68681_IRQ_CALLBACK(INPUTLINE("maincpu", M6809_IRQ_LINE))
|
||||
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, esq1_state, duart_tx_a))
|
||||
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(*this, esq1_state, duart_tx_b))
|
||||
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, esq1_state, duart_output))
|
||||
SCN2681(config, m_duart, XTAL(8'000'000) / 2);
|
||||
m_duart->set_clocks(XTAL(8'000'000) / 16, XTAL(8'000'000) / 16, XTAL(8'000'000) / 8, XTAL(8'000'000) / 8);
|
||||
m_duart->irq_cb().set_inputline(m_maincpu, M6809_IRQ_LINE);
|
||||
m_duart->a_tx_cb().set(FUNC(esq1_state::duart_tx_a));
|
||||
m_duart->b_tx_cb().set(FUNC(esq1_state::duart_tx_b));
|
||||
m_duart->outport_cb().set(FUNC(esq1_state::duart_output));
|
||||
|
||||
MCFG_ESQPANEL2X40_ADD("panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", scn2681_device, rx_b_w))
|
||||
ESQPANEL2X40(config, m_panel);
|
||||
m_panel->write_tx().set(m_duart, FUNC(scn2681_device::rx_b_w));
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
|
||||
MCFG_MIDI_RX_HANDLER(WRITELINE("duart", scn2681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
|
||||
auto &mdin(MIDI_PORT(config, "mdin"));
|
||||
midiin_slot(mdin);
|
||||
mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
|
||||
midiout_slot(MIDI_PORT(config, "mdout"));
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("filters", ESQ1_FILTERS, 0)
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
ESQ1_FILTERS(config, m_filters);
|
||||
m_filters->add_route(0, "lspeaker", 1.0);
|
||||
m_filters->add_route(1, "rspeaker", 1.0);
|
||||
|
||||
MCFG_ES5503_ADD("es5503", XTAL(8'000'000))
|
||||
MCFG_ES5503_OUTPUT_CHANNELS(8)
|
||||
MCFG_ES5503_IRQ_FUNC(WRITELINE(*this, esq1_state, esq1_doc_irq))
|
||||
MCFG_ES5503_ADC_FUNC(READ8(*this, esq1_state, esq1_adc_read))
|
||||
auto &es5503(ES5503(config, "es5503", XTAL(8'000'000)));
|
||||
es5503.set_channels(8);
|
||||
es5503.irq_func().set(FUNC(esq1_state::esq1_doc_irq));
|
||||
es5503.adc_func().set(FUNC(esq1_state::esq1_adc_read));
|
||||
es5503.add_route(0, "filters", 1.0, 0);
|
||||
es5503.add_route(1, "filters", 1.0, 1);
|
||||
es5503.add_route(2, "filters", 1.0, 2);
|
||||
es5503.add_route(3, "filters", 1.0, 3);
|
||||
es5503.add_route(4, "filters", 1.0, 4);
|
||||
es5503.add_route(5, "filters", 1.0, 5);
|
||||
es5503.add_route(6, "filters", 1.0, 6);
|
||||
es5503.add_route(7, "filters", 1.0, 7);
|
||||
}
|
||||
|
||||
MCFG_SOUND_ROUTE(0, "filters", 1.0, 0)
|
||||
MCFG_SOUND_ROUTE(1, "filters", 1.0, 1)
|
||||
MCFG_SOUND_ROUTE(2, "filters", 1.0, 2)
|
||||
MCFG_SOUND_ROUTE(3, "filters", 1.0, 3)
|
||||
MCFG_SOUND_ROUTE(4, "filters", 1.0, 4)
|
||||
MCFG_SOUND_ROUTE(5, "filters", 1.0, 5)
|
||||
MCFG_SOUND_ROUTE(6, "filters", 1.0, 6)
|
||||
MCFG_SOUND_ROUTE(7, "filters", 1.0, 7)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(esq1_state::sq80)
|
||||
void esq1_state::sq80(machine_config &config)
|
||||
{
|
||||
esq1(config);
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(sq80_map)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq1_state::sq80_map);
|
||||
|
||||
MCFG_DEVICE_ADD(WD1772_TAG, WD1772, 4000000)
|
||||
MACHINE_CONFIG_END
|
||||
WD1772(config, m_fdc, 4000000);
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( esq1 )
|
||||
PORT_START("KEY0")
|
||||
|
@ -250,11 +250,6 @@ FLOPPY_FORMATS_MEMBER( esq5505_state::floppy_formats )
|
||||
FLOPPY_ESQIMG_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
|
||||
static void ensoniq_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("35dd", FLOPPY_35_DD);
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(esq5505_state::maincpu_irq_acknowledge_callback)
|
||||
{
|
||||
switch(irqline)
|
||||
@ -618,149 +613,156 @@ INPUT_CHANGED_MEMBER(esq5505_state::key_stroke)
|
||||
}
|
||||
#endif
|
||||
|
||||
MACHINE_CONFIG_START(esq5505_state::vfx)
|
||||
MCFG_DEVICE_ADD("maincpu", M68000, 10_MHz_XTAL)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vfx_map)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(esq5505_state,maincpu_irq_acknowledge_callback)
|
||||
void esq5505_state::vfx(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 10_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::vfx_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(esq5505_state::maincpu_irq_acknowledge_callback));
|
||||
|
||||
MCFG_DEVICE_ADD("esp", ES5510, 10_MHz_XTAL)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
ES5510(config, m_esp, 10_MHz_XTAL);
|
||||
m_esp->set_disable();
|
||||
|
||||
MCFG_ESQPANEL2X40_VFX_ADD("panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", mc68681_device, rx_b_w))
|
||||
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(*this, esq5505_state, analog_w))
|
||||
ESQPANEL2X40_VFX(config, m_panel);
|
||||
m_panel->write_tx().set(m_duart, FUNC(mc68681_device::rx_b_w));
|
||||
m_panel->write_analog().set(FUNC(esq5505_state::analog_w));
|
||||
|
||||
MCFG_DEVICE_ADD("duart", MC68681, 4000000)
|
||||
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, esq5505_state, duart_irq_handler))
|
||||
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, esq5505_state, duart_tx_a))
|
||||
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(*this, esq5505_state, duart_tx_b))
|
||||
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, esq5505_state, duart_output))
|
||||
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
|
||||
MC68681(config, m_duart, 4000000);
|
||||
m_duart->irq_cb().set(FUNC(esq5505_state::duart_irq_handler));
|
||||
m_duart->a_tx_cb().set(FUNC(esq5505_state::duart_tx_a));
|
||||
m_duart->b_tx_cb().set(FUNC(esq5505_state::duart_tx_b));
|
||||
m_duart->outport_cb().set(FUNC(esq5505_state::duart_output));
|
||||
m_duart->set_clocks(500000, 500000, 1000000, 1000000);
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
|
||||
MCFG_MIDI_RX_HANDLER(WRITELINE("duart", mc68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
|
||||
auto &mdin(MIDI_PORT(config, "mdin"));
|
||||
midiin_slot(mdin);
|
||||
mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
|
||||
midiout_slot(MIDI_PORT(config, "mdout"));
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("pump", ESQ_5505_5510_PUMP, 10_MHz_XTAL / (16 * 21))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
ESQ_5505_5510_PUMP(config, m_pump, 10_MHz_XTAL / (16 * 21));
|
||||
m_pump->add_route(0, "lspeaker", 1.0);
|
||||
m_pump->add_route(1, "rspeaker", 1.0);
|
||||
|
||||
MCFG_DEVICE_ADD("otis", ES5505, 10_MHz_XTAL)
|
||||
MCFG_ES5505_REGION0("waverom") /* Bank 0 */
|
||||
MCFG_ES5505_REGION1("waverom2") /* Bank 1 */
|
||||
MCFG_ES5505_CHANNELS(4) /* channels */
|
||||
MCFG_ES5505_IRQ_CB(WRITELINE(*this, esq5505_state, esq5505_otis_irq)) /* irq */
|
||||
MCFG_ES5505_READ_PORT_CB(READ16(*this, esq5505_state, analog_r)) /* ADC */
|
||||
MCFG_SOUND_ROUTE(0, "pump", 1.0, 0)
|
||||
MCFG_SOUND_ROUTE(1, "pump", 1.0, 1)
|
||||
MCFG_SOUND_ROUTE(2, "pump", 1.0, 2)
|
||||
MCFG_SOUND_ROUTE(3, "pump", 1.0, 3)
|
||||
MCFG_SOUND_ROUTE(4, "pump", 1.0, 4)
|
||||
MCFG_SOUND_ROUTE(5, "pump", 1.0, 5)
|
||||
MCFG_SOUND_ROUTE(6, "pump", 1.0, 6)
|
||||
MCFG_SOUND_ROUTE(7, "pump", 1.0, 7)
|
||||
MACHINE_CONFIG_END
|
||||
auto &es5505(ES5505(config, "otis", 10_MHz_XTAL));
|
||||
es5505.set_region0("waverom"); /* Bank 0 */
|
||||
es5505.set_region1("waverom2"); /* Bank 1 */
|
||||
es5505.set_channels(4); /* channels */
|
||||
es5505.irq_cb().set(FUNC(esq5505_state::esq5505_otis_irq)); /* irq */
|
||||
es5505.read_port_cb().set(FUNC(esq5505_state::analog_r)); /* ADC */
|
||||
es5505.add_route(0, "pump", 1.0, 0);
|
||||
es5505.add_route(1, "pump", 1.0, 1);
|
||||
es5505.add_route(2, "pump", 1.0, 2);
|
||||
es5505.add_route(3, "pump", 1.0, 3);
|
||||
es5505.add_route(4, "pump", 1.0, 4);
|
||||
es5505.add_route(5, "pump", 1.0, 5);
|
||||
es5505.add_route(6, "pump", 1.0, 6);
|
||||
es5505.add_route(7, "pump", 1.0, 7);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(esq5505_state::eps)
|
||||
void esq5505_state::eps(machine_config &config)
|
||||
{
|
||||
vfx(config);
|
||||
MCFG_DEVICE_MODIFY( "maincpu" )
|
||||
MCFG_DEVICE_PROGRAM_MAP(eps_map)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::eps_map);
|
||||
|
||||
MCFG_DEVICE_MODIFY("duart")
|
||||
MCFG_DEVICE_CLOCK(10_MHz_XTAL / 2)
|
||||
m_duart->set_clock(10_MHz_XTAL / 2);
|
||||
|
||||
MCFG_ESQPANEL2X40_VFX_REMOVE("panel")
|
||||
MCFG_ESQPANEL1X22_ADD("panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", mc68681_device, rx_b_w))
|
||||
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(*this, esq5505_state, analog_w))
|
||||
ESQPANEL1X22(config.replace(), m_panel);
|
||||
m_panel->write_tx().set(m_duart, FUNC(mc68681_device::rx_b_w));
|
||||
m_panel->write_analog().set(FUNC(esq5505_state::analog_w));
|
||||
|
||||
MCFG_DEVICE_ADD("wd1772", WD1772, 8_MHz_XTAL)
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd1772:0", ensoniq_floppies, "35dd", esq5505_state::floppy_formats)
|
||||
WD1772(config, m_fdc, 8_MHz_XTAL);
|
||||
FLOPPY_CONNECTOR(config, m_floppy_connector);
|
||||
m_floppy_connector->option_add("35dd", FLOPPY_35_DD);
|
||||
m_floppy_connector->set_default_option("35dd");
|
||||
m_floppy_connector->set_formats(esq5505_state::floppy_formats);
|
||||
|
||||
MCFG_DEVICE_ADD("mc68450", HD63450, 10_MHz_XTAL) // MC68450 compatible
|
||||
MCFG_HD63450_CPU("maincpu")
|
||||
MCFG_HD63450_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_usec(4), attotime::from_hz(15625/2))
|
||||
MCFG_HD63450_BURST_CLOCKS(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_nsec(50), attotime::from_nsec(50))
|
||||
MCFG_HD63450_DMA_END_CB(WRITE8(*this, esq5505_state, dma_end))
|
||||
MCFG_HD63450_DMA_ERROR_CB(WRITE8(*this, esq5505_state, dma_error))
|
||||
MCFG_HD63450_DMA_READ_0_CB(READ8(m_fdc, wd1772_device, data_r)) // ch 0 = fdc, ch 1 = 340001 (ADC?)
|
||||
MCFG_HD63450_DMA_WRITE_0_CB(WRITE8(m_fdc, wd1772_device, data_w))
|
||||
MACHINE_CONFIG_END
|
||||
HD63450(config, m_dmac, 10_MHz_XTAL); // MC68450 compatible
|
||||
m_dmac->set_cpu_tag(m_maincpu);
|
||||
m_dmac->set_our_clocks(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_usec(4), attotime::from_hz(15625/2));
|
||||
m_dmac->set_burst_clocks(attotime::from_usec(32), attotime::from_nsec(450), attotime::from_nsec(50), attotime::from_nsec(50));
|
||||
m_dmac->dma_end().set(FUNC(esq5505_state::dma_end));
|
||||
m_dmac->dma_error().set(FUNC(esq5505_state::dma_error));
|
||||
m_dmac->dma_read<0>().set(m_fdc, FUNC(wd1772_device::data_r)); // ch 0 = fdc, ch 1 = 340001 (ADC?)
|
||||
m_dmac->dma_write<0>().set(m_fdc, FUNC(wd1772_device::data_w));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(esq5505_state::vfxsd)
|
||||
void esq5505_state::vfxsd(machine_config &config)
|
||||
{
|
||||
vfx(config);
|
||||
MCFG_DEVICE_MODIFY("maincpu")
|
||||
MCFG_DEVICE_PROGRAM_MAP(vfxsd_map)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::vfxsd_map);
|
||||
|
||||
MCFG_DEVICE_ADD("wd1772", WD1772, 8000000)
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd1772:0", ensoniq_floppies, "35dd", esq5505_state::floppy_formats)
|
||||
MACHINE_CONFIG_END
|
||||
WD1772(config, m_fdc, 8000000);
|
||||
FLOPPY_CONNECTOR(config, m_floppy_connector);
|
||||
m_floppy_connector->option_add("35dd", FLOPPY_35_DD);
|
||||
m_floppy_connector->set_default_option("35dd");
|
||||
m_floppy_connector->set_formats(esq5505_state::floppy_formats);
|
||||
}
|
||||
|
||||
// 32-voice machines with the VFX-SD type config
|
||||
MACHINE_CONFIG_START(esq5505_state::vfx32)
|
||||
MCFG_DEVICE_ADD("maincpu", M68000, 30.4761_MHz_XTAL / 2)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vfxsd_map)
|
||||
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DRIVER(esq5505_state,maincpu_irq_acknowledge_callback)
|
||||
void esq5505_state::vfx32(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 30.4761_MHz_XTAL / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::vfxsd_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(esq5505_state::maincpu_irq_acknowledge_callback));
|
||||
|
||||
MCFG_DEVICE_ADD("esp", ES5510, 10_MHz_XTAL)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
ES5510(config, m_esp, 10_MHz_XTAL);
|
||||
m_esp->set_disable();
|
||||
|
||||
MCFG_ESQPANEL2X40_VFX_ADD("panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", mc68681_device, rx_b_w))
|
||||
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(*this, esq5505_state, analog_w))
|
||||
ESQPANEL2X40_VFX(config, m_panel);
|
||||
m_panel->write_tx().set(m_duart, FUNC(mc68681_device::rx_b_w));
|
||||
m_panel->write_analog().set(FUNC(esq5505_state::analog_w));
|
||||
|
||||
MCFG_DEVICE_ADD("duart", MC68681, 4000000)
|
||||
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, esq5505_state, duart_irq_handler))
|
||||
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, esq5505_state, duart_tx_a))
|
||||
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(*this, esq5505_state, duart_tx_b))
|
||||
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, esq5505_state, duart_output))
|
||||
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
|
||||
MC68681(config, m_duart, 4000000);
|
||||
m_duart->irq_cb().set(FUNC(esq5505_state::duart_irq_handler));
|
||||
m_duart->a_tx_cb().set(FUNC(esq5505_state::duart_tx_a));
|
||||
m_duart->b_tx_cb().set(FUNC(esq5505_state::duart_tx_b));
|
||||
m_duart->outport_cb().set(FUNC(esq5505_state::duart_output));
|
||||
m_duart->set_clocks(500000, 500000, 1000000, 1000000);
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
|
||||
MCFG_MIDI_RX_HANDLER(WRITELINE("duart", mc68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
|
||||
auto &mdin(MIDI_PORT(config, "mdin"));
|
||||
midiin_slot(mdin);
|
||||
mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
|
||||
midiout_slot(MIDI_PORT(config, "mdout"));
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("pump", ESQ_5505_5510_PUMP, 30.4761_MHz_XTAL / (2 * 16 * 32))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
ESQ_5505_5510_PUMP(config, m_pump, 30.4761_MHz_XTAL / (2 * 16 * 32));
|
||||
m_pump->add_route(0, "lspeaker", 1.0);
|
||||
m_pump->add_route(1, "rspeaker", 1.0);
|
||||
|
||||
MCFG_DEVICE_ADD("otis", ES5505, 30.4761_MHz_XTAL / 2)
|
||||
MCFG_ES5505_REGION0("waverom") /* Bank 0 */
|
||||
MCFG_ES5505_REGION1("waverom2") /* Bank 1 */
|
||||
MCFG_ES5505_CHANNELS(4) /* channels */
|
||||
MCFG_ES5505_IRQ_CB(WRITELINE(*this, esq5505_state, esq5505_otis_irq)) /* irq */
|
||||
MCFG_ES5505_READ_PORT_CB(READ16(*this, esq5505_state, analog_r)) /* ADC */
|
||||
MCFG_SOUND_ROUTE(0, "pump", 1.0, 0)
|
||||
MCFG_SOUND_ROUTE(1, "pump", 1.0, 1)
|
||||
MCFG_SOUND_ROUTE(2, "pump", 1.0, 2)
|
||||
MCFG_SOUND_ROUTE(3, "pump", 1.0, 3)
|
||||
MCFG_SOUND_ROUTE(4, "pump", 1.0, 4)
|
||||
MCFG_SOUND_ROUTE(5, "pump", 1.0, 5)
|
||||
MCFG_SOUND_ROUTE(6, "pump", 1.0, 6)
|
||||
MCFG_SOUND_ROUTE(7, "pump", 1.0, 7)
|
||||
auto &es5505(ES5505(config, "otis", 30.4761_MHz_XTAL / 2));
|
||||
es5505.set_region0("waverom"); /* Bank 0 */
|
||||
es5505.set_region1("waverom2"); /* Bank 1 */
|
||||
es5505.set_channels(4); /* channels */
|
||||
es5505.irq_cb().set(FUNC(esq5505_state::esq5505_otis_irq)); /* irq */
|
||||
es5505.read_port_cb().set(FUNC(esq5505_state::analog_r)); /* ADC */
|
||||
es5505.add_route(0, "pump", 1.0, 0);
|
||||
es5505.add_route(1, "pump", 1.0, 1);
|
||||
es5505.add_route(2, "pump", 1.0, 2);
|
||||
es5505.add_route(3, "pump", 1.0, 3);
|
||||
es5505.add_route(4, "pump", 1.0, 4);
|
||||
es5505.add_route(5, "pump", 1.0, 5);
|
||||
es5505.add_route(6, "pump", 1.0, 6);
|
||||
es5505.add_route(7, "pump", 1.0, 7);
|
||||
|
||||
MCFG_DEVICE_ADD("wd1772", WD1772, 8000000)
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd1772:0", ensoniq_floppies, "35dd", esq5505_state::floppy_formats)
|
||||
MACHINE_CONFIG_END
|
||||
WD1772(config, m_fdc, 8000000);
|
||||
FLOPPY_CONNECTOR(config, m_floppy_connector, "35dd", FLOPPY_35_DD, true, floppy_formats);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(esq5505_state::sq1)
|
||||
void esq5505_state::sq1(machine_config &config)
|
||||
{
|
||||
vfx(config);
|
||||
MCFG_DEVICE_MODIFY( "maincpu" )
|
||||
MCFG_DEVICE_PROGRAM_MAP(sq1_map)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::sq1_map);
|
||||
|
||||
MCFG_ESQPANEL2X40_VFX_REMOVE("panel")
|
||||
MCFG_ESQPANEL2X16_SQ1_ADD("panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", mc68681_device, rx_b_w))
|
||||
MCFG_ESQPANEL_ANALOG_CALLBACK(WRITE16(*this, esq5505_state, analog_w))
|
||||
MACHINE_CONFIG_END
|
||||
ESQPANEL2X16_SQ1(config.replace(), m_panel);
|
||||
m_panel->write_tx().set(m_duart, FUNC(mc68681_device::rx_b_w));
|
||||
m_panel->write_analog().set(FUNC(esq5505_state::analog_w));
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( vfx )
|
||||
#if KEYBOARD_HACK
|
||||
|
@ -216,69 +216,69 @@ WRITE_LINE_MEMBER(esqkt_state::duart_tx_b)
|
||||
m_sq1panel->rx_w(state);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(esqkt_state::kt)
|
||||
MCFG_DEVICE_ADD("maincpu", M68EC020, XTAL(16'000'000))
|
||||
MCFG_DEVICE_PROGRAM_MAP(kt_map)
|
||||
void esqkt_state::kt(machine_config &config)
|
||||
{
|
||||
M68EC020(config, m_maincpu, 16_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esqkt_state::kt_map);
|
||||
|
||||
MCFG_DEVICE_ADD("esp", ES5510, XTAL(10'000'000))
|
||||
MCFG_DEVICE_DISABLE()
|
||||
ES5510(config, m_esp, 10_MHz_XTAL);
|
||||
m_esp->set_disable();
|
||||
|
||||
MCFG_ESQPANEL2X16_SQ1_ADD("sq1panel")
|
||||
MCFG_ESQPANEL_TX_CALLBACK(WRITELINE("duart", scn2681_device, rx_b_w))
|
||||
auto &panel(ESQPANEL2X16_SQ1(config, "panel"));
|
||||
panel.write_tx().set(m_duart, FUNC(scn2681_device::rx_b_w));
|
||||
|
||||
MCFG_DEVICE_ADD("duart", SCN2681, 4000000)
|
||||
MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, esqkt_state, duart_irq_handler))
|
||||
MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, esqkt_state, duart_tx_a))
|
||||
MCFG_MC68681_B_TX_CALLBACK(WRITELINE(*this, esqkt_state, duart_tx_b))
|
||||
MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, esqkt_state, duart_output))
|
||||
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
|
||||
MCFG_MC68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
|
||||
SCN2681(config, m_duart, 4000000);
|
||||
m_duart->irq_cb().set(FUNC(esqkt_state::duart_irq_handler));
|
||||
m_duart->a_tx_cb().set(FUNC(esqkt_state::duart_tx_a));
|
||||
m_duart->b_tx_cb().set(FUNC(esqkt_state::duart_tx_b));
|
||||
m_duart->outport_cb().set(FUNC(esqkt_state::duart_output));
|
||||
m_duart->set_clocks(500000, 500000, 1000000, 1000000);
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdin", midiin_slot, "midiin")
|
||||
MCFG_MIDI_RX_HANDLER(WRITELINE("duart", scn2681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
|
||||
auto &mdin(MIDI_PORT(config, "mdin"));
|
||||
midiin_slot(mdin);
|
||||
mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx
|
||||
|
||||
MCFG_MIDI_PORT_ADD("mdout", midiout_slot, "midiout")
|
||||
midiout_slot(MIDI_PORT(config, "mdout"));
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
MCFG_DEVICE_ADD("pump", ESQ_5505_5510_PUMP, XTAL(16'000'000) / (16 * 32))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
ESQ_5505_5510_PUMP(config, m_pump, 16_MHz_XTAL / (16 * 32));
|
||||
m_pump->add_route(0, "lspeaker", 1.0);
|
||||
m_pump->add_route(1, "rspeaker", 1.0);
|
||||
|
||||
MCFG_DEVICE_ADD("ensoniq1", ES5506, XTAL(16'000'000))
|
||||
MCFG_ES5506_REGION0("waverom") /* Bank 0 */
|
||||
MCFG_ES5506_REGION1("waverom2") /* Bank 1 */
|
||||
MCFG_ES5506_REGION2("waverom3") /* Bank 0 */
|
||||
MCFG_ES5506_REGION3("waverom4") /* Bank 1 */
|
||||
MCFG_ES5506_CHANNELS(4) /* channels */
|
||||
MCFG_ES5506_IRQ_CB(WRITELINE(*this, esqkt_state, esq5506_otto_irq)) /* irq */
|
||||
MCFG_ES5506_READ_PORT_CB(READ16(*this, esqkt_state, esq5506_read_adc))
|
||||
MCFG_SOUND_ROUTE(0, "pump", 1.0, 0)
|
||||
MCFG_SOUND_ROUTE(1, "pump", 1.0, 1)
|
||||
MCFG_SOUND_ROUTE(2, "pump", 1.0, 2)
|
||||
MCFG_SOUND_ROUTE(3, "pump", 1.0, 3)
|
||||
MCFG_SOUND_ROUTE(4, "pump", 1.0, 4)
|
||||
MCFG_SOUND_ROUTE(5, "pump", 1.0, 5)
|
||||
MCFG_SOUND_ROUTE(6, "pump", 1.0, 6)
|
||||
MCFG_SOUND_ROUTE(7, "pump", 1.0, 7)
|
||||
auto &es5506a(ES5506(config, "ensoniq1", 16_MHz_XTAL));
|
||||
es5506a.set_region0("waverom"); /* Bank 0 */
|
||||
es5506a.set_region1("waverom2"); /* Bank 1 */
|
||||
es5506a.set_region2("waverom3"); /* Bank 0 */
|
||||
es5506a.set_region3("waverom4"); /* Bank 1 */
|
||||
es5506a.set_channels(4); /* channels */
|
||||
es5506a.irq_cb().set(FUNC(esqkt_state::esq5506_otto_irq)); /* irq */
|
||||
es5506a.read_port_cb().set(FUNC(esqkt_state::esq5506_read_adc)); /* ADC */
|
||||
es5506a.add_route(0, "pump", 1.0, 0);
|
||||
es5506a.add_route(1, "pump", 1.0, 1);
|
||||
es5506a.add_route(2, "pump", 1.0, 2);
|
||||
es5506a.add_route(3, "pump", 1.0, 3);
|
||||
es5506a.add_route(4, "pump", 1.0, 4);
|
||||
es5506a.add_route(5, "pump", 1.0, 5);
|
||||
es5506a.add_route(6, "pump", 1.0, 6);
|
||||
es5506a.add_route(7, "pump", 1.0, 7);
|
||||
|
||||
MCFG_DEVICE_ADD("ensoniq2", ES5506, XTAL(16'000'000))
|
||||
MCFG_ES5506_REGION0("waverom") /* Bank 0 */
|
||||
MCFG_ES5506_REGION1("waverom2") /* Bank 1 */
|
||||
MCFG_ES5506_REGION2("waverom3") /* Bank 0 */
|
||||
MCFG_ES5506_REGION3("waverom4") /* Bank 1 */
|
||||
MCFG_ES5506_CHANNELS(4) /* channels */
|
||||
MCFG_SOUND_ROUTE(0, "pump", 1.0, 0)
|
||||
MCFG_SOUND_ROUTE(1, "pump", 1.0, 1)
|
||||
MCFG_SOUND_ROUTE(2, "pump", 1.0, 2)
|
||||
MCFG_SOUND_ROUTE(3, "pump", 1.0, 3)
|
||||
MCFG_SOUND_ROUTE(4, "pump", 1.0, 4)
|
||||
MCFG_SOUND_ROUTE(5, "pump", 1.0, 5)
|
||||
MCFG_SOUND_ROUTE(6, "pump", 1.0, 6)
|
||||
MCFG_SOUND_ROUTE(7, "pump", 1.0, 7)
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
auto &es5506b(ES5506(config, "ensoniq2", 16_MHz_XTAL));
|
||||
es5506b.set_region0("waverom"); /* Bank 0 */
|
||||
es5506b.set_region1("waverom2"); /* Bank 1 */
|
||||
es5506b.set_region2("waverom3"); /* Bank 0 */
|
||||
es5506b.set_region3("waverom4"); /* Bank 1 */
|
||||
es5506b.set_channels(4); /* channels */
|
||||
es5506b.add_route(0, "pump", 1.0, 0);
|
||||
es5506b.add_route(1, "pump", 1.0, 1);
|
||||
es5506b.add_route(2, "pump", 1.0, 2);
|
||||
es5506b.add_route(3, "pump", 1.0, 3);
|
||||
es5506b.add_route(4, "pump", 1.0, 4);
|
||||
es5506b.add_route(5, "pump", 1.0, 5);
|
||||
es5506b.add_route(6, "pump", 1.0, 6);
|
||||
es5506b.add_route(7, "pump", 1.0, 7);
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( kt )
|
||||
INPUT_PORTS_END
|
||||
|
@ -445,13 +445,13 @@ READ8_MEMBER(fm7_state::fm7_fdc_r)
|
||||
switch(offset)
|
||||
{
|
||||
case 0:
|
||||
return m_fdc->status_r(space, offset);
|
||||
return m_fdc->status_r();
|
||||
case 1:
|
||||
return m_fdc->track_r(space, offset);
|
||||
return m_fdc->track_r();
|
||||
case 2:
|
||||
return m_fdc->sector_r(space, offset);
|
||||
return m_fdc->sector_r();
|
||||
case 3:
|
||||
return m_fdc->data_r(space, offset);
|
||||
return m_fdc->data_r();
|
||||
case 4:
|
||||
return m_fdc_side | 0xfe;
|
||||
case 5:
|
||||
@ -476,16 +476,16 @@ WRITE8_MEMBER(fm7_state::fm7_fdc_w)
|
||||
switch(offset)
|
||||
{
|
||||
case 0:
|
||||
m_fdc->cmd_w(space, offset,data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
case 1:
|
||||
m_fdc->track_w(space, offset,data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
case 2:
|
||||
m_fdc->sector_w(space, offset,data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
case 3:
|
||||
m_fdc->data_w(space, offset,data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
case 4:
|
||||
m_fdc_side = data & 0x01;
|
||||
|
@ -478,13 +478,13 @@ READ8_MEMBER(towns_state::towns_floppy_r)
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00:
|
||||
return m_fdc->status_r(space, 0);
|
||||
return m_fdc->status_r();
|
||||
case 0x02:
|
||||
return m_fdc->track_r(space, 0);
|
||||
return m_fdc->track_r();
|
||||
case 0x04:
|
||||
return m_fdc->sector_r(space, 0);
|
||||
return m_fdc->sector_r();
|
||||
case 0x06:
|
||||
return m_fdc->data_r(space, 0);
|
||||
return m_fdc->data_r();
|
||||
case 0x08: // selected drive status?
|
||||
//logerror("FDC: read from offset 0x08\n");
|
||||
ret = 0x80; // always set
|
||||
@ -532,19 +532,19 @@ WRITE8_MEMBER(towns_state::towns_floppy_w)
|
||||
return;
|
||||
if(data == 0xfe)
|
||||
return;
|
||||
m_fdc->cmd_w(space, 0,data);
|
||||
m_fdc->cmd_w(data);
|
||||
logerror("FDC: Command %02x\n",data);
|
||||
break;
|
||||
case 0x02:
|
||||
m_fdc->track_w(space, 0,data);
|
||||
m_fdc->track_w(data);
|
||||
logerror("FDC: Track %02x\n",data);
|
||||
break;
|
||||
case 0x04:
|
||||
m_fdc->sector_w(space, 0,data);
|
||||
m_fdc->sector_w(data);
|
||||
logerror("FDC: Sector %02x\n",data);
|
||||
break;
|
||||
case 0x06:
|
||||
m_fdc->data_w(space, 0,data);
|
||||
m_fdc->data_w(data);
|
||||
logerror("FDC: Data %02x\n",data);
|
||||
break;
|
||||
case 0x08:
|
||||
@ -601,13 +601,13 @@ WRITE8_MEMBER(towns_state::towns_floppy_w)
|
||||
}
|
||||
|
||||
READ16_MEMBER(towns_state::towns_fdc_dma_r)
|
||||
{ uint16_t data = m_fdc->data_r(generic_space(), 0);
|
||||
{ uint16_t data = m_fdc->data_r();
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(towns_state::towns_fdc_dma_w)
|
||||
{
|
||||
m_fdc->data_w(generic_space(), 0,data);
|
||||
m_fdc->data_w(data);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -374,7 +374,7 @@ READ8_MEMBER(gimix_state::fdc_r)
|
||||
m_floppy1_ready = true;
|
||||
logerror("FDC: Floppy drive 1 motor on\n");
|
||||
}
|
||||
return m_fdc->read(space,offset);
|
||||
return m_fdc->read(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gimix_state::fdc_w)
|
||||
@ -384,7 +384,7 @@ WRITE8_MEMBER(gimix_state::fdc_w)
|
||||
m_floppy0->get_device()->mon_w(0);
|
||||
if(m_selected_drive == 2)
|
||||
m_floppy1->get_device()->mon_w(0);
|
||||
m_fdc->write(space,offset,data);
|
||||
m_fdc->write(offset,data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(gimix_state::pia_pa_r)
|
||||
@ -432,13 +432,13 @@ WRITE_LINE_MEMBER(gimix_state::fdc_drq_w)
|
||||
if(DMA_DIRECTION)
|
||||
{
|
||||
// write to disk
|
||||
m_fdc->write_data(m_ram->read(m_dma_current_addr));
|
||||
m_fdc->data_w(m_ram->read(m_dma_current_addr));
|
||||
// logerror("DMA: read from RAM %05x\n",m_dma_current_addr);
|
||||
}
|
||||
else
|
||||
{
|
||||
// read from disk
|
||||
m_ram->write(m_dma_current_addr,m_fdc->read_data());
|
||||
m_ram->write(m_dma_current_addr,m_fdc->data_r());
|
||||
// logerror("DMA: write to RAM %05x\n",m_dma_current_addr);
|
||||
}
|
||||
m_dma_current_addr++;
|
||||
|
@ -712,7 +712,7 @@ WRITE16_MEMBER(hp64k_state::hp64k_flp_w)
|
||||
case 0:
|
||||
// DMA transfer, not at TC
|
||||
if (m_floppy_if_state == HP64K_FLPST_DMAWR1) {
|
||||
m_fdc->write_data(~m_floppy_in_latch_msb);
|
||||
m_fdc->data_w(~m_floppy_in_latch_msb);
|
||||
m_floppy_if_state = HP64K_FLPST_DMAWR2;
|
||||
} else {
|
||||
logerror("write to IC=0 with floppy state %d\n" , m_floppy_if_state);
|
||||
@ -738,7 +738,7 @@ WRITE16_MEMBER(hp64k_state::hp64k_flp_w)
|
||||
// Write (to either FDC or drive control)
|
||||
if (BIT(m_floppy_if_ctrl , 2)) {
|
||||
// FDC
|
||||
m_fdc->gen_w(~m_floppy_if_ctrl & 3 , ~m_floppy_in_latch_lsb);
|
||||
m_fdc->write(~m_floppy_if_ctrl & 3 , ~m_floppy_in_latch_lsb);
|
||||
} else {
|
||||
// Drive control
|
||||
m_floppy_drv_ctrl = m_floppy_in_latch_lsb;
|
||||
@ -748,7 +748,7 @@ WRITE16_MEMBER(hp64k_state::hp64k_flp_w)
|
||||
// Read
|
||||
if (BIT(m_floppy_if_ctrl , 2)) {
|
||||
// FDC
|
||||
m_floppy_out_latch_lsb = ~m_fdc->gen_r(~m_floppy_if_ctrl & 3);
|
||||
m_floppy_out_latch_lsb = ~m_fdc->read(~m_floppy_if_ctrl & 3);
|
||||
} else {
|
||||
// Drive control
|
||||
m_floppy_out_latch_lsb = m_floppy_drv_ctrl;
|
||||
@ -763,7 +763,7 @@ WRITE16_MEMBER(hp64k_state::hp64k_flp_w)
|
||||
case 2:
|
||||
// DMA transfer, at TC
|
||||
if (m_floppy_if_state == HP64K_FLPST_DMAWR1) {
|
||||
m_fdc->write_data(~m_floppy_in_latch_msb);
|
||||
m_fdc->data_w(~m_floppy_in_latch_msb);
|
||||
m_floppy_if_state = HP64K_FLPST_DMAWR2;
|
||||
m_floppy_dmaen = false;
|
||||
m_floppy_dmai = true;
|
||||
@ -802,18 +802,18 @@ void hp64k_state::hp64k_update_floppy_dma(void)
|
||||
m_floppy_if_state = HP64K_FLPST_DMAWR1;
|
||||
} else {
|
||||
// DMA reads
|
||||
m_floppy_out_latch_msb = ~m_fdc->read_data();
|
||||
m_floppy_out_latch_msb = ~m_fdc->data_r();
|
||||
m_floppy_if_state = HP64K_FLPST_DMARD1;
|
||||
}
|
||||
break;
|
||||
|
||||
case HP64K_FLPST_DMAWR2:
|
||||
m_fdc->write_data(~m_floppy_in_latch_lsb);
|
||||
m_fdc->data_w(~m_floppy_in_latch_lsb);
|
||||
m_floppy_if_state = HP64K_FLPST_IDLE;
|
||||
break;
|
||||
|
||||
case HP64K_FLPST_DMARD1:
|
||||
m_floppy_out_latch_lsb = ~m_fdc->read_data();
|
||||
m_floppy_out_latch_lsb = ~m_fdc->data_r();
|
||||
m_cpu->dmar_w(1);
|
||||
m_floppy_if_state = HP64K_FLPST_DMARD2;
|
||||
break;
|
||||
|
@ -598,12 +598,12 @@ READ8_MEMBER(itt3030_state::fdc_stat_r)
|
||||
/* As far as we can tell, the mess of ttl de-inverts the bus */
|
||||
READ8_MEMBER(itt3030_state::fdc_r)
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(itt3030_state::fdc_w)
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -37,17 +37,17 @@ public:
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER(mikrosha_pit_out2);
|
||||
I8275_DRAW_CHARACTER_MEMBER(display_pixels);
|
||||
DECLARE_MACHINE_RESET(mikrosha);
|
||||
virtual void machine_reset() override;
|
||||
|
||||
void mikrosha_io(address_map &map);
|
||||
void mikrosha_mem(address_map &map);
|
||||
};
|
||||
|
||||
MACHINE_RESET_MEMBER(mikrosha_state,mikrosha)
|
||||
void mikrosha_state::machine_reset()
|
||||
{
|
||||
if (m_cart->exists())
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x8000, 0x8000+m_cart->get_rom_size()-1, read8_delegate(FUNC(generic_slot_device::read_rom),(generic_slot_device*)m_cart));
|
||||
MACHINE_RESET_CALL_MEMBER(radio86);
|
||||
radio86_state::machine_reset();
|
||||
}
|
||||
|
||||
/* Address maps */
|
||||
@ -211,8 +211,6 @@ MACHINE_CONFIG_START(mikrosha_state::mikrosha)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mikrosha_mem)
|
||||
MCFG_DEVICE_IO_MAP(mikrosha_io)
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(mikrosha_state, mikrosha)
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
|
@ -352,7 +352,7 @@ WRITE8_MEMBER(mz2000_state::mz2000_gvram_bank_w)
|
||||
READ8_MEMBER(mz2000_state::fdc_r)
|
||||
{
|
||||
if(m_has_fdc)
|
||||
return m_mb8877a->read(space, offset) ^ 0xff;
|
||||
return m_mb8877a->read(offset) ^ 0xff;
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
@ -360,7 +360,7 @@ READ8_MEMBER(mz2000_state::fdc_r)
|
||||
WRITE8_MEMBER(mz2000_state::fdc_w)
|
||||
{
|
||||
if(m_has_fdc)
|
||||
m_mb8877a->write(space, offset, data ^ 0xff);
|
||||
m_mb8877a->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mz2000_state::floppy_select_w)
|
||||
|
@ -996,12 +996,12 @@ WRITE8_MEMBER(mz2500_state::palette4096_io_w)
|
||||
|
||||
READ8_MEMBER(mz2500_state::fdc_r)
|
||||
{
|
||||
return m_fdc->read(space, offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mz2500_state::fdc_w)
|
||||
{
|
||||
m_fdc->write(space, offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
READ8_MEMBER(mz2500_state::mz2500_bplane_latch_r)
|
||||
|
@ -501,12 +501,12 @@ WRITE16_MEMBER(ngen_state::hfd_w)
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_fdc->write(space,offset,data & 0xff);
|
||||
m_fdc->write(offset,data & 0xff);
|
||||
break;
|
||||
case 0x03:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
m_fdc->write(space,offset,data & 0xff);
|
||||
m_fdc->write(offset,data & 0xff);
|
||||
m_fdc_timer->write_clk0(1);
|
||||
m_fdc_timer->write_clk0(0); // Data register access clocks the FDC's PIT channel 0
|
||||
}
|
||||
@ -562,12 +562,12 @@ READ16_MEMBER(ngen_state::hfd_r)
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
ret = m_fdc->read(space,offset);
|
||||
ret = m_fdc->read(offset);
|
||||
break;
|
||||
case 0x03:
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
ret = m_fdc->read(space,offset);
|
||||
ret = m_fdc->read(offset);
|
||||
m_fdc_timer->write_clk0(1);
|
||||
m_fdc_timer->write_clk0(0); // Data register access clocks the FDC's PIT channel 0
|
||||
}
|
||||
|
@ -86,225 +86,216 @@ FLOPPY_FORMATS_MEMBER( orion_state::orion_floppy_formats )
|
||||
FLOPPY_SMX_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
|
||||
static void orion_floppies(device_slot_interface &device)
|
||||
/* Machine driver */
|
||||
void orion_state::orion128(machine_config &config)
|
||||
{
|
||||
device.option_add("525qd", FLOPPY_525_QD);
|
||||
I8080(config, m_maincpu, 2000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &orion_state::orion128_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &orion_state::orion128_io);
|
||||
|
||||
auto &ppi1(I8255A(config, "ppi8255_1"));
|
||||
ppi1.in_pa_callback().set(FUNC(orion_state::orion_romdisk_porta_r));
|
||||
ppi1.out_pb_callback().set(FUNC(orion_state::orion_romdisk_portb_w));
|
||||
ppi1.out_pc_callback().set(FUNC(orion_state::orion_romdisk_portc_w));
|
||||
|
||||
auto &ppi2(I8255A(config, "ppi8255_2"));
|
||||
ppi2.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi2.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi2.in_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_r2));
|
||||
ppi2.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
|
||||
/* video hardware */
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(50);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
m_screen->set_size(384, 256);
|
||||
m_screen->set_visarea(0, 384-1, 0, 256-1);
|
||||
m_screen->set_screen_update(FUNC(orion_state::screen_update_orion128));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
auto &palette(PALETTE(config, m_palette, 18));
|
||||
palette.set_init(palette_init_delegate(FUNC(orion_state::palette_init_orion128), this));
|
||||
|
||||
SPEAKER(config, "mono").front_center();
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
auto &cassette(CASSETTE(config, "cassette"));
|
||||
cassette.set_formats(rko_cassette_formats);
|
||||
cassette.set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED);
|
||||
cassette.set_interface("orion_cass");
|
||||
|
||||
SOFTWARE_LIST(config, "cass_list").set_type("orion_cass", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
FD1793(config, m_fdc, 8_MHz_XTAL / 8);
|
||||
|
||||
FLOPPY_CONNECTOR(config, "fd0", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd1", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd2", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd3", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("orion_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
auto &cart(GENERIC_CARTSLOT(config, "cartslot"));
|
||||
generic_plain_slot(cart);
|
||||
cart.set_interface("orion_cart");
|
||||
|
||||
SOFTWARE_LIST(config, "cart_list").set_type("orion_cart", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
/* internal ram */
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("256K");
|
||||
m_ram->set_default_value(0x00);
|
||||
}
|
||||
|
||||
/* Machine driver */
|
||||
MACHINE_CONFIG_START(orion_state::orion128)
|
||||
MCFG_DEVICE_ADD("maincpu", I8080, 2000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(orion128_mem)
|
||||
MCFG_DEVICE_IO_MAP(orion128_io)
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(orion_state, orion128 )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(orion_state, orion128 )
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255A, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(READ8(*this, orion_state, orion_romdisk_porta_r))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, orion_state, orion_romdisk_portb_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, orion_state, orion_romdisk_portc_w))
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, radio86_8255_portc_r2))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(50)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
|
||||
MCFG_SCREEN_SIZE(384, 256)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 0, 256-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(orion_state, screen_update_orion128)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 18)
|
||||
MCFG_PALETTE_INIT_OWNER(orion_state, orion128 )
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(orion_state,orion128)
|
||||
|
||||
SPEAKER(config, "mono").front_center();
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
MCFG_CASSETTE_ADD( "cassette" )
|
||||
MCFG_CASSETTE_FORMATS(rko_cassette_formats)
|
||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED)
|
||||
MCFG_CASSETTE_INTERFACE("orion_cass")
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cass_list", "orion_cass")
|
||||
|
||||
MCFG_DEVICE_ADD("fd1793", FD1793, 8_MHz_XTAL / 8)
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd0", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd1", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd2", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd3", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","orion_flop")
|
||||
|
||||
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "orion_cart")
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list", "orion_cart")
|
||||
|
||||
/* internal ram */
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("256K")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_START(orion_state::orion128ms)
|
||||
void orion_state::orion128ms(machine_config &config)
|
||||
{
|
||||
orion128(config);
|
||||
MCFG_DEVICE_REMOVE("ppi8255_2")
|
||||
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, rk7007_8255_portc_r))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
MACHINE_CONFIG_END
|
||||
auto &ppi2(I8255A(config.replace(), "ppi8255_2"));
|
||||
ppi2.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi2.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi2.in_pc_callback().set(FUNC(radio86_state::rk7007_8255_portc_r));
|
||||
ppi2.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
}
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(orion_state::orionz80)
|
||||
MCFG_DEVICE_ADD("maincpu", Z80, 2500000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(orionz80_mem)
|
||||
MCFG_DEVICE_IO_MAP(orionz80_io)
|
||||
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", orion_state, orionz80_interrupt)
|
||||
void orion_z80_state::orionz80(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 2500000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &orion_z80_state::orionz80_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &orion_z80_state::orionz80_io);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(orion_z80_state::orionz80_interrupt));
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(orion_state, orionz80 )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(orion_state, orionz80 )
|
||||
auto &ppi1(I8255A(config, "ppi8255_1"));
|
||||
ppi1.in_pa_callback().set(FUNC(orion_z80_state::orion_romdisk_porta_r));
|
||||
ppi1.out_pb_callback().set(FUNC(orion_z80_state::orion_romdisk_portb_w));
|
||||
ppi1.out_pc_callback().set(FUNC(orion_z80_state::orion_romdisk_portc_w));
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255A, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(READ8(*this, orion_state, orion_romdisk_porta_r))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, orion_state, orion_romdisk_portb_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, orion_state, orion_romdisk_portc_w))
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, radio86_8255_portc_r2))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
auto &ppi2(I8255A(config, "ppi8255_2"));
|
||||
ppi2.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi2.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi2.in_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_r2));
|
||||
ppi2.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(50)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
|
||||
MCFG_SCREEN_SIZE(384, 256)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 0, 256-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(orion_state, screen_update_orion128)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(50);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
m_screen->set_size(384, 256);
|
||||
m_screen->set_visarea(0, 384-1, 0, 256-1);
|
||||
m_screen->set_screen_update(FUNC(orion_z80_state::screen_update_orion128));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 18)
|
||||
MCFG_PALETTE_INIT_OWNER(orion_state, orion128 )
|
||||
auto &palette(PALETTE(config, m_palette, 18));
|
||||
palette.set_init(palette_init_delegate(FUNC(orion_z80_state::palette_init_orion128), this));
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(orion_state,orion128)
|
||||
|
||||
MCFG_DEVICE_ADD("rtc", MC146818, 4.194304_MHz_XTAL)
|
||||
MC146818(config, "rtc", 4.194304_MHz_XTAL);
|
||||
|
||||
SPEAKER(config, "mono").front_center();
|
||||
SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 1.0);
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
MCFG_DEVICE_ADD("ay8912", AY8912, 1773400)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
|
||||
|
||||
MCFG_CASSETTE_ADD( "cassette" )
|
||||
MCFG_CASSETTE_FORMATS(rko_cassette_formats)
|
||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED)
|
||||
MCFG_CASSETTE_INTERFACE("orion_cass")
|
||||
auto &ay8912(AY8912(config, "ay8912", 1773400));
|
||||
ay8912.add_route(ALL_OUTPUTS, "mono", 1.00);
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cass_list", "orion_cass")
|
||||
auto &cassette(CASSETTE(config, "cassette"));
|
||||
cassette.set_formats(rko_cassette_formats);
|
||||
cassette.set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED);
|
||||
cassette.set_interface("orion_cass");
|
||||
|
||||
MCFG_DEVICE_ADD("fd1793", FD1793, 8_MHz_XTAL / 8)
|
||||
SOFTWARE_LIST(config, "cass_list").set_type("orion_cass", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd0", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd1", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd2", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd3", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","orion_flop")
|
||||
FD1793(config, m_fdc, 8_MHz_XTAL / 8);
|
||||
|
||||
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "orion_cart")
|
||||
FLOPPY_CONNECTOR(config, "fd0", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd1", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd2", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd3", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("orion_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list", "orion_cart")
|
||||
auto &cart(GENERIC_CARTSLOT(config, "cartslot"));
|
||||
generic_plain_slot(cart);
|
||||
cart.set_interface("orion_cart");
|
||||
|
||||
SOFTWARE_LIST(config, "cart_list").set_type("orion_cart", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
/* internal ram */
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("512K")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
MACHINE_CONFIG_END
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("512K");
|
||||
m_ram->set_default_value(0x00);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(orion_state::orionz80ms)
|
||||
void orion_z80_state::orionz80ms(machine_config &config)
|
||||
{
|
||||
orionz80(config);
|
||||
|
||||
MCFG_DEVICE_REMOVE("ppi8255_2")
|
||||
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, rk7007_8255_portc_r))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
MACHINE_CONFIG_END
|
||||
auto &ppi2(I8255A(config.replace(), "ppi8255_2"));
|
||||
ppi2.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi2.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi2.in_pc_callback().set(FUNC(radio86_state::rk7007_8255_portc_r));
|
||||
ppi2.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(orion_state::orionpro)
|
||||
MCFG_DEVICE_ADD("maincpu", Z80, 5000000)
|
||||
MCFG_DEVICE_PROGRAM_MAP(orionpro_mem)
|
||||
MCFG_DEVICE_IO_MAP(orionpro_io)
|
||||
void orion_pro_state::orionpro(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 5000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &orion_pro_state::orionpro_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &orion_pro_state::orionpro_io);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(orion_state, orionpro )
|
||||
auto &ppi1(I8255A(config, "ppi8255_1"));
|
||||
ppi1.in_pa_callback().set(FUNC(orion_pro_state::orion_romdisk_porta_r));
|
||||
ppi1.out_pb_callback().set(FUNC(orion_pro_state::orion_romdisk_portb_w));
|
||||
ppi1.out_pc_callback().set(FUNC(orion_pro_state::orion_romdisk_portc_w));
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255A, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(READ8(*this, orion_state, orion_romdisk_porta_r))
|
||||
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, orion_state, orion_romdisk_portb_w))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, orion_state, orion_romdisk_portc_w))
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, radio86_8255_portc_r2))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
auto &ppi2(I8255A(config, "ppi8255_2"));
|
||||
ppi2.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi2.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi2.in_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_r2));
|
||||
ppi2.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(50)
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
|
||||
MCFG_SCREEN_SIZE(384, 256)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 0, 256-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(orion_state, screen_update_orion128)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(50);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
m_screen->set_size(384, 256);
|
||||
m_screen->set_visarea(0, 384-1, 0, 256-1);
|
||||
m_screen->set_screen_update(FUNC(orion_pro_state::screen_update_orion128));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
MCFG_PALETTE_ADD("palette", 18)
|
||||
MCFG_PALETTE_INIT_OWNER(orion_state, orion128 )
|
||||
auto &palette(PALETTE(config, m_palette, 18));
|
||||
palette.set_init(palette_init_delegate(FUNC(orion_pro_state::palette_init_orion128), this));
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(orion_state,orion128)
|
||||
|
||||
SPEAKER(config, "mono").front_center();
|
||||
SPEAKER_SOUND(config, "speaker").add_route(ALL_OUTPUTS, "mono", 1.0);
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
MCFG_DEVICE_ADD("ay8912", AY8912, 1773400)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
|
||||
auto &ay8912(AY8912(config, "ay8912", 1773400));
|
||||
ay8912.add_route(ALL_OUTPUTS, "mono", 1.00);
|
||||
|
||||
MCFG_CASSETTE_ADD( "cassette" )
|
||||
MCFG_CASSETTE_FORMATS(rko_cassette_formats)
|
||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED)
|
||||
MCFG_CASSETTE_INTERFACE("orion_cass")
|
||||
auto &cassette(CASSETTE(config, "cassette"));
|
||||
cassette.set_formats(rko_cassette_formats);
|
||||
cassette.set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED);
|
||||
cassette.set_interface("orion_cass");
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cass_list", "orion_cass")
|
||||
SOFTWARE_LIST(config, "cass_list").set_type("orion_cass", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
MCFG_DEVICE_ADD("fd1793", FD1793, 8_MHz_XTAL / 8)
|
||||
FD1793(config, m_fdc, 8_MHz_XTAL / 8);
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd0", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd1", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd2", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("fd3", orion_floppies, "525qd", orion_state::orion_floppy_formats)
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","orionpro_flop")
|
||||
MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("flop128_list","orion_flop")
|
||||
FLOPPY_CONNECTOR(config, "fd0", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd1", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd2", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd3", "525qd", FLOPPY_525_QD, true, orion_floppy_formats);
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("orion_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "orion_cart")
|
||||
auto &cart(GENERIC_CARTSLOT(config, "cartslot"));
|
||||
generic_plain_slot(cart);
|
||||
cart.set_interface("orion_cart");
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cart_list", "orion_cart")
|
||||
SOFTWARE_LIST(config, "cart_list").set_type("orion_cart", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
/* internal ram */
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("512K")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
MACHINE_CONFIG_END
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("512K");
|
||||
m_ram->set_default_value(0x00);
|
||||
}
|
||||
|
||||
/* ROM definition */
|
||||
|
||||
@ -372,11 +363,11 @@ ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1990, orion128, 0, 0, orion128, radio86, orion_state, empty_init, "<unknown>", "Orion 128", 0 )
|
||||
COMP( 1990, orionms, orion128, 0, orion128ms, ms7007, orion_state, empty_init, "<unknown>", "Orion 128 (MS7007)", 0 )
|
||||
COMP( 1990, orionz80, orion128, 0, orionz80, radio86, orion_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II", 0 )
|
||||
COMP( 1990, orionide, orion128, 0, orionz80, radio86, orion_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II + IDE", 0 )
|
||||
COMP( 1990, orionzms, orion128, 0, orionz80ms, ms7007, orion_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II (MS7007)", 0 )
|
||||
COMP( 1990, orionidm, orion128, 0, orionz80ms, ms7007, orion_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II + IDE (MS7007)", 0 )
|
||||
COMP( 1994, orionpro, orion128, 0, orionpro, radio86, orion_state, empty_init, "<unknown>", "Orion Pro", 0 )
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1990, orion128, 0, 0, orion128, radio86, orion_state, empty_init, "<unknown>", "Orion 128", 0 )
|
||||
COMP( 1990, orionms, orion128, 0, orion128ms, ms7007, orion_state, empty_init, "<unknown>", "Orion 128 (MS7007)", 0 )
|
||||
COMP( 1990, orionz80, orion128, 0, orionz80, radio86, orion_z80_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II", 0 )
|
||||
COMP( 1990, orionide, orion128, 0, orionz80, radio86, orion_z80_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II + IDE", 0 )
|
||||
COMP( 1990, orionzms, orion128, 0, orionz80ms, ms7007, orion_z80_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II (MS7007)", 0 )
|
||||
COMP( 1990, orionidm, orion128, 0, orionz80ms, ms7007, orion_z80_state, empty_init, "<unknown>", "Orion 128 + Z80 Card II + IDE (MS7007)", 0 )
|
||||
COMP( 1994, orionpro, orion128, 0, orionpro, radio86, orion_pro_state, empty_init, "<unknown>", "Orion Pro", 0 )
|
||||
|
@ -145,11 +145,6 @@ FLOPPY_FORMATS_MEMBER( partner_state::floppy_formats )
|
||||
FLOPPY_SMX_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
|
||||
static void partner_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("525qd", FLOPPY_525_QD);
|
||||
}
|
||||
|
||||
/* F4 Character Displayer */
|
||||
static const gfx_layout partner_charlayout =
|
||||
{
|
||||
@ -169,66 +164,65 @@ static GFXDECODE_START( gfx_partner )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_START(partner_state::partner)
|
||||
void partner_state::partner(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
MCFG_DEVICE_ADD("maincpu", I8080, 16_MHz_XTAL / 9)
|
||||
MCFG_DEVICE_PROGRAM_MAP(partner_mem)
|
||||
I8080(config, m_maincpu, 16_MHz_XTAL / 9);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &partner_state::partner_mem);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(partner_state, partner )
|
||||
auto &ppi1(I8255(config, "ppi8255_1"));
|
||||
ppi1.out_pa_callback().set(FUNC(radio86_state::radio86_8255_porta_w2));
|
||||
ppi1.in_pb_callback().set(FUNC(radio86_state::radio86_8255_portb_r2));
|
||||
ppi1.in_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_r2));
|
||||
ppi1.out_pc_callback().set(FUNC(radio86_state::radio86_8255_portc_w2));
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
MCFG_I8255_IN_PORTB_CB(READ8(*this, radio86_state, radio86_8255_portb_r2))
|
||||
MCFG_I8255_IN_PORTC_CB(READ8(*this, radio86_state, radio86_8255_portc_r2))
|
||||
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, radio86_state, radio86_8255_portc_w2))
|
||||
|
||||
MCFG_DEVICE_ADD("i8275", I8275, 16_MHz_XTAL / 12)
|
||||
MCFG_I8275_CHARACTER_WIDTH(6)
|
||||
MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(partner_state, display_pixels)
|
||||
MCFG_I8275_DRQ_CALLBACK(WRITELINE("dma8257",i8257_device, dreq2_w))
|
||||
auto &i8275(I8275(config, "i8275", 16_MHz_XTAL / 12));
|
||||
i8275.set_character_width(6);
|
||||
i8275.set_display_callback(FUNC(partner_state::display_pixels), this);
|
||||
i8275.drq_wr_callback().set("dma8257", FUNC(i8257_device::dreq2_w));
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_UPDATE_DEVICE("i8275", i8275_device, screen_update)
|
||||
MCFG_SCREEN_REFRESH_RATE(50)
|
||||
MCFG_SCREEN_SIZE(78*6, 30*10)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 78*6-1, 0, 30*10-1)
|
||||
auto &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_screen_update("i8275", FUNC(i8275_device::screen_update));
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_size(78*6, 30*10);
|
||||
screen.set_visarea(0, 78*6-1, 0, 30*10-1);
|
||||
|
||||
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_partner)
|
||||
MCFG_PALETTE_ADD("palette", 3)
|
||||
MCFG_PALETTE_INIT_OWNER(partner_state,radio86)
|
||||
GFXDECODE(config, "gfxdecode", "palette", gfx_partner);
|
||||
auto &palette(PALETTE(config, m_palette, 3));
|
||||
palette.set_init(palette_init_delegate(FUNC(radio86_state::palette_init_radio86), this));
|
||||
|
||||
SPEAKER(config, "mono").front_center();
|
||||
WAVE(config, "wave", "cassette").add_route(ALL_OUTPUTS, "mono", 0.25);
|
||||
|
||||
MCFG_DEVICE_ADD("dma8257", I8257, 16_MHz_XTAL / 9)
|
||||
MCFG_I8257_OUT_HRQ_CB(WRITELINE(*this, partner_state, hrq_w))
|
||||
MCFG_I8257_IN_MEMR_CB(READ8(*this, radio86_state, memory_read_byte))
|
||||
MCFG_I8257_OUT_MEMW_CB(WRITE8(*this, radio86_state, memory_write_byte))
|
||||
MCFG_I8257_IN_IOR_0_CB(READ8("wd1793", fd1793_device, data_r))
|
||||
MCFG_I8257_OUT_IOW_0_CB(WRITE8("wd1793", fd1793_device, data_w))
|
||||
MCFG_I8257_OUT_IOW_2_CB(WRITE8("i8275", i8275_device, dack_w))
|
||||
MCFG_I8257_REVERSE_RW_MODE(1)
|
||||
auto &dma8257(I8257(config, "dma8257", 16_MHz_XTAL / 9));
|
||||
dma8257.out_hrq_cb().set(FUNC(partner_state::hrq_w));
|
||||
dma8257.in_memr_cb().set(FUNC(partner_state::memory_read_byte));
|
||||
dma8257.out_memw_cb().set(FUNC(partner_state::memory_write_byte));
|
||||
dma8257.in_ior_cb<0>().set("wd1793", FUNC(fd1793_device::data_r));
|
||||
dma8257.out_iow_cb<0>().set("wd1793", FUNC(fd1793_device::data_w));
|
||||
dma8257.out_iow_cb<2>().set("i8275", FUNC(i8275_device::dack_w));
|
||||
dma8257.set_reverse_rw_mode(true);
|
||||
|
||||
MCFG_CASSETTE_ADD( "cassette" )
|
||||
MCFG_CASSETTE_FORMATS(rkp_cassette_formats)
|
||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED)
|
||||
MCFG_CASSETTE_INTERFACE("partner_cass")
|
||||
auto &cassette(CASSETTE(config, "cassette"));
|
||||
cassette.set_formats(rkp_cassette_formats);
|
||||
cassette.set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED);
|
||||
cassette.set_interface("partner_cass");
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("cass_list","partner_cass")
|
||||
SOFTWARE_LIST(config, "cass_list").set_type("partner_cass", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
MCFG_DEVICE_ADD("wd1793", FD1793, 16_MHz_XTAL / 16)
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE("dma8257", i8257_device, dreq0_w))
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd1793:0", partner_floppies, "525qd", partner_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd1793:1", partner_floppies, "525qd", partner_state::floppy_formats)
|
||||
FD1793(config, "wd1793", 16_MHz_XTAL / 16);
|
||||
|
||||
MCFG_SOFTWARE_LIST_ADD("flop_list","partner_flop")
|
||||
FLOPPY_CONNECTOR(config, "fd0", "525qd", FLOPPY_525_QD, true, floppy_formats);
|
||||
FLOPPY_CONNECTOR(config, "fd1", "525qd", FLOPPY_525_QD, true, floppy_formats);
|
||||
|
||||
SOFTWARE_LIST(config, "flop_list").set_type("partner_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
|
||||
|
||||
/* internal ram */
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("64K")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
MACHINE_CONFIG_END
|
||||
RAM(config, m_ram);
|
||||
m_ram->set_default_size("64K");
|
||||
m_ram->set_default_value(0x00);
|
||||
}
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( partner )
|
||||
|
@ -209,12 +209,12 @@ WRITE_LINE_MEMBER(proteus_state::motor_w)
|
||||
|
||||
READ8_MEMBER(proteus_state::fdc_inv_r)
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(proteus_state::fdc_inv_w)
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
@ -467,7 +467,6 @@ MACHINE_CONFIG_START(radio86_state::radio86)
|
||||
MCFG_DEVICE_ADD("maincpu",I8080, XTAL(16'000'000) / 9)
|
||||
MCFG_DEVICE_PROGRAM_MAP(radio86_mem)
|
||||
MCFG_DEVICE_IO_MAP(radio86_io)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(radio86_state, radio86 )
|
||||
|
||||
MCFG_DEVICE_ADD("ppi8255_1", I8255, 0)
|
||||
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, radio86_state, radio86_8255_porta_w2))
|
||||
|
@ -2353,7 +2353,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
|
||||
|
||||
if(m_fdc)
|
||||
{
|
||||
track = m_fdc->track_r(space, 0);
|
||||
track = m_fdc->track_r();
|
||||
if(track == 0)
|
||||
tk00 = 1;
|
||||
|
||||
@ -2363,7 +2363,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
|
||||
last_dir = track > last_track ? 0 : 1; // see WD_FDC
|
||||
last_track = track;
|
||||
|
||||
fdc_status = m_fdc->read_status();
|
||||
fdc_status = m_fdc->status_r();
|
||||
|
||||
if ( (fdc_status & 0x80) == 0) // (see WD_FDC: S_WP = 0x40, S_NRDY = 0x80, S_TR00 = 0x04)
|
||||
fdc_ready = 1;
|
||||
@ -2404,7 +2404,7 @@ READ8_MEMBER(rainbow_state::z80_diskstatus_r)
|
||||
{
|
||||
data |= m_fdc->drq_r() ? 0x80 : 0x00;
|
||||
data |= m_fdc->intrq_r() ? 0x40 : 0x00;
|
||||
track = m_fdc->track_r(space, 0);
|
||||
track = m_fdc->track_r();
|
||||
|
||||
// D2: TG43 * LOW ACTIVE * : 0 = INDICATES TRACK > 43 SIGNAL FROM FDC TO DISK DRIVE.
|
||||
// (asserted when writing data to tracks 44 through 79)
|
||||
|
@ -84,7 +84,7 @@ READ8_MEMBER(samcoupe_state::samcoupe_disk_r)
|
||||
m_fdc->set_floppy(floppy);
|
||||
|
||||
/* bit 1 and 2 select the controller register */
|
||||
return m_fdc->gen_r(offset & 0x03);
|
||||
return m_fdc->read(offset & 0x03);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(samcoupe_state::samcoupe_disk_w)
|
||||
@ -98,7 +98,7 @@ WRITE8_MEMBER(samcoupe_state::samcoupe_disk_w)
|
||||
m_fdc->set_floppy(floppy);
|
||||
|
||||
/* bit 1 and 2 select the controller register */
|
||||
return m_fdc->gen_w(offset & 0x03, data);
|
||||
return m_fdc->write(offset & 0x03, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(samcoupe_state::samcoupe_pen_r)
|
||||
|
@ -447,12 +447,12 @@ QUICKLOAD_LOAD_MEMBER( smc777_state, smc777 )
|
||||
|
||||
READ8_MEMBER( smc777_state::fdc_r )
|
||||
{
|
||||
return m_fdc->read(space, offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( smc777_state::fdc_w )
|
||||
{
|
||||
m_fdc->write(space, offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
READ8_MEMBER( smc777_state::fdc_request_r )
|
||||
|
@ -106,7 +106,7 @@ READ8_MEMBER( tiki100_state::iorq_r )
|
||||
break;
|
||||
|
||||
case 0x04: // FLOP
|
||||
data = m_fdc->read(space, offset & 0x03);
|
||||
data = m_fdc->read(offset & 0x03);
|
||||
break;
|
||||
|
||||
case 0x05: // VIPS
|
||||
@ -149,7 +149,7 @@ WRITE8_MEMBER( tiki100_state::iorq_w )
|
||||
break;
|
||||
|
||||
case 0x04: // FLOP
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
break;
|
||||
|
||||
case 0x05: // VIPS
|
||||
|
@ -254,12 +254,12 @@ WRITE8_MEMBER( trs80m2_state::nmi_w )
|
||||
|
||||
READ8_MEMBER( trs80m2_state::fdc_r )
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( trs80m2_state::fdc_w )
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( trs80m16_state::tcl_w )
|
||||
|
@ -489,16 +489,16 @@ READ8_MEMBER(wicat_state::fdc_r)
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00:
|
||||
ret = m_fdc->status_r(space,0);
|
||||
ret = m_fdc->status_r();
|
||||
break;
|
||||
case 0x01:
|
||||
ret = m_fdc->track_r(space,0);
|
||||
ret = m_fdc->track_r();
|
||||
break;
|
||||
case 0x02:
|
||||
ret = m_fdc->sector_r(space,0);
|
||||
ret = m_fdc->sector_r();
|
||||
break;
|
||||
case 0x03:
|
||||
ret = m_fdc->data_r(space,0);
|
||||
ret = m_fdc->data_r();
|
||||
break;
|
||||
case 0x08:
|
||||
// Interrupt status (TODO, not part of the FD1795)
|
||||
@ -513,16 +513,16 @@ WRITE8_MEMBER(wicat_state::fdc_w)
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00:
|
||||
m_fdc->cmd_w(space,0,data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
case 0x01:
|
||||
m_fdc->track_w(space,0,data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
case 0x02:
|
||||
m_fdc->sector_w(space,0,data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
case 0x03:
|
||||
m_fdc->data_w(space,0,data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
case 0x08:
|
||||
// Interrupt disable / Drive select (TODO, not part of the FD1795)
|
||||
|
@ -733,13 +733,13 @@ READ8_MEMBER( x1_state::x1_fdc_r )
|
||||
switch(offset+0xff8)
|
||||
{
|
||||
case 0x0ff8:
|
||||
return m_fdc->status_r(space, offset);
|
||||
return m_fdc->status_r();
|
||||
case 0x0ff9:
|
||||
return m_fdc->track_r(space, offset);
|
||||
return m_fdc->track_r();
|
||||
case 0x0ffa:
|
||||
return m_fdc->sector_r(space, offset);
|
||||
return m_fdc->sector_r();
|
||||
case 0x0ffb:
|
||||
return m_fdc->data_r(space, offset);
|
||||
return m_fdc->data_r();
|
||||
case 0x0ffc:
|
||||
logerror("FDC: read FM type\n");
|
||||
return 0xff;
|
||||
@ -764,16 +764,16 @@ WRITE8_MEMBER( x1_state::x1_fdc_w )
|
||||
switch(offset+0xff8)
|
||||
{
|
||||
case 0x0ff8:
|
||||
m_fdc->cmd_w(space, offset,data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
case 0x0ff9:
|
||||
m_fdc->track_w(space, offset,data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
case 0x0ffa:
|
||||
m_fdc->sector_w(space, offset,data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
case 0x0ffb:
|
||||
m_fdc->data_w(space, offset,data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
|
||||
case 0x0ffc:
|
||||
|
@ -98,12 +98,12 @@ void xerox820ii_state::bankswitch(int bank)
|
||||
|
||||
READ8_MEMBER( xerox820_state::fdc_r )
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( xerox820_state::fdc_w )
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( xerox820_state::scroll_w )
|
||||
|
@ -268,8 +268,8 @@ void xor100_state::xor100_io(address_map &map)
|
||||
map(0x0b, 0x0b).portr("DSW0").w(COM5016_TAG, FUNC(com8116_device::stt_str_w));
|
||||
map(0x0c, 0x0f).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
|
||||
map(0xf8, 0xfb).lrw8("fdc",
|
||||
[this](address_space &space, offs_t offset, u8 mem_mask) { return m_fdc->read(space, offset, mem_mask) ^ 0xff; },
|
||||
[this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_fdc->write(space, offset, data ^ 0xff, mem_mask); });
|
||||
[this](offs_t offset) { return m_fdc->read(offset) ^ 0xff; },
|
||||
[this](offs_t offset, u8 data) { m_fdc->write(offset, data ^ 0xff); });
|
||||
map(0xfc, 0xfc).rw(FUNC(xor100_state::fdc_wait_r), FUNC(xor100_state::fdc_dcont_w));
|
||||
map(0xfd, 0xfd).w(FUNC(xor100_state::fdc_dsel_w));
|
||||
}
|
||||
|
@ -52,13 +52,10 @@ public:
|
||||
, m_screen(*this, "screen")
|
||||
{ }
|
||||
|
||||
void orionz80(machine_config &config);
|
||||
void orion128ms(machine_config &config);
|
||||
void orion128(machine_config &config);
|
||||
void orionpro(machine_config &config);
|
||||
void orionz80ms(machine_config &config);
|
||||
|
||||
private:
|
||||
protected:
|
||||
DECLARE_READ8_MEMBER(orion128_system_r);
|
||||
DECLARE_WRITE8_MEMBER(orion128_system_w);
|
||||
DECLARE_READ8_MEMBER(orion128_romdisk_r);
|
||||
@ -82,11 +79,8 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(orionpro_io_w);
|
||||
DECLARE_MACHINE_START(orion128);
|
||||
DECLARE_MACHINE_RESET(orion128);
|
||||
DECLARE_VIDEO_START(orion128);
|
||||
DECLARE_PALETTE_INIT(orion128);
|
||||
DECLARE_MACHINE_START(orionz80);
|
||||
DECLARE_MACHINE_RESET(orionz80);
|
||||
DECLARE_MACHINE_RESET(orionpro);
|
||||
virtual void video_start() override;
|
||||
uint32_t screen_update_orion128(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(orionz80_interrupt);
|
||||
DECLARE_READ8_MEMBER(orion_romdisk_porta_r);
|
||||
@ -142,6 +136,33 @@ private:
|
||||
void orionz80_switch_bank();
|
||||
void orion_set_video_mode(int width);
|
||||
void orionpro_bank_switch();
|
||||
virtual void machine_start() override;
|
||||
};
|
||||
|
||||
class orion_z80_state : public orion_state
|
||||
{
|
||||
public:
|
||||
orion_z80_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
orion_state(mconfig, type, tag) {}
|
||||
|
||||
void orionz80(machine_config &config);
|
||||
void orionz80ms(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
};
|
||||
|
||||
class orion_pro_state : public orion_state
|
||||
{
|
||||
public:
|
||||
orion_pro_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
orion_state(mconfig, type, tag) {}
|
||||
|
||||
void orionpro(machine_config &config);
|
||||
|
||||
protected:
|
||||
virtual void machine_reset() override;
|
||||
};
|
||||
|
||||
#endif // MAME_INCLUDES_ORION_H
|
||||
|
@ -28,13 +28,12 @@ public:
|
||||
{
|
||||
}
|
||||
|
||||
DECLARE_READ8_MEMBER(partner_floppy_r);
|
||||
DECLARE_WRITE8_MEMBER(partner_floppy_w);
|
||||
DECLARE_WRITE8_MEMBER(partner_win_memory_page_w);
|
||||
DECLARE_WRITE8_MEMBER(partner_mem_page_w);
|
||||
uint8_t partner_floppy_r(offs_t offset);
|
||||
void partner_floppy_w(offs_t offset, uint8_t data);
|
||||
void partner_win_memory_page_w(uint8_t data);
|
||||
void partner_mem_page_w(uint8_t data);
|
||||
void init_partner();
|
||||
DECLARE_MACHINE_START(partner);
|
||||
DECLARE_MACHINE_RESET(partner);
|
||||
|
||||
I8275_DRAW_CHARACTER_MEMBER(display_pixels);
|
||||
|
||||
DECLARE_FLOPPY_FORMATS( floppy_formats );
|
||||
@ -53,6 +52,8 @@ protected:
|
||||
required_device<ram_device> m_ram;
|
||||
required_device<fd1793_device> m_fdc;
|
||||
required_memory_bank_array<13> m_bank;
|
||||
|
||||
virtual void machine_reset() override;
|
||||
};
|
||||
|
||||
|
||||
|
@ -50,28 +50,27 @@ public:
|
||||
uint8_t m_romdisk_msb;
|
||||
uint8_t m_disk_sel;
|
||||
const uint8_t *m_charmap;
|
||||
DECLARE_READ8_MEMBER(radio_cpu_state_r);
|
||||
DECLARE_READ8_MEMBER(radio_io_r);
|
||||
DECLARE_WRITE8_MEMBER(radio_io_w);
|
||||
DECLARE_WRITE8_MEMBER(radio86_pagesel);
|
||||
uint8_t radio_cpu_state_r();
|
||||
uint8_t radio_io_r(offs_t offset);
|
||||
void radio_io_w(offs_t offset, uint8_t data);
|
||||
void radio86_pagesel(uint8_t data);
|
||||
void init_radioram();
|
||||
void init_radio86();
|
||||
DECLARE_MACHINE_RESET(radio86);
|
||||
DECLARE_PALETTE_INIT(radio86);
|
||||
DECLARE_READ8_MEMBER(radio86_8255_portb_r2);
|
||||
DECLARE_READ8_MEMBER(radio86_8255_portc_r2);
|
||||
DECLARE_WRITE8_MEMBER(radio86_8255_porta_w2);
|
||||
DECLARE_WRITE8_MEMBER(radio86_8255_portc_w2);
|
||||
DECLARE_READ8_MEMBER(rk7007_8255_portc_r);
|
||||
DECLARE_READ8_MEMBER(kr03_8255_portb_r2);
|
||||
DECLARE_WRITE_LINE_MEMBER(hrq_w);
|
||||
uint8_t radio86_8255_portb_r2();
|
||||
uint8_t radio86_8255_portc_r2();
|
||||
void radio86_8255_porta_w2(uint8_t data);
|
||||
void radio86_8255_portc_w2(uint8_t data);
|
||||
uint8_t rk7007_8255_portc_r();
|
||||
uint8_t kr03_8255_portb_r2();
|
||||
void hrq_w(int state);
|
||||
DECLARE_READ8_MEMBER(radio86rom_romdisk_porta_r);
|
||||
DECLARE_READ8_MEMBER(radio86ram_romdisk_porta_r);
|
||||
DECLARE_WRITE8_MEMBER(radio86_romdisk_portb_w);
|
||||
DECLARE_WRITE8_MEMBER(radio86_romdisk_portc_w);
|
||||
DECLARE_WRITE8_MEMBER(mikrosha_8255_font_page_w);
|
||||
DECLARE_READ8_MEMBER(memory_read_byte);
|
||||
DECLARE_WRITE8_MEMBER(memory_write_byte);
|
||||
uint8_t radio86ram_romdisk_porta_r();
|
||||
void radio86_romdisk_portb_w(uint8_t data);
|
||||
void radio86_romdisk_portc_w(uint8_t data);
|
||||
void mikrosha_8255_font_page_w(uint8_t data);
|
||||
uint8_t memory_read_byte(offs_t offset);
|
||||
void memory_write_byte(offs_t offset, uint8_t data);
|
||||
I8275_DRAW_CHARACTER_MEMBER(display_pixels);
|
||||
required_device<cpu_device> m_maincpu;
|
||||
|
||||
@ -104,6 +103,8 @@ protected:
|
||||
optional_ioport_array<8> m_io_cline;
|
||||
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
void radio86_init_keyboard();
|
||||
public:
|
||||
required_device<palette_device> m_palette;
|
||||
|
@ -733,7 +733,7 @@ READ32_MEMBER(archimedes_state::archimedes_ioc_r)
|
||||
if (m_fdc)
|
||||
{
|
||||
//printf("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
|
||||
return m_fdc->gen_r((ioc_addr >> 2) & 0x03);
|
||||
return m_fdc->read((ioc_addr >> 2) & 0x03);
|
||||
} else {
|
||||
logerror("Read from FDC device?\n");
|
||||
return 0;
|
||||
@ -796,7 +796,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_ioc_w)
|
||||
if (m_fdc)
|
||||
{
|
||||
//printf("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
|
||||
m_fdc->gen_w((ioc_addr >> 2) & 0x03, data);
|
||||
m_fdc->write((ioc_addr >> 2) & 0x03, data);
|
||||
return;
|
||||
}
|
||||
else
|
||||
|
@ -425,8 +425,8 @@ READ8_MEMBER(bbc_state::bbcm_r)
|
||||
if ((myo>=0x18) && (myo<=0x1f)) return m_upd7002 ? m_upd7002->read(space, myo-0x18) : 0xfe; /* A to D converter */
|
||||
if ((myo>=0x20) && (myo<=0x23)) return 0xfe; /* VideoULA */
|
||||
if ((myo>=0x24) && (myo<=0x27)) return bbcm_wd177xl_read(space, myo-0x24); /* 177x Control Latch */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) return m_wd1770->read(space, myo-0x28); /* 1770 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) return m_wd1772->read(space, myo-0x28); /* 1772 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) return m_wd1770->read(myo-0x28); /* 1770 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) return m_wd1772->read(myo-0x28); /* 1772 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f)) return 0xfe; /* No Controller */
|
||||
if ((myo>=0x30) && (myo<=0x33)) return 0xfe;
|
||||
if ((myo>=0x34) && (myo<=0x37)) return bbcm_acccon_r(space, myo-0x34); /* ACCCON */
|
||||
@ -459,9 +459,9 @@ WRITE8_MEMBER(bbc_state::bbcm_w)
|
||||
if ((myo>=0x18) && (myo<=0x1f) && (m_upd7002)) m_upd7002->write(space, myo-0x18, data); /* A to D converter */
|
||||
if ((myo>=0x20) && (myo<=0x23)) bbc_videoULA_w(space, myo-0x20, data); /* VideoULA */
|
||||
if ((myo>=0x24) && (myo<=0x27) && (m_wd1770)) bbcm_wd1770l_write(space, myo-0x24, data); /* disc control latch */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) m_wd1770->write(space, myo-0x28, data); /* 1770 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1770)) m_wd1770->write(myo-0x28, data); /* 1770 Controller */
|
||||
if ((myo>=0x24) && (myo<=0x27) && (m_wd1772)) bbcm_wd1772l_write(space, myo-0x24, data); /* disc control latch */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) m_wd1772->write(space, myo-0x28, data); /* 1772 Controller */
|
||||
if ((myo>=0x28) && (myo<=0x2f) && (m_wd1772)) m_wd1772->write(myo-0x28, data); /* 1772 Controller */
|
||||
if ((myo>=0x30) && (myo<=0x33)) page_selectbm_w(space, myo-0x30, data); /* ROMSEL */
|
||||
if ((myo>=0x34) && (myo<=0x37)) bbcm_acccon_w(space, myo-0x34, data); /* ACCCON */
|
||||
//if ((myo>=0x38) && (myo<=0x3f)) /* NC ?? */
|
||||
|
@ -72,7 +72,7 @@ void beta_disk_device::disable()
|
||||
READ8_MEMBER(beta_disk_device::status_r)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
return m_wd179x->status_r(space, 0);
|
||||
return m_wd179x->status_r();
|
||||
} else {
|
||||
return 0xff;
|
||||
}
|
||||
@ -81,7 +81,7 @@ READ8_MEMBER(beta_disk_device::status_r)
|
||||
READ8_MEMBER(beta_disk_device::track_r)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
return m_wd179x->track_r(space, 0);
|
||||
return m_wd179x->track_r();
|
||||
} else {
|
||||
return 0xff;
|
||||
}
|
||||
@ -90,7 +90,7 @@ READ8_MEMBER(beta_disk_device::track_r)
|
||||
READ8_MEMBER(beta_disk_device::sector_r)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
return m_wd179x->sector_r(space, 0);
|
||||
return m_wd179x->sector_r();
|
||||
} else {
|
||||
return 0xff;
|
||||
}
|
||||
@ -99,7 +99,7 @@ READ8_MEMBER(beta_disk_device::sector_r)
|
||||
READ8_MEMBER(beta_disk_device::data_r)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
return m_wd179x->data_r(space, 0);
|
||||
return m_wd179x->data_r();
|
||||
} else {
|
||||
return 0xff;
|
||||
}
|
||||
@ -146,28 +146,28 @@ WRITE8_MEMBER(beta_disk_device::param_w)
|
||||
WRITE8_MEMBER(beta_disk_device::command_w)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
m_wd179x->cmd_w(space, 0, data);
|
||||
m_wd179x->cmd_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(beta_disk_device::track_w)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
m_wd179x->track_w(space, 0, data);
|
||||
m_wd179x->track_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(beta_disk_device::sector_w)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
m_wd179x->sector_w(space, 0, data);
|
||||
m_wd179x->sector_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(beta_disk_device::data_w)
|
||||
{
|
||||
if (m_betadisk_active==1) {
|
||||
m_wd179x->data_w(space, 0, data);
|
||||
m_wd179x->data_w(data);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -811,13 +811,13 @@ WRITE_LINE_MEMBER( dgn_beta_state::dgnbeta_fdc_drq_w )
|
||||
|
||||
READ8_MEMBER( dgn_beta_state::dgnbeta_wd2797_r )
|
||||
{
|
||||
return m_fdc->read(space, offset & 0x03);
|
||||
return m_fdc->read(offset & 0x03);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( dgn_beta_state::dgnbeta_wd2797_w )
|
||||
{
|
||||
m_wd2797_written = 1;
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
}
|
||||
|
||||
/* Scan physical keyboard into Keyboard array */
|
||||
|
@ -147,19 +147,19 @@ READ8_MEMBER( dragon_alpha_state::ff20_read )
|
||||
break;
|
||||
|
||||
case 12:
|
||||
result = m_fdc->data_r(space, 0);
|
||||
result = m_fdc->data_r();
|
||||
break;
|
||||
|
||||
case 13:
|
||||
result = m_fdc->sector_r(space, 0);
|
||||
result = m_fdc->sector_r();
|
||||
break;
|
||||
|
||||
case 14:
|
||||
result = m_fdc->track_r(space, 0);
|
||||
result = m_fdc->track_r();
|
||||
break;
|
||||
|
||||
case 15:
|
||||
result = m_fdc->status_r(space, 0);
|
||||
result = m_fdc->status_r();
|
||||
break;
|
||||
}
|
||||
|
||||
@ -189,16 +189,16 @@ WRITE8_MEMBER( dragon_alpha_state::ff20_write )
|
||||
break;
|
||||
|
||||
case 12:
|
||||
m_fdc->data_w(space, 0, data);
|
||||
m_fdc->data_w(data);
|
||||
break;
|
||||
case 13:
|
||||
m_fdc->sector_w(space, 0, data);
|
||||
m_fdc->sector_w(data);
|
||||
break;
|
||||
case 14:
|
||||
m_fdc->track_w(space, 0, data);
|
||||
m_fdc->track_w(data);
|
||||
break;
|
||||
case 15:
|
||||
m_fdc->cmd_w(space, 0, data);
|
||||
m_fdc->cmd_w(data);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -12,51 +12,6 @@
|
||||
|
||||
#include <vector>
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_ESQPANEL1X22_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, ESQPANEL1X22, 0)
|
||||
|
||||
#define MCFG_ESQPANEL1X22_REPLACE(_tag) \
|
||||
MCFG_DEVICE_REPLACE(_tag, ESQPANEL1X22, 0)
|
||||
|
||||
#define MCFG_ESQPANEL1X22_REMOVE(_tag) \
|
||||
MCFG_DEVICE_REMOVE(_tag)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, ESQPANEL2X40, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_REPLACE(_tag) \
|
||||
MCFG_DEVICE_REPLACE(_tag, ESQPANEL2X40, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_REMOVE(_tag) \
|
||||
MCFG_DEVICE_REMOVE(_tag)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_VFX_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, ESQPANEL2X40_VFX, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_VFX_REPLACE(_tag) \
|
||||
MCFG_DEVICE_REPLACE(_tag, ESQPANEL2X40_VFX, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X40_VFX_REMOVE(_tag) \
|
||||
MCFG_DEVICE_REMOVE(_tag)
|
||||
|
||||
#define MCFG_ESQPANEL2X16_SQ1_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, ESQPANEL2X16_SQ1, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X16_SQ1_REPLACE(_tag) \
|
||||
MCFG_DEVICE_REPLACE(_tag, ESQPANEL2X16_SQ1, 0)
|
||||
|
||||
#define MCFG_ESQPANEL2X16_SQ1_REMOVE(_tag) \
|
||||
MCFG_DEVICE_REMOVE(_tag)
|
||||
|
||||
#define MCFG_ESQPANEL_TX_CALLBACK(_write) \
|
||||
downcast<esqpanel_device &>(*device).set_tx_wr_callback(DEVCB_##_write);
|
||||
|
||||
#define MCFG_ESQPANEL_ANALOG_CALLBACK(_write) \
|
||||
downcast<esqpanel_device &>(*device).set_analog_wr_callback(DEVCB_##_write);
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
@ -71,9 +26,8 @@ namespace esqpanel {
|
||||
class esqpanel_device : public device_t, public device_serial_interface
|
||||
{
|
||||
public:
|
||||
template <class Object> devcb_base &set_tx_wr_callback(Object &&cb) { return m_write_tx.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
template <class Object> devcb_base &set_analog_wr_callback(Object &&cb) { return m_write_analog.set_callback(std::forward<Object>(cb)); }
|
||||
auto write_tx() { return m_write_tx.bind(); }
|
||||
auto write_analog() { return m_write_analog.bind(); }
|
||||
|
||||
void xmit_char(uint8_t data);
|
||||
void set_analog_value(offs_t offset, uint16_t value);
|
||||
@ -124,7 +78,7 @@ private:
|
||||
|
||||
class esqpanel1x22_device : public esqpanel_device {
|
||||
public:
|
||||
esqpanel1x22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esqpanel1x22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -136,7 +90,7 @@ protected:
|
||||
|
||||
class esqpanel2x40_device : public esqpanel_device {
|
||||
public:
|
||||
esqpanel2x40_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esqpanel2x40_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -148,7 +102,7 @@ protected:
|
||||
|
||||
class esqpanel2x40_vfx_device : public esqpanel_device {
|
||||
public:
|
||||
esqpanel2x40_vfx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esqpanel2x40_vfx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -168,7 +122,7 @@ private:
|
||||
|
||||
class esqpanel2x40_sq1_device : public esqpanel_device {
|
||||
public:
|
||||
esqpanel2x40_sq1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esqpanel2x40_sq1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
@ -181,7 +135,7 @@ protected:
|
||||
// --- SQ1 - Parduz --------------------------------------------------------------------------------------------------------------------------
|
||||
class esqpanel2x16_sq1_device : public esqpanel_device {
|
||||
public:
|
||||
esqpanel2x16_sq1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
esqpanel2x16_sq1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
protected:
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
@ -149,12 +149,12 @@ WRITE8_MEMBER( mbc55x_state::vram_page_w )
|
||||
|
||||
READ8_MEMBER(mbc55x_state::mbc55x_disk_r)
|
||||
{
|
||||
return m_fdc->read(space, offset>>1);
|
||||
return m_fdc->read(offset>>1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mbc55x_state::mbc55x_disk_w)
|
||||
{
|
||||
m_fdc->write(space, offset>>1, data);
|
||||
m_fdc->write(offset>>1, data);
|
||||
}
|
||||
|
||||
|
||||
|
@ -42,7 +42,7 @@ WRITE8_MEMBER(orion_state::orion_romdisk_portc_w)
|
||||
m_romdisk_msb = data;
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(orion_state,orion128)
|
||||
void orion_state::machine_start()
|
||||
{
|
||||
m_video_mode_mask = 7;
|
||||
}
|
||||
@ -165,14 +165,14 @@ READ8_MEMBER(orion_state::orion128_floppy_r)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
case 0x0 :
|
||||
case 0x10 : return m_fdc->status_r(space, 0);
|
||||
case 0x1 :
|
||||
case 0x11 : return m_fdc->track_r(space, 0);
|
||||
case 0x0 :
|
||||
case 0x10 : return m_fdc->status_r();
|
||||
case 0x1 :
|
||||
case 0x11 : return m_fdc->track_r();
|
||||
case 0x2 :
|
||||
case 0x12 : return m_fdc->sector_r(space, 0);
|
||||
case 0x12 : return m_fdc->sector_r();
|
||||
case 0x3 :
|
||||
case 0x13 : return m_fdc->data_r(space, 0);
|
||||
case 0x13 : return m_fdc->data_r();
|
||||
}
|
||||
return 0xff;
|
||||
}
|
||||
@ -181,14 +181,14 @@ WRITE8_MEMBER(orion_state::orion128_floppy_w)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
case 0x0 :
|
||||
case 0x10 : m_fdc->cmd_w(space, 0,data); break;
|
||||
case 0x1 :
|
||||
case 0x11 : m_fdc->track_w(space, 0,data);break;
|
||||
case 0x0 :
|
||||
case 0x10 : m_fdc->cmd_w(data); break;
|
||||
case 0x1 :
|
||||
case 0x11 : m_fdc->track_w(data);break;
|
||||
case 0x2 :
|
||||
case 0x12 : m_fdc->sector_w(space, 0,data);break;
|
||||
case 0x12 : m_fdc->sector_w(data);break;
|
||||
case 0x3 :
|
||||
case 0x13 : m_fdc->data_w(space, 0,data);break;
|
||||
case 0x13 : m_fdc->data_w(data);break;
|
||||
case 0x4 :
|
||||
case 0x14 :
|
||||
case 0x20 : orion_disk_control_w(space, offset, data);break;
|
||||
@ -219,7 +219,7 @@ WRITE8_MEMBER(orion_state::orionz80_floppy_rtc_w)
|
||||
}
|
||||
|
||||
|
||||
MACHINE_START_MEMBER(orion_state,orionz80)
|
||||
void orion_z80_state::machine_start()
|
||||
{
|
||||
m_video_mode_mask = 7;
|
||||
}
|
||||
@ -306,7 +306,7 @@ WRITE8_MEMBER(orion_state::orionz80_dispatcher_w)
|
||||
orionz80_switch_bank();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(orion_state,orionz80)
|
||||
void orion_z80_state::machine_reset()
|
||||
{
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
@ -314,19 +314,19 @@ MACHINE_RESET_MEMBER(orion_state,orionz80)
|
||||
space.install_write_bank(0x4000, 0xefff, "bank2");
|
||||
space.install_write_bank(0xf000, 0xf3ff, "bank3");
|
||||
|
||||
space.install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_state::orion128_system_w),this));
|
||||
space.install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_state::orion128_romdisk_w),this));
|
||||
space.install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_state::orionz80_floppy_rtc_w),this));
|
||||
space.install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_state::orion128_system_r),this));
|
||||
space.install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_state::orion128_romdisk_r),this));
|
||||
space.install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_state::orionz80_floppy_rtc_r),this));
|
||||
space.install_write_handler(0xf400, 0xf4ff, write8_delegate(FUNC(orion_z80_state::orion128_system_w),this));
|
||||
space.install_write_handler(0xf500, 0xf5ff, write8_delegate(FUNC(orion_z80_state::orion128_romdisk_w),this));
|
||||
space.install_write_handler(0xf700, 0xf7ff, write8_delegate(FUNC(orion_z80_state::orionz80_floppy_rtc_w),this));
|
||||
space.install_read_handler(0xf400, 0xf4ff, read8_delegate(FUNC(orion_z80_state::orion128_system_r),this));
|
||||
space.install_read_handler(0xf500, 0xf5ff, read8_delegate(FUNC(orion_z80_state::orion128_romdisk_r),this));
|
||||
space.install_read_handler(0xf700, 0xf7ff, read8_delegate(FUNC(orion_z80_state::orionz80_floppy_rtc_r),this));
|
||||
|
||||
space.install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_state::orion128_video_mode_w),this));
|
||||
space.install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_state::orionz80_memory_page_w),this));
|
||||
space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_state::orion128_video_page_w),this));
|
||||
space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_state::orionz80_dispatcher_w),this));
|
||||
space.install_write_handler(0xf800, 0xf8ff, write8_delegate(FUNC(orion_z80_state::orion128_video_mode_w),this));
|
||||
space.install_write_handler(0xf900, 0xf9ff, write8_delegate(FUNC(orion_z80_state::orionz80_memory_page_w),this));
|
||||
space.install_write_handler(0xfa00, 0xfaff, write8_delegate(FUNC(orion_z80_state::orion128_video_page_w),this));
|
||||
space.install_write_handler(0xfb00, 0xfbff, write8_delegate(FUNC(orion_z80_state::orionz80_dispatcher_w),this));
|
||||
space.unmap_write(0xfc00, 0xfeff);
|
||||
space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_state::orionz80_sound_w),this));
|
||||
space.install_write_handler(0xff00, 0xffff, write8_delegate(FUNC(orion_z80_state::orionz80_sound_w),this));
|
||||
|
||||
|
||||
m_bank1->set_base(m_region_maincpu->base() + 0xf800);
|
||||
@ -496,7 +496,7 @@ WRITE8_MEMBER(orion_state::orionpro_memory_page_w)
|
||||
orionpro_bank_switch();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(orion_state,orionpro)
|
||||
void orion_pro_state::machine_reset()
|
||||
{
|
||||
radio86_init_keyboard();
|
||||
|
||||
@ -532,10 +532,10 @@ READ8_MEMBER(orion_state::orionpro_io_r)
|
||||
case 0x08 : return m_orionpro_page;
|
||||
case 0x09 : return m_orionpro_rom2_segment;
|
||||
case 0x0a : return m_orionpro_dispatcher;
|
||||
case 0x10 : return m_fdc->status_r(space, 0);
|
||||
case 0x11 : return m_fdc->track_r(space, 0);
|
||||
case 0x12 : return m_fdc->sector_r(space, 0);
|
||||
case 0x13 : return m_fdc->data_r(space, 0);
|
||||
case 0x10 : return m_fdc->status_r();
|
||||
case 0x11 : return m_fdc->track_r();
|
||||
case 0x12 : return m_fdc->sector_r();
|
||||
case 0x13 : return m_fdc->data_r();
|
||||
case 0x18 :
|
||||
case 0x19 :
|
||||
case 0x1a :
|
||||
@ -563,10 +563,10 @@ WRITE8_MEMBER(orion_state::orionpro_io_w)
|
||||
case 0x08 : m_orionpro_page = data; orionpro_bank_switch(); break;
|
||||
case 0x09 : m_orionpro_rom2_segment = data; orionpro_bank_switch(); break;
|
||||
case 0x0a : m_orionpro_dispatcher = data; orionpro_bank_switch(); break;
|
||||
case 0x10 : m_fdc->cmd_w(space, 0,data); break;
|
||||
case 0x11 : m_fdc->track_w(space, 0,data);break;
|
||||
case 0x12 : m_fdc->sector_w(space, 0,data);break;
|
||||
case 0x13 : m_fdc->data_w(space, 0,data);break;
|
||||
case 0x10 : m_fdc->cmd_w(data); break;
|
||||
case 0x11 : m_fdc->track_w(data);break;
|
||||
case 0x12 : m_fdc->sector_w(data);break;
|
||||
case 0x13 : m_fdc->data_w(data);break;
|
||||
case 0x14 : orion_disk_control_w(space, 9, data);break;
|
||||
case 0x18 :
|
||||
case 0x19 :
|
||||
|
@ -35,7 +35,7 @@ READ8_MEMBER( osborne1_state::bank_2xxx_3xxx_r )
|
||||
// simulated by ANDing all the values together.
|
||||
uint8_t data = 0xFF;
|
||||
if ((offset & 0x900) == 0x100) // Floppy
|
||||
data &= m_fdc->read(space, offset & 0x03);
|
||||
data &= m_fdc->read(offset & 0x03);
|
||||
if ((offset & 0x900) == 0x900) // IEEE488 PIA
|
||||
data &= m_pia0->read(space, offset & 0x03);
|
||||
if ((offset & 0xA00) == 0x200) // Keyboard
|
||||
@ -72,7 +72,7 @@ WRITE8_MEMBER( osborne1_state::bank_2xxx_3xxx_w )
|
||||
{
|
||||
// Handle writes to the I/O area
|
||||
if ((offset & 0x900) == 0x100) // Floppy
|
||||
m_fdc->write(space, offset & 0x03, data);
|
||||
m_fdc->write(offset & 0x03, data);
|
||||
if ((offset & 0x900) == 0x900) // IEEE488 PIA
|
||||
m_pia0->write(space, offset & 0x03, data);
|
||||
if ((offset & 0xA00) == 0xA00) // Serial
|
||||
|
@ -49,27 +49,29 @@ void partner_state::partner_window_2(uint8_t bank_num, uint16_t offset,uint8_t *
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(partner_state::partner_floppy_r){
|
||||
uint8_t partner_state::partner_floppy_r(offs_t offset)
|
||||
{
|
||||
if (offset<0x100) {
|
||||
switch(offset & 3) {
|
||||
case 0x00 : return m_fdc->status_r(space, 0);
|
||||
case 0x01 : return m_fdc->track_r(space, 0);
|
||||
case 0x02 : return m_fdc->sector_r(space, 0);
|
||||
case 0x00 : return m_fdc->status_r();
|
||||
case 0x01 : return m_fdc->track_r();
|
||||
case 0x02 : return m_fdc->sector_r();
|
||||
default :
|
||||
return m_fdc->data_r(space, 0);
|
||||
return m_fdc->data_r();
|
||||
}
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(partner_state::partner_floppy_w){
|
||||
void partner_state::partner_floppy_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset<0x100) {
|
||||
switch(offset & 3) {
|
||||
case 0x00 : m_fdc->cmd_w(space, 0,data); break;
|
||||
case 0x01 : m_fdc->track_w(space, 0,data);break;
|
||||
case 0x02 : m_fdc->sector_w(space, 0,data);break;
|
||||
default : m_fdc->data_w(space, 0,data);break;
|
||||
case 0x00 : m_fdc->cmd_w(data); break;
|
||||
case 0x01 : m_fdc->track_w(data);break;
|
||||
case 0x02 : m_fdc->sector_w(data);break;
|
||||
default : m_fdc->data_w(data);break;
|
||||
}
|
||||
} else {
|
||||
floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
|
||||
@ -99,8 +101,8 @@ void partner_state::partner_iomap_bank(uint8_t *rom)
|
||||
switch(m_win_mem_page) {
|
||||
case 2 :
|
||||
// FDD
|
||||
space.install_write_handler(0xdc00, 0xddff, write8_delegate(FUNC(partner_state::partner_floppy_w),this));
|
||||
space.install_read_handler (0xdc00, 0xddff, read8_delegate(FUNC(partner_state::partner_floppy_r),this));
|
||||
space.install_write_handler(0xdc00, 0xddff, write8sm_delegate(FUNC(partner_state::partner_floppy_w),this));
|
||||
space.install_read_handler (0xdc00, 0xddff, read8sm_delegate(FUNC(partner_state::partner_floppy_r),this));
|
||||
break;
|
||||
case 4 :
|
||||
// Timer
|
||||
@ -314,13 +316,13 @@ void partner_state::partner_bank_switch()
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(partner_state::partner_win_memory_page_w)
|
||||
void partner_state::partner_win_memory_page_w(uint8_t data)
|
||||
{
|
||||
m_win_mem_page = ~data;
|
||||
partner_bank_switch();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(partner_state::partner_mem_page_w)
|
||||
void partner_state::partner_mem_page_w(uint8_t data)
|
||||
{
|
||||
m_mem_page = (data >> 4) & 0x0f;
|
||||
partner_bank_switch();
|
||||
@ -346,7 +348,7 @@ I8275_DRAW_CHARACTER_MEMBER(partner_state::display_pixels)
|
||||
}
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(partner_state,partner)
|
||||
void partner_state::machine_reset()
|
||||
{
|
||||
m_mem_page = 0;
|
||||
m_win_mem_page = 0;
|
||||
|
@ -156,7 +156,7 @@ READ8_MEMBER(pk8020_state::devices_r)
|
||||
case 1 : return m_rs232->status_r(space,0);
|
||||
}
|
||||
break;
|
||||
case 0x18: return m_wd1793->read(space, offset & 0x03);
|
||||
case 0x18: return m_wd1793->read(offset & 0x03);
|
||||
case 0x20: switch(offset & 1) {
|
||||
case 0 : return m_lan->data_r(space,0);
|
||||
case 1 : return m_lan->status_r(space,0);
|
||||
@ -181,7 +181,7 @@ WRITE8_MEMBER(pk8020_state::devices_w)
|
||||
}
|
||||
break;
|
||||
case 0x18:
|
||||
m_wd1793->write(space, offset & 0x03, data);
|
||||
m_wd1793->write(offset & 0x03, data);
|
||||
break;
|
||||
case 0x20: switch(offset & 1) {
|
||||
case 0 : m_lan->data_w(space,0,data); break;
|
||||
|
@ -211,12 +211,12 @@ WRITE_LINE_MEMBER(polydev_state::motor_w)
|
||||
|
||||
READ8_MEMBER(polydev_state::fdc_inv_r)
|
||||
{
|
||||
return m_fdc->gen_r(offset) ^ 0xff;
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(polydev_state::fdc_inv_w)
|
||||
{
|
||||
m_fdc->gen_w(offset, data ^ 0xff);
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
@ -40,7 +40,7 @@ void radio86_state::init_radioram()
|
||||
memset(m_radio_ram_disk.get(),0,0x20000);
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::radio86_8255_portb_r2)
|
||||
uint8_t radio86_state::radio86_8255_portb_r2()
|
||||
{
|
||||
uint8_t key = 0xff;
|
||||
for (int i = 0; i < 8; i++)
|
||||
@ -52,7 +52,7 @@ READ8_MEMBER(radio86_state::radio86_8255_portb_r2)
|
||||
return key;
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::kr03_8255_portb_r2)
|
||||
uint8_t radio86_state::kr03_8255_portb_r2()
|
||||
{
|
||||
uint8_t key = 0xff;
|
||||
uint16_t data;
|
||||
@ -70,7 +70,7 @@ READ8_MEMBER(radio86_state::kr03_8255_portb_r2)
|
||||
return key;
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::radio86_8255_portc_r2)
|
||||
uint8_t radio86_state::radio86_8255_portc_r2()
|
||||
{
|
||||
double level = m_cassette->input();
|
||||
uint8_t dat = m_io_line[8]->read();
|
||||
@ -80,18 +80,18 @@ READ8_MEMBER(radio86_state::radio86_8255_portc_r2)
|
||||
return dat;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio86_8255_porta_w2)
|
||||
void radio86_state::radio86_8255_porta_w2(uint8_t data)
|
||||
{
|
||||
m_keyboard_mask = data ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio86_8255_portc_w2)
|
||||
void radio86_state::radio86_8255_portc_w2(uint8_t data)
|
||||
{
|
||||
m_cassette->output(data & 0x01 ? 1 : -1);
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(radio86_state::rk7007_8255_portc_r)
|
||||
uint8_t radio86_state::rk7007_8255_portc_r()
|
||||
{
|
||||
double level = m_cassette->input();
|
||||
uint8_t key = 0xff;
|
||||
@ -108,7 +108,7 @@ READ8_MEMBER(radio86_state::rk7007_8255_portc_r)
|
||||
return key;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(radio86_state::hrq_w)
|
||||
void radio86_state::hrq_w(int state)
|
||||
{
|
||||
/* HACK - this should be connected to the BUSREQ line of Z80 */
|
||||
m_maincpu->set_input_line(INPUT_LINE_HALT, state);
|
||||
@ -117,13 +117,13 @@ WRITE_LINE_MEMBER(radio86_state::hrq_w)
|
||||
m_dma8257->hlda_w(state);
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::memory_read_byte)
|
||||
uint8_t radio86_state::memory_read_byte(offs_t offset)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
|
||||
return prog_space.read_byte(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::memory_write_byte)
|
||||
void radio86_state::memory_write_byte(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
|
||||
return prog_space.write_byte(offset, data);
|
||||
@ -142,23 +142,23 @@ void radio86_state::device_timer(emu_timer &timer, device_timer_id id, int param
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(radio86_state::radio_cpu_state_r)
|
||||
uint8_t radio86_state::radio_cpu_state_r()
|
||||
{
|
||||
// FIXME: the driver should handler the status callback rather than accessing this through the state interface
|
||||
return m_maincpu->state_int(i8080_cpu_device::I8085_STATUS);
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::radio_io_r)
|
||||
uint8_t radio86_state::radio_io_r(offs_t offset)
|
||||
{
|
||||
return m_maincpu->space(AS_PROGRAM).read_byte((offset << 8) + offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio_io_w)
|
||||
void radio86_state::radio_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).write_byte((offset << 8) + offset,data);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(radio86_state,radio86)
|
||||
void radio86_state::machine_reset()
|
||||
{
|
||||
timer_set(attotime::from_usec(10), TIMER_RESET);
|
||||
m_bank1->set_entry(1);
|
||||
@ -168,7 +168,7 @@ MACHINE_RESET_MEMBER(radio86_state,radio86)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio86_pagesel)
|
||||
void radio86_state::radio86_pagesel(uint8_t data)
|
||||
{
|
||||
m_disk_sel = data;
|
||||
}
|
||||
@ -182,7 +182,7 @@ READ8_MEMBER(radio86_state::radio86rom_romdisk_porta_r)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(radio86_state::radio86ram_romdisk_porta_r)
|
||||
uint8_t radio86_state::radio86ram_romdisk_porta_r()
|
||||
{
|
||||
uint8_t *romdisk = m_region_maincpu->base() + 0x10000;
|
||||
if ((m_disk_sel & 0x0f) ==0) {
|
||||
@ -196,17 +196,17 @@ READ8_MEMBER(radio86_state::radio86ram_romdisk_porta_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio86_romdisk_portb_w)
|
||||
void radio86_state::radio86_romdisk_portb_w(uint8_t data)
|
||||
{
|
||||
m_romdisk_lsb = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::radio86_romdisk_portc_w)
|
||||
void radio86_state::radio86_romdisk_portc_w(uint8_t data)
|
||||
{
|
||||
m_romdisk_msb = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(radio86_state::mikrosha_8255_font_page_w)
|
||||
void radio86_state::mikrosha_8255_font_page_w(uint8_t data)
|
||||
{
|
||||
m_mikrosha_font_page = (data > 7) & 1;
|
||||
}
|
||||
|
@ -150,7 +150,7 @@ void swtpc09_state::swtpc09_fdc_dma_transfer()
|
||||
{
|
||||
if (!(m_m6844_channel[0].control & 0x01)) // dma write to memory
|
||||
{
|
||||
uint8_t data = m_fdc->data_r(space, 0);
|
||||
uint8_t data = m_fdc->data_r();
|
||||
|
||||
logerror("swtpc09_dma_write_mem %05X %02X\n", m_m6844_channel[0].address + offset, data);
|
||||
space.write_byte(m_m6844_channel[0].address + offset, data);
|
||||
@ -159,7 +159,7 @@ void swtpc09_state::swtpc09_fdc_dma_transfer()
|
||||
{
|
||||
uint8_t data = space.read_byte(m_m6844_channel[0].address + offset);
|
||||
|
||||
m_fdc->data_w(space, 0, data);
|
||||
m_fdc->data_w(data);
|
||||
//logerror("swtpc09_dma_read_mem %04X %02X\n", m_m6844_channel[0].address, data);
|
||||
}
|
||||
|
||||
|
@ -276,7 +276,7 @@ static uint8_t to7_5p14_select;
|
||||
READ8_MEMBER( thomson_state::to7_5p14_r )
|
||||
{
|
||||
if ( offset < 4 )
|
||||
return m_wd2793_fdc->read(space, offset );
|
||||
return m_wd2793_fdc->read(offset);
|
||||
else if ( offset == 8 )
|
||||
return to7_5p14_select;
|
||||
else
|
||||
@ -289,7 +289,7 @@ READ8_MEMBER( thomson_state::to7_5p14_r )
|
||||
WRITE8_MEMBER( thomson_state::to7_5p14_w )
|
||||
{
|
||||
if ( offset < 4 )
|
||||
m_wd2793_fdc->write(space, offset, data );
|
||||
m_wd2793_fdc->write(offset, data );
|
||||
else if ( offset == 8 )
|
||||
{
|
||||
/* drive select */
|
||||
|
@ -256,7 +256,7 @@ READ8_MEMBER( trs80_state::wd179x_r )
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
if (BIT(m_io_config->read(), 7))
|
||||
data = m_fdc->status_r(space, offset);
|
||||
data = m_fdc->status_r();
|
||||
|
||||
return data;
|
||||
}
|
||||
|
@ -494,7 +494,7 @@ READ8_MEMBER( trs80m3_state::wd179x_r )
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
if (BIT(m_io_config->read(), 7))
|
||||
data = m_fdc->status_r(space, offset);
|
||||
data = m_fdc->status_r();
|
||||
|
||||
return data;
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user