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https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
electron: Set CPU clock 2MHz/1MHz according to ROM/RAM access.
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079522fe67
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@ -90,9 +90,9 @@ PALETTE_INIT_MEMBER(electron_state, electron)
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void electron_state::electron_mem(address_map &map)
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{
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map(0x0000, 0x7fff).rw(this, FUNC(electron_state::electron_mem_r), FUNC(electron_state::electron_mem_w)); /* 32KB of RAM */
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map(0x8000, 0xbfff).rw(this, FUNC(electron_state::electron_paged_r), FUNC(electron_state::electron_paged_w)); /* Banked ROM pages */
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map(0xc000, 0xffff).rom().region("mos", 0).w(this, FUNC(electron_state::electron_mos_w)); /* OS ROM */
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map(0x0000, 0x7fff).rw(this, FUNC(electron_state::electron_mem_r), FUNC(electron_state::electron_mem_w)); /* 32KB of RAM */
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map(0x8000, 0xbfff).rw(this, FUNC(electron_state::electron_paged_r), FUNC(electron_state::electron_paged_w)); /* Banked ROM pages */
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map(0xc000, 0xffff).rw(this, FUNC(electron_state::electron_mos_r), FUNC(electron_state::electron_mos_w)); /* OS ROM */
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map(0xfc00, 0xfcff).rw(this, FUNC(electron_state::electron_fred_r), FUNC(electron_state::electron_fred_w)); /* FRED */
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map(0xfd00, 0xfdff).rw(this, FUNC(electron_state::electron_jim_r), FUNC(electron_state::electron_jim_w)); /* JIM */
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map(0xfe00, 0xfeff).rw(this, FUNC(electron_state::electron_sheila_r), FUNC(electron_state::electron_sheila_w)); /* SHEILA */
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@ -39,15 +39,17 @@ public:
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};
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electron_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_screen(*this, "screen"),
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m_cassette(*this, "cassette"),
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m_beeper(*this, "beeper"),
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m_region_basic(*this, "basic"),
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m_keybd(*this, "LINE.%u", 0),
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m_exp(*this, "exp"),
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m_ram(*this, RAM_TAG)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_screen(*this, "screen")
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, m_cassette(*this, "cassette")
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, m_beeper(*this, "beeper")
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, m_region_basic(*this, "basic")
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, m_region_mos(*this, "mos")
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, m_keybd(*this, "LINE.%u", 0)
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, m_exp(*this, "exp")
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, m_ram(*this, RAM_TAG)
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, m_mrb(*this, "MRB")
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{ }
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/* ULA context */
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@ -88,6 +90,7 @@ public:
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DECLARE_WRITE8_MEMBER(electron_mem_w);
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DECLARE_READ8_MEMBER(electron_paged_r);
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DECLARE_WRITE8_MEMBER(electron_paged_w);
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DECLARE_READ8_MEMBER(electron_mos_r);
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DECLARE_WRITE8_MEMBER(electron_mos_w);
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DECLARE_READ8_MEMBER(electron_fred_r);
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DECLARE_WRITE8_MEMBER(electron_fred_w);
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@ -111,9 +114,11 @@ public:
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required_device<cassette_image_device> m_cassette;
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required_device<beep_device> m_beeper;
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required_memory_region m_region_basic;
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required_memory_region m_region_mos;
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required_ioport_array<14> m_keybd;
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required_device<electron_expansion_slot_device> m_exp;
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required_device<ram_device> m_ram;
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optional_ioport m_mrb;
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inline uint8_t read_vram( uint16_t addr );
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inline void electron_plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color);
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void electron_interrupt_handler(int mode, int interrupt);
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@ -144,12 +144,18 @@ TIMER_CALLBACK_MEMBER(electron_state::electron_tape_timer_handler)
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READ8_MEMBER(electron_state::electron_mem_r)
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{
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/* The processor will run at 1MHz during an access cycle to the RAM */
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m_maincpu->set_clock_scale(0.5f);
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//waitforramsync();
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return m_ram->read(offset);
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}
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WRITE8_MEMBER(electron_state::electron_mem_w)
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{
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/* The processor will run at 1MHz during an access cycle to the RAM */
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m_maincpu->set_clock_scale(0.5f);
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//waitforramsync();
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m_ram->write(offset, data);
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}
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@ -175,6 +181,9 @@ READ8_MEMBER(electron_state::electron_paged_r)
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uint8_t data = 0;
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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switch (m_ula.rompage)
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{
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case 8:
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@ -205,17 +214,34 @@ READ8_MEMBER(electron_state::electron_paged_r)
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WRITE8_MEMBER(electron_state::electron_paged_w)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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m_exp->expbus_w(space, 0x8000 + offset, data);
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}
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READ8_MEMBER(electron_state::electron_mos_r)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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return m_region_mos->base()[offset & 0x3fff];
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}
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WRITE8_MEMBER(electron_state::electron_mos_w)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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logerror("MOS: write %04x %02x\n", offset + 0xc000, data);
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m_exp->expbus_w(space, 0xc000 + offset, data);
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}
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READ8_MEMBER(electron_state::electron_fred_r)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */
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//logerror("FRED: read fc%02x\n", offset);
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return m_exp->expbus_r(space, 0xfc00 + offset, 0xff);
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@ -223,12 +249,24 @@ READ8_MEMBER(electron_state::electron_fred_r)
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WRITE8_MEMBER(electron_state::electron_fred_w)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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//logerror("FRED: write fc%02x\n", offset);
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m_exp->expbus_w(space, 0xfc00 + offset, data);
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/* Master RAM Board */
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if (offset == 0x7f && m_mrb.read_safe(0))
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{
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}
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}
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READ8_MEMBER(electron_state::electron_jim_r)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */
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//logerror("JIM: read fd%02x\n", offset);
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return m_exp->expbus_r(space, 0xfd00 + offset, 0xff);
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@ -236,12 +274,18 @@ READ8_MEMBER(electron_state::electron_jim_r)
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WRITE8_MEMBER(electron_state::electron_jim_w)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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//logerror("JIM: write fd%02x\n", offset);
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m_exp->expbus_w(space, 0xfd00 + offset, data);
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}
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READ8_MEMBER(electron_state::electron_sheila_r)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xfe */
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uint8_t data = 0xff;
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@ -267,6 +311,9 @@ static const uint16_t electron_screen_base[8] = { 0x3000, 0x3000, 0x3000, 0x4000
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WRITE8_MEMBER(electron_state::electron_sheila_w)
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{
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/* The processor will run at 2MHz during an access cycle to the ROM */
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m_maincpu->set_clock_scale(1.0f);
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m_exp->expbus_w(space, 0xfe00 + offset, data);
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int i = electron_palette_offset[(( offset >> 1 ) & 0x03)];
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