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electron: Set CPU clock 2MHz/1MHz according to ROM/RAM access.

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This commit is contained in:
Nigel Barnes 2018-03-21 13:00:19 +00:00
parent 079522fe67
commit f22c5609ba
3 changed files with 64 additions and 12 deletions
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6
src/mame/drivers/electron.cpp
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@ -90,9 +90,9 @@ PALETTE_INIT_MEMBER(electron_state, electron)
void electron_state::electron_mem(address_map &map) void electron_state::electron_mem(address_map &map)
{ {
map(0x0000, 0x7fff).rw(this, FUNC(electron_state::electron_mem_r), FUNC(electron_state::electron_mem_w)); /* 32KB of RAM */ map(0x0000, 0x7fff).rw(this, FUNC(electron_state::electron_mem_r), FUNC(electron_state::electron_mem_w)); /* 32KB of RAM */
map(0x8000, 0xbfff).rw(this, FUNC(electron_state::electron_paged_r), FUNC(electron_state::electron_paged_w)); /* Banked ROM pages */ map(0x8000, 0xbfff).rw(this, FUNC(electron_state::electron_paged_r), FUNC(electron_state::electron_paged_w)); /* Banked ROM pages */
map(0xc000, 0xffff).rom().region("mos", 0).w(this, FUNC(electron_state::electron_mos_w)); /* OS ROM */ map(0xc000, 0xffff).rw(this, FUNC(electron_state::electron_mos_r), FUNC(electron_state::electron_mos_w)); /* OS ROM */
map(0xfc00, 0xfcff).rw(this, FUNC(electron_state::electron_fred_r), FUNC(electron_state::electron_fred_w)); /* FRED */ map(0xfc00, 0xfcff).rw(this, FUNC(electron_state::electron_fred_r), FUNC(electron_state::electron_fred_w)); /* FRED */
map(0xfd00, 0xfdff).rw(this, FUNC(electron_state::electron_jim_r), FUNC(electron_state::electron_jim_w)); /* JIM */ map(0xfd00, 0xfdff).rw(this, FUNC(electron_state::electron_jim_r), FUNC(electron_state::electron_jim_w)); /* JIM */
map(0xfe00, 0xfeff).rw(this, FUNC(electron_state::electron_sheila_r), FUNC(electron_state::electron_sheila_w)); /* SHEILA */ map(0xfe00, 0xfeff).rw(this, FUNC(electron_state::electron_sheila_r), FUNC(electron_state::electron_sheila_w)); /* SHEILA */

23
src/mame/includes/electron.h
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@ -39,15 +39,17 @@ public:
}; };
electron_state(const machine_config &mconfig, device_type type, const char *tag) electron_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag)
m_maincpu(*this, "maincpu"), , m_maincpu(*this, "maincpu")
m_screen(*this, "screen"), , m_screen(*this, "screen")
m_cassette(*this, "cassette"), , m_cassette(*this, "cassette")
m_beeper(*this, "beeper"), , m_beeper(*this, "beeper")
m_region_basic(*this, "basic"), , m_region_basic(*this, "basic")
m_keybd(*this, "LINE.%u", 0), , m_region_mos(*this, "mos")
m_exp(*this, "exp"), , m_keybd(*this, "LINE.%u", 0)
m_ram(*this, RAM_TAG) , m_exp(*this, "exp")
, m_ram(*this, RAM_TAG)
, m_mrb(*this, "MRB")
{ } { }
/* ULA context */ /* ULA context */
@ -88,6 +90,7 @@ public:
DECLARE_WRITE8_MEMBER(electron_mem_w); DECLARE_WRITE8_MEMBER(electron_mem_w);
DECLARE_READ8_MEMBER(electron_paged_r); DECLARE_READ8_MEMBER(electron_paged_r);
DECLARE_WRITE8_MEMBER(electron_paged_w); DECLARE_WRITE8_MEMBER(electron_paged_w);
DECLARE_READ8_MEMBER(electron_mos_r);
DECLARE_WRITE8_MEMBER(electron_mos_w); DECLARE_WRITE8_MEMBER(electron_mos_w);
DECLARE_READ8_MEMBER(electron_fred_r); DECLARE_READ8_MEMBER(electron_fred_r);
DECLARE_WRITE8_MEMBER(electron_fred_w); DECLARE_WRITE8_MEMBER(electron_fred_w);
@ -111,9 +114,11 @@ public:
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
required_device<beep_device> m_beeper; required_device<beep_device> m_beeper;
required_memory_region m_region_basic; required_memory_region m_region_basic;
required_memory_region m_region_mos;
required_ioport_array<14> m_keybd; required_ioport_array<14> m_keybd;
required_device<electron_expansion_slot_device> m_exp; required_device<electron_expansion_slot_device> m_exp;
required_device<ram_device> m_ram; required_device<ram_device> m_ram;
optional_ioport m_mrb;
inline uint8_t read_vram( uint16_t addr ); inline uint8_t read_vram( uint16_t addr );
inline void electron_plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color); inline void electron_plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color);
void electron_interrupt_handler(int mode, int interrupt); void electron_interrupt_handler(int mode, int interrupt);

47
src/mame/machine/electron.cpp
View File

@ -144,12 +144,18 @@ TIMER_CALLBACK_MEMBER(electron_state::electron_tape_timer_handler)
READ8_MEMBER(electron_state::electron_mem_r) READ8_MEMBER(electron_state::electron_mem_r)
{ {
/* The processor will run at 1MHz during an access cycle to the RAM */
m_maincpu->set_clock_scale(0.5f);
//waitforramsync(); //waitforramsync();
return m_ram->read(offset); return m_ram->read(offset);
} }
WRITE8_MEMBER(electron_state::electron_mem_w) WRITE8_MEMBER(electron_state::electron_mem_w)
{ {
/* The processor will run at 1MHz during an access cycle to the RAM */
m_maincpu->set_clock_scale(0.5f);
//waitforramsync(); //waitforramsync();
m_ram->write(offset, data); m_ram->write(offset, data);
} }
@ -175,6 +181,9 @@ READ8_MEMBER(electron_state::electron_paged_r)
uint8_t data = 0; uint8_t data = 0;
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
switch (m_ula.rompage) switch (m_ula.rompage)
{ {
case 8: case 8:
@ -205,17 +214,34 @@ READ8_MEMBER(electron_state::electron_paged_r)
WRITE8_MEMBER(electron_state::electron_paged_w) WRITE8_MEMBER(electron_state::electron_paged_w)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
m_exp->expbus_w(space, 0x8000 + offset, data); m_exp->expbus_w(space, 0x8000 + offset, data);
} }
READ8_MEMBER(electron_state::electron_mos_r)
{
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
return m_region_mos->base()[offset & 0x3fff];
}
WRITE8_MEMBER(electron_state::electron_mos_w) WRITE8_MEMBER(electron_state::electron_mos_w)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
logerror("MOS: write %04x %02x\n", offset + 0xc000, data); logerror("MOS: write %04x %02x\n", offset + 0xc000, data);
m_exp->expbus_w(space, 0xc000 + offset, data); m_exp->expbus_w(space, 0xc000 + offset, data);
} }
READ8_MEMBER(electron_state::electron_fred_r) READ8_MEMBER(electron_state::electron_fred_r)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */ /* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */
//logerror("FRED: read fc%02x\n", offset); //logerror("FRED: read fc%02x\n", offset);
return m_exp->expbus_r(space, 0xfc00 + offset, 0xff); return m_exp->expbus_r(space, 0xfc00 + offset, 0xff);
@ -223,12 +249,24 @@ READ8_MEMBER(electron_state::electron_fred_r)
WRITE8_MEMBER(electron_state::electron_fred_w) WRITE8_MEMBER(electron_state::electron_fred_w)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
//logerror("FRED: write fc%02x\n", offset); //logerror("FRED: write fc%02x\n", offset);
m_exp->expbus_w(space, 0xfc00 + offset, data); m_exp->expbus_w(space, 0xfc00 + offset, data);
/* Master RAM Board */
if (offset == 0x7f && m_mrb.read_safe(0))
{
}
} }
READ8_MEMBER(electron_state::electron_jim_r) READ8_MEMBER(electron_state::electron_jim_r)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */ /* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xff */
//logerror("JIM: read fd%02x\n", offset); //logerror("JIM: read fd%02x\n", offset);
return m_exp->expbus_r(space, 0xfd00 + offset, 0xff); return m_exp->expbus_r(space, 0xfd00 + offset, 0xff);
@ -236,12 +274,18 @@ READ8_MEMBER(electron_state::electron_jim_r)
WRITE8_MEMBER(electron_state::electron_jim_w) WRITE8_MEMBER(electron_state::electron_jim_w)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
//logerror("JIM: write fd%02x\n", offset); //logerror("JIM: write fd%02x\n", offset);
m_exp->expbus_w(space, 0xfd00 + offset, data); m_exp->expbus_w(space, 0xfd00 + offset, data);
} }
READ8_MEMBER(electron_state::electron_sheila_r) READ8_MEMBER(electron_state::electron_sheila_r)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
/* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xfe */ /* The Issue 4 ULA returns data from OS ROM, whereas Issue 6 ULA will return 0xfe */
uint8_t data = 0xff; uint8_t data = 0xff;
@ -267,6 +311,9 @@ static const uint16_t electron_screen_base[8] = { 0x3000, 0x3000, 0x3000, 0x4000
WRITE8_MEMBER(electron_state::electron_sheila_w) WRITE8_MEMBER(electron_state::electron_sheila_w)
{ {
/* The processor will run at 2MHz during an access cycle to the ROM */
m_maincpu->set_clock_scale(1.0f);
m_exp->expbus_w(space, 0xfe00 + offset, data); m_exp->expbus_w(space, 0xfe00 + offset, data);
int i = electron_palette_offset[(( offset >> 1 ) & 0x03)]; int i = electron_palette_offset[(( offset >> 1 ) & 0x03)];