Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-06 17:08:28 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

z8: Add register pairs to debug state

Browse Source
This commit is contained in:
AJR 2019-04-06 08:15:25 -04:00
parent ba9b483bbb
commit f2f1643c45
2 changed files with 15 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
src/devices/cpu/z8/z8.cpp
View File

@ -13,6 +13,7 @@
- strobed I/O - strobed I/O
- instruction pipeline - instruction pipeline
- internal diagnostic ROM in data space (requires high voltage reset) - internal diagnostic ROM in data space (requires high voltage reset)
- what really happens when register pairs are unaligned?
*/ */
@ -1205,7 +1206,18 @@ void z8_device::device_start()
state_add(Z8_TOUT, "TOUT", m_tout); state_add(Z8_TOUT, "TOUT", m_tout);
for (int regnum = 0; regnum < 16; regnum++) for (int regnum = 0; regnum < 16; regnum++)
state_add(Z8_R0 + regnum, string_format("R%d", regnum).c_str(), m_fake_r[regnum]).callimport().callexport(); {
state_add<uint8_t>(Z8_R0 + regnum, string_format("R%d", regnum).c_str(),
[this, regnum]() { auto dis = machine().disable_side_effects(); return register_read((m_rp & 0xf0) | regnum); },
[this, regnum](uint8_t val) { auto dis = machine().disable_side_effects(); register_write((m_rp & 0xf0) | regnum, val); });
}
for (int regnum = 0; regnum < 16; regnum += 2)
{
state_add<uint16_t>(Z8_RR0 + (regnum / 2), string_format("RR%d", regnum).c_str(),
[this, regnum]() { auto dis = machine().disable_side_effects(); return register_pair_read((m_rp & 0xf0) | regnum); },
[this, regnum](uint16_t val) { auto dis = machine().disable_side_effects(); register_pair_write((m_rp & 0xf0) | regnum, val); }).noshow();
}
} }
/* find address spaces */ /* find address spaces */
@ -1225,7 +1237,6 @@ void z8_device::device_start()
std::fill(std::begin(m_count), std::end(m_count), 0); std::fill(std::begin(m_count), std::end(m_count), 0);
std::fill(std::begin(m_pre), std::end(m_pre), 0); std::fill(std::begin(m_pre), std::end(m_pre), 0);
std::fill(std::begin(m_pre_count), std::end(m_pre_count), 0); std::fill(std::begin(m_pre_count), std::end(m_pre_count), 0);
std::fill(std::begin(m_fake_r), std::end(m_fake_r), 0);
m_pc = 0; m_pc = 0;
m_ppc = 0; m_ppc = 0;
m_sp.w = 0; m_sp.w = 0;
@ -1504,34 +1515,11 @@ void z8_device::state_import(const device_state_entry &entry)
m_pc = m_ppc; m_pc = m_ppc;
break; break;
case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15:
{
auto dis = machine().disable_side_effects();
register_write((m_rp & 0xf0) + (entry.index() - Z8_R0), m_fake_r[entry.index() - Z8_R0]);
break;
}
default: default:
fatalerror("CPU_IMPORT_STATE(z8) called for unexpected value\n"); fatalerror("CPU_IMPORT_STATE(z8) called for unexpected value\n");
} }
} }
void z8_device::state_export(const device_state_entry &entry)
{
switch (entry.index())
{
case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15:
{
auto dis = machine().disable_side_effects();
m_fake_r[entry.index() - Z8_R0] = register_read((m_rp & 0xf0) + (entry.index() - Z8_R0));
break;
}
default:
fatalerror("CPU_EXPORT_STATE(z8) called for unexpected value\n");
}
}
void z8_device::state_string_export(const device_state_entry &entry, std::string &str) const void z8_device::state_string_export(const device_state_entry &entry, std::string &str) const
{ {
switch (entry.index()) switch (entry.index())

7
src/devices/cpu/z8/z8.h
View File

@ -34,7 +34,8 @@ protected:
Z8_P01M, Z8_P3M, Z8_P2M, Z8_P01M, Z8_P3M, Z8_P2M,
Z8_PRE0, Z8_T0, Z8_PRE1, Z8_T1, Z8_TMR, Z8_TOUT, Z8_PRE0, Z8_T0, Z8_PRE1, Z8_T1, Z8_TMR, Z8_TOUT,
Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15 Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15,
Z8_RR0, Z8_RR2, Z8_RR4, Z8_RR6, Z8_RR8, Z8_RR10, Z8_RR12, Z8_RR14
}; };
// construction/destruction // construction/destruction
@ -59,7 +60,6 @@ protected:
// device_state_interface overrides // device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override; virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides // device_disasm_interface overrides
@ -123,9 +123,6 @@ private:
bool m_receive_parity; // receiver parity calculation bool m_receive_parity; // receiver parity calculation
bool m_receive_started; // true if receiver has seen start bit bool m_receive_started; // true if receiver has seen start bit
// fake registers
uint8_t m_fake_r[16]; // fake working registers
// interrupts // interrupts
int m_irq_line[4]; int m_irq_line[4];
bool m_irq_taken; bool m_irq_taken;