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pve500.c - multiplex signals for the 7seg display from Felipe Sanches (nw)
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@ -8,12 +8,39 @@
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Driver by Felipe Correa da Silva Sanches <juca@members.fsf.org>
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Technical info at https://www.garoa.net.br/wiki/PVE-500
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Notes:
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One can induce the self-diagnose by booting the device holding LEARN and P2-RESET buttons togheter
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With the default keyboard map, this can be done by holding keys L and S while pressing F3.
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(Don't forget to unlock the keyboard by using the UI TOGGLE key)
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This self-diagnose routine displays the value C817, which is the checksum value of the subcpu ROM
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and afterwards it displays the following message:
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SELFdIAG Error___ _F3 F3_CtC3c
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which means it detected an error in the CTC circuitry (it means we're emulating it wrong!)
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F3 is the coordinate of the subcpu EEPROM chip in the PCB.
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According to the service manual, this error code means: "ICF3 CTC CH-3 counter operation failure (No interruption)"
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Known issues:
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There's still an annoying blinking in the 7-seg display.
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Changelog:
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2014 JUN 24 [Felipe Sanches]:
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* figured out the multiplexing signals for the 7seg display
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2014 JUN 23 [Felipe Sanches]:
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* hooked-up the RS422 ports
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2014 JAN 14 [Felipe Sanches]:
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* Initial driver skeleton
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*/
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#define LOG_7SEG_DISPLAY_SIGNALS 0
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#define DEBUGGING_INDUCE_SELFDIAGNOSE 0
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#include "emu.h"
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#include "cpu/z80/tmpz84c015.h"
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#include "sound/beep.h"
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@ -203,9 +230,6 @@ void pve500_state::machine_start()
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io_LE = 0;
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io_SEL = 0;
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io_KY = 0;
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for (int i=0; i<27; i++)
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output_set_digit_value(i, 0x00);
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}
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void pve500_state::machine_reset()
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@ -217,35 +241,35 @@ void pve500_state::machine_reset()
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READ8_MEMBER(pve500_state::dualport_ram_left_r)
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{
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printf("dualport_ram: Left READ\n");
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//printf("dualport_ram: Left READ\n");
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m_subcpu->trg1(1); //(INT_Right)
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return dualport_7FE_data;
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}
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WRITE8_MEMBER(pve500_state::dualport_ram_left_w)
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{
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printf("dualport_ram: Left WRITE\n");
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//printf("dualport_ram: Left WRITE\n");
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dualport_7FF_data = data;
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m_subcpu->trg1(0); //(INT_Right)
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}
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READ8_MEMBER(pve500_state::dualport_ram_right_r)
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{
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printf("dualport_ram: Right READ\n");
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//printf("dualport_ram: Right READ\n");
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m_maincpu->trg1(1); //(INT_Left)
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return dualport_7FF_data;
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}
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WRITE8_MEMBER(pve500_state::dualport_ram_right_w)
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{
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printf("dualport_ram: Right WRITE\n");
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//printf("dualport_ram: Right WRITE\n");
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dualport_7FE_data = data;
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m_maincpu->trg1(0); //(INT_Left)
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}
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READ8_MEMBER(pve500_state::io_expander_r)
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{
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printf("READ IO_EXPANDER_PORT%c\n", 'A'+offset);
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// printf("READ IO_EXPANDER_PORT%c\n", 'A'+offset);
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switch (offset){
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case IO_EXPANDER_PORTA:
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return io_SC;
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@ -253,14 +277,17 @@ READ8_MEMBER(pve500_state::io_expander_r)
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return io_LE;
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case IO_EXPANDER_PORTC:
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io_KY = 0x00;
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if (io_SC & 0x01) io_KY |= ioport("SCAN0")->read();
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if (io_SC & 0x02) io_KY |= ioport("SCAN1")->read();
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if (io_SC & 0x04) io_KY |= ioport("SCAN2")->read();
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if (io_SC & 0x08) io_KY |= ioport("SCAN3")->read();
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if (io_SC & 0x10) io_KY |= ioport("SCAN4")->read();
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if (io_SC & 0x20) io_KY |= ioport("SCAN5")->read();
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if (io_SC & 0x40) io_KY |= ioport("SCAN6")->read();
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if (io_SC & 0x80) io_KY |= ioport("SCAN7")->read();
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if (!BIT(io_SC, 0)) io_KY |= ioport("SCAN0")->read();
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if (!BIT(io_SC, 1)) io_KY |= ioport("SCAN1")->read();
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if (!BIT(io_SC, 2)) io_KY |= ioport("SCAN2")->read();
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if (!BIT(io_SC, 3)) io_KY |= ioport("SCAN3")->read();
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if (!BIT(io_SC, 4)) io_KY |= ioport("SCAN4")->read();
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if (!BIT(io_SC, 5)) io_KY |= ioport("SCAN5")->read();
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if (!BIT(io_SC, 6)) io_KY |= ioport("SCAN6")->read();
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if (!BIT(io_SC, 7)) io_KY |= ioport("SCAN7")->read();
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#if DEBUGGING_INDUCE_SELFDIAGNOSE
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io_KY = 0x42; //according to procedure described in the service manual
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#endif
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return io_KY;
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case IO_EXPANDER_PORTD:
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return io_LD;
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@ -273,33 +300,48 @@ READ8_MEMBER(pve500_state::io_expander_r)
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WRITE8_MEMBER(pve500_state::io_expander_w)
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{
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static int LD_data[4];
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int swap[4] = {2,1,0,3};
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switch (offset){
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case IO_EXPANDER_PORTA:
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printf("io_expander_w: PORTA (io_SC=%02X)\n", data);
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#if LOG_7SEG_DISPLAY_SIGNALS
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printf("io_expander_w: PORTA (io_SC=%02X)\n", data);
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#endif
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io_SC = data;
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for (int j=0; j<8; j++){
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if (!BIT(io_SC,j)){
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for (int i=0; i<4; i++)
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output_set_digit_value(8*swap[i] + j, LD_data[i]);
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}
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}
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break;
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case IO_EXPANDER_PORTB:
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#if LOG_7SEG_DISPLAY_SIGNALS
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printf("io_expander_w: PORTB (io_LE=%02X)\n", data);
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#endif
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io_LE = data;
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break;
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case IO_EXPANDER_PORTC:
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#if LOG_7SEG_DISPLAY_SIGNALS
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printf("io_expander_w: PORTC (io_KY=%02X)\n", data);
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#endif
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io_KY = data;
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break;
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case IO_EXPANDER_PORTD:
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#if LOG_7SEG_DISPLAY_SIGNALS
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printf("io_expander_w: PORTD (io_LD=%02X)\n", data);
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#endif
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io_LD = data;
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break;
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case IO_EXPANDER_PORTE:
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io_SEL = data;
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#if LOG_7SEG_DISPLAY_SIGNALS
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printf("io_expander_w PORTE (io_SEL=%02X)\n", data);
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#endif
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io_SEL = data;
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for (int i=0; i<4; i++){
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if (io_SEL & (1 << i)){
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for (int j=0; j<8; j++){
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if (io_SC & (1<<j)){
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output_set_digit_value(8*i + j, BITSWAP8(io_LD & 0x7F, 7, 0, 1, 2, 3, 4, 5, 6));
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}
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}
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if (BIT(io_SEL, i)){
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LD_data[i] = 0x7F & BITSWAP8(io_LD ^ 0xFF, 7, 0, 1, 2, 3, 4, 5, 6);
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}
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}
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break;
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