* gba.xml: Cleaned up some comments.
* bus/epson_qx/cqgmem.cpp: Actually set m_installed.
* misc/nabupc_kbd.cpp: Don't override general input assignments.
* bus/qbus: Got rid of an unnecessary simple_list.
This commit is contained in:
Vas Crabb 2023-05-24 00:45:34 +10:00
parent ef82f39e5e
commit f32fee0e53
7 changed files with 89 additions and 90 deletions

View File

@ -25357,7 +25357,6 @@ license:CC0-1.0
<!-- Game does not work in MAME, it freezes on the bios screen. -->
<software name="paradroid" supported="no">
<!-- Released by March42 and Forest of Illusion -->
<description>Paradroid (Europe, prototype, 20030320)</description>
<year>2003</year>
<publisher>Jester Interactive</publisher>
@ -25450,7 +25449,7 @@ license:CC0-1.0
</part>
</software>
<!-- This was the last development build, released by the programmer, James Boulton. It was never completed due to lack of publisher interest. -->
<!-- This was the last development build, released by the programmer, James Boulton. It was never completed due to lack of publisher interest. -->
<software name="perplexd" supported="partial">
<description>Perplexus Diodomin (prototype)</description>
<year>2002</year>

View File

@ -13,7 +13,7 @@
// CQGMEM DEVICE
//**************************************************************************
DEFINE_DEVICE_TYPE(EPSON_QX_OPTION_CQGMEM, bus::epson_qx::cqgmem_device, "option_cqgmem", "Epson QX-10 1MB Memory Expansion")
DEFINE_DEVICE_TYPE(EPSON_QX_OPTION_CQGMEM, bus::epson_qx::cqgmem_device, "epson_qx_option_cqgmem", "Commodity Quote Graphics 1MB Memory Expansion")
namespace bus::epson_qx {
@ -60,6 +60,10 @@ void cqgmem_device::device_start()
{
m_installed = false;
for (int i = 0; i < m_banks.size(); ++i) {
m_banks[i]->configure_entries(0, 128, m_ram, 0x2000);
}
save_item(NAME(m_installed));
save_item(NAME(m_banks_enabled));
}
@ -73,23 +77,20 @@ void cqgmem_device::device_reset()
address_space &space = m_bus->iospace();
offs_t iobase = m_iobase->read() & 0xf0;
space.install_device(iobase, iobase+0x07, *this, &cqgmem_device::io_map);
for (int i = 0; i < m_banks.size(); ++i) {
m_banks[i]->configure_entries(0, 128, m_ram, 0x2000);
}
m_installed = true;
}
m_banks_enabled = 0;
m_banks_enabled = 0; // FIXME: should probably unmap any enabled banks before clearing this on reset
for (int i = 0; i < m_banks.size(); ++i) {
m_banks[i]->set_entry(0);
}
}
//-------------------------------------------------
// memory_space_config - return a description of
// any address spaces owned by this device
//-------------------------------------------------
device_memory_interface::space_config_vector cqgmem_device::memory_space_config() const
{
return space_config_vector {
@ -106,10 +107,10 @@ void cqgmem_device::write(offs_t offset, uint8_t data)
{
memory_view::memory_view_entry &view = m_bus->memview();
uint8_t bank = offset & 0x07;
uint8_t page = data & 0x7f;
uint8_t enable = (m_banks_enabled & ~((data & 0x80) >> bank)) | ((data & 0x80) >> bank);
uint16_t bank_addr = bank * 0x2000;
uint8_t const bank = offset & 0x07;
uint8_t const page = data & 0x7f;
uint8_t const enable = (m_banks_enabled & ~(0x80 >> bank)) | ((data & 0x80) >> bank);
uint16_t const bank_addr = bank * 0x2000;
m_banks[bank]->set_entry(page);

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@ -28,20 +28,18 @@ public:
cqgmem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override;
// optional information overrides
virtual ioport_constructor device_input_ports() const override;
virtual space_config_vector memory_space_config() const override;
private:
void write(offs_t offset, uint8_t data);
void io_map(address_map &map);
void xmem_map(address_map &map);
private:
uint8_t m_banks_enabled;
memory_share_creator<uint8_t> m_ram;

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@ -44,8 +44,7 @@ DEFINE_DEVICE_TYPE(QBUS_SLOT, qbus_slot_device, "qbus_slot", "DEC Qbus slot")
device_qbus_card_interface::device_qbus_card_interface(const machine_config &mconfig, device_t &device) :
device_interface(device, "qbus"),
m_bus(nullptr),
m_next(nullptr)
m_bus(nullptr)
{
}
@ -74,7 +73,8 @@ qbus_slot_device::qbus_slot_device(const machine_config &mconfig, const char *ta
void qbus_slot_device::device_start()
{
device_qbus_card_interface *dev = dynamic_cast<device_qbus_card_interface *>(get_card_device());
if (dev) m_bus->add_card(dev);
if (dev)
m_bus->add_card(*dev);
m_write_birq4.resolve_safe();
m_write_birq5.resolve_safe();
@ -102,6 +102,17 @@ qbus_device::qbus_device(const machine_config &mconfig, const char *tag, device_
{
}
qbus_device::~qbus_device()
{
}
device_memory_interface::space_config_vector qbus_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config)
};
}
//-------------------------------------------------
// device_start - device-specific startup
@ -131,10 +142,10 @@ void qbus_device::device_reset()
// add_card - add card
//-------------------------------------------------
void qbus_device::add_card(device_qbus_card_interface *card)
void qbus_device::add_card(device_qbus_card_interface &card)
{
card->m_bus = this;
m_device_list.append(*card);
card.m_bus = this;
m_device_list.emplace_back(card);
}
void qbus_device::install_device(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler, uint32_t mask)
@ -150,14 +161,12 @@ void qbus_device::install_device(offs_t start, offs_t end, read16sm_delegate rha
int qbus_device::z80daisy_irq_state()
{
int data = 0;
device_qbus_card_interface *entry = m_device_list.first();
while (entry)
for (device_qbus_card_interface &entry : m_device_list)
{
data = entry->z80daisy_irq_state();
data = entry.z80daisy_irq_state();
if (data)
return data;
entry = entry->next();
}
return data;
@ -166,14 +175,12 @@ int qbus_device::z80daisy_irq_state()
int qbus_device::z80daisy_irq_ack()
{
int vec = -1;
device_qbus_card_interface *entry = m_device_list.first();
while (entry)
for (device_qbus_card_interface &entry : m_device_list)
{
vec = entry->z80daisy_irq_ack();
vec = entry.z80daisy_irq_ack();
if (vec > 0)
return vec;
entry = entry->next();
}
return vec;

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@ -13,6 +13,9 @@
#include "machine/z80daisy.h"
#include <functional>
#include <vector>
//**************************************************************************
// TYPE DEFINITIONS
@ -25,12 +28,9 @@ class qbus_device;
class device_qbus_card_interface : public device_interface
{
friend class qbus_device;
template <class ElementType> friend class simple_list;
public:
device_qbus_card_interface *next() const { return m_next; }
// device_qbus_card_interface overrides
// Q-Bus interface
virtual void biaki_w(int state) { }
virtual void bdmgi_w(int state) { }
@ -42,10 +42,7 @@ protected:
virtual int z80daisy_irq_ack() { return -1; }
virtual void z80daisy_irq_reti() { }
qbus_device *m_bus;
private:
device_qbus_card_interface *m_next;
qbus_device *m_bus;
};
@ -67,24 +64,19 @@ public:
qbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~qbus_device() { m_device_list.detach_all(); }
~qbus_device();
// inline configuration
template <typename T> void set_space(T &&tag, int spacenum) { m_space.set_tag(std::forward<T>(tag), spacenum); }
virtual space_config_vector memory_space_config() const override
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config)
};
}
virtual space_config_vector memory_space_config() const override;
auto birq4() { return m_out_birq4_cb.bind(); }
auto birq5() { return m_out_birq6_cb.bind(); }
auto birq6() { return m_out_birq6_cb.bind(); }
auto birq7() { return m_out_birq7_cb.bind(); }
void add_card(device_qbus_card_interface *card);
void add_card(device_qbus_card_interface &card);
void install_device(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler, uint32_t mask=0xffffffff);
DECLARE_WRITE_LINE_MEMBER(birq4_w) { m_out_birq4_cb(state); }
@ -97,11 +89,11 @@ public:
const address_space_config m_program_config;
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override;
// device_z80daisy_interface overrides
// device_z80daisy_interface implementation
virtual int z80daisy_irq_state() override;
virtual int z80daisy_irq_ack() override;
virtual void z80daisy_irq_reti() override;
@ -110,13 +102,15 @@ protected:
required_address_space m_space;
private:
using card_vector = std::vector<std::reference_wrapper<device_qbus_card_interface> >;
devcb_write_line m_out_birq4_cb;
devcb_write_line m_out_birq5_cb;
devcb_write_line m_out_birq6_cb;
devcb_write_line m_out_birq7_cb;
devcb_write_line m_out_bdmr_cb;
simple_list<device_qbus_card_interface> m_device_list;
card_vector m_device_list;
};
@ -142,7 +136,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( bdmgi_w ) { if (m_card) m_card->bdmgi_w(state); }
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override { if (m_card) get_card_device()->reset(); }

View File

@ -40,7 +40,7 @@
* The ADC is used to decode the analog paddle data on pins 5 and 9 of the gameports
* * 0xBX00 - A write to these addresses latches the ADC address to the value of X (where X is 0-7)
* * 0x7000 - A write to this address starts the conversion for the currently latched ADC address, an IRQ will trigger on EOC
* * 0xD000 - A read from here will read the curently converted value from the ADC
* * 0xD000 - A read from here will read the currently converted value from the ADC
* * 0x9000 - a write to this address will acknowledge the EOC interrupt.
*****************************************************************************/
@ -48,7 +48,6 @@
#include "nabupc_kbd.h"
DEFINE_DEVICE_TYPE(NABUPC_KEYBOARD, nabupc_keyboard_device, "nabupc_keyboard", "NABU PC keyboard")
namespace {
@ -152,63 +151,71 @@ INPUT_PORTS_START( keyboard_ports )
// Joystick Ports
PORT_START("JOYSTICK1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_CODE(KEYCODE_4_PAD)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) PORT_CODE(KEYCODE_2_PAD)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) PORT_CODE(KEYCODE_6_PAD)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1) PORT_CODE(KEYCODE_8_PAD)
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_CODE(KEYCODE_ENTER_PAD)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_START("JOYSTICK2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_START("JOYSTICK3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
PORT_START("JOYSTICK4")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4) PORT_CODE(INPUT_CODE_INVALID)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
// Analog Paddles
PORT_START("PADDLE1")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(1) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 9
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(1) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 9
PORT_START("PADDLE2")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(2) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 5
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(2) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 5
PORT_START("PADDLE3")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(3) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 9
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(3) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 9
PORT_START("PADDLE4")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(4) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 5
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(4) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 5
PORT_START("PADDLE5")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(5) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 9
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(5) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 9
PORT_START("PADDLE6")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(6) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 5
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(6) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 5
PORT_START("PADDLE7")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(7) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 9
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(7) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 9
PORT_START("PADDLE8")
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(8) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE PORT_CODE(INPUT_CODE_INVALID) PORT_CODE_DEC(INPUT_CODE_INVALID) PORT_CODE_INC(INPUT_CODE_INVALID) // pin 5
PORT_BIT( 0xff, 0x80, IPT_PADDLE) PORT_PLAYER(8) PORT_SENSITIVITY(30) PORT_KEYDELTA(20) PORT_MINMAX(0, 255) PORT_REVERSE // pin 5
INPUT_PORTS_END
} // anonymous namespace
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
DEFINE_DEVICE_TYPE(NABUPC_KEYBOARD, nabupc_keyboard_device, "nabupc_keyboard", "NABU PC keyboard")
//**************************************************************************
// KEYBOARD DEVICE
//**************************************************************************
@ -343,9 +350,3 @@ void nabupc_keyboard_device::ser_tx_w(uint8_t data)
{
m_rxd_cb(data & 1);
}
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************

View File

@ -28,14 +28,13 @@ public:
auto rxd_cb() { return m_rxd_cb.bind(); }
protected:
// device-level overrides
// device_t implementation
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
// optional information overrides
virtual tiny_rom_entry const *device_rom_region() const override;
virtual ioport_constructor device_input_ports() const override;
private:
void nabu_kb_mem(address_map &map);