(nw) adjust some stuff (uniform spacing, standardised logging, capitalised template parameters, etc.)

This commit is contained in:
Vas Crabb 2018-11-28 01:39:58 +11:00
parent 36229b5b55
commit f36e9e33fe
13 changed files with 135 additions and 156 deletions

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@ -17,6 +17,7 @@
//************************************************************************** //**************************************************************************
#define VERBOSE 1 #define VERBOSE 1
#include "logmacro.h"
//************************************************************************** //**************************************************************************
@ -76,11 +77,8 @@ void a2065_device::device_start()
void a2065_device::autoconfig_base_address(offs_t address) void a2065_device::autoconfig_base_address(offs_t address)
{ {
if (VERBOSE) LOG("%s('%s'): autoconfig_base_address received: 0x%06x\n", shortname(), basetag(), address);
logerror("%s('%s'): autoconfig_base_address received: 0x%06x\n", shortname(), basetag(), address); LOG("-> installing a2065\n");
if (VERBOSE)
logerror("-> installing a2065\n");
// stop responding to default autoconfig // stop responding to default autoconfig
m_slot->m_space->unmap_readwrite(0xe80000, 0xe8007f); m_slot->m_space->unmap_readwrite(0xe80000, 0xe8007f);
@ -106,8 +104,7 @@ void a2065_device::autoconfig_base_address(offs_t address)
WRITE_LINE_MEMBER( a2065_device::cfgin_w ) WRITE_LINE_MEMBER( a2065_device::cfgin_w )
{ {
if (VERBOSE) LOG("%s('%s'): configin_w (%d)\n", shortname(), basetag(), state);
logerror("%s('%s'): configin_w (%d)\n", shortname(), basetag(), state);
if (state == 0) if (state == 0)
{ {

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@ -1,5 +1,5 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Aaron Giles // copyright-holders:Aaron Giles, Patrick Mackinlay
/* /*
* MIPS-I emulation, including R2000[A], R3000[A] and IDT R30xx devices. The * MIPS-I emulation, including R2000[A], R3000[A] and IDT R30xx devices. The

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@ -1,5 +1,5 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Aaron Giles // copyright-holders:Aaron Giles, Patrick Mackinlay
#ifndef MAME_CPU_MIPS_MIPS1_H #ifndef MAME_CPU_MIPS_MIPS1_H
#define MAME_CPU_MIPS_MIPS1_H #define MAME_CPU_MIPS_MIPS1_H

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@ -197,16 +197,16 @@ void catseye_device::execute_rule(const bool src, const int rule, bool &dst) con
} }
} }
template<int idx> template<int Idx>
void catseye_device::window_move() void catseye_device::window_move()
{ {
if (!m_fb_enable[idx]) if (!m_fb_enable[Idx])
return; return;
LOGMASKED(LOG_WMOVE, "%s%d: %3ux%3u -> %3ux%3u / %3ux%3u planemode %04x wrr %04x, trr %04x m_trrctl %04x acntr %04x\n", LOGMASKED(LOG_WMOVE, "%s%d: %3ux%3u -> %3ux%3u / %3ux%3u planemode %04x wrr %04x, trr %04x m_trrctl %04x acntr %04x\n",
__func__, idx, m_wmsourcex, m_wmsourcey, m_wmdestx, m_wmdesty, m_wmwidth, m_wmheight, m_planemode[idx], __func__, Idx, m_wmsourcex, m_wmsourcey, m_wmdestx, m_wmdesty, m_wmwidth, m_wmheight, m_planemode[Idx],
m_wrr[idx], m_trr[idx], m_trrctl[idx], m_acntrl); m_wrr[Idx], m_trr[Idx], m_trrctl[Idx], m_acntrl);
int line, endline, lineincr; int line, endline, lineincr;
@ -252,30 +252,30 @@ void catseye_device::window_move()
bool dst = false; bool dst = false;
if (m_trrctl[idx] & 0x0100) { if (m_trrctl[Idx] & 0x0100) {
bool bit = m_patterns[idx][(m_plane << 4) | (dy & 0xf)] & (1 << (dx & 0xf)); bool bit = m_patterns[Idx][(m_plane << 4) | (dy & 0xf)] & (1 << (dx & 0xf));
switch (m_trr[idx] >> 8) { switch (m_trr[Idx] >> 8) {
case 0xf0: case 0xf0:
dst = bit; dst = bit;
break; break;
default: default:
logerror("%s: unknown trr %02x\n", __func__, m_trr[idx] >> 8); logerror("%s: unknown trr %02x\n", __func__, m_trr[Idx] >> 8);
break; break;
} }
} else { } else {
bool const src = get_vram_pixel_plane<idx>(sx, sy); bool const src = get_vram_pixel_plane<Idx>(sx, sy);
dst = get_vram_pixel<idx>(dx, dy); dst = get_vram_pixel<Idx>(dx, dy);
execute_rule(src, m_wrr[idx] & 0x0f, dst); execute_rule(src, m_wrr[Idx] & 0x0f, dst);
} }
modify_vram<idx>(dx, dy, dst); modify_vram<Idx>(dx, dy, dst);
} }
} }
} }
template<int idx> template<int Idx>
void catseye_device::draw_pixel(int x, int y, int color) void catseye_device::draw_pixel(int x, int y, int color)
{ {
if ((m_misc & CATSEYE_MISC_ENABLE_CLIP) && if ((m_misc & CATSEYE_MISC_ENABLE_CLIP) &&
@ -286,16 +286,16 @@ void catseye_device::draw_pixel(int x, int y, int color)
return; return;
bool src = color & m_plane_mask_l; bool src = color & m_plane_mask_l;
bool dst = get_vram_pixel<idx>(x, y); bool dst = get_vram_pixel<Idx>(x, y);
execute_rule(src, (m_prr[idx] >> 8) & 0x0f, dst); execute_rule(src, (m_prr[Idx] >> 8) & 0x0f, dst);
modify_vram<idx>(x, y, dst); modify_vram<Idx>(x, y, dst);
m_status |= CATSEYE_STATUS_UNCLIPPED; m_status |= CATSEYE_STATUS_UNCLIPPED;
} }
template<int idx> template<int Idx>
void catseye_device::draw_line() void catseye_device::draw_line()
{ {
const int color = m_color[idx] >> 8; const int color = m_color[Idx] >> 8;
int x1 = m_wmsourcex; int x1 = m_wmsourcex;
int y1 = m_wmsourcey; int y1 = m_wmsourcey;
int x2 = m_wmdestx; int x2 = m_wmdestx;
@ -304,7 +304,7 @@ void catseye_device::draw_line()
bool c1; bool c1;
LOGMASKED(LOG_WMOVE, "%s%d %dx%d -> %dx%d, color %d\n", LOGMASKED(LOG_WMOVE, "%s%d %dx%d -> %dx%d, color %d\n",
__func__, idx, m_wmsourcex, m_wmsourcey, m_wmdestx, m_wmdesty, color); __func__, Idx, m_wmsourcex, m_wmsourcey, m_wmdestx, m_wmdesty, color);
c1 = false; c1 = false;
incy = 1; incy = 1;
@ -359,7 +359,7 @@ void catseye_device::draw_line()
if (c1) { if (c1) {
do { do {
draw_pixel<idx>(y, x, color); draw_pixel<Idx>(y, x, color);
if (e > 0) { if (e > 0) {
y += incy; y += incy;
@ -371,7 +371,7 @@ void catseye_device::draw_line()
} while (x <= x2); } while (x <= x2);
} else { } else {
do { do {
draw_pixel<idx>(x, y, color); draw_pixel<Idx>(x, y, color);
if (e > 0) { if (e > 0) {
y += incy; y += incy;
e += diago; e += diago;
@ -384,21 +384,21 @@ void catseye_device::draw_line()
} }
template<int idx> template<int Idx>
void catseye_device::trigger_wm() void catseye_device::trigger_wm()
{ {
if (!m_fb_enable[idx]) if (!m_fb_enable[Idx])
return; return;
if ((m_vb[idx] & CATSEYE_VB_VECTOR) && (m_rugsc == 0x10)) if ((m_vb[Idx] & CATSEYE_VB_VECTOR) && (m_rugsc == 0x10))
draw_line<idx>(); draw_line<Idx>();
else if (m_rugsc == 0x90) else if (m_rugsc == 0x90)
window_move<idx>(); window_move<Idx>();
else else
logerror("%s: unsupported rugcmd: %04x vb %04x\n", __func__, m_rugsc, m_vb[idx]); logerror("%s: unsupported rugcmd: %04x vb %04x\n", __func__, m_rugsc, m_vb[Idx]);
} }
template<int idx> template<int Idx>
u16 catseye_device::vram_r_bit(offs_t offset) u16 catseye_device::vram_r_bit(offs_t offset)
{ {
u16 ret = 0; u16 ret = 0;
@ -406,31 +406,31 @@ u16 catseye_device::vram_r_bit(offs_t offset)
offset &= ~0x7; offset &= ~0x7;
for (int i = 0; i < 16; i++) for (int i = 0; i < 16; i++)
ret |= get_vram_offset_plane<idx>(offset * 2 + 15 - i) ? (1 << i) : 0; ret |= get_vram_offset_plane<Idx>(offset * 2 + 15 - i) ? (1 << i) : 0;
return ret; return ret;
} }
template<int idx> template<int Idx>
u16 catseye_device::vram_r_word(offs_t offset, u16 mem_mask) u16 catseye_device::vram_r_word(offs_t offset, u16 mem_mask)
{ {
u16 ret = 0; u16 ret = 0;
if (mem_mask & m_plane_mask_l) if (mem_mask & m_plane_mask_l)
ret |= get_vram_offset<idx>(offset * 2 + 1); ret |= get_vram_offset<Idx>(offset * 2 + 1);
if (mem_mask & m_plane_mask_h) if (mem_mask & m_plane_mask_h)
ret |= get_vram_offset<idx>(offset * 2) << 8; ret |= get_vram_offset<Idx>(offset * 2) << 8;
return ret; return ret;
} }
template<int idx> template<int Idx>
u16 catseye_device::vram_r(offs_t offset, u16 mem_mask) u16 catseye_device::vram_r(offs_t offset, u16 mem_mask)
{ {
if (m_acntrl & 0x100) if (m_acntrl & 0x100)
return vram_r_bit<idx>(offset); return vram_r_bit<Idx>(offset);
else else
return vram_r_word<idx>(offset, mem_mask); return vram_r_word<Idx>(offset, mem_mask);
} }
READ16_MEMBER(catseye_device::vram_r) READ16_MEMBER(catseye_device::vram_r)
@ -446,7 +446,7 @@ READ16_MEMBER(catseye_device::vram_r)
return ret; return ret;
} }
template<int idx> template<int Idx>
void catseye_device::vram_w_bit(offs_t offset, u16 data, u16 mem_mask) void catseye_device::vram_w_bit(offs_t offset, u16 data, u16 mem_mask)
{ {
offset &= ~0x7; offset &= ~0x7;
@ -458,37 +458,37 @@ void catseye_device::vram_w_bit(offs_t offset, u16 data, u16 mem_mask)
if (!(mem_mask & bit)) if (!(mem_mask & bit))
continue; continue;
bool dst = get_vram_offset<idx>(offset * 2 + 15 - i); bool dst = get_vram_offset<Idx>(offset * 2 + 15 - i);
execute_rule(data & bit, (m_prr[idx] >> 8) & 0x0f, dst); execute_rule(data & bit, (m_prr[Idx] >> 8) & 0x0f, dst);
modify_vram_offset<idx>(offset * 2 + 15 - i, dst); modify_vram_offset<Idx>(offset * 2 + 15 - i, dst);
} }
} }
template<int idx> template<int Idx>
void catseye_device::vram_w_word(offs_t offset, u16 data, u16 mem_mask) void catseye_device::vram_w_word(offs_t offset, u16 data, u16 mem_mask)
{ {
if (mem_mask & m_plane_mask_l) { if (mem_mask & m_plane_mask_l) {
const bool src = data & m_plane_mask_l; const bool src = data & m_plane_mask_l;
bool dst = get_vram_offset<idx>(offset * 2 + 1); bool dst = get_vram_offset<Idx>(offset * 2 + 1);
execute_rule(src, (m_prr[idx] >> 8) & 0x0f, dst); execute_rule(src, (m_prr[Idx] >> 8) & 0x0f, dst);
modify_vram_offset<idx>(offset * 2 + 1, dst); modify_vram_offset<Idx>(offset * 2 + 1, dst);
} }
if (mem_mask & m_plane_mask_h) { if (mem_mask & m_plane_mask_h) {
const bool src = data & m_plane_mask_h; const bool src = data & m_plane_mask_h;
bool dst = get_vram_offset<idx>(offset * 2); bool dst = get_vram_offset<Idx>(offset * 2);
execute_rule(src, (m_prr[idx] >> 8) & 0x0f, dst); execute_rule(src, (m_prr[Idx] >> 8) & 0x0f, dst);
modify_vram_offset<idx>(offset * 2, dst); modify_vram_offset<Idx>(offset * 2, dst);
} }
} }
template<int idx> template<int Idx>
void catseye_device::vram_w(offs_t offset, u16 data, u16 mem_mask) void catseye_device::vram_w(offs_t offset, u16 data, u16 mem_mask)
{ {
if (m_acntrl & 0x100) if (m_acntrl & 0x100)
vram_w_bit<idx>(offset, data, mem_mask); vram_w_bit<Idx>(offset, data, mem_mask);
else else
vram_w_word<idx>(offset, data, mem_mask); vram_w_word<Idx>(offset, data, mem_mask);
} }
WRITE16_MEMBER(catseye_device::vram_w) WRITE16_MEMBER(catseye_device::vram_w)

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@ -52,16 +52,16 @@ protected:
void execute_rule(const bool src, const int rule, bool &dst) const; void execute_rule(const bool src, const int rule, bool &dst) const;
void update_int(); void update_int();
template<int idx> void window_move(); template<int Idx> void window_move();
template<int idx> void draw_line(); template<int Idx> void draw_line();
template<int idx> void trigger_wm(); template<int Idx> void trigger_wm();
template<int idx> void draw_pixel(int x, int y, int color); template<int Idx> void draw_pixel(int x, int y, int color);
template<int idx> void vram_w(offs_t offset, u16 data, u16 mem_mask); template<int Idx> void vram_w(offs_t offset, u16 data, u16 mem_mask);
template<int idx> void vram_w_bit(offs_t offset, u16 data, u16 mem_mask); template<int Idx> void vram_w_bit(offs_t offset, u16 data, u16 mem_mask);
template<int idx> void vram_w_word(offs_t offset, u16 data, u16 mem_mask); template<int Idx> void vram_w_word(offs_t offset, u16 data, u16 mem_mask);
template<int idx> u16 vram_r(offs_t offset, u16 mem_mask); template<int Idx> u16 vram_r(offs_t offset, u16 mem_mask);
template<int idx> u16 vram_r_bit(offs_t offset); template<int Idx> u16 vram_r_bit(offs_t offset);
template<int idx> u16 vram_r_word(offs_t offset, u16 mem_mask); template<int Idx> u16 vram_r_word(offs_t offset, u16 mem_mask);
int get_plane_from_idx(const int idx) const { int get_plane_from_idx(const int idx) const {
if (idx == VRAM_VIDEO_PLANE) { if (idx == VRAM_VIDEO_PLANE) {
@ -77,55 +77,55 @@ protected:
} }
} }
template<int idx> template<int Idx>
void modify_vram(int x, int y, bool state) { void modify_vram(int x, int y, bool state) {
m_changed = true; m_changed = true;
m_status |= CATSEYE_STATUS_UNCLIPPED; m_status |= CATSEYE_STATUS_UNCLIPPED;
const int offset = y * m_fb_width + x; const int offset = y * m_fb_width + x;
if (state) if (state)
m_vram[idx][offset] |= m_plane_mask_l; m_vram[Idx][offset] |= m_plane_mask_l;
else else
m_vram[idx][offset] &= ~m_plane_mask_l; m_vram[Idx][offset] &= ~m_plane_mask_l;
} }
template<int idx> template<int Idx>
void modify_vram_offset(int offset, bool state) { void modify_vram_offset(int offset, bool state) {
m_changed = true; m_changed = true;
m_status |= CATSEYE_STATUS_UNCLIPPED; m_status |= CATSEYE_STATUS_UNCLIPPED;
if (state) if (state)
m_vram[idx][offset] |= m_plane_mask_l; m_vram[Idx][offset] |= m_plane_mask_l;
else else
m_vram[idx][offset] &= ~m_plane_mask_l; m_vram[Idx][offset] &= ~m_plane_mask_l;
} }
template<int idx> template<int Idx>
u8 get_vram_offset_plane(int offset) const { u8 get_vram_offset_plane(int offset) const {
const int plane = (m_planemode[idx] >> 8) & 0x0f; const int plane = (m_planemode[Idx] >> 8) & 0x0f;
if (!m_planemode[idx]) if (!m_planemode[Idx])
return m_vram[idx][offset] & m_plane_mask_l; return m_vram[Idx][offset] & m_plane_mask_l;
else if (plane < 8) else if (plane < 8)
return m_vram[idx][offset] & (1 << plane); return m_vram[Idx][offset] & (1 << plane);
else else
return m_vram[idx][offset] & (1 << (plane-8)); return m_vram[Idx][offset] & (1 << (plane-8));
} }
template<int idx> template<int Idx>
u8 get_vram_offset(int offset) const { u8 get_vram_offset(int offset) const {
return m_vram[idx][offset] & m_plane_mask_l; return m_vram[Idx][offset] & m_plane_mask_l;
} }
template<int idx> template<int Idx>
bool get_vram_pixel(int x, int y) const { bool get_vram_pixel(int x, int y) const {
return m_vram[get_plane_from_idx(idx)][y * m_fb_width + x] & m_plane_mask_l; return m_vram[get_plane_from_idx(Idx)][y * m_fb_width + x] & m_plane_mask_l;
} }
template<int idx> template<int Idx>
bool get_vram_pixel_plane(int x, int y) const { bool get_vram_pixel_plane(int x, int y) const {
const int plane = (m_planemode[idx] >> 8) & 0x0f; const int plane = (m_planemode[Idx] >> 8) & 0x0f;
const int offset = y * m_fb_width + x; const int offset = y * m_fb_width + x;
if (!(m_planemode[idx] & (1 << 12))) if (!(m_planemode[Idx] & (1 << 12)))
return m_vram[idx][offset] & m_plane_mask_l; return m_vram[Idx][offset] & m_plane_mask_l;
else if (plane < 8) else if (plane < 8)
return m_vram[0][offset] & (1 << plane); return m_vram[0][offset] & (1 << plane);
else else

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@ -1841,8 +1841,7 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(jaguar_state::cojagr3k) MACHINE_CONFIG_START(jaguar_state::cojagr3k)
/* basic machine hardware */ /* basic machine hardware */
R3041(config, m_maincpu, R3000_CLOCK); R3041(config, m_maincpu, R3000_CLOCK).set_endianness(ENDIANNESS_BIG);
downcast<r3041_device &>(*m_maincpu).set_endianness(ENDIANNESS_BIG);
m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::r3000_map); m_maincpu->set_addrmap(AS_PROGRAM, &jaguar_state::r3000_map);
MCFG_DEVICE_ADD("gpu", JAGUARGPU, COJAG_CLOCK/2) MCFG_DEVICE_ADD("gpu", JAGUARGPU, COJAG_CLOCK/2)

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@ -47,8 +47,8 @@
class ncd_020_state : public driver_device class ncd_020_state : public driver_device
{ {
public: public:
ncd_020_state(const machine_config &mconfig, device_type type, const char *tag) ncd_020_state(const machine_config &mconfig, device_type type, const char *tag) :
: driver_device(mconfig, type, tag), driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_mcu(*this, "mcu"), m_mcu(*this, "mcu"),
m_screen(*this, "screen"), m_screen(*this, "screen"),
@ -60,8 +60,13 @@ public:
} }
void ncd_17c(machine_config &config); void ncd_17c(machine_config &config);
void ncd_17c_map(address_map &map);
void ncd_19(machine_config &config); void ncd_19(machine_config &config);
protected:
virtual void machine_reset() override;
private:
void ncd_17c_map(address_map &map);
void ncd_19_map(address_map &map); void ncd_19_map(address_map &map);
void ncd_mcu_map(address_map &map); void ncd_mcu_map(address_map &map);
@ -83,9 +88,6 @@ public:
DECLARE_READ8_MEMBER(mcu_ports_r); DECLARE_READ8_MEMBER(mcu_ports_r);
DECLARE_WRITE8_MEMBER(mcu_ports_w); DECLARE_WRITE8_MEMBER(mcu_ports_w);
private:
virtual void machine_reset() override;
required_device<m68020_device> m_maincpu; required_device<m68020_device> m_maincpu;
required_device<m6805_device> m_mcu; required_device<m6805_device> m_mcu;
required_device<screen_device> m_screen; required_device<screen_device> m_screen;
@ -159,27 +161,18 @@ uint32_t ncd_020_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
uint32_t ncd_020_state::screen_update_19(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) uint32_t ncd_020_state::screen_update_19(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{ {
uint32_t *scanline; static constexpr uint32_t palette[2] = { 0, 0xffffff };
int x, y; uint8_t const *const vram = (uint8_t *)m_vram.target();
uint8_t pixels;
static const uint32_t palette[2] = { 0, 0xffffff };
uint8_t *vram = (uint8_t *)m_vram.target();
for (y = 0; y < 1024; y++) for (int y = 0; y < 1024; y++)
{ {
scanline = &bitmap.pix32(y); uint32_t *scanline = &bitmap.pix32(y);
for (x = 0; x < 1024/8; x++) for (int x = 0; x < 1024/8; x++)
{ {
pixels = vram[(y * (2048/8)) + (BYTE4_XOR_BE(x))]; uint8_t const pixels = vram[(y * (2048/8)) + (BYTE4_XOR_BE(x))];
*scanline++ = palette[(pixels>>7)&1]; for (int b = 0; b < 8; b++)
*scanline++ = palette[(pixels>>6)&1]; *scanline++ = palette[BIT(pixels, 7 - b)];
*scanline++ = palette[(pixels>>5)&1];
*scanline++ = palette[(pixels>>4)&1];
*scanline++ = palette[(pixels>>3)&1];
*scanline++ = palette[(pixels>>2)&1];
*scanline++ = palette[(pixels>>1)&1];
*scanline++ = palette[(pixels&1)];
} }
} }

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@ -38,8 +38,7 @@ namco_c117_device::namco_c117_device(const machine_config &mconfig, const char *
device_memory_interface(mconfig, *this), device_memory_interface(mconfig, *this),
m_subres_cb(*this), m_subres_cb(*this),
m_program_config("program", ENDIANNESS_BIG, 8, 23), m_program_config("program", ENDIANNESS_BIG, 8, 23),
m_maincpu_tag(nullptr), m_cpuexec{ { *this, finder_base::DUMMY_TAG }, { *this, finder_base::DUMMY_TAG } },
m_subcpu_tag(nullptr),
m_watchdog(*this, "watchdog") m_watchdog(*this, "watchdog")
{ {
} }
@ -61,13 +60,8 @@ void namco_c117_device::device_start()
m_program = &space(AS_PROGRAM); m_program = &space(AS_PROGRAM);
cpu_device *maincpu = siblingdevice<cpu_device>(m_maincpu_tag); m_cpucache[0] = m_cpuexec[0]->space(AS_PROGRAM).cache<0, 0, ENDIANNESS_BIG>();
cpu_device *subcpu = siblingdevice<cpu_device>(m_subcpu_tag); m_cpucache[1] = m_cpuexec[1]->space(AS_PROGRAM).cache<0, 0, ENDIANNESS_BIG>();
m_cpuexec[0] = maincpu;
m_cpuexec[1] = subcpu;
m_cpucache[0] = maincpu->space(AS_PROGRAM).cache<0, 0, ENDIANNESS_BIG>();
m_cpucache[1] = subcpu->space(AS_PROGRAM).cache<0, 0, ENDIANNESS_BIG>();
memset(&m_offsets, 0, sizeof(m_offsets)); memset(&m_offsets, 0, sizeof(m_offsets));
m_subres = m_wdog = 0; m_subres = m_wdog = 0;
@ -198,7 +192,7 @@ void namco_c117_device::register_w(int whichcpu, offs_t offset, uint8_t data)
unknown_reg = true; unknown_reg = true;
} }
if (unknown_reg) if (unknown_reg)
logerror("'%s' writing to unknown CUS117 register %04X = %02X\n", (whichcpu ? m_subcpu_tag : m_maincpu_tag), offset, data); logerror("'%s' writing to unknown CUS117 register %04X = %02X\n", m_cpuexec[whichcpu].finder_tag(), offset, data);
} }
void namco_c117_device::bankswitch(int whichcpu, int whichbank, int a0, uint8_t data) void namco_c117_device::bankswitch(int whichcpu, int whichbank, int a0, uint8_t data)

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@ -22,10 +22,10 @@ public:
namco_c117_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); namco_c117_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration // configuration
void set_cpu_tags(const char *maintag, const char *subtag) template <typename T, typename U> void set_cpu_tags(T &&maintag, U &&subtag)
{ {
m_maincpu_tag = maintag; m_cpuexec[0].set_tag(std::forward<T>(maintag));
m_subcpu_tag = subtag; m_cpuexec[1].set_tag(std::forward<U>(subtag));
} }
auto subres_cb() { return m_subres_cb.bind(); } auto subres_cb() { return m_subres_cb.bind(); }
@ -66,13 +66,9 @@ private:
address_space * m_program; address_space * m_program;
// cpu interfaces // cpu interfaces
device_execute_interface * m_cpuexec[2]; required_device<cpu_device> m_cpuexec[2];
memory_access_cache<0, 0, ENDIANNESS_BIG> *m_cpucache[2]; memory_access_cache<0, 0, ENDIANNESS_BIG> *m_cpucache[2];
// configuration
const char * m_maincpu_tag;
const char * m_subcpu_tag;
required_device<watchdog_timer_device> m_watchdog; required_device<watchdog_timer_device> m_watchdog;
}; };

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@ -21,8 +21,8 @@
void m52_state::init_palette() void m52_state::init_palette()
{ {
const int resistances_3[3] = { 1000, 470, 220 }; constexpr int resistances_3[3] = { 1000, 470, 220 };
const int resistances_2[2] = { 470, 220 }; constexpr int resistances_2[2] = { 470, 220 };
double weights_r[3], weights_g[3], weights_b[3], scale; double weights_r[3], weights_g[3], weights_b[3], scale;
/* compute palette information for characters/backgrounds */ /* compute palette information for characters/backgrounds */