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Naomi: improved Vblank-In irq timings [Angelo Salese]

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This commit is contained in:
Angelo Salese 2010-05-03 17:03:45 +00:00
parent 459a4ad272
commit f4681ba97f
2 changed files with 28 additions and 16 deletions
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9
src/mame/drivers/naomi.c
View File

@ -1151,11 +1151,6 @@ static UINT32 *dc_sound_ram;
/* MD2 MD1 MD0 MD6 MD4 MD3 MD5 MD7 MD8 */
static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1, 0, CPU_CLOCK };
static INTERRUPT_GEN( naomi_vblank )
{
dc_vblank(device->machine);
}
static READ64_HANDLER( naomi_arm_r )
{
return *((UINT64 *)dc_sound_ram+offset);
@ -1663,6 +1658,7 @@ static INPUT_PORTS_START( naomi_mp )
PORT_START("IN0")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service")
PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_LOW )
PORT_START("KEY1")
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED ) //TODO: mahjong panel test & service buttons are presumably here
@ -1828,7 +1824,6 @@ static MACHINE_DRIVER_START( naomi_base )
MDRV_CPU_CONFIG(sh4cpu_config)
MDRV_CPU_PROGRAM_MAP(naomi_map)
MDRV_CPU_IO_MAP(naomi_port)
MDRV_CPU_VBLANK_INT("screen", naomi_vblank)
MDRV_CPU_ADD("soundcpu", ARM7, ((XTAL_33_8688MHz*2)/3)/8) // AICA bus clock is 2/3rds * 33.8688. ARM7 gets 1 bus cycle out of each 8.
MDRV_CPU_PROGRAM_MAP(dc_audio_map)
@ -2999,7 +2994,7 @@ ROM_START( hotd2o )
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0xa800000, "user1", ROMREGION_ERASEFF)
ROM_LOAD( "epr-21385.ic22", 0x0000000, 0x200000, CRC(dedffe5f) SHA1(98b2a4c67ecb30cb096b9cea9061d904cf495937) )
ROM_LOAD( "epr-21385.ic22", 0x0000000, 0x200000, CRC(dedffe5f) SHA1(98b2a4c67ecb30cb096b9cea9061d904cf495937) )
ROM_LOAD( "mpr-21386.ic1", 0x0800000, 0x800000, CRC(88fb0562) SHA1(185a0eab68d86617cb6325d64c48a2dd4854622b) )
ROM_LOAD( "mpr-21387.ic2", 0x1000000, 0x800000, CRC(5f4dd576) SHA1(5483c3949e587bbcca7e8fc7db9aff4cd2a33f02) )
ROM_LOAD( "mpr-21388.ic3", 0x1800000, 0x800000, CRC(3e62fca4) SHA1(8cdebdebabc88160f458e1e779d9ebb4e6a14523) )

35
src/mame/video/dc.c
View File

@ -137,6 +137,7 @@ UINT64 *dc_texture_ram; // '64-bit access area'
static UINT32 tafifo_buff[32];
static emu_timer *vbout_timer;
static emu_timer *vbin_timer;
static emu_timer *hbin_timer;
static emu_timer *endofrender_timer_isp;
static emu_timer *endofrender_timer_tsp;
@ -1252,13 +1253,24 @@ WRITE64_HANDLER( pvr_ta_w )
printf("TA_YUV_TEX_CTRL initialized to %08x\n", dat);
break;
case SPG_VBLANK_INT:
/* clear pending irqs and modify them with the updated ones */
timer_adjust_oneshot(vbin_timer, attotime_never, 0), 0);
timer_adjust_oneshot(vbout_timer, attotime_never, 0), 0);
timer_adjust_oneshot(vbin_timer, video_screen_get_time_until_pos(machine->primary_screen, spg_vblank_in_irq_line_num, 0), 0);
timer_adjust_oneshot(vbout_timer, video_screen_get_time_until_pos(machine->primary_screen, spg_vblank_out_irq_line_num, 0), 0);
break;
/* TODO: timer adjust for SPG_HBLANK_INT too */
case TA_LIST_CONT:
#if DEBUG_PVRTA
mame_printf_verbose("List continuation processing\n");
#endif
state_ta.tafifo_listtype= -1; // no list being received
state_ta.listtype_used |= (1+4);
if(dat & 0x80000000)
{
state_ta.tafifo_listtype= -1; // no list being received
state_ta.listtype_used |= (1+4);
}
break;
case SPG_VBLANK:
case SPG_HBLANK:
@ -2444,6 +2456,14 @@ static void pvr_build_parameterconfig(void)
pvr_parameterconfig[a] = pvr_parameterconfig[a-1];
}
static TIMER_CALLBACK(vbin)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
dc_update_interrupt_status(machine);
timer_adjust_oneshot(vbin_timer, video_screen_get_time_until_pos(machine->primary_screen, spg_vblank_in_irq_line_num, 0), 0);
}
static TIMER_CALLBACK(vbout)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_OUT; // V Blank-out interrupt
@ -2544,8 +2564,12 @@ VIDEO_START(dc)
vbout_timer = timer_alloc(machine, vbout, 0);
timer_adjust_oneshot(vbout_timer, video_screen_get_time_until_pos(machine->primary_screen, spg_vblank_out_irq_line_num, 0), 0);
vbin_timer = timer_alloc(machine, vbin, 0);
timer_adjust_oneshot(vbin_timer, video_screen_get_time_until_pos(machine->primary_screen, spg_vblank_in_irq_line_num, 0), 0);
hbin_timer = timer_alloc(machine, hbin, 0);
timer_adjust_oneshot(hbin_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, spg_hblank_in_irq-1), 0);
scanline = 0;
next_y = 0;
@ -2608,10 +2632,3 @@ VIDEO_UPDATE(dc)
return 0;
}
/* TODO: remove this and add a new vblin timer, register generally sets V Blank-IN event to happen at line 260 (0x104), not 480! */
void dc_vblank(running_machine *machine)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
dc_update_interrupt_status(machine);
}