Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-29 00:53:09 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

CDP1869 changes:

Browse Source 
- converted page RAM functions to use devcb
- added pull interface for predisplay
This commit is contained in:
Curt Coder 2009-11-25 11:15:10 +00:00
parent 8836834f08
commit f47855ec04
4 changed files with 48 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
src/emu/sound/cdp1869.c
View File

@ -8,6 +8,7 @@
TODO: TODO:
- remove CDP1802 dependency
- white noise - white noise
- scanline based update - scanline based update
- CMSEL output - CMSEL output
@ -47,6 +48,8 @@ enum
typedef struct _cdp1869_t cdp1869_t; typedef struct _cdp1869_t cdp1869_t;
struct _cdp1869_t struct _cdp1869_t
{ {
devcb_resolved_read8 in_page_ram_func;
devcb_resolved_write8 out_page_ram_func;
devcb_resolved_write_line out_prd_func; devcb_resolved_write_line out_prd_func;
const device_config *device; const device_config *device;
@ -57,6 +60,7 @@ struct _cdp1869_t
int color_clock; int color_clock;
/* video state */ /* video state */
int prd; /* predisplay */
int dispoff; /* display off */ int dispoff; /* display off */
int fresvert; /* full resolution vertical */ int fresvert; /* full resolution vertical */
int freshorz; /* full resolution horizontal */ int freshorz; /* full resolution horizontal */
@ -161,6 +165,7 @@ static TIMER_CALLBACK( prd_changed_tick )
cdp1869_t *cdp1869 = get_safe_token(device); cdp1869_t *cdp1869 = get_safe_token(device);
devcb_call_write_line(&cdp1869->out_prd_func, param); devcb_call_write_line(&cdp1869->out_prd_func, param);
cdp1869->prd = param;
update_prd_changed_timer(cdp1869); update_prd_changed_timer(cdp1869);
} }
@ -609,7 +614,7 @@ READ8_DEVICE_HANDLER( cdp1869_pageram_r )
pma = offset; pma = offset;
} }
return cdp1869->intf->page_ram_r(device, pma); return devcb_call_read8(&cdp1869->in_page_ram_func, pma);
} }
/*------------------------------------------------- /*-------------------------------------------------
@ -631,10 +636,7 @@ WRITE8_DEVICE_HANDLER( cdp1869_pageram_w )
pma = offset; pma = offset;
} }
if (cdp1869->intf->page_ram_w) devcb_call_write8(&cdp1869->out_page_ram_func, pma, data);
{
cdp1869->intf->page_ram_w(device, pma, data);
}
} }
/*------------------------------------------------- /*-------------------------------------------------
@ -696,6 +698,17 @@ WRITE8_DEVICE_HANDLER( cdp1869_charram_w )
} }
} }
/*-------------------------------------------------
cdp1869_predisplay_r - predisplay read
-------------------------------------------------*/
READ_LINE_DEVICE_HANDLER( cdp1869_predisplay_r )
{
cdp1869_t *cdp1869 = get_safe_token(device);
return cdp1869->prd;
}
/*------------------------------------------------- /*-------------------------------------------------
cdp1869_update - screen update cdp1869_update - screen update
-------------------------------------------------*/ -------------------------------------------------*/
@ -849,11 +862,12 @@ static DEVICE_START( cdp1869 )
/* validate arguments */ /* validate arguments */
cdp1869->intf = (const cdp1869_interface *)device->static_config; cdp1869->intf = (const cdp1869_interface *)device->static_config;
assert(cdp1869->intf->page_ram_r != NULL);
assert(cdp1869->intf->pcb_r != NULL); assert(cdp1869->intf->pcb_r != NULL);
assert(cdp1869->intf->char_ram_r != NULL); assert(cdp1869->intf->char_ram_r != NULL);
/* resolve callbacks */ /* resolve callbacks */
devcb_resolve_read8(&cdp1869->in_page_ram_func, &cdp1869->intf->in_page_ram_func, device);
devcb_resolve_write8(&cdp1869->out_page_ram_func, &cdp1869->intf->out_page_ram_func, device);
devcb_resolve_write_line(&cdp1869->out_prd_func, &cdp1869->intf->out_prd_func, device); devcb_resolve_write_line(&cdp1869->out_prd_func, &cdp1869->intf->out_prd_func, device);
/* set initial values */ /* set initial values */
@ -879,6 +893,7 @@ static DEVICE_START( cdp1869 )
/* register for state saving */ /* register for state saving */
state_save_register_postload(device->machine, cdp1869_state_save_postload, cdp1869); state_save_register_postload(device->machine, cdp1869_state_save_postload, cdp1869);
state_save_register_device_item(device, 0, cdp1869->prd);
state_save_register_device_item(device, 0, cdp1869->dispoff); state_save_register_device_item(device, 0, cdp1869->dispoff);
state_save_register_device_item(device, 0, cdp1869->fresvert); state_save_register_device_item(device, 0, cdp1869->fresvert);
state_save_register_device_item(device, 0, cdp1869->freshorz); state_save_register_device_item(device, 0, cdp1869->freshorz);

12
src/emu/sound/cdp1869.h
View File

@ -111,10 +111,7 @@
#define CDP1869_CHAR_RAM_READ(name) UINT8 name(const device_config *device, UINT16 pma, UINT8 cma) #define CDP1869_CHAR_RAM_READ(name) UINT8 name(const device_config *device, UINT16 pma, UINT8 cma)
#define CDP1869_CHAR_RAM_WRITE(name) void name(const device_config *device, UINT16 pma, UINT8 cma, UINT8 data) #define CDP1869_CHAR_RAM_WRITE(name) void name(const device_config *device, UINT16 pma, UINT8 cma, UINT8 data)
#define CDP1869_PAGE_RAM_READ(name) UINT8 name(const device_config *device, UINT16 pma)
#define CDP1869_PAGE_RAM_WRITE(name) void name(const device_config *device, UINT16 pma, UINT8 data)
#define CDP1869_PCB_READ(name) int name(const device_config *device, UINT16 pma, UINT8 cma) #define CDP1869_PCB_READ(name) int name(const device_config *device, UINT16 pma, UINT8 cma)
#define CDP1869_ON_PRD_CHANGED(name) void name(const device_config *device, int prd)
/*************************************************************************** /***************************************************************************
TYPE DEFINITIONS TYPE DEFINITIONS
@ -122,8 +119,6 @@
typedef UINT8 (*cdp1869_char_ram_read_func)(const device_config *device, UINT16 pma, UINT8 cma); typedef UINT8 (*cdp1869_char_ram_read_func)(const device_config *device, UINT16 pma, UINT8 cma);
typedef void (*cdp1869_char_ram_write_func)(const device_config *device, UINT16 pma, UINT8 cma, UINT8 data); typedef void (*cdp1869_char_ram_write_func)(const device_config *device, UINT16 pma, UINT8 cma, UINT8 data);
typedef UINT8 (*cdp1869_page_ram_read_func)(const device_config *device, UINT16 pma);
typedef void (*cdp1869_page_ram_write_func)(const device_config *device, UINT16 pma, UINT8 data);
typedef int (*cdp1869_pcb_read_func)(const device_config *device, UINT16 pma, UINT8 cma); typedef int (*cdp1869_pcb_read_func)(const device_config *device, UINT16 pma, UINT8 cma);
enum _cdp1869_format { enum _cdp1869_format {
@ -145,10 +140,10 @@ struct _cdp1869_interface
cdp1869_format pal_ntsc; /* screen format */ cdp1869_format pal_ntsc; /* screen format */
/* page memory read function */ /* page memory read function */
cdp1869_page_ram_read_func page_ram_r; devcb_read8 in_page_ram_func;
/* page memory write function */ /* page memory write function */
cdp1869_page_ram_write_func page_ram_w; devcb_write8 out_page_ram_func;
/* page memory color bit read function */ /* page memory color bit read function */
cdp1869_pcb_read_func pcb_r; cdp1869_pcb_read_func pcb_r;
@ -188,6 +183,9 @@ WRITE8_DEVICE_HANDLER ( cdp1869_charram_w );
READ8_DEVICE_HANDLER ( cdp1869_pageram_r ); READ8_DEVICE_HANDLER ( cdp1869_pageram_r );
WRITE8_DEVICE_HANDLER ( cdp1869_pageram_w ); WRITE8_DEVICE_HANDLER ( cdp1869_pageram_w );
/* predisplay */
READ_LINE_DEVICE_HANDLER( cdp1869_predisplay_r );
/* screen update */ /* screen update */
void cdp1869_update(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect); void cdp1869_update(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect);

10
src/mame/drivers/cidelsa.c
View File

@ -313,7 +313,7 @@ static CUSTOM_INPUT( cdp1869_pcb_r )
return state->cdp1869_pcb; return state->cdp1869_pcb;
} }
static CUSTOM_INPUT( cdp1869_predisplay_r ) static CUSTOM_INPUT( cidelsa_prd_r )
{ {
cidelsa_state *state = (cidelsa_state *)field->port->machine->driver_data; cidelsa_state *state = (cidelsa_state *)field->port->machine->driver_data;
@ -354,7 +354,7 @@ static INPUT_PORTS_START( destryer )
PORT_DIPSETTING( 0x00, "Slot A: 2.5 Slot B: 5" ) PORT_DIPSETTING( 0x00, "Slot A: 2.5 Slot B: 5" )
PORT_START("EF") PORT_START("EF")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(cdp1869_predisplay_r, NULL) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(cidelsa_prd_r, NULL)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1
@ -404,7 +404,7 @@ static INPUT_PORTS_START( altair )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("EF") PORT_START("EF")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(cdp1869_predisplay_r, NULL) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(cidelsa_prd_r, NULL)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1
@ -456,7 +456,7 @@ static INPUT_PORTS_START( draco )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT )
PORT_START("EF") PORT_START("EF")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(cdp1869_predisplay_r, NULL) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE(CDP1869_TAG, cdp1869_predisplay_r)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) // ST
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) // M2
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) // M1
@ -555,7 +555,7 @@ static MACHINE_DRIVER_START( altair )
MDRV_MACHINE_RESET(cidelsa) MDRV_MACHINE_RESET(cidelsa)
/* input/output hardware */ /* input/output hardware */
MDRV_CDP1852_ADD("ic23", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1876 CMSEL (pin 32) */ MDRV_CDP1852_ADD("ic23", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1869 CMSEL (pin 37) */
MDRV_CDP1852_ADD("ic24", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in1_intf) MDRV_CDP1852_ADD("ic24", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in1_intf)
MDRV_CDP1852_ADD("ic25", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in2_intf) MDRV_CDP1852_ADD("ic25", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in2_intf)
MDRV_CDP1852_ADD("ic26", ALTAIR_CHR1 / 8, altair_cdp1852_out1_intf) /* clock is CDP1802 TPB */ MDRV_CDP1852_ADD("ic26", ALTAIR_CHR1 / 8, altair_cdp1852_out1_intf) /* clock is CDP1802 TPB */

42
src/mame/video/cidelsa.c
View File

@ -5,13 +5,13 @@
/* Page RAM Access */ /* Page RAM Access */
static CDP1869_PAGE_RAM_READ( cidelsa_pageram_r ) static READ8_DEVICE_HANDLER( cidelsa_pageram_r )
{ {
cidelsa_state *state = (cidelsa_state *)device->machine->driver_data; cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
UINT16 addr = pma & CIDELSA_PAGERAM_MASK; UINT16 addr = offset & CIDELSA_PAGERAM_MASK;
if (BIT(pma, 10)) if (BIT(offset, 10))
{ {
return 0xff; return 0xff;
} }
@ -19,13 +19,13 @@ static CDP1869_PAGE_RAM_READ( cidelsa_pageram_r )
return state->pageram[addr]; return state->pageram[addr];
} }
static CDP1869_PAGE_RAM_WRITE( cidelsa_pageram_w ) static WRITE8_DEVICE_HANDLER( cidelsa_pageram_w )
{ {
cidelsa_state *state = (cidelsa_state *)device->machine->driver_data; cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
UINT16 addr = pma & CIDELSA_PAGERAM_MASK; UINT16 addr = offset & CIDELSA_PAGERAM_MASK;
if (BIT(pma, 10)) if (BIT(offset, 10))
{ {
return; return;
} }
@ -33,20 +33,20 @@ static CDP1869_PAGE_RAM_WRITE( cidelsa_pageram_w )
state->pageram[addr] = data; state->pageram[addr] = data;
} }
static CDP1869_PAGE_RAM_READ( draco_pageram_r ) static READ8_DEVICE_HANDLER( draco_pageram_r )
{ {
cidelsa_state *state = (cidelsa_state *)device->machine->driver_data; cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
UINT16 addr = pma & DRACO_PAGERAM_MASK; UINT16 addr = offset & DRACO_PAGERAM_MASK;
return state->pageram[addr]; return state->pageram[addr];
} }
static CDP1869_PAGE_RAM_WRITE( draco_pageram_w ) static WRITE8_DEVICE_HANDLER( draco_pageram_w )
{ {
cidelsa_state *state = (cidelsa_state *)device->machine->driver_data; cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
UINT16 addr = pma & DRACO_PAGERAM_MASK; UINT16 addr = offset & DRACO_PAGERAM_MASK;
state->pageram[addr] = data; state->pageram[addr] = data;
} }
@ -134,13 +134,6 @@ static WRITE_LINE_DEVICE_HANDLER( cidelsa_prd_w )
driver_state->cdp1869_prd = !state; driver_state->cdp1869_prd = !state;
} }
static WRITE_LINE_DEVICE_HANDLER( draco_prd_w )
{
cidelsa_state *driver_state = (cidelsa_state *)device->machine->driver_data;
driver_state->cdp1869_prd = state;
}
/* CDP1869 Interface */ /* CDP1869 Interface */
static CDP1869_INTERFACE( destryer_cdp1869_intf ) static CDP1869_INTERFACE( destryer_cdp1869_intf )
@ -149,8 +142,8 @@ static CDP1869_INTERFACE( destryer_cdp1869_intf )
SCREEN_TAG, SCREEN_TAG,
0, 0,
CDP1869_PAL, CDP1869_PAL,
cidelsa_pageram_r, DEVCB_HANDLER(cidelsa_pageram_r),
cidelsa_pageram_w, DEVCB_HANDLER(cidelsa_pageram_w),
cidelsa_pcb_r, cidelsa_pcb_r,
cidelsa_charram_r, cidelsa_charram_r,
cidelsa_charram_w, cidelsa_charram_w,
@ -163,8 +156,8 @@ static CDP1869_INTERFACE( altair_cdp1869_intf )
SCREEN_TAG, SCREEN_TAG,
0, 0,
CDP1869_PAL, CDP1869_PAL,
cidelsa_pageram_r, DEVCB_HANDLER(cidelsa_pageram_r),
cidelsa_pageram_w, DEVCB_HANDLER(cidelsa_pageram_w),
cidelsa_pcb_r, cidelsa_pcb_r,
cidelsa_charram_r, cidelsa_charram_r,
cidelsa_charram_w, cidelsa_charram_w,
@ -177,12 +170,12 @@ static CDP1869_INTERFACE( draco_cdp1869_intf )
SCREEN_TAG, SCREEN_TAG,
0, 0,
CDP1869_PAL, CDP1869_PAL,
draco_pageram_r, DEVCB_HANDLER(draco_pageram_r),
draco_pageram_w, DEVCB_HANDLER(draco_pageram_w),
draco_pcb_r, draco_pcb_r,
draco_charram_r, draco_charram_r,
draco_charram_w, draco_charram_w,
DEVCB_LINE(draco_prd_w) DEVCB_NULL
}; };
/* Video Start */ /* Video Start */
@ -200,7 +193,6 @@ static void video_start(running_machine *machine, UINT16 pageram_size)
state->cdp1869 = devtag_get_device(machine, CDP1869_TAG); state->cdp1869 = devtag_get_device(machine, CDP1869_TAG);
/* register for state saving */ /* register for state saving */
state_save_register_global(machine, state->cdp1869_prd);
state_save_register_global(machine, state->cdp1869_pcb); state_save_register_global(machine, state->cdp1869_pcb);
state_save_register_global_pointer(machine, state->pageram, pageram_size); state_save_register_global_pointer(machine, state->pageram, pageram_size);
state_save_register_global_pointer(machine, state->pcbram, CIDELSA_CHARRAM_SIZE); state_save_register_global_pointer(machine, state->pcbram, CIDELSA_CHARRAM_SIZE);