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converted 53c810 to a c++ device. (nw)

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This commit is contained in:
smf- 2012-08-27 22:48:14 +00:00
parent adb561fa2c
commit f4aea2a62c
7 changed files with 416 additions and 367 deletions
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517
src/emu/machine/53c810.c
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@ -7,117 +7,62 @@
#define DMA_MAX_ICOUNT 512 /* Maximum number of DMA Scripts opcodes to run */
#define DASM_OPCODES 0
static scsidev_device *devices[8]; /* SCSI IDs 0-7 */
static const struct LSI53C810interface *intf;
static UINT8 last_id;
static struct {
UINT8 scntl0;
UINT8 scntl1;
UINT8 scntl2;
UINT8 scntl3;
UINT8 scid;
UINT8 sxfer;
UINT8 socl;
UINT8 istat;
UINT8 dstat;
UINT8 sstat0;
UINT8 sstat1;
UINT8 sstat2;
UINT8 dien;
UINT8 dcntl;
UINT8 dmode;
UINT32 temp;
UINT32 dsa;
UINT32 dsp;
UINT32 dsps;
UINT32 dcmd;
UINT8 sien0;
UINT8 sien1;
UINT8 stime0;
UINT8 respid;
UINT8 stest1;
UINT8 scratch_a[4];
UINT8 scratch_b[4];
int dma_icount;
int halted;
int carry;
UINT32 (* fetch)(UINT32 dsp);
void (* irq_callback)(running_machine &machine);
void (* dma_callback)(UINT32, UINT32, int, int);
} lsi810;
typedef void (*opcode_handler)(running_machine &machine);
#define OPCODE_HANDLER(name) void name(running_machine &machine)
static opcode_handler dma_opcode[256];
INLINE UINT32 FETCH(running_machine &machine)
UINT32 lsi53c810_device::FETCH()
{
UINT32 r = intf->fetch(machine, lsi810.dsp);
lsi810.dsp += 4;
UINT32 r = fetch(machine(), dsp);
dsp += 4;
return r;
}
#ifdef UNUSED_FUNCTION
static UINT32 sign_extend24(UINT32 val)
void lsi53c810_device::dmaop_invalid()
{
if (val & 0x00800000)
val |= 0xFF000000;
else
val &= ~0xFF000000;
return val;
}
#endif
static OPCODE_HANDLER( dmaop_invalid )
{
fatalerror("LSI53C810: Invalid SCRIPTS DMA opcode %08X at %08X", lsi810.dcmd, lsi810.dsp);
fatalerror("LSI53C810: Invalid SCRIPTS DMA opcode %08X at %08X", dcmd, dsp);
}
static OPCODE_HANDLER( dmaop_move_memory )
void lsi53c810_device::dmaop_move_memory()
{
UINT32 src = FETCH(machine);
UINT32 dst = FETCH(machine);
UINT32 src = FETCH();
UINT32 dst = FETCH();
int count;
count = lsi810.dcmd & 0xffffff;
if(intf->dma_callback != NULL) {
intf->dma_callback(machine, src, dst, count, 1);
count = dcmd & 0xffffff;
if(dma_callback != NULL) {
dma_callback(machine(), src, dst, count, 1);
}
}
static OPCODE_HANDLER( dmaop_interrupt )
void lsi53c810_device::dmaop_interrupt()
{
if(lsi810.dcmd & 0x100000) {
if(dcmd & 0x100000) {
fatalerror("LSI53C810: INTFLY opcode not implemented");
}
lsi810.dsps = FETCH(machine);
dsps = FETCH();
lsi810.istat |= 0x1; /* DMA interrupt pending */
lsi810.dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */
istat |= 0x1; /* DMA interrupt pending */
dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */
if(intf->irq_callback != NULL) {
intf->irq_callback(machine, 1);
if(irq_callback != NULL) {
irq_callback(machine(), 1);
}
lsi810.dma_icount = 0;
lsi810.halted = 1;
dma_icount = 0;
halted = 1;
}
static OPCODE_HANDLER( dmaop_block_move )
void lsi53c810_device::dmaop_block_move()
{
UINT32 address;
UINT32 count;
INT32 dsps;
address = FETCH(machine);
count = lsi810.dcmd & 0x00ffffff;
address = FETCH();
count = dcmd & 0x00ffffff;
// normal indirect
if (lsi810.dcmd & 0x20000000)
address = intf->fetch(machine, address);
if (dcmd & 0x20000000)
address = fetch(machine(), address);
// table indirect
if (lsi810.dcmd & 0x10000000)
if (dcmd & 0x10000000)
{
dsps = (INT32)address&0xffffff;
// sign extend
@ -125,17 +70,17 @@ static OPCODE_HANDLER( dmaop_block_move )
{
dsps |= 0xff000000;
}
logerror("table offset: %x, DSA = %x\n", dsps, lsi810.dsa);
dsps += lsi810.dsa;
logerror("table offset: %x, DSA = %x\n", dsps, dsa);
dsps += dsa;
logerror("Loading from table at %x\n", dsps);
count = lsi810.fetch(dsps);
address = lsi810.fetch(dsps+4);
count = fetch(machine(),dsps);
address = fetch(machine(),dsps+4);
}
logerror("block move: address %x count %x phase %x\n", address, count, (lsi810.dcmd>>24)&7);
logerror("block move: address %x count %x phase %x\n", address, count, (dcmd>>24)&7);
if (lsi810.scntl0 & 0x01)
if (scntl0 & 0x01)
{
/* target mode */
fatalerror("LSI53C810: dmaop_block_move not implemented in target mode");
@ -147,38 +92,38 @@ static OPCODE_HANDLER( dmaop_block_move )
}
}
static OPCODE_HANDLER( dmaop_select )
void lsi53c810_device::dmaop_select()
{
// UINT32 operand;
// operand = FETCH(machine);
// operand = FETCH();
if (lsi810.scntl0 & 0x01)
if (scntl0 & 0x01)
{
/* target mode */
logerror("LSI53C810: reselect ID #%d\n", (lsi810.dcmd >> 16) & 0x07);
logerror("LSI53C810: reselect ID #%d\n", (dcmd >> 16) & 0x07);
}
else
{
/* initiator mode */
logerror("53c810: SELECT: our ID %d, target ID %d\n", lsi810.scid&7, (lsi810.dcmd>>16)&7);
logerror("53c810: SELECT: our ID %d, target ID %d\n", scid&7, (dcmd>>16)&7);
lsi810.sstat1 &= ~0x07; // clear current bus phase
if (lsi810.dcmd & 0x01000000) // select with ATN
sstat1 &= ~0x07; // clear current bus phase
if (dcmd & 0x01000000) // select with ATN
{
mame_printf_debug("53c810: want select with ATN, setting message phase\n");
lsi810.sstat1 |= 0x7; // ATN means we want message in phase
sstat1 |= 0x7; // ATN means we want message in phase
}
}
}
static OPCODE_HANDLER( dmaop_wait_disconnect )
void lsi53c810_device::dmaop_wait_disconnect()
{
// UINT32 operand;
// operand = FETCH(machine);
// operand = FETCH();
if (lsi810.scntl0 & 0x01)
if (scntl0 & 0x01)
{
/* target mode */
fatalerror("LSI53C810: dmaop_wait_disconnect not implemented in target mode");
@ -190,13 +135,13 @@ static OPCODE_HANDLER( dmaop_wait_disconnect )
}
}
static OPCODE_HANDLER( dmaop_wait_reselect )
void lsi53c810_device::dmaop_wait_reselect()
{
// UINT32 operand;
// operand = FETCH(machine);
// operand = FETCH();
if (lsi810.scntl0 & 0x01)
if (scntl0 & 0x01)
{
/* target mode */
fatalerror("LSI53C810: dmaop_wait_reselect not implemented in target mode");
@ -208,80 +153,80 @@ static OPCODE_HANDLER( dmaop_wait_reselect )
}
}
static OPCODE_HANDLER( dmaop_set )
void lsi53c810_device::dmaop_set()
{
// UINT32 operand;
// operand = FETCH(machine);
// operand = FETCH();
/* initiator mode */
if (lsi810.dcmd & 0x8)
if (dcmd & 0x8)
{
// set ATN in SOCL
lsi810.socl |= 0x08;
socl |= 0x08;
}
if (lsi810.dcmd & 0x40)
if (dcmd & 0x40)
{
// set ACK in SOCL
lsi810.socl |= 0x40;
socl |= 0x40;
}
if (lsi810.dcmd & 0x200)
if (dcmd & 0x200)
{
// set target mode
lsi810.scntl0 |= 0x01;
scntl0 |= 0x01;
}
if (lsi810.dcmd & 0x400)
if (dcmd & 0x400)
{
// set carry in ALU
lsi810.carry = 1;
carry = 1;
}
}
static OPCODE_HANDLER( dmaop_clear )
void lsi53c810_device::dmaop_clear()
{
// UINT32 operand;
// operand = FETCH(machine);
// operand = FETCH();
/* initiator mode */
if (lsi810.dcmd & 0x8)
if (dcmd & 0x8)
{
// clear ATN in SOCL
lsi810.socl &= ~0x08;
socl &= ~0x08;
}
if (lsi810.dcmd & 0x40)
if (dcmd & 0x40)
{
// clear ACK in SOCL
lsi810.socl &= ~0x40;
socl &= ~0x40;
}
if (lsi810.dcmd & 0x200)
if (dcmd & 0x200)
{
// clear target mode
lsi810.scntl0 &= ~0x01;
scntl0 &= ~0x01;
}
if (lsi810.dcmd & 0x400)
if (dcmd & 0x400)
{
// clear carry in ALU
lsi810.carry = 0;
carry = 0;
}
}
static OPCODE_HANDLER( dmaop_move_from_sfbr )
void lsi53c810_device::dmaop_move_from_sfbr()
{
fatalerror("LSI53C810: dmaop_move_from_sfbr not implemented in target mode");
}
static OPCODE_HANDLER( dmaop_move_to_sfbr )
void lsi53c810_device::dmaop_move_to_sfbr()
{
fatalerror("LSI53C810: dmaop_move_to_sfbr not implemented");
}
static OPCODE_HANDLER( dmaop_read_modify_write )
void lsi53c810_device::dmaop_read_modify_write()
{
fatalerror("LSI53C810: dmaop_read_modify_write not implemented");
}
static int scripts_compute_branch(void)
int lsi53c810_device::scripts_compute_branch()
{
int dtest, ptest, wanted, passed;
@ -292,28 +237,28 @@ static int scripts_compute_branch(void)
// | |compare phase
// |desired phase: message in
if (lsi810.dcmd & 0x00200000)
if (dcmd & 0x00200000)
{
fatalerror("LSI53C810: jump with carry test not implemented");
}
if (lsi810.dcmd & 0x00100000)
if (dcmd & 0x00100000)
{
fatalerror("LSI53C810: jump with interrupt on the fly not implemented");
}
// set desired result to take jump
wanted = (lsi810.dcmd & 0x00080000) ? 1 : 0;
wanted = (dcmd & 0x00080000) ? 1 : 0;
// default to passing the tests in case they're disabled
dtest = ptest = wanted;
// phase test?
if (lsi810.dcmd & 0x00020000)
if (dcmd & 0x00020000)
{
logerror("53c810: phase test. current: %x. target: %x\n", lsi810.sstat1 & 7, (lsi810.dcmd>>24)&7);
logerror("53c810: phase test. current: %x. target: %x\n", sstat1 & 7, (dcmd>>24)&7);
// do the phases match?
if (((lsi810.dcmd>>24)&7) == (lsi810.sstat1 & 7))
if (((dcmd>>24)&7) == (sstat1 & 7))
{
ptest = 1;
}
@ -324,9 +269,9 @@ static int scripts_compute_branch(void)
}
// data test?
if (lsi810.dcmd & 0x00040000)
if (dcmd & 0x00040000)
{
logerror("53c810: data test. target: %x [not yet implemented]\n", lsi810.dcmd&0xff);
logerror("53c810: data test. target: %x [not yet implemented]\n", dcmd&0xff);
}
// if all conditions go, take the jump
@ -341,15 +286,15 @@ static int scripts_compute_branch(void)
return passed;
}
static UINT32 scripts_get_jump_dest(running_machine &machine)
UINT32 lsi53c810_device::scripts_get_jump_dest()
{
INT32 dsps;
UINT32 dest;
dsps = FETCH(machine);
dsps = FETCH();
/* relative or absolute addressing? */
if (lsi810.dcmd & 0x00800000)
if (dcmd & 0x00800000)
{
// sign-extend the 24-bit value
if (dsps & 0x00800000)
@ -357,170 +302,170 @@ static UINT32 scripts_get_jump_dest(running_machine &machine)
dsps |= 0xff000000;
}
logerror("dsps = %x, dsp = %x\n", dsps, lsi810.dsp);
dsps += lsi810.dsp;
logerror("dsps = %x, dsp = %x\n", dsps, dsp);
dsps += dsp;
}
dest = (UINT32)dsps;
logerror("cur DSP %x, dest %x\n", lsi810.dsp, dest);
logerror("cur DSP %x, dest %x\n", dsp, dest);
return dest;
}
static OPCODE_HANDLER( dmaop_jump )
void lsi53c810_device::dmaop_jump()
{
if (scripts_compute_branch())
{
lsi810.dsp = scripts_get_jump_dest(machine);
dsp = scripts_get_jump_dest();
}
else
{
FETCH(machine); // skip operand to continue on
FETCH(); // skip operand to continue on
}
}
static OPCODE_HANDLER( dmaop_call )
void lsi53c810_device::dmaop_call()
{
if (scripts_compute_branch())
{
// save return address
lsi810.temp = lsi810.dsp;
temp = dsp;
// and go
lsi810.dsp = scripts_get_jump_dest(machine);
dsp = scripts_get_jump_dest();
}
else
{
FETCH(machine); // skip operand to continue on
FETCH(); // skip operand to continue on
}
}
static OPCODE_HANDLER( dmaop_return )
void lsi53c810_device::dmaop_return()
{
// is this correct? return only happens if the condition is true?
if (scripts_compute_branch())
{
// restore return address
lsi810.dsp = lsi810.temp;
dsp = temp;
}
else
{
FETCH(machine); // skip operand to continue on
FETCH(); // skip operand to continue on
}
}
static OPCODE_HANDLER( dmaop_store )
void lsi53c810_device::dmaop_store()
{
fatalerror("LSI53C810: dmaop_store not implemented");
}
static OPCODE_HANDLER( dmaop_load )
void lsi53c810_device::dmaop_load()
{
fatalerror("LSI53C810: dmaop_load not implemented");
}
static void dma_exec(running_machine &machine)
void lsi53c810_device::dma_exec()
{
lsi810.dma_icount = DMA_MAX_ICOUNT;
dma_icount = DMA_MAX_ICOUNT;
while(lsi810.dma_icount > 0)
while(dma_icount > 0)
{
int op;
if (DASM_OPCODES)
{
char buf[256];
lsi53c810_dasm(machine, buf, lsi810.dsp);
logerror("0x%08X: %s\n", lsi810.dsp, buf);
lsi53c810_dasm(buf, dsp);
logerror("0x%08X: %s\n", dsp, buf);
}
lsi810.dcmd = FETCH(machine);
dcmd = FETCH();
op = (lsi810.dcmd >> 24) & 0xff;
dma_opcode[op](machine);
op = (dcmd >> 24) & 0xff;
dma_opcode[op]();
lsi810.dma_icount--;
dma_icount--;
}
}
READ8_HANDLER( lsi53c810_reg_r )
UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
{
logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device()));
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device()));
switch(offset)
{
case 0x00: /* SCNTL0 */
return lsi810.scntl0;
return scntl0;
case 0x01: /* SCNTL1 */
return lsi810.scntl1;
return scntl1;
case 0x02: /* SCNTL2 */
return lsi810.scntl2;
return scntl2;
case 0x03: /* SCNTL3 */
return lsi810.scntl3;
return scntl3;
case 0x04: /* SCID */
return lsi810.scid;
return scid;
case 0x05: /* SXFER */
return lsi810.sxfer;
return sxfer;
case 0x09: /* SOCL */
return lsi810.socl;
return socl;
case 0x0c: /* DSTAT */
return lsi810.dstat;
return dstat;
case 0x0d: /* SSTAT0 */
return lsi810.sstat0;
return sstat0;
case 0x0e: /* SSTAT1 */
return lsi810.sstat1;
return sstat1;
case 0x0f: /* SSTAT2 */
return lsi810.sstat2;
return sstat2;
case 0x10: /* DSA [7-0] */
return lsi810.dsa & 0xff;
return dsa & 0xff;
case 0x11: /* DSA [15-8] */
return (lsi810.dsa >> 8) & 0xff;
return (dsa >> 8) & 0xff;
case 0x12: /* DSA [23-16] */
return (lsi810.dsa >> 16) & 0xff;
return (dsa >> 16) & 0xff;
case 0x13: /* DSA [31-24] */
return (lsi810.dsa >> 24) & 0xff;
return (dsa >> 24) & 0xff;
case 0x14: /* ISTAT */
// clear the interrupt on service
if(intf->irq_callback != NULL)
if(irq_callback != NULL)
{
intf->irq_callback(space->machine(), 0);
irq_callback(machine(), 0);
}
return lsi810.istat;
return istat;
case 0x2c: /* DSP [7-0] */
return lsi810.dsp & 0xff;
return dsp & 0xff;
case 0x2d: /* DSP [15-8] */
return (lsi810.dsp >> 8) & 0xff;
return (dsp >> 8) & 0xff;
case 0x2e: /* DSP [23-16] */
return (lsi810.dsp >> 16) & 0xff;
return (dsp >> 16) & 0xff;
case 0x2f: /* DSP [31-24] */
return (lsi810.dsp >> 24) & 0xff;
return (dsp >> 24) & 0xff;
case 0x34: /* SCRATCH A */
case 0x35:
case 0x36:
case 0x37:
return lsi810.scratch_a[offset % 4];
return scratch_a[offset % 4];
case 0x39: /* DIEN */
return lsi810.dien;
return dien;
case 0x3b: /* DCNTL */
return lsi810.dcntl;
return dcntl;
case 0x40: /* SIEN0 */
return lsi810.sien0;
return sien0;
case 0x41: /* SIEN1 */
return lsi810.sien1;
return sien1;
case 0x48: /* STIME0 */
return lsi810.stime0;
return stime0;
case 0x4a: /* RESPID */
return lsi810.respid;
return respid;
case 0x4d: /* STEST1 */
return lsi810.stest1;
return stest1;
case 0x5c: /* SCRATCH B */
case 0x5d:
case 0x5e:
case 0x5f:
return lsi810.scratch_b[offset % 4];
return scratch_b[offset % 4];
default:
fatalerror("LSI53C810: reg_r: Unknown reg %02X", offset);
@ -529,133 +474,133 @@ READ8_HANDLER( lsi53c810_reg_r )
return 0;
}
WRITE8_HANDLER( lsi53c810_reg_w )
void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
{
logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device()));
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device()));
switch(offset)
{
case 0x00: /* SCNTL0 */
lsi810.scntl0 = data;
scntl0 = data;
break;
case 0x01: /* SCNTL1 */
lsi810.scntl1 = data;
scntl1 = data;
break;
case 0x02: /* SCNTL2 */
lsi810.scntl2 = data;
scntl2 = data;
break;
case 0x03: /* SCNTL3 */
lsi810.scntl3 = data;
scntl3 = data;
break;
case 0x04: /* SCID */
lsi810.scid = data;
scid = data;
break;
case 0x05: /* SXFER */
lsi810.sxfer = data;
sxfer = data;
break;
case 0x09: /* SOCL */
lsi810.socl = data;
socl = data;
break;
case 0x0d: /* SSTAT0 */
lsi810.sstat0 = data;
sstat0 = data;
break;
case 0x0e: /* SSTAT1 */
lsi810.sstat1 = data;
sstat1 = data;
break;
case 0x0f: /* SSTAT2 */
lsi810.sstat2 = data;
sstat2 = data;
break;
case 0x10: /* DSA [7-0] */
lsi810.dsa &= 0xffffff00;
lsi810.dsa |= data;
dsa &= 0xffffff00;
dsa |= data;
break;
case 0x11: /* DSA [15-8] */
lsi810.dsa &= 0xffff00ff;
lsi810.dsa |= data << 8;
dsa &= 0xffff00ff;
dsa |= data << 8;
break;
case 0x12: /* DSA [23-16] */
lsi810.dsa &= 0xff00ffff;
lsi810.dsa |= data << 16;
dsa &= 0xff00ffff;
dsa |= data << 16;
break;
case 0x13: /* DSA [31-24] */
lsi810.dsa &= 0x00ffffff;
lsi810.dsa |= data << 24;
dsa &= 0x00ffffff;
dsa |= data << 24;
break;
case 0x14: /* ISTAT */
lsi810.istat = data;
istat = data;
break;
case 0x2c: /* DSP [7-0] */
lsi810.dsp &= 0xffffff00;
lsi810.dsp |= data;
dsp &= 0xffffff00;
dsp |= data;
break;
case 0x2d: /* DSP [15-8] */
lsi810.dsp &= 0xffff00ff;
lsi810.dsp |= data << 8;
dsp &= 0xffff00ff;
dsp |= data << 8;
break;
case 0x2e: /* DSP [23-16] */
lsi810.dsp &= 0xff00ffff;
lsi810.dsp |= data << 16;
dsp &= 0xff00ffff;
dsp |= data << 16;
break;
case 0x2f: /* DSP [31-24] */
lsi810.dsp &= 0x00ffffff;
lsi810.dsp |= data << 24;
lsi810.halted = 0;
if((lsi810.dmode & 0x1) == 0 && !lsi810.halted) {
dma_exec(space->machine());
dsp &= 0x00ffffff;
dsp |= data << 24;
halted = 0;
if((dmode & 0x1) == 0 && !halted) {
dma_exec();
}
break;
case 0x34: /* SCRATCH A */
case 0x35:
case 0x36:
case 0x37:
lsi810.scratch_a[offset % 4] = data;
scratch_a[offset % 4] = data;
break;
case 0x38: /* DMODE */
lsi810.dmode = data;
dmode = data;
break;
case 0x39: /* DIEN */
lsi810.dien = data;
dien = data;
break;
case 0x3b: /* DCNTL */
lsi810.dcntl = data;
dcntl = data;
if(lsi810.dcntl & 0x14 && !lsi810.halted) /* single-step & start DMA */
if(dcntl & 0x14 && !halted) /* single-step & start DMA */
{
int op;
lsi810.dcmd = FETCH(space->machine());
op = (lsi810.dcmd >> 24) & 0xff;
dma_opcode[op](space->machine());
dcmd = FETCH();
op = (dcmd >> 24) & 0xff;
dma_opcode[op]();
lsi810.istat |= 0x3; /* DMA interrupt pending */
lsi810.dstat |= 0x8; /* SSI (Single Step Interrupt) */
if(intf->irq_callback != NULL) {
intf->irq_callback(space->machine(), 1);
istat |= 0x3; /* DMA interrupt pending */
dstat |= 0x8; /* SSI (Single Step Interrupt) */
if(irq_callback != NULL) {
irq_callback(machine(), 1);
}
}
else if(lsi810.dcntl & 0x04 && !lsi810.halted) /* manual start DMA */
else if(dcntl & 0x04 && !halted) /* manual start DMA */
{
dma_exec(space->machine());
dma_exec();
}
break;
case 0x40: /* SIEN0 */
lsi810.sien0 = data;
sien0 = data;
break;
case 0x41: /* SIEN1 */
lsi810.sien1 = data;
sien1 = data;
break;
case 0x48: /* STIME0 */
lsi810.stime0 = data;
stime0 = data;
break;
case 0x4a: /* RESPID */
lsi810.respid = data;
respid = data;
break;
case 0x4d: /* STEST1 */
lsi810.stest1 = data;
stest1 = data;
break;
case 0x5c: /* SCRATCH B */
case 0x5d:
case 0x5e:
case 0x5f:
lsi810.scratch_b[offset % 4] = data;
scratch_b[offset % 4] = data;
break;
default:
@ -663,7 +608,7 @@ WRITE8_HANDLER( lsi53c810_reg_w )
}
}
static void add_opcode(UINT8 op, UINT8 mask, opcode_handler handler)
void lsi53c810_device::add_opcode(UINT8 op, UINT8 mask, opcode_handler_delegate handler)
{
int i;
for(i=0; i < 256; i++) {
@ -673,47 +618,58 @@ static void add_opcode(UINT8 op, UINT8 mask, opcode_handler handler)
}
}
void lsi53c810_init(running_machine &machine, const struct LSI53C810interface *interface)
lsi53c810_device::lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, LSI53C810, "53C810 SCSI", tag, owner, clock)
{
}
void lsi53c810_device::device_config_complete()
{
// inherit a copy of the static data
const LSI53C810interface *intf = reinterpret_cast<const LSI53C810interface *>(static_config());
if (intf != NULL)
{
*static_cast<LSI53C810interface *>(this) = *intf;
}
}
void lsi53c810_device::device_start()
{
int i;
// save interface pointer for later
intf = interface;
memset(&lsi810, 0, sizeof(lsi810));
for(i = 0; i < 256; i++)
{
dma_opcode[i] = dmaop_invalid;
dma_opcode[i] = opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_invalid ), this);
}
add_opcode(0x00, 0xc0, dmaop_block_move);
add_opcode(0x40, 0xf8, dmaop_select);
add_opcode(0x48, 0xf8, dmaop_wait_disconnect);
add_opcode(0x50, 0xf8, dmaop_wait_reselect);
add_opcode(0x58, 0xf8, dmaop_set);
add_opcode(0x60, 0xf8, dmaop_clear);
add_opcode(0x68, 0xf8, dmaop_move_from_sfbr);
add_opcode(0x70, 0xf8, dmaop_move_to_sfbr);
add_opcode(0x78, 0xf8, dmaop_read_modify_write);
add_opcode(0x80, 0xf8, dmaop_jump);
add_opcode(0x88, 0xf8, dmaop_call);
add_opcode(0x90, 0xf8, dmaop_return);
add_opcode(0x98, 0xf8, dmaop_interrupt);
add_opcode(0xc0, 0xfe, dmaop_move_memory);
add_opcode(0xe0, 0xed, dmaop_store);
add_opcode(0xe1, 0xed, dmaop_load);
add_opcode(0x00, 0xc0, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_block_move ), this));
add_opcode(0x40, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_select ), this));
add_opcode(0x48, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_wait_disconnect ), this));
add_opcode(0x50, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_wait_reselect ), this));
add_opcode(0x58, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_set ), this));
add_opcode(0x60, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_clear ), this));
add_opcode(0x68, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_from_sfbr ), this));
add_opcode(0x70, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_to_sfbr ), this));
add_opcode(0x78, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_read_modify_write ), this));
add_opcode(0x80, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_jump ), this));
add_opcode(0x88, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_call ), this));
add_opcode(0x90, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_return ), this));
add_opcode(0x98, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_interrupt ), this));
add_opcode(0xc0, 0xfe, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_memory ), this));
add_opcode(0xe0, 0xed, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_store ), this));
add_opcode(0xe1, 0xed, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_load ), this));
memset(devices, 0, sizeof(devices));
// try to open the devices
for (i = 0; i < interface->scsidevs->devs_present; i++)
for (i = 0; i < scsidevs->devs_present; i++)
{
scsidev_device *device = machine.device<scsidev_device>( interface->scsidevs->devices[i].tag );
scsidev_device *device = owner()->subdevice<scsidev_device>( scsidevs->devices[i].tag );
devices[device->GetDeviceID()] = device;
}
}
void lsi53c810_read_data(int bytes, UINT8 *pData)
void lsi53c810_device::lsi53c810_read_data(int bytes, UINT8 *pData)
{
if (devices[last_id])
{
@ -725,7 +681,7 @@ void lsi53c810_read_data(int bytes, UINT8 *pData)
}
}
void lsi53c810_write_data(int bytes, UINT8 *pData)
void lsi53c810_device::lsi53c810_write_data(int bytes, UINT8 *pData)
{
if (devices[last_id])
{
@ -743,16 +699,16 @@ void lsi53c810_write_data(int bytes, UINT8 *pData)
*
*************************************/
static UINT32 lsi53c810_dasm_fetch(running_machine &machine, UINT32 pc)
UINT32 lsi53c810_device::lsi53c810_dasm_fetch(UINT32 pc)
{
return intf->fetch(machine, pc);
return fetch(machine(), pc);
}
unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
unsigned lsi53c810_device::lsi53c810_dasm(char *buf, UINT32 pc)
{
unsigned result = 0;
const char *op_mnemonic = NULL;
UINT32 op = lsi53c810_dasm_fetch(machine, pc);
UINT32 op = lsi53c810_dasm_fetch(pc);
UINT32 dest;
int i;
@ -765,7 +721,7 @@ unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
if ((op & 0xF8000000) == 0x40000000)
{
/* SELECT */
dest = lsi53c810_dasm_fetch(machine, pc + 4);
dest = lsi53c810_dasm_fetch(pc + 4);
buf += sprintf(buf, "SELECT%s %d, 0x%08X",
(op & 0x01000000) ? " ATN" : "",
@ -824,7 +780,7 @@ unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
case 0x98000000: op_mnemonic = "INT"; break;
}
dest = lsi53c810_dasm_fetch(machine, pc + 4);
dest = lsi53c810_dasm_fetch(pc + 4);
if (op & 0x00800000)
{
@ -870,7 +826,7 @@ unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
else if ((op & 0xE0000000) == 0x00000000)
{
/* MOVE FROM */
dest = lsi53c810_dasm_fetch(machine, pc + 4);
dest = lsi53c810_dasm_fetch(pc + 4);
buf += sprintf(buf, "MOVE FROM 0x%08X, WHEN %s",
dest, phases[(op >> 24) & 0x07]);
@ -880,7 +836,7 @@ unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
else if ((op & 0xE0000000) == 0x20000000)
{
/* MOVE PTR */
dest = lsi53c810_dasm_fetch(machine, pc + 4);
dest = lsi53c810_dasm_fetch(pc + 4);
buf += sprintf(buf, "MOVE 0x%08X, PTR 0x%08X, WHEN %s",
(op & 0x00FFFFFF), dest, phases[(op >> 24) & 0x07]);
@ -894,3 +850,4 @@ unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc)
return result;
}
const device_type LSI53C810 = &device_creator<lsi53c810_device>;

95
src/emu/machine/53c810.h
View File

@ -1,7 +1,8 @@
#ifndef LSI53C810_H
#define LSI53C810_H
#include "machine/scsi.h"
#include "scsi.h"
#include "scsidev.h"
struct LSI53C810interface
{
@ -11,14 +12,94 @@ struct LSI53C810interface
UINT32 (*fetch)(running_machine &machine, UINT32 dsp);
};
extern void lsi53c810_init(running_machine &machine, const struct LSI53C810interface *interface);
#define MCFG_LSI53C810_ADD( _tag, _config ) \
MCFG_DEVICE_ADD( _tag, LSI53C810, 0 ) \
MCFG_DEVICE_CONFIG(_config)
extern void lsi53c810_read_data(int bytes, UINT8 *pData);
extern void lsi53c810_write_data(int bytes, UINT8 *pData);
class lsi53c810_device : public device_t,
public LSI53C810interface
{
public:
// construction/destruction
lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
READ8_HANDLER( lsi53c810_reg_r );
WRITE8_HANDLER( lsi53c810_reg_w );
void lsi53c810_read_data(int bytes, UINT8 *pData);
void lsi53c810_write_data(int bytes, UINT8 *pData);
unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc);
UINT8 lsi53c810_reg_r( int offset );
void lsi53c810_reg_w(int offset, UINT8 data);
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
private:
typedef delegate<void (void)> opcode_handler_delegate;
opcode_handler_delegate dma_opcode[256];
UINT32 FETCH();
void dmaop_invalid();
void dmaop_move_memory();
void dmaop_interrupt();
void dmaop_block_move();
void dmaop_select();
void dmaop_wait_disconnect();
void dmaop_wait_reselect();
void dmaop_set();
void dmaop_clear();
void dmaop_move_from_sfbr();
void dmaop_move_to_sfbr();
void dmaop_read_modify_write();
int scripts_compute_branch();
UINT32 scripts_get_jump_dest();
void dmaop_jump();
void dmaop_call();
void dmaop_return();
void dmaop_store();
void dmaop_load();
void dma_exec();
void add_opcode(UINT8 op, UINT8 mask, opcode_handler_delegate handler);
void lsi53c810_init();
UINT32 lsi53c810_dasm_fetch(UINT32 pc);
unsigned lsi53c810_dasm(char *buf, UINT32 pc);
scsidev_device *devices[8]; /* SCSI IDs 0-7 */
UINT8 last_id;
UINT8 scntl0;
UINT8 scntl1;
UINT8 scntl2;
UINT8 scntl3;
UINT8 scid;
UINT8 sxfer;
UINT8 socl;
UINT8 istat;
UINT8 dstat;
UINT8 sstat0;
UINT8 sstat1;
UINT8 sstat2;
UINT8 dien;
UINT8 dcntl;
UINT8 dmode;
UINT32 temp;
UINT32 dsa;
UINT32 dsp;
UINT32 dsps;
UINT32 dcmd;
UINT8 sien0;
UINT8 sien1;
UINT8 stime0;
UINT8 respid;
UINT8 stest1;
UINT8 scratch_a[4];
UINT8 scratch_b[4];
int dma_icount;
int halted;
int carry;
};
// device type definition
extern const device_type LSI53C810;
#endif

38
src/mame/drivers/model3.c
View File

@ -1001,28 +1001,28 @@ READ64_MEMBER(model3_state::scsi_r)
int reg = offset*8;
UINT64 r = 0;
if (ACCESSING_BITS_56_63) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+0) << 56;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+0) << 56;
}
if (ACCESSING_BITS_48_55) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+1) << 48;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+1) << 48;
}
if (ACCESSING_BITS_40_47) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+2) << 40;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+2) << 40;
}
if (ACCESSING_BITS_32_39) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+3) << 32;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+3) << 32;
}
if (ACCESSING_BITS_24_31) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+4) << 24;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+4) << 24;
}
if (ACCESSING_BITS_16_23) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+5) << 16;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+5) << 16;
}
if (ACCESSING_BITS_8_15) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+6) << 8;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+6) << 8;
}
if (ACCESSING_BITS_0_7) {
r |= (UINT64)lsi53c810_reg_r(&space, reg+7) << 0;
r |= (UINT64)m_lsi53c810->lsi53c810_reg_r(reg+7) << 0;
}
return r;
@ -1032,28 +1032,28 @@ WRITE64_MEMBER(model3_state::scsi_w)
{
int reg = offset*8;
if (ACCESSING_BITS_56_63) {
lsi53c810_reg_w(&space, reg+0, data >> 56);
m_lsi53c810->lsi53c810_reg_w(reg+0, data >> 56);
}
if (ACCESSING_BITS_48_55) {
lsi53c810_reg_w(&space, reg+1, data >> 48);
m_lsi53c810->lsi53c810_reg_w(reg+1, data >> 48);
}
if (ACCESSING_BITS_40_47) {
lsi53c810_reg_w(&space, reg+2, data >> 40);
m_lsi53c810->lsi53c810_reg_w(reg+2, data >> 40);
}
if (ACCESSING_BITS_32_39) {
lsi53c810_reg_w(&space, reg+3, data >> 32);
m_lsi53c810->lsi53c810_reg_w(reg+3, data >> 32);
}
if (ACCESSING_BITS_24_31) {
lsi53c810_reg_w(&space, reg+4, data >> 24);
m_lsi53c810->lsi53c810_reg_w(reg+4, data >> 24);
}
if (ACCESSING_BITS_16_23) {
lsi53c810_reg_w(&space, reg+5, data >> 16);
m_lsi53c810->lsi53c810_reg_w(reg+5, data >> 16);
}
if (ACCESSING_BITS_8_15) {
lsi53c810_reg_w(&space, reg+6, data >> 8);
m_lsi53c810->lsi53c810_reg_w(reg+6, data >> 8);
}
if (ACCESSING_BITS_0_7) {
lsi53c810_reg_w(&space, reg+7, data >> 0);
m_lsi53c810->lsi53c810_reg_w(reg+7, data >> 0);
}
}
@ -1241,7 +1241,6 @@ static TIMER_CALLBACK(model3_sound_timer_tick)
static MACHINE_START(model3_10)
{
lsi53c810_init(machine, &scsi_intf);
configure_fast_ram(machine);
model3_state *state = machine.driver_data<model3_state>();
@ -1249,7 +1248,6 @@ static MACHINE_START(model3_10)
}
static MACHINE_START(model3_15)
{
lsi53c810_init(machine, &scsi_intf);
configure_fast_ram(machine);
model3_state *state = machine.driver_data<model3_state>();
@ -5341,6 +5339,8 @@ static MACHINE_CONFIG_START( model3_10, model3_state )
MCFG_SOUND_CONFIG(scsp2_interface)
MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
MCFG_SOUND_ROUTE(0, "rspeaker", 2.0)
MCFG_LSI53C810_ADD( "lsi51c810", scsi_intf)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( model3_15, model3_state )
@ -5380,6 +5380,8 @@ static MACHINE_CONFIG_START( model3_15, model3_state )
MCFG_SOUND_CONFIG(scsp2_interface)
MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
MCFG_SOUND_ROUTE(0, "rspeaker", 2.0)
MCFG_LSI53C810_ADD( "lsi51c810", scsi_intf)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( model3_20, model3_state )

3
src/mame/includes/model3.h
View File

@ -1,4 +1,5 @@
#include "video/poly.h"
#include "machine/53c810.h"
typedef float MATRIX[4][4];
typedef float VECTOR[4];
@ -16,11 +17,13 @@ public:
model3_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_lsi53c810(*this,"lsi53c810"),
m_work_ram(*this, "work_ram"),
m_paletteram64(*this, "paletteram64"),
m_soundram(*this, "soundram"){ }
required_device<cpu_device> m_maincpu;
required_device<lsi53c810_device> m_lsi53c810;
required_shared_ptr<UINT64> m_work_ram;
required_shared_ptr<UINT64> m_paletteram64;

44
src/mess/drivers/bebox.c
View File

@ -27,6 +27,7 @@
#include "machine/idectrl.h"
#include "machine/mpc105.h"
#include "machine/intelfsh.h"
#include "machine/53c810.h"
/* Devices */
#include "machine/scsicd.h"
@ -93,6 +94,48 @@ static ADDRESS_MAP_START( bebox_slave_mem, AS_PROGRAM, 64, bebox_state )
AM_IMPORT_FROM(bebox_mem)
ADDRESS_MAP_END
static const SCSIConfigTable dev_table =
{
2, /* 2 SCSI devices */
{
{ "harddisk1" },
{ "cdrom" }
}
};
#define BYTE_REVERSE32(x) (((x >> 24) & 0xff) | \
((x >> 8) & 0xff00) | \
((x << 8) & 0xff0000) | \
((x << 24) & 0xff000000))
static UINT32 scsi53c810_fetch(running_machine &machine, UINT32 dsp)
{
UINT32 result;
result = machine.device("ppc1")->memory().space(AS_PROGRAM)->read_dword(dsp & 0x7FFFFFFF);
return BYTE_REVERSE32(result);
}
static void scsi53c810_irq_callback(running_machine &machine, int value)
{
bebox_set_irq_bit(machine, 21, value);
}
static void scsi53c810_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap)
{
}
static const struct LSI53C810interface scsi53c810_intf =
{
&dev_table, /* SCSI device table */
&scsi53c810_irq_callback,
&scsi53c810_dma_callback,
&scsi53c810_fetch,
};
static const floppy_interface bebox_floppy_interface =
{
DEVCB_NULL,
@ -154,6 +197,7 @@ static MACHINE_CONFIG_START( bebox, bebox_state )
MCFG_FUJITSU_29F016A_ADD("flash")
MCFG_LSI53C810_ADD( "lsi51c810", scsi53c810_intf)
MCFG_SCSIDEV_ADD("harddisk1", SCSIHD, SCSI_ID_0)
MCFG_SCSIDEV_ADD("cdrom", SCSICD, SCSI_ID_3)

6
src/mess/includes/bebox.h
View File

@ -11,6 +11,7 @@
#include "machine/ins8250.h"
#include "machine/8237dma.h"
#include "machine/53c810.h"
typedef struct
{
@ -25,8 +26,10 @@ class bebox_state : public driver_device
{
public:
bebox_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) { }
: driver_device(mconfig, type, tag),
m_lsi53c810(*this, "lsi53c810"){ }
required_device<lsi53c810_device> m_lsi53c810;
UINT32 m_cpu_imask[2];
UINT32 m_interrupts;
UINT32 m_crossproc_interrupts;
@ -76,6 +79,7 @@ WRITE8_HANDLER( bebox_80000480_w );
WRITE8_HANDLER( bebox_flash_w );
void bebox_ide_interrupt(device_t *device, int state);
void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val);
UINT32 scsi53c810_pci_read(device_t *busdevice, device_t *device, int function, int offset, UINT32 mem_mask);
void scsi53c810_pci_write(device_t *busdevice, device_t *device, int function, int offset, UINT32 data, UINT32 mem_mask);

80
src/mess/machine/bebox.c
View File

@ -287,7 +287,7 @@ static void bebox_update_interrupts(running_machine &machine)
}
static void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val)
void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val)
{
bebox_state *state = machine.driver_data<bebox_state>();
static const char *const interrupt_names[32] =
@ -840,31 +840,32 @@ static const struct kbdc8042_interface bebox_8042_interface =
static READ64_HANDLER( scsi53c810_r )
{
bebox_state *state = space->machine().driver_data<bebox_state>();
int reg = offset*8;
UINT64 r = 0;
if (!(mem_mask & U64(0xff00000000000000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+0) << 56;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+0) << 56;
}
if (!(mem_mask & U64(0x00ff000000000000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+1) << 48;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+1) << 48;
}
if (!(mem_mask & U64(0x0000ff0000000000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+2) << 40;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+2) << 40;
}
if (!(mem_mask & U64(0x000000ff00000000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+3) << 32;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+3) << 32;
}
if (!(mem_mask & U64(0x00000000ff000000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+4) << 24;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+4) << 24;
}
if (!(mem_mask & U64(0x0000000000ff0000))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+5) << 16;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+5) << 16;
}
if (!(mem_mask & U64(0x000000000000ff00))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+6) << 8;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+6) << 8;
}
if (!(mem_mask & U64(0x00000000000000ff))) {
r |= (UINT64)lsi53c810_reg_r(space, reg+7) << 0;
r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+7) << 0;
}
return r;
@ -873,58 +874,35 @@ static READ64_HANDLER( scsi53c810_r )
static WRITE64_HANDLER( scsi53c810_w )
{
bebox_state *state = space->machine().driver_data<bebox_state>();
int reg = offset*8;
if (!(mem_mask & U64(0xff00000000000000))) {
lsi53c810_reg_w(space, reg+0, data >> 56);
state->m_lsi53c810->lsi53c810_reg_w(reg+0, data >> 56);
}
if (!(mem_mask & U64(0x00ff000000000000))) {
lsi53c810_reg_w(space, reg+1, data >> 48);
state->m_lsi53c810->lsi53c810_reg_w(reg+1, data >> 48);
}
if (!(mem_mask & U64(0x0000ff0000000000))) {
lsi53c810_reg_w(space, reg+2, data >> 40);
state->m_lsi53c810->lsi53c810_reg_w(reg+2, data >> 40);
}
if (!(mem_mask & U64(0x000000ff00000000))) {
lsi53c810_reg_w(space, reg+3, data >> 32);
state->m_lsi53c810->lsi53c810_reg_w(reg+3, data >> 32);
}
if (!(mem_mask & U64(0x00000000ff000000))) {
lsi53c810_reg_w(space, reg+4, data >> 24);
state->m_lsi53c810->lsi53c810_reg_w(reg+4, data >> 24);
}
if (!(mem_mask & U64(0x0000000000ff0000))) {
lsi53c810_reg_w(space, reg+5, data >> 16);
state->m_lsi53c810->lsi53c810_reg_w(reg+5, data >> 16);
}
if (!(mem_mask & U64(0x000000000000ff00))) {
lsi53c810_reg_w(space, reg+6, data >> 8);
state->m_lsi53c810->lsi53c810_reg_w(reg+6, data >> 8);
}
if (!(mem_mask & U64(0x00000000000000ff))) {
lsi53c810_reg_w(space, reg+7, data >> 0);
state->m_lsi53c810->lsi53c810_reg_w(reg+7, data >> 0);
}
}
#define BYTE_REVERSE32(x) (((x >> 24) & 0xff) | \
((x >> 8) & 0xff00) | \
((x << 8) & 0xff0000) | \
((x << 24) & 0xff000000))
static UINT32 scsi53c810_fetch(running_machine &machine, UINT32 dsp)
{
UINT32 result;
result = machine.device("ppc1")->memory().space(AS_PROGRAM)->read_dword(dsp & 0x7FFFFFFF);
return BYTE_REVERSE32(result);
}
static void scsi53c810_irq_callback(running_machine &machine, int value)
{
bebox_set_irq_bit(machine, 21, value);
}
static void scsi53c810_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap)
{
}
UINT32 scsi53c810_pci_read(device_t *busdevice, device_t *device, int function, int offset, UINT32 mem_mask)
{
bebox_state *state = device->machine().driver_data<bebox_state>();
@ -990,24 +968,6 @@ void scsi53c810_pci_write(device_t *busdevice, device_t *device, int function, i
}
static const SCSIConfigTable dev_table =
{
2, /* 2 SCSI devices */
{
{ "harddisk1" },
{ "cdrom" }
}
};
static const struct LSI53C810interface scsi53c810_intf =
{
&dev_table, /* SCSI device table */
&scsi53c810_irq_callback,
&scsi53c810_dma_callback,
&scsi53c810_fetch,
};
static TIMER_CALLBACK( bebox_get_devices ) {
bebox_state *state = machine.driver_data<bebox_state>();
state->m_devices.pic8259_master = machine.device("pic8259_master");
@ -1042,8 +1002,6 @@ MACHINE_RESET( bebox )
MACHINE_START( bebox )
{
pc_fdc_init(machine, &bebox_fdc_interface);
/* SCSI */
lsi53c810_init(machine, &scsi53c810_intf);
}
DRIVER_INIT_MEMBER(bebox_state,bebox)