diff --git a/src/mame/midway/atlantis.cpp b/src/mame/midway/atlantis.cpp index f0d7867e0bf..91b092457e3 100644 --- a/src/mame/midway/atlantis.cpp +++ b/src/mame/midway/atlantis.cpp @@ -57,6 +57,7 @@ #include "video/zeus2.h" #include "emupal.h" +#include "speaker.h" #define LOG_RTC (1U << 1) #define LOG_PORT (1U << 2) @@ -839,9 +840,15 @@ void atlantis_state::mwskins(machine_config &config) m_screen->set_screen_update("zeus2", FUNC(zeus2_device::screen_update)); /* sound hardware */ + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + DCS2_AUDIO_DENVER_2CH(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); m_dcs->set_dram_in_mb(4); m_dcs->set_polling_offset(0xe33); + m_dcs->add_route(0, "rspeaker", 1.0); + m_dcs->add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); diff --git a/src/mame/midway/midtunit.cpp b/src/mame/midway/midtunit.cpp index 9fb4e43277d..443a22e679d 100644 --- a/src/mame/midway/midtunit.cpp +++ b/src/mame/midway/midtunit.cpp @@ -626,6 +626,7 @@ void midtunit_state::tunit_adpcm(machine_config &config) /* basic machine hardware */ SPEAKER(config, "speaker").front_center(); + WILLIAMS_ADPCM_SOUND(config, m_adpcm_sound, 0).add_route(ALL_OUTPUTS, "speaker", 1.0); } @@ -635,7 +636,11 @@ void midtunit_state::tunit_dcs(machine_config &config) tunit_core(config); /* basic machine hardware */ + SPEAKER(config, "speaker").front_center(); + DCS_AUDIO_2K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "speaker", 1.0); } diff --git a/src/mame/midway/midvunit.cpp b/src/mame/midway/midvunit.cpp index 955591532ef..68ff90becb2 100644 --- a/src/mame/midway/midvunit.cpp +++ b/src/mame/midway/midvunit.cpp @@ -30,6 +30,8 @@ #include "cpu/adsp2100/adsp2100.h" #include "machine/nvram.h" +#include "speaker.h" + #include "crusnusa.lh" @@ -1105,7 +1107,11 @@ void midvunit_state::midvunit(machine_config &config) m_adc->ch3_callback().set_ioport("BRAKE"); /* sound hardware */ - DCS_AUDIO_2K(config, "dcs", 0); + SPEAKER(config, "mono").front_center(); + + DCS_AUDIO_2K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } @@ -1146,9 +1152,15 @@ void midvunit_state::midvplus(machine_config &config) m_midway_ioasic->set_yearoffs(94); /* sound hardware */ + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + DCS2_AUDIO_2115(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); m_dcs->set_dram_in_mb(2); m_dcs->set_polling_offset(0x3839); + m_dcs->add_route(0, "rspeaker", 1.0); + m_dcs->add_route(1, "lspeaker", 1.0); } diff --git a/src/mame/midway/midwunit.cpp b/src/mame/midway/midwunit.cpp index 76309e9bd41..93e60ac4cb0 100644 --- a/src/mame/midway/midwunit.cpp +++ b/src/mame/midway/midwunit.cpp @@ -102,7 +102,7 @@ Notes: #include "machine/nvram.h" #include "screen.h" - +#include "speaker.h" #define PIXEL_CLOCK (8000000) @@ -649,7 +649,11 @@ void midwunit_state::wunit(machine_config &config) screen.set_palette(m_palette); /* sound hardware */ + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_8K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } void midwunit_state::wunit_picsim(machine_config &config) diff --git a/src/mame/midway/midxunit.cpp b/src/mame/midway/midxunit.cpp index 6369f266cf8..8a22cf77db1 100644 --- a/src/mame/midway/midxunit.cpp +++ b/src/mame/midway/midxunit.cpp @@ -117,6 +117,7 @@ ________________________________________________________________ #include "machine/adc0844.h" #include "screen.h" +#include "speaker.h" #define PIXEL_CLOCK (8000000) @@ -308,7 +309,11 @@ void midxunit_state::midxunit(machine_config &config) adc.ch6_callback().set_ioport("AN5"); /* sound hardware */ + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_2K_UART(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } diff --git a/src/mame/midway/midzeus.cpp b/src/mame/midway/midzeus.cpp index c0eb6ba870b..fc37ee57bcc 100644 --- a/src/mame/midway/midzeus.cpp +++ b/src/mame/midway/midzeus.cpp @@ -40,6 +40,8 @@ The Grid v1.2 10/18/2000 #include "machine/tsb12lv01a.h" #include "video/zeus2.h" +#include "speaker.h" + #include "crusnexo.lh" #define LOG_FIREWIRE (1U << 1) @@ -1279,7 +1281,13 @@ void midzeus_state::midzeus(machine_config &config) m_screen->set_palette("palette"); /* sound hardware */ - DCS2_AUDIO_2104(config, "dcs", 0); + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); @@ -1318,7 +1326,13 @@ void midzeus2_state::midzeus2(machine_config &config) m_zeus->irq_callback().set(FUNC(midzeus2_state::zeus_irq)); /* sound hardware */ - DCS2_AUDIO_2104(config, "dcs", 0); + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); M48T35(config, m_m48t35, 0); diff --git a/src/mame/midway/seattle.cpp b/src/mame/midway/seattle.cpp index d9fb1f7de0f..784c6a266eb 100644 --- a/src/mame/midway/seattle.cpp +++ b/src/mame/midway/seattle.cpp @@ -2124,9 +2124,16 @@ void seattle_state::flagstaff(machine_config &config) void seattle_state::wg3dh(machine_config &config) { phoenix(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x3839); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); @@ -2138,9 +2145,16 @@ void seattle_state::wg3dh(machine_config &config) void seattle_state::mace(machine_config &config) { seattle150(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x3839); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_MACE); @@ -2213,9 +2227,16 @@ void seattle_state::sfrushrkw(machine_config &config) void seattle_state::calspeed(machine_config &config) { seattle150_widget(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x39c0); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_CALSPEED); @@ -2228,9 +2249,16 @@ void seattle_state::calspeed(machine_config &config) void seattle_state::vaportrx(machine_config &config) { seattle200_widget(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x39c2); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_VAPORTRX); @@ -2242,9 +2270,16 @@ void seattle_state::vaportrx(machine_config &config) void seattle_state::biofreak(machine_config &config) { seattle150(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x3835); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); @@ -2256,9 +2291,16 @@ void seattle_state::biofreak(machine_config &config) void seattle_state::blitz(machine_config &config) { seattle150(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x39c2); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_BLITZ99); @@ -2271,9 +2313,16 @@ void seattle_state::blitz(machine_config &config) void seattle_state::blitz99(machine_config &config) { seattle150(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x0afb); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_BLITZ99); @@ -2286,9 +2335,16 @@ void seattle_state::blitz99(machine_config &config) void seattle_state::blitz2k(machine_config &config) { seattle150(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_BLITZ99); @@ -2303,9 +2359,15 @@ void seattle_state::carnevil(machine_config &config) seattle150(config); m_galileo->set_map(3, address_map_constructor(&seattle_state::carnevil_cs3_map, "carnevil_cs3_map", this), this); + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x0af7); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_CARNEVIL); @@ -2317,9 +2379,16 @@ void seattle_state::carnevil(machine_config &config) void seattle_state::hyprdriv(machine_config &config) { seattle200_widget(config); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(2); dcs.set_polling_offset(0x0af7); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_HYPRDRIV); diff --git a/src/mame/midway/vegas.cpp b/src/mame/midway/vegas.cpp index 7fb69ea254c..d83bb0f9683 100644 --- a/src/mame/midway/vegas.cpp +++ b/src/mame/midway/vegas.cpp @@ -292,6 +292,7 @@ #include "video/voodoo_pci.h" #include "screen.h" +#include "speaker.h" #include "sf2049.lh" @@ -2036,9 +2037,16 @@ void vegas_state::gauntleg(machine_config &config) // Needs 250MHz MIPS or screen tearing occurs (See MT8064) // Firmware frequency detection seems to have a bug, console reports 220MHz for a 200MHz cpu and 260MHz for a 250MHz cpu vegas250(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_CALSPEED); @@ -2052,9 +2060,16 @@ void vegas_state::gauntdl(machine_config &config) { // Needs 250MHz MIPS or screen tearing occurs (See MT8064) vegas250(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_GAUNTDL); @@ -2067,9 +2082,16 @@ void vegas_state::gauntdl(machine_config &config) void vegas_state::warfa(machine_config &config) { vegas250(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_MACE); @@ -2082,9 +2104,16 @@ void vegas_state::warfa(machine_config &config) void vegas_state::tenthdeg(machine_config &config) { vegas(config); - dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2115_device &dcs(DCS2_AUDIO_2115(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0afb); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_GAUNTDL); @@ -2097,9 +2126,16 @@ void vegas_state::tenthdeg(machine_config &config) void vegas_state::roadburn(machine_config &config) { vegas32m(config); - dcs2_audio_dsio_device &dcs(DCS2_AUDIO_DSIO(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_dsio_device &dcs(DCS2_AUDIO_DSIO(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0ddd); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); @@ -2112,9 +2148,16 @@ void vegas_state::roadburn(machine_config &config) void vegas_state::nbashowt(machine_config &config) { vegasban(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_MACE); @@ -2129,9 +2172,16 @@ void vegas_state::nbashowt(machine_config &config) void vegas_state::nbanfl(machine_config &config) { vegasban(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_BLITZ99); @@ -2150,9 +2200,16 @@ void vegas_state::nbagold(machine_config &config) m_maincpu->set_dcache_size(32768); m_maincpu->set_system_clock(vegas_state::SYSTEM_CLOCK); m_nile->set_sdram_size(0, 0x00800000); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_GAUNTDL); @@ -2166,9 +2223,22 @@ void vegas_state::nbagold(machine_config &config) void vegas_state::sf2049(machine_config &config) { denver(config); - dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, "dcs", 0)); + + SPEAKER(config, "flspeaker").front_left(); + SPEAKER(config, "frspeaker").front_right(); + SPEAKER(config, "rlspeaker").headrest_left(); + SPEAKER(config, "rrspeaker").headrest_right(); + SPEAKER(config, "subwoofer").backrest(); + + dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(8); dcs.set_polling_offset(0x872); + dcs.add_route(0, "flspeaker", 1.0); + dcs.add_route(1, "frspeaker", 1.0); + dcs.add_route(2, "rlspeaker", 1.0); + dcs.add_route(3, "rrspeaker", 1.0); + dcs.add_route(4, "subwoofer", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_STANDARD); @@ -2182,9 +2252,22 @@ void vegas_state::sf2049(machine_config &config) void vegas_state::sf2049se(machine_config &config) { denver(config); - dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, "dcs", 0)); + + SPEAKER(config, "flspeaker").front_left(); + SPEAKER(config, "frspeaker").front_right(); + SPEAKER(config, "rlspeaker").headrest_left(); + SPEAKER(config, "rrspeaker").headrest_right(); + SPEAKER(config, "subwoofer").backrest(); + + dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(8); dcs.set_polling_offset(0x872); + dcs.add_route(0, "flspeaker", 1.0); + dcs.add_route(1, "frspeaker", 1.0); + dcs.add_route(2, "rlspeaker", 1.0); + dcs.add_route(3, "rrspeaker", 1.0); + dcs.add_route(4, "subwoofer", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_SFRUSHRK); @@ -2198,9 +2281,22 @@ void vegas_state::sf2049se(machine_config &config) void vegas_state::sf2049te(machine_config &config) { denver(config); - dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, "dcs", 0)); + + SPEAKER(config, "flspeaker").front_left(); + SPEAKER(config, "frspeaker").front_right(); + SPEAKER(config, "rlspeaker").headrest_left(); + SPEAKER(config, "rrspeaker").headrest_right(); + SPEAKER(config, "subwoofer").backrest(); + + dcs2_audio_denver_5ch_device &dcs(DCS2_AUDIO_DENVER_5CH(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(8); dcs.set_polling_offset(0x872); + dcs.add_route(0, "flspeaker", 1.0); + dcs.add_route(1, "frspeaker", 1.0); + dcs.add_route(2, "rlspeaker", 1.0); + dcs.add_route(3, "rrspeaker", 1.0); + dcs.add_route(4, "subwoofer", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_SFRUSHRK); @@ -2214,9 +2310,15 @@ void vegas_state::sf2049te(machine_config &config) void vegas_state::cartfury(machine_config &config) { vegasv3(config); - dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, "dcs", 0)); + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + dcs2_audio_2104_device &dcs(DCS2_AUDIO_2104(config, m_dcs, 0)); + dcs.set_maincpu_tag(m_maincpu); dcs.set_dram_in_mb(4); dcs.set_polling_offset(0x0b5d); + dcs.add_route(0, "rspeaker", 1.0); + dcs.add_route(1, "lspeaker", 1.0); MIDWAY_IOASIC(config, m_ioasic, 0); m_ioasic->set_shuffle(MIDWAY_IOASIC_CARNEVIL); diff --git a/src/mame/pinball/wpc_95.cpp b/src/mame/pinball/wpc_95.cpp index 39f5aa0f348..3d12c0845bb 100644 --- a/src/mame/pinball/wpc_95.cpp +++ b/src/mame/pinball/wpc_95.cpp @@ -49,6 +49,8 @@ ToDo: #include "machine/nvram.h" #include "machine/timer.h" +#include "speaker.h" + namespace { class wpc_95_state : public driver_device @@ -2312,7 +2314,12 @@ void wpc_95_state::wpc_95(machine_config &config) WPC_DMD(config, "dmd", 0).scanline_callback().set(FUNC(wpc_95_state::scanline_irq)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_WPC(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } /*------------------------- diff --git a/src/mame/pinball/wpc_dcs.cpp b/src/mame/pinball/wpc_dcs.cpp index af7960be00c..7c7946207c8 100644 --- a/src/mame/pinball/wpc_dcs.cpp +++ b/src/mame/pinball/wpc_dcs.cpp @@ -37,6 +37,8 @@ ToDo: #include "cpu/m6809/m6809.h" #include "machine/nvram.h" +#include "speaker.h" + namespace { class wpc_dcs_state : public driver_device @@ -472,7 +474,12 @@ void wpc_dcs_state::wpc_dcs(machine_config &config) WPC_DMD(config, "dmd", 0).scanline_callback().set(FUNC(wpc_dcs_state::scanline_irq)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_8K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } /*---------------------- diff --git a/src/mame/pinball/wpc_dot.h b/src/mame/pinball/wpc_dot.h index e491bf2b89f..8b79aca167e 100644 --- a/src/mame/pinball/wpc_dot.h +++ b/src/mame/pinball/wpc_dot.h @@ -12,8 +12,6 @@ #pragma once -#include "dcs.h" - #include "cpu/m6809/m6809.h" #include "wpcsnd.h" #include "wpc.h" diff --git a/src/mame/pinball/wpc_s.cpp b/src/mame/pinball/wpc_s.cpp index 670cfdaf473..95f304d850f 100644 --- a/src/mame/pinball/wpc_s.cpp +++ b/src/mame/pinball/wpc_s.cpp @@ -49,6 +49,8 @@ ToDo: #include "cpu/m6809/m6809.h" #include "machine/nvram.h" +#include "speaker.h" + namespace { class wpc_s_state : public driver_device @@ -2057,7 +2059,12 @@ void wpc_s_state::wpc_s(machine_config &config) WPC_DMD(config, "dmd", 0).scanline_callback().set(FUNC(wpc_s_state::scanline_irq)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_8K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } /*----------------- diff --git a/src/mame/rare/kinst.cpp b/src/mame/rare/kinst.cpp index be7eed48e31..0453ec7ebe8 100644 --- a/src/mame/rare/kinst.cpp +++ b/src/mame/rare/kinst.cpp @@ -193,6 +193,7 @@ Notes: #include "emupal.h" #include "screen.h" +#include "speaker.h" namespace { @@ -704,7 +705,11 @@ void kinst_state::kinst(machine_config &config) PALETTE(config, m_palette, palette_device::BGR_555); // sound hardware + SPEAKER(config, "mono").front_center(); + DCS_AUDIO_2K(config, m_dcs, 0); + m_dcs->set_maincpu_tag(m_maincpu); + m_dcs->add_route(0, "mono", 1.0); } diff --git a/src/mame/shared/dcs.cpp b/src/mame/shared/dcs.cpp index 826a48b0eda..6ae4241dcf5 100644 --- a/src/mame/shared/dcs.cpp +++ b/src/mame/shared/dcs.cpp @@ -154,7 +154,6 @@ #include "emu.h" #include "dcs.h" -#include "speaker.h" #define LOG_DCS_TRANSFERS (1U << 1) #define LOG_DCS_IO (1U << 2) @@ -172,8 +171,10 @@ * *************************************/ -#define LCTRL_OUTPUT_EMPTY 0x400 -#define LCTRL_INPUT_EMPTY 0x800 +static constexpr uint16_t LCTRL_OUTPUT_EMPTY = 0x400; +static constexpr uint16_t LCTRL_INPUT_EMPTY = 0x800; + +static constexpr const char *const denver_regname[4] = { "SDRC_ROM", "SDRC_IO", "RAM_PAGE", "VER/FIFO_RESET" }; #define IS_OUTPUT_EMPTY() (m_latch_control & LCTRL_OUTPUT_EMPTY) #define IS_OUTPUT_FULL() (!(m_latch_control & LCTRL_OUTPUT_EMPTY)) @@ -186,47 +187,47 @@ #define SET_INPUT_FULL() (m_latch_control &= ~LCTRL_INPUT_EMPTY) -/* These are some of the control registers. We don't use them all */ +// These are some of the control registers. We don't use them all enum { - IDMA_CONTROL_REG = 0, /* 3fe0 */ - BDMA_INT_ADDR_REG, /* 3fe1 */ - BDMA_EXT_ADDR_REG, /* 3fe2 */ - BDMA_CONTROL_REG, /* 3fe3 */ - BDMA_WORD_COUNT_REG, /* 3fe4 */ - PROG_FLAG_DATA_REG, /* 3fe5 */ - PROG_FLAG_CONTROL_REG, /* 3fe6 */ + IDMA_CONTROL_REG = 0, // 3fe0 + BDMA_INT_ADDR_REG, // 3fe1 + BDMA_EXT_ADDR_REG, // 3fe2 + BDMA_CONTROL_REG, // 3fe3 + BDMA_WORD_COUNT_REG, // 3fe4 + PROG_FLAG_DATA_REG, // 3fe5 + PROG_FLAG_CONTROL_REG, // 3fe6 - S1_AUTOBUF_REG = 15, /* 3fef */ - S1_RFSDIV_REG, /* 3ff0 */ - S1_SCLKDIV_REG, /* 3ff1 */ - S1_CONTROL_REG, /* 3ff2 */ - S0_AUTOBUF_REG, /* 3ff3 */ - S0_RFSDIV_REG, /* 3ff4 */ - S0_SCLKDIV_REG, /* 3ff5 */ - S0_CONTROL_REG, /* 3ff6 */ - S0_MCTXLO_REG, /* 3ff7 */ - S0_MCTXHI_REG, /* 3ff8 */ - S0_MCRXLO_REG, /* 3ff9 */ - S0_MCRXHI_REG, /* 3ffa */ - TIMER_SCALE_REG, /* 3ffb */ - TIMER_COUNT_REG, /* 3ffc */ - TIMER_PERIOD_REG, /* 3ffd */ - WAITSTATES_REG, /* 3ffe */ - SYSCONTROL_REG /* 3fff */ + S1_AUTOBUF_REG = 15, // 3fef + S1_RFSDIV_REG, // 3ff0 + S1_SCLKDIV_REG, // 3ff1 + S1_CONTROL_REG, // 3ff2 + S0_AUTOBUF_REG, // 3ff3 + S0_RFSDIV_REG, // 3ff4 + S0_SCLKDIV_REG, // 3ff5 + S0_CONTROL_REG, // 3ff6 + S0_MCTXLO_REG, // 3ff7 + S0_MCTXHI_REG, // 3ff8 + S0_MCRXLO_REG, // 3ff9 + S0_MCRXHI_REG, // 3ffa + TIMER_SCALE_REG, // 3ffb + TIMER_COUNT_REG, // 3ffc + TIMER_PERIOD_REG, // 3ffd + WAITSTATES_REG, // 3ffe + SYSCONTROL_REG // 3fff }; -/* these macros are used to reference the SDRC ASIC */ -#define SDRC_ROM_ST ((m_sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */ -#define SDRC_ROM_SZ ((m_sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */ -#define SDRC_ROM_MS ((m_sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */ +// these macros are used to reference the SDRC ASIC +#define SDRC_ROM_ST ((m_sdrc.reg[0] >> 0) & 3) // 0=0000, 1=3000, 2=3400, 3=none +#define SDRC_ROM_SZ ((m_sdrc.reg[0] >> 4) & 1) // 0=4k, 1=1k +#define SDRC_ROM_MS ((m_sdrc.reg[0] >> 5) & 1) // 0=/BMS, 1=/DMS #define SDRC_ROM_PG ((m_sdrc.reg[0] >> 7) & 7) #define SDRC_SM_EN ((m_sdrc.reg[0] >> 11) & 1) #define SDRC_SM_BK ((m_sdrc.reg[0] >> 12) & 1) #define SDRC_SMODE ((m_sdrc.reg[0] >> 13) & 7) -#define SDRC_DM_ST ((m_sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */ +#define SDRC_DM_ST ((m_sdrc.reg[1] >> 0) & 3) // 0=none, 1=0000, 2=3000, 3=3400 #define SDRC_DM_REF ((m_sdrc.reg[1] >> 4) & 3) #define SDRC_DM_3WS ((m_sdrc.reg[1] >> 7) & 1) #define SDRC_TFS_INV ((m_sdrc.reg[1] >> 8) & 1) @@ -239,7 +240,7 @@ enum #define SDRC_EPM_PG ((m_sdrc.reg[2] >> 0) & 0x1fff) -/* these macros are used to reference the DSIO ASIC */ +// these macros are used to reference the DSIO ASIC #define DSIO_EMPTY_FIFO ((m_dsio.reg[1] >> 0) & 1) #define DSIO_CUR_OUTPUT ((m_dsio.reg[1] >> 4) & 1) #define DSIO_RES_TFS ((m_dsio.reg[1] >> 10) & 1) @@ -248,18 +249,18 @@ enum #define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x1fff) -#define DSIO_BANK_END 0x3ff +static constexpr int DSIO_BANK_END = 0x3ff; -/* these macros are used to reference the DENVER ASIC */ -#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */ +// these macros are used to reference the DENVER ASIC +#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) // read only: 1=33.33MHz #define DENV_RES_TFS ((m_dsio.reg[1] >> 10) & 1) -#define DENV_CHANNELS ((m_dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */ +#define DENV_CHANNELS ((m_dsio.reg[1] >> 11) & 3) // 0=2ch, 1=4ch, 2=6ch #define DENV_LED ((m_dsio.reg[1] >> 13) & 1) #define DENV_MUTE ((m_dsio.reg[1] >> 14) & 1) #define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x1fff) -#define DENV_NUM_BANK 0x800 +static constexpr int DENV_NUM_BANK = 0x800; /************************************* @@ -268,19 +269,19 @@ enum * *************************************/ -/* DCS 2k memory map */ +// DCS 2k memory map void dcs_audio_device::dcs_2k_program_map(address_map &map) { - map(0x0000, 0x03ff).ram().share("dcsint"); - map(0x0800, 0x0fff).ram().share("dcsext"); - map(0x1000, 0x17ff).ram().share("dcsext"); - map(0x1800, 0x1fff).ram().share("dcsext"); + map(0x0000, 0x03ff).ram().share(m_internal_program_ram); + map(0x0800, 0x0fff).ram().share(m_external_program_ram); + map(0x1000, 0x17ff).ram().share(m_external_program_ram); + map(0x1800, 0x1fff).ram().share(m_external_program_ram); } void dcs_audio_device::dcs_2k_data_map(address_map &map) { map(0x0000, 0x07ff).mirror(0x1800).rw(FUNC(dcs_audio_device::dcs_dataram_r), FUNC(dcs_audio_device::dcs_dataram_w)); - map(0x2000, 0x2fff).bankr("databank"); + map(0x2000, 0x2fff).bankr(m_data_bank); map(0x3000, 0x33ff).w(FUNC(dcs_audio_device::dcs_data_bank_select_w)); map(0x3400, 0x37ff).rw(FUNC(dcs_audio_device::input_latch_r), FUNC(dcs_audio_device::output_latch_w)); map(0x3800, 0x39ff).ram(); @@ -288,25 +289,25 @@ void dcs_audio_device::dcs_2k_data_map(address_map &map) } -/* DCS 2k with UART memory map */ +// DCS 2k with UART memory map void dcs_audio_device::dcs_2k_uart_data_map(address_map &map) { map(0x0000, 0x07ff).mirror(0x1800).rw(FUNC(dcs_audio_device::dcs_dataram_r), FUNC(dcs_audio_device::dcs_dataram_w)); - map(0x2000, 0x2fff).bankr("databank"); + map(0x2000, 0x2fff).bankr(m_data_bank); map(0x3000, 0x33ff).w(FUNC(dcs_audio_device::dcs_data_bank_select_w)); - map(0x3400, 0x3402).noprw(); /* UART (ignored) */ + map(0x3400, 0x3402).noprw(); // UART (ignored) map(0x3403, 0x3403).rw(FUNC(dcs_audio_device::input_latch_r), FUNC(dcs_audio_device::output_latch_w)); - map(0x3404, 0x3405).noprw(); /* UART (ignored) */ - map(0x3800, 0x39ff).ram().share("iram"); + map(0x3404, 0x3405).noprw(); // UART (ignored) + map(0x3800, 0x39ff).ram().share(m_iram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } -/* DCS 8k memory map */ +// DCS 8k memory map void dcs_audio_device::dcs_8k_program_map(address_map &map) { - map(0x0000, 0x03ff).ram().share("dcsint"); - map(0x0800, 0x1fff).ram().share("dcsext"); + map(0x0000, 0x03ff).ram().share(m_internal_program_ram); + map(0x0800, 0x1fff).ram().share(m_external_program_ram); map(0x3000, 0x3003).rw(FUNC(dcs_audio_device::input_latch32_r), FUNC(dcs_audio_device::output_latch32_w)); // why? } @@ -314,28 +315,28 @@ void dcs_audio_device::dcs_8k_data_map(address_map &map) { map(0x0000, 0x07ff).ram(); map(0x0800, 0x1fff).rw(FUNC(dcs_audio_device::dcs_dataram_r), FUNC(dcs_audio_device::dcs_dataram_w)); - map(0x2000, 0x2fff).bankr("databank"); + map(0x2000, 0x2fff).bankr(m_data_bank); map(0x3000, 0x3000).w(FUNC(dcs_audio_device::dcs_data_bank_select_w)); map(0x3400, 0x3403).rw(FUNC(dcs_audio_device::input_latch_r), FUNC(dcs_audio_device::output_latch_w)); // mk3 etc. need this - map(0x3800, 0x39ff).ram().share("iram"); + map(0x3800, 0x39ff).ram().share(m_iram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } -/* Williams WPC DCS/Security Pinball */ +// Williams WPC DCS/Security Pinball void dcs_audio_device::dcs_wpc_program_map(address_map &map) { - map(0x0000, 0x03ff).ram().share("dcsint"); - map(0x1000, 0x3fff).ram().share("dcsext"); + map(0x0000, 0x03ff).ram().share(m_internal_program_ram); + map(0x1000, 0x3fff).ram().share(m_external_program_ram); } void dcs_audio_wpc_device::dcs_wpc_data_map(address_map &map) { - map(0x0000, 0x07ff).bankr("databank"); + map(0x0000, 0x07ff).bankr(m_data_bank); map(0x1000, 0x2fff).rw(FUNC(dcs_audio_wpc_device::dcs_dataram_r), FUNC(dcs_audio_wpc_device::dcs_dataram_w)); map(0x3000, 0x3000).w(FUNC(dcs_audio_wpc_device::dcs_data_bank_select_w)); map(0x3100, 0x3100).w(FUNC(dcs_audio_wpc_device::dcs_data_bank_select2_w)); map(0x3300, 0x3303).rw(FUNC(dcs_audio_wpc_device::input_latch_r), FUNC(dcs_audio_wpc_device::output_latch_w)); - map(0x3800, 0x39ff).ram().share("iram"); + map(0x3800, 0x39ff).ram().share(m_iram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_wpc_device::adsp_control_r), FUNC(dcs_audio_wpc_device::adsp_control_w)); } @@ -348,13 +349,13 @@ void dcs_audio_wpc_device::dcs_wpc_data_map(address_map &map) void dcs_audio_device::dcs2_2115_program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x03ff).ram().share("dcsint"); + map(0x0000, 0x03ff).ram().share(m_internal_program_ram); } void dcs_audio_device::dcs2_2104_program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x01ff).ram().share("dcsint"); + map(0x0000, 0x01ff).ram().share(m_internal_program_ram); } @@ -367,7 +368,7 @@ void dcs_audio_device::dcs2_2115_data_map(address_map &map) map(0x0403, 0x0403).r(FUNC(dcs_audio_device::latch_status_r)); map(0x0404, 0x0407).r(FUNC(dcs_audio_device::fifo_input_r)); map(0x0480, 0x0483).rw(FUNC(dcs_audio_device::sdrc_r), FUNC(dcs_audio_device::sdrc_w)); - map(0x3800, 0x39ff).ram().share("iram"); + map(0x3800, 0x39ff).ram().share(m_iram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } @@ -380,7 +381,7 @@ void dcs_audio_device::dcs2_2104_data_map(address_map &map) map(0x0403, 0x0403).r(FUNC(dcs_audio_device::latch_status_r)); map(0x0404, 0x0407).r(FUNC(dcs_audio_device::fifo_input_r)); map(0x0480, 0x0483).rw(FUNC(dcs_audio_device::sdrc_r), FUNC(dcs_audio_device::sdrc_w)); - map(0x3800, 0x39ff).ram().share("iram"); + map(0x3800, 0x39ff).ram().share(m_iram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } @@ -395,22 +396,22 @@ void dcs_audio_device::dcs2_2104_data_map(address_map &map) void dcs_audio_device::dsio_program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x3fff).ram().share("dcsint"); + map(0x0000, 0x3fff).ram().share(m_internal_program_ram); } void dcs_audio_device::dsio_data_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x1fff).m("data_map_bank", FUNC(address_map_bank_device::amap16)); - map(0x2000, 0x3fdf).ram().share("dcsint_data"); + map(0x0000, 0x1fff).m(m_ram_map, FUNC(address_map_bank_device::amap16)); + map(0x2000, 0x3fdf).ram().share(m_internal_data_ram); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } void dcs_audio_device::dsio_rambank_map(address_map &map) { map(0x0000, 0x1fff).ram(); - map(0x2000, 0x3fff).bankrw("databank"); + map(0x2000, 0x3fff).bankrw(m_data_bank); } void dcs_audio_device::dsio_io_map(address_map &map) @@ -435,14 +436,14 @@ void dcs_audio_device::dsio_io_map(address_map &map) void dcs_audio_device::denver_program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x3fff).ram().share("dcsint"); + map(0x0000, 0x3fff).ram().share(m_internal_program_ram); } void dcs_audio_device::denver_data_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x1fff).m("data_map_bank", FUNC(address_map_bank_device::amap16)); + map(0x0000, 0x1fff).m(m_ram_map, FUNC(address_map_bank_device::amap16)); map(0x2000, 0x3fdf).ram().share("dcsint_data"); map(0x3fe0, 0x3fff).rw(FUNC(dcs_audio_device::adsp_control_r), FUNC(dcs_audio_device::adsp_control_w)); } @@ -450,7 +451,7 @@ void dcs_audio_device::denver_data_map(address_map &map) void dcs_audio_device::denver_rambank_map(address_map &map) { map(0x0000, 0x3fff).ram(); - map(0x4000, 0x7fff).bankrw("databank"); + map(0x4000, 0x7fff).bankrw(m_data_bank); } @@ -476,53 +477,53 @@ void dcs_audio_device::dcs_boot() { switch (m_rev) { - /* rev 1/1.5: use the last set data bank to boot from */ + // rev 1/1.5: use the last set data bank to boot from case REV_DCS1: case REV_DCS1P5: { - /* determine the base */ - // max_banks = m_bootrom_words / 0x1000; - uint16_t* base = m_bootrom + ((m_sounddata_bank * 0x1000) % m_bootrom_words); + // determine the base + // max_banks = m_bootrom.length() / 0x1000; + uint16_t const *const base = &m_bootrom[(m_sounddata_bank * 0x1000) % m_bootrom.length()]; - /* convert from 16-bit data to 8-bit data and boot */ + // convert from 16-bit data to 8-bit data and boot uint8_t buffer[0x1000]; for (int i = 0; i < 0x1000; i++) { buffer[i] = base[i]; } - assert(m_internal_program_ram != nullptr); - m_cpu->load_boot_data(buffer, m_internal_program_ram); + assert(m_internal_program_ram); + m_cpu->load_boot_data(buffer, &m_internal_program_ram[0]); break; } - /* rev 2: use the ROM page in the SDRC to boot from */ + // rev 2: use the ROM page in the SDRC to boot from case REV_DCS2: { - /* determine the base */ + // determine the base uint16_t* base; - if (m_bootrom == m_sounddata) + if (m_bootrom.target() == m_sounddata) { - /* EPROM case: page is selected from the page register */ - base = m_bootrom + ((SDRC_EPM_PG * 0x1000) % m_bootrom_words); + // EPROM case: page is selected from the page register + base = &m_bootrom[(SDRC_EPM_PG * 0x1000) % m_bootrom.length()]; } else { - /* DRAM case: page is selected from the ROM page register */ - base = m_bootrom + ((SDRC_ROM_PG * 0x1000) % m_bootrom_words); + // DRAM case: page is selected from the ROM page register + base = &m_bootrom[(SDRC_ROM_PG * 0x1000) % m_bootrom.length()]; } - /* convert from 16-bit data to 8-bit data and boot */ + // convert from 16-bit data to 8-bit data and boot uint8_t buffer[0x1000]; for (int i = 0; i < 0x1000; i++) { buffer[i] = base[i]; } - assert(m_internal_program_ram != nullptr); - m_cpu->load_boot_data(buffer, m_internal_program_ram); + assert(m_internal_program_ram); + m_cpu->load_boot_data(buffer, &m_internal_program_ram[0]); break; } - /* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */ + // rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA case REV_DSIO: case REV_DENV: m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); @@ -543,44 +544,44 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset ) { LOGMASKED(LOG_DCS_IO, "dcs_reset\n"); - /* reset the memory banking */ + // reset the memory banking switch (m_rev) { - /* rev 1/1.5: just reset the bank to 0 */ + // rev 1/1.5: just reset the bank to 0 case REV_DCS1: case REV_DCS1P5: m_sounddata_bank = 0; m_data_bank->set_entry(0); break; - /* rev 2: reset the SDRC ASIC */ + // rev 2: reset the SDRC ASIC case REV_DCS2: sdrc_reset(); break; - /* rev 3: reset the DSIO ASIC */ + // rev 3: reset the DSIO ASIC case REV_DSIO: dsio_reset(); break; - /* rev 4: reset the Denver ASIC */ + // rev 4: reset the Denver ASIC case REV_DENV: denver_reset(); break; } - /* initialize our state structure and install the transmit callback */ + // initialize our state structure and install the transmit callback m_size = 0; m_incs = 0; m_ireg = 0; - /* initialize the ADSP control regs */ + // initialize the ADSP control regs memset(m_control_regs, 0, sizeof(m_control_regs)); - /* clear all interrupts */ + // clear all interrupts m_cpu->set_input_line(ADSP2105_IRQ0, CLEAR_LINE); m_cpu->set_input_line(ADSP2105_IRQ1, CLEAR_LINE); m_cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); - /* initialize the comm bits */ + // initialize the comm bits SET_INPUT_EMPTY(); SET_OUTPUT_EMPTY(); if (!m_last_input_empty && !m_input_empty_cb.isnull()) @@ -588,16 +589,16 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset ) if (m_last_output_full && !m_output_full_cb.isnull()) m_output_full_cb(m_last_output_full = 0); - /* boot */ + // boot dcs_boot(); - /* reset timers */ + // reset timers m_timer_ignore = false; m_timer_enable = 0; m_timer_scale = 1; m_internal_timer->reset(); - /* reset the HLE transfer states */ + // reset the HLE transfer states m_transfer.dcs_state = m_transfer.state = 0; } @@ -681,8 +682,22 @@ void dcs_audio_device::denver_postload() // dcs_audio_device - constructor //------------------------------------------------- -dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rev) : +dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rev, int outputs) : device_t(mconfig, type, tag, owner, clock), + device_mixer_interface(mconfig, *this, outputs), + m_maincpu(*this, finder_base::DUMMY_TAG), + m_reg_timer(*this, "dcs_reg_timer"), + m_sport0_timer(*this, "dcs_sport0_timer"), + m_internal_timer(*this, "dcs_int_timer"), + m_ram_map(*this, "data_map_bank"), + m_bootrom(*this, DEVICE_SELF), + m_internal_program_ram(*this, "dcsint"), + m_external_program_ram(*this, "dcsext"), + m_internal_data_ram(*this, "dcsint_data"), + m_iram(*this, "iram"), + m_data_bank(*this, "databank"), + m_rom_page(*this, "rompage"), + m_dram_page(*this, "drampage"), m_cpu(nullptr), m_program(nullptr), m_data(nullptr), @@ -692,21 +707,12 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty m_channels(0), m_size(0), m_incs(0), - m_reg_timer(*this, "dcs_reg_timer"), - m_sport0_timer(*this, "dcs_sport0_timer"), - m_internal_timer(*this, "dcs_int_timer"), m_ireg(0), m_ireg_base(0), - m_bootrom(nullptr), - m_bootrom_words(0), m_sounddata(nullptr), m_sounddata_words(0), m_sounddata_banks(0), m_sounddata_bank(0), - m_ram_map(*this, "data_map_bank"), - m_data_bank(*this, "databank"), - m_rom_page(*this, "rompage"), - m_dram_page(*this, "drampage"), m_auto_ack(0), m_latch_control(0), m_input_data(0), @@ -729,12 +735,7 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty m_timer_period(0), m_timers_fired(0), m_sram(nullptr), - m_internal_program_ram(nullptr), - m_external_program_ram(nullptr), - m_internal_data_ram(nullptr), - m_dram_in_mb(0), - m_iram(*this, "iram"), - m_maincpu(*this, ":maincpu") + m_dram_in_mb(0) { m_dmadac[0] = m_dmadac[1] = m_dmadac[2] = m_dmadac[3] = m_dmadac[4] = m_dmadac[5] = nullptr; memset(m_control_regs, 0, sizeof(m_control_regs)); @@ -756,18 +757,7 @@ void dcs_audio_device::device_start() { m_sram = nullptr; - memory_share *internal_ram = memshare("dcsint"); - if (internal_ram != nullptr) - { - m_internal_program_ram = (uint32_t *)internal_ram->ptr(); - } - memory_share *external_ram = memshare("dcsext"); - if (external_ram != nullptr) - { - m_external_program_ram = (uint32_t *)external_ram->ptr(); - } - - /* find the DCS CPU and the sound ROMs */ + // find the DCS CPU and the sound ROMs m_cpu = subdevice("dcs"); if (m_cpu != nullptr && !m_cpu->started()) throw device_missing_dependencies(); @@ -777,11 +767,9 @@ void dcs_audio_device::device_start() m_channels = 1; m_dmadac[0] = subdevice("dac"); - /* configure boot and sound ROMs */ - m_bootrom = (uint16_t *)machine().root_device().memregion("dcs")->base(); - m_bootrom_words = machine().root_device().memregion("dcs")->bytes() / 2; - m_sounddata = m_bootrom; - m_sounddata_words = m_bootrom_words; + // configure boot and sound ROMs + m_sounddata = m_bootrom.target(); + m_sounddata_words = m_bootrom.length(); if (m_rev == REV_DCS1) { m_sounddata_banks = m_sounddata_words / 0x1000; @@ -793,16 +781,16 @@ void dcs_audio_device::device_start() m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, 0x800*2); } - /* allocate timers */ + // allocate timers m_s1_ack_timer = timer_alloc(FUNC(dcs_audio_device::s1_ack_callback1), this); m_s1_ack2_timer = timer_alloc(FUNC(dcs_audio_device::s1_ack_callback2), this); m_s2_ack_timer = timer_alloc(FUNC(dcs_audio_device::s2_ack_callback), this); - /* non-RAM based automatically acks */ + // non-RAM based automatically acks m_auto_ack = true; - /* register for save states */ + // register for save states dcs_register_state(); - /* reset the system */ + // reset the system dcs_reset(0); } @@ -811,23 +799,7 @@ void dcs2_audio_device::device_start() { int soundbank_words; - memory_share *internal_ram = memshare("dcsint"); - if (internal_ram != nullptr) - { - m_internal_program_ram = (uint32_t *)internal_ram->ptr(); - } - memory_share *external_ram = memshare("dcsext"); - if (external_ram != nullptr) - { - m_external_program_ram = (uint32_t *)external_ram->ptr(); - } - memory_share *internal_data_ram = memshare("dcsint_data"); - if (internal_data_ram != nullptr) - { - m_internal_data_ram = (uint32_t *)internal_ram->ptr(); - } - - /* find the DCS CPU and the sound ROMs */ + // find the DCS CPU and the sound ROMs m_cpu = subdevice("dcs2"); m_rev = REV_DCS2; soundbank_words = 0x1000; @@ -852,15 +824,7 @@ void dcs2_audio_device::device_start() m_dmadac[0] = subdevice("dac1"); m_dmadac[1] = subdevice("dac2"); - /* always boot from the base of "dcs" */ - memory_region *bootrom_region = machine().root_device().memregion("dcs"); - if (bootrom_region != nullptr) - { - m_bootrom = (uint16_t *)bootrom_region->base(); - m_bootrom_words = bootrom_region->bytes() / 2; - } - - /* supports both RAM and ROM variants */ + // supports both RAM and ROM variants if (m_dram_in_mb != 0) { m_sounddata_words = (m_dram_in_mb << 20) / 2; @@ -870,8 +834,8 @@ void dcs2_audio_device::device_start() } else { - m_sounddata = m_bootrom; - m_sounddata_words = m_bootrom_words; + m_sounddata = m_bootrom.target(); + m_sounddata_words = m_bootrom.length(); } m_sounddata_banks = m_sounddata_words / soundbank_words; if (m_rev != REV_DCS2) @@ -883,29 +847,29 @@ void dcs2_audio_device::device_start() } - /* allocate memory for the SRAM */ + // allocate memory for the SRAM m_sram = std::make_unique(0x8000*4/2); - /* we don't do auto-ack by default */ + // we don't do auto-ack by default m_auto_ack = false; - /* install the speedup handler */ + // install the speedup handler install_speedup(); - /* allocate a watchdog timer for HLE transfers */ + // allocate a watchdog timer for HLE transfers m_transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && m_dram_in_mb != 0 && m_rev < REV_DSIO); if (m_transfer.hle_enabled) m_transfer.watchdog = subdevice("dcs_hle_timer"); - /* allocate timers */ - m_s1_ack_timer = timer_alloc(FUNC(dcs_audio_device::s1_ack_callback1), this); - m_s1_ack2_timer = timer_alloc(FUNC(dcs_audio_device::s1_ack_callback2), this); - m_s2_ack_timer = timer_alloc(FUNC(dcs_audio_device::s2_ack_callback), this); + // allocate timers + m_s1_ack_timer = timer_alloc(FUNC(dcs2_audio_device::s1_ack_callback1), this); + m_s1_ack2_timer = timer_alloc(FUNC(dcs2_audio_device::s1_ack_callback2), this); + m_s2_ack_timer = timer_alloc(FUNC(dcs2_audio_device::s2_ack_callback), this); - /* register for save states */ + // register for save states dcs_register_state(); - /* reset the system */ + // reset the system dcs_reset(0); } @@ -969,7 +933,7 @@ void dcs_audio_device::dcs_data_bank_select_w(uint16_t data) m_data_bank->set_entry(m_sounddata_bank % m_sounddata_banks); - /* bit 11 = sound board led */ + // bit 11 = sound board led #if 0 if (m_rev != REV_DCS1P5) output().set_led_value(2, data & 0x800); @@ -993,12 +957,12 @@ void dcs_audio_device::sdrc_update_bank_pointers() { if (SDRC_SM_EN != 0) { - int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; + int const pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; - /* update the bank pointer based on whether we are ROM-based or RAM-based */ - if (m_bootrom == m_sounddata) + // update the bank pointer based on whether we are ROM-based or RAM-based + if (m_bootrom.target() == m_sounddata) { - /* ROM-based; use the memory page to select from ROM */ + // ROM-based; use the memory page to select from ROM if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) { m_rom_page->set_base(&m_sounddata[(SDRC_EPM_PG * pagesize) % m_sounddata_words]); @@ -1006,10 +970,10 @@ void dcs_audio_device::sdrc_update_bank_pointers() } else { - /* RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM */ + // RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) { - m_rom_page->set_base(&m_bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % m_bootrom_words]); + m_rom_page->set_base(&m_bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % m_bootrom.length()]); } if (SDRC_DM_ST != 0) { @@ -1022,56 +986,55 @@ void dcs_audio_device::sdrc_update_bank_pointers() void dcs_audio_device::sdrc_remap_memory() { - /* if SRAM disabled, clean it out */ if (SDRC_SM_EN == 0) { + // if SRAM disabled, clean it out m_program->unmap_readwrite(0x0800, 0x3fff); m_data->unmap_readwrite(0x0800, 0x37ff); } - - /* otherwise, map the SRAM */ else { - /* first start with a clean program map */ + // otherwise, map the SRAM + + // first start with a clean program map m_program->install_ram(0x0800, 0x3fff, &m_sram[0x4800]); - /* set up the data map based on the SRAM banking */ - /* map 0: ram from 0800-37ff */ + // set up the data map based on the SRAM banking if (SDRC_SM_BK == 0) { + // map 0: ram from 0800-37ff m_data->install_ram(0x0800, 0x17ff, &m_sram[0x0000]); m_data->install_ram(0x1800, 0x27ff, &m_sram[0x1000]); m_data->install_ram(0x2800, 0x37ff, &m_sram[0x2000]); } - - /* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */ else { + // map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff m_data->unmap_readwrite(0x0800, 0x17ff); m_data->install_ram(0x1800, 0x27ff, &m_sram[0x3000]); m_data->install_ram(0x2800, 0x37ff, &m_sram[0x2000]); } } - /* map the ROM page as bank 25 */ + // map the ROM page as bank 25 if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) { - int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400; - int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; + int const baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400; + int const pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; m_data->install_read_bank(baseaddr, baseaddr + pagesize - 1, m_rom_page); } - /* map the DRAM page as bank 26 */ + // map the DRAM page as bank 26 if (SDRC_DM_ST != 0) { - int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400; + int const baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400; m_data->install_readwrite_bank(baseaddr, baseaddr + 0x3ff, m_dram_page); } - /* update the bank pointers */ + // update the bank pointers sdrc_update_bank_pointers(); - /* reinstall the polling hotspot */ + // reinstall the polling hotspot install_speedup(); } @@ -1095,41 +1058,41 @@ uint16_t dcs_audio_device::sdrc_r(offs_t offset) sdrc_state &sdrc = m_sdrc; uint16_t result = sdrc.reg[offset]; - /* offset 3 is for security */ + // offset 3 is for security if (offset == 3) { switch (SDRC_SMODE) { default: - case 0: /* no-op */ + case 0: // no-op result = 0x5a81; break; - case 1: /* write seed */ + case 1: // write seed result = 0x5aa4; break; - case 2: /* read data */ + case 2: // read data result = 0x5a00 | ((sdrc.seed & 0x3f) << 1); break; - case 3: /* shift left */ + case 3: // shift left result = 0x5ab9; break; - case 4: /* add */ + case 4: // add result = 0x5a03; break; - case 5: /* xor */ + case 5: // xor result = 0x5a69; break; - case 6: /* prg */ + case 6: // prg result = 0x5a20; break; - case 7: /* invert */ + case 7: // invert result = 0x5aff; break; } @@ -1142,11 +1105,11 @@ uint16_t dcs_audio_device::sdrc_r(offs_t offset) void dcs_audio_device::sdrc_w(offs_t offset, uint16_t data) { sdrc_state &sdrc = m_sdrc; - uint16_t diff = sdrc.reg[offset] ^ data; + uint16_t const diff = sdrc.reg[offset] ^ data; switch (offset) { - /* offset 0 controls ROM mapping */ + // offset 0 controls ROM mapping case 0: sdrc.reg[0] = data; if (diff & 0x1833) @@ -1155,7 +1118,7 @@ void dcs_audio_device::sdrc_w(offs_t offset, uint16_t data) sdrc_update_bank_pointers(); break; - /* offset 1 controls RAM mapping */ + // offset 1 controls RAM mapping case 1: sdrc.reg[1] = data; //dmadac_enable(&m_dmadac[0], m_channels, SDRC_MUTE); @@ -1163,42 +1126,42 @@ void dcs_audio_device::sdrc_w(offs_t offset, uint16_t data) sdrc_remap_memory(); break; - /* offset 2 controls paging */ + // offset 2 controls paging case 2: sdrc.reg[2] = data; if (diff & 0x1fff) sdrc_update_bank_pointers(); break; - /* offset 3 controls security */ + // offset 3 controls security case 3: switch (SDRC_SMODE) { - case 0: /* no-op */ - case 2: /* read data */ + case 0: // no-op + case 2: // read data break; - case 1: /* write seed */ + case 1: // write seed sdrc.seed = data & 0xff; break; - case 3: /* shift left */ + case 3: // shift left sdrc.seed = (sdrc.seed << 1) | 1; break; - case 4: /* add */ + case 4: // add sdrc.seed += sdrc.seed >> 1; break; - case 5: /* xor */ + case 5: // xor sdrc.seed ^= (sdrc.seed << 1) | 1; break; - case 6: /* prg */ + case 6: // prg sdrc.seed = (((sdrc.seed << 7) ^ (sdrc.seed << 5) ^ (sdrc.seed << 4) ^ (sdrc.seed << 3)) & 0x80) | (sdrc.seed >> 1); break; - case 7: /* invert */ + case 7: // invert sdrc.seed = ~sdrc.seed; break; } @@ -1229,11 +1192,16 @@ uint16_t dcs_audio_device::dsio_r(offs_t offset) if (offset == 1) { - /* bit 4 specifies which channel is being output */ - dsio.channelbits ^= 0x0010; + // bit 4 specifies which channel is being output + if (!machine().side_effects_disabled()) + dsio.channelbits ^= 0x0010; result = (result & ~0x0010) | dsio.channelbits; } - if (offset != 2) LOGMASKED(LOG_DCS_IO, "%s dsio_r 0x%x = %04x\n", machine().describe_context(), offset, result); + if (offset != 2) + { + if (!machine().side_effects_disabled()) + LOGMASKED(LOG_DCS_IO, "%s dsio_r 0x%x = %04x\n", machine().describe_context(), offset, result); + } return result; } @@ -1244,19 +1212,19 @@ void dcs_audio_device::dsio_w(offs_t offset, uint16_t data) switch (offset) { - /* offset 1 controls I/O */ + // offset 1 controls I/O case 1: dsio.reg[1] = data; - /* determine /MUTE and number of channels */ + // determine /MUTE and number of channels dmadac_enable(&m_dmadac[0], m_channels, DSIO_MUTE); - /* bit 0 resets the FIFO */ + // bit 0 resets the FIFO if (!m_fifo_reset_w.isnull()) m_fifo_reset_w(DSIO_EMPTY_FIFO ^ 1); break; - /* offset 2 controls RAM pages */ + // offset 2 controls RAM pages case 2: dsio.reg[2] = data; m_data_bank->set_entry(DSIO_DM_PG % m_sounddata_banks); @@ -1305,12 +1273,15 @@ uint16_t dcs_audio_device::denver_r(offs_t offset) if (offset == 3) { - /* returns 1 for DRAM, 2 for EPROM-based */ + // returns 1 for DRAM, 2 for EPROM-based // SDRC Revision result = 0x0003; } - if (offset != 0x2) LOGMASKED(LOG_DCS_IO, "%s denver_r %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, result); - + if (offset != 0x2) + { + if (!machine().side_effects_disabled()) + LOGMASKED(LOG_DCS_IO, "%s denver_r %s 0x%x = %04x\n", machine().describe_context(), denver_regname[offset], offset, result); + } return result; } @@ -1324,15 +1295,15 @@ void dcs_audio_device::denver_w(offs_t offset, uint16_t data) switch (offset) { - /* offset 1 controls I/O */ + // offset 1 controls I/O case 1: dsio.reg[1] = data; // Ignore LED data_change &= ~(1 << 13); - /* determine /MUTE and number of channels */ + // determine /MUTE and number of channels channels = 2 + 2 * DENV_CHANNELS; - /* if the number of channels has changed adjust */ + // if the number of channels has changed adjust if (channels != m_channels) { m_channels = channels; @@ -1351,12 +1322,12 @@ void dcs_audio_device::denver_w(offs_t offset, uint16_t data) } break; - /* offset 2 controls RAM pages */ + // offset 2 controls RAM pages case 2: dsio.reg[2] = data; m_data_bank->set_entry(DENV_DM_PG % m_sounddata_banks); break; - /* offset 3 controls FIFO reset */ + // offset 3 controls FIFO reset case 3: if (!m_fifo_reset_w.isnull()) m_fifo_reset_w(1); @@ -1414,13 +1385,13 @@ void dcs_audio_device::dsio_idma_data_w(offs_t offset, uint32_t data, uint32_t m uint32_t dcs_audio_device::dsio_idma_data_r() { - uint32_t result; // IDMA is to internal memory only m_ram_map->set_bank(0); - result = downcast(m_cpu)->idma_data_r(); + uint32_t result = downcast(m_cpu)->idma_data_r(); // Restore internal/external mapping m_ram_map->set_bank(m_dmovlay_val); - LOGMASKED(LOG_DCS_TRANSFERS, "%s IDMA_data_r(%04X) = %04X\n", machine().describe_context(), downcast(m_cpu)->idma_addr_r(), result); + if (!machine().side_effects_disabled()) + LOGMASKED(LOG_DCS_TRANSFERS, "%s IDMA_data_r(%04X) = %04X\n", machine().describe_context(), downcast(m_cpu)->idma_addr_r(), result); return result; } @@ -1433,7 +1404,7 @@ void dcs_audio_device::dmovlay_remap_memory() } else { m_ram_map->set_bank(1); } - if (m_dmovlay_val==0) + if (m_dmovlay_val == 0) LOGMASKED(LOG_DCS_IO, "%s dmovlay_remap_memory: Switching to internal data ram location dmovlay=%i\n", machine().describe_context(), m_dmovlay_val); else LOGMASKED(LOG_DCS_IO, "%s dmovlay_remap_memory: Switching to external data ram location dmovlay=%i\n", machine().describe_context(), m_dmovlay_val); @@ -1472,10 +1443,13 @@ void dcs_audio_device::set_fifo_callbacks(read16smo_delegate fifo_data_r, read16 int dcs_audio_device::control_r() { - /* only boost for DCS2 boards */ - if (!m_auto_ack && !m_transfer.hle_enabled) - machine().scheduler().add_quantum(attotime::from_nsec(500), attotime::from_usec(5)); - if ( /* m_rev == REV_DSC1 || */ m_rev == REV_DCS1P5) // == 1 check breaks mk3 + if (!machine().side_effects_disabled()) + { + // only boost for DCS2 boards + if (!m_auto_ack && !m_transfer.hle_enabled) + machine().scheduler().add_quantum(attotime::from_nsec(500), attotime::from_usec(5)); + } + if ( /* m_rev == REV_DCS1 || */ m_rev == REV_DCS1P5) // == 1 check breaks mk3 return IS_OUTPUT_FULL() ? 0x80 : 0x00; return m_latch_control; } @@ -1483,17 +1457,17 @@ int dcs_audio_device::control_r() void dcs_audio_device::reset_w(int state) { - /* going low halts the CPU */ + // going low halts the CPU if (!state) { // LOG("%s: DCS reset = %d\n", machine().describe_context(), state); - /* just run through the init code again */ + // just run through the init code again machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::dcs_reset),this)); m_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } - /* going high resets and reactivates the CPU */ + // going high resets and reactivates the CPU else m_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } @@ -1501,7 +1475,7 @@ void dcs_audio_device::reset_w(int state) uint16_t dcs_audio_device::latch_status_r(address_space &space) { - int result = 0; + uint16_t result = 0; if (IS_INPUT_FULL()) result |= 0x80; if (IS_OUTPUT_EMPTY()) @@ -1532,18 +1506,18 @@ void dcs_audio_device::dcs_delayed_data_w(uint16_t data) { LOGMASKED(LOG_DCS_IO, "%s:dcs_data_w(%04X)\n", machine().describe_context(), data); - /* boost the interleave temporarily */ + // boost the interleave temporarily machine().scheduler().add_quantum(attotime::from_nsec(500), attotime::from_usec(5)); - /* set the IRQ line on the ADSP */ + // set the IRQ line on the ADSP m_cpu->set_input_line(ADSP2105_IRQ2, ASSERT_LINE); - /* indicate we are no longer empty */ + // indicate we are no longer empty if (m_last_input_empty && !m_input_empty_cb.isnull()) m_input_empty_cb(m_last_input_empty = 0); SET_INPUT_FULL(); - /* set the data */ + // set the data m_input_data = data; } @@ -1556,12 +1530,12 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_delayed_data_w_callback ) void dcs_audio_device::data_w(uint16_t data) { - /* preprocess the write */ + // preprocess the write // ADSP2181 variants use IDMA to transfer data if (m_rev <= REV_DCS2 && preprocess_write(data)) return; - /* if we are DCS1, set a timer to latch the data */ + // if we are DCS1, set a timer to latch the data if (!m_sport0_timer) machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::dcs_delayed_data_w_callback),this), data); else @@ -1582,18 +1556,23 @@ void dcs_audio_device::input_latch_ack_w(uint16_t data) uint16_t dcs_audio_device::input_latch_r() { - if (m_auto_ack) - input_latch_ack_w(0); - - LOGMASKED(LOG_DCS_IO, "%s input_latch_r(%04X)\n", machine().describe_context(), m_input_data); + if (!machine().side_effects_disabled()) + { + if (m_auto_ack) + input_latch_ack_w(0); + LOGMASKED(LOG_DCS_IO, "%s input_latch_r(%04X)\n", machine().describe_context(), m_input_data); + } return m_input_data; } uint32_t dcs_audio_device::input_latch32_r() { - if (m_auto_ack) - input_latch_ack_w(0); - LOGMASKED(LOG_DCS_IO, "%s input_latch32_r(%04X)\n", machine().describe_context(), m_input_data); + if (!machine().side_effects_disabled()) + { + if (m_auto_ack) + input_latch_ack_w(0); + LOGMASKED(LOG_DCS_IO, "%s input_latch32_r(%04X)\n", machine().describe_context(), m_input_data); + } return m_input_data << 8; } @@ -1648,17 +1627,20 @@ void dcs_audio_device::ack_w() uint16_t dcs_audio_device::data_r() { - // If the cpu is reading empty data it is probably polling so eat some cyles - if IS_OUTPUT_EMPTY() - m_maincpu->eat_cycles(4444); + if (!machine().side_effects_disabled()) + { + // If the cpu is reading empty data it is probably polling so eat some cyles + if IS_OUTPUT_EMPTY() + m_maincpu->eat_cycles(4444); - /* data is actually only 8 bit (read from d8-d15, which is d0-d7 from the data access instructions POV) on early dcs, but goes 16 on later (seattle) */ - if (m_last_output_full && !m_output_full_cb.isnull()) - m_output_full_cb(m_last_output_full = 0); - if (m_auto_ack) - delayed_ack_w(); + // data is actually only 8 bit (read from d8-d15, which is d0-d7 from the data access instructions POV) on early dcs, but goes 16 on later (seattle) + if (m_last_output_full && !m_output_full_cb.isnull()) + m_output_full_cb(m_last_output_full = 0); + if (m_auto_ack) + delayed_ack_w(); - LOGMASKED(LOG_DCS_IO, "%s:dcs_data_r(%04X)\n", machine().describe_context(), m_output_data); + LOGMASKED(LOG_DCS_IO, "%s:dcs_data_r(%04X)\n", machine().describe_context(), m_output_data); + } return m_output_data; } @@ -1685,15 +1667,19 @@ void dcs_audio_device::output_control_w(uint16_t data) uint16_t dcs_audio_device::output_control_r() { - LOGMASKED(LOG_DCS_IO, "%s output_control_r = %04X\n", machine().describe_context(), m_output_control); - m_output_control_cycles = m_cpu->total_cycles(); + if (!machine().side_effects_disabled()) + { + LOGMASKED(LOG_DCS_IO, "%s output_control_r = %04X\n", machine().describe_context(), m_output_control); + m_output_control_cycles = m_cpu->total_cycles(); + } return m_output_control; } int dcs_audio_device::data2_r() { - LOGMASKED(LOG_DCS_IO, "%s: dcs:data2_r = %04X\n", machine().describe_context(), m_output_control); + if (!machine().side_effects_disabled()) + LOGMASKED(LOG_DCS_IO, "%s: dcs:data2_r = %04X\n", machine().describe_context(), m_output_control); return m_output_control; } @@ -1708,29 +1694,26 @@ int dcs_audio_device::data2_r() void dcs_audio_device::update_timer_count() { - uint64_t periods_since_start; - uint64_t elapsed_cycles; - uint64_t elapsed_clocks; - - /* if not enabled, skip */ + // if not enabled, skip if (!m_timer_enable) return; - /* count cycles */ - elapsed_cycles = m_cpu->total_cycles() - m_timer_start_cycles; - elapsed_clocks = elapsed_cycles / m_timer_scale; + // count cycles + uint64_t elapsed_cycles = m_cpu->total_cycles() - m_timer_start_cycles; + uint64_t elapsed_clocks = elapsed_cycles / m_timer_scale; - /* if we haven't counted past the initial count yet, just do that */ - if (elapsed_clocks < m_timer_start_count + 1) { + if (elapsed_clocks < m_timer_start_count + 1) + { + // if we haven't counted past the initial count yet, just do that m_timer_start_count -= elapsed_clocks; m_control_regs[TIMER_COUNT_REG] = m_timer_start_count; - /* otherwise, count how many periods */ } else { + // otherwise, count how many periods elapsed_clocks -= m_timer_start_count + 1; - periods_since_start = elapsed_clocks / (m_timer_period + 1); + uint64_t periods_since_start = elapsed_clocks / (m_timer_period + 1); elapsed_clocks -= periods_since_start * (m_timer_period + 1); m_timer_start_count = m_timer_period - elapsed_clocks; m_control_regs[TIMER_COUNT_REG] = m_timer_start_count; @@ -1740,19 +1723,17 @@ void dcs_audio_device::update_timer_count() TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::internal_timer_callback ) { - int64_t target_cycles; - - /* compute the absolute cycle when the next one should fire */ - /* we do this to avoid drifting */ + // compute the absolute cycle when the next one should fire + // we do this to avoid drifting m_timers_fired++; - target_cycles = m_timer_start_cycles + m_timer_scale * (m_timer_start_count + 1 + m_timers_fired * (uint64_t)(m_timer_period + 1)); + int64_t target_cycles = m_timer_start_cycles + m_timer_scale * (m_timer_start_count + 1 + m_timers_fired * (uint64_t)(m_timer_period + 1)); target_cycles -= m_cpu->total_cycles(); - /* set the next timer, but only if it's for a reasonable number */ + // set the next timer, but only if it's for a reasonable number if (!m_timer_ignore && (m_timer_period > 10 || m_timer_scale > 1)) timer.adjust(m_cpu->cycles_to_attotime(target_cycles)); - /* the IRQ line is edge triggered */ + // the IRQ line is edge triggered m_cpu->set_input_line(ADSP2105_TIMER, ASSERT_LINE); m_cpu->set_input_line(ADSP2105_TIMER, CLEAR_LINE); } @@ -1760,45 +1741,46 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::internal_timer_callback ) void dcs_audio_device::reset_timer() { - /* if not enabled, skip */ + // if not enabled, skip if (!m_timer_enable) return; - /* compute the time until the first firing */ + // compute the time until the first firing m_timer_start_cycles = m_cpu->total_cycles(); m_timers_fired = 0; - /* if this is the first timer, check the IRQ routine for the DRAM refresh stub */ - /* if that's all the timer does, we don't really need to fire */ + // if this is the first timer, check the IRQ routine for the DRAM refresh stub + // if that's all the timer does, we don't really need to fire if (!m_timer_ignore) { // Denver variants (mwskins and sf2049) use the timer as a scaler for another count so we can't disable here // Denver gets disabled when reset TFS in the adsp control written // Road Burners: Code gets moved after initial diagnostic checks - /* Road Burners: @ 28: JMP $0032 18032F, same code at $32 */ - /* Road Burners: @ 28: JMP $0030 18030F, same code at $30 */ + // Road Burners: @ 28: JMP $0032 18032F, same code at $32 + // Road Burners: @ 28: JMP $0030 18030F, same code at $30 if (m_rev < REV_DSIO && - m_program->read_dword(0x18) == 0x0c0030 && /* ENA SEC_REG */ - m_program->read_dword(0x19) == 0x804828 && /* SI = DM($0482) */ - m_program->read_dword(0x1a) == 0x904828 && /* DM($0482) = SI */ - m_program->read_dword(0x1b) == 0x0C0020 && /* DIS SEC_REG */ - m_program->read_dword(0x1c) == 0x0A001F) /* RTI */ + m_program->read_dword(0x18) == 0x0c0030 && // ENA SEC_REG + m_program->read_dword(0x19) == 0x804828 && // SI = DM($0482) + m_program->read_dword(0x1a) == 0x904828 && // DM($0482) = SI + m_program->read_dword(0x1b) == 0x0c0020 && // DIS SEC_REG + m_program->read_dword(0x1c) == 0x0a001f) // RTI { LOGMASKED(LOG_DCS_IO, "reset_timer: Disabled timer %llu\n", m_timer_start_cycles); m_timer_ignore = true; - } else if (m_rev == REV_DSIO && - m_program->read_dword(0x30) == 0x0c0030 && /* ENA SEC_REG */ - m_program->read_dword(0x31) == 0x014828 && /* SI = IO($0482) */ - m_program->read_dword(0x32) == 0x01c828 && /* IO($0482) = SI */ - m_program->read_dword(0x33) == 0x0C0020 && /* DIS SEC_REG */ - m_program->read_dword(0x34) == 0x0A001F) /* RTI */ + } + else if (m_rev == REV_DSIO && + m_program->read_dword(0x30) == 0x0c0030 && // ENA SEC_REG + m_program->read_dword(0x31) == 0x014828 && // SI = IO($0482) + m_program->read_dword(0x32) == 0x01c828 && // IO($0482) = SI + m_program->read_dword(0x33) == 0x0c0020 && // DIS SEC_REG + m_program->read_dword(0x34) == 0x0A001f) // RTI { LOGMASKED(LOG_DCS_IO, "reset_timer: Disabled timer %llu\n", m_timer_start_cycles); m_timer_ignore = true; } } - /* adjust the timer if not optimized */ + // adjust the timer if not optimized if (!m_timer_ignore) m_internal_timer->adjust(m_cpu->cycles_to_attotime(m_timer_scale * (m_timer_start_count + 1))); } @@ -1858,7 +1840,8 @@ uint16_t dcs_audio_device::adsp_control_r(offs_t offset) // Denver Atlantis mwskins wants 0x2 to toggle // Denver Durnago sf2049te wants 0x6 to toogle result = (m_control_regs[PROG_FLAG_CONTROL_REG] & m_control_regs[PROG_FLAG_DATA_REG]) | (m_progflags & ~m_control_regs[PROG_FLAG_CONTROL_REG]); - m_progflags ^= 0x6; + if (!machine().side_effects_disabled()) + m_progflags ^= 0x6; break; case IDMA_CONTROL_REG: @@ -1867,7 +1850,8 @@ uint16_t dcs_audio_device::adsp_control_r(offs_t offset) break; case TIMER_COUNT_REG: - update_timer_count(); + if (!machine().side_effects_disabled()) + update_timer_count(); result = m_control_regs[offset]; break; @@ -1875,19 +1859,20 @@ uint16_t dcs_audio_device::adsp_control_r(offs_t offset) result = m_control_regs[offset]; break; } - LOGMASKED(LOG_DCS_IO, "%s adsp_control_r(%06x) = %04X\n", machine().describe_context(), offset + 0x3fe0, result); + if (!machine().side_effects_disabled()) + LOGMASKED(LOG_DCS_IO, "%s adsp_control_r(%06x) = %04X\n", machine().describe_context(), offset + 0x3fe0, result); return result; } -void dcs_audio_device:: adsp_control_w(offs_t offset, uint16_t data) +void dcs_audio_device::adsp_control_w(offs_t offset, uint16_t data) { m_control_regs[offset] = data; switch (offset) { case SYSCONTROL_REG: - /* bit 9 forces a reset (not on 2181) */ + // bit 9 forces a reset (not on 2181) if ((data & 0x0200) && !(m_rev == REV_DSIO || m_rev == REV_DENV)) { LOG("%s Rebooting DCS due to SYSCONTROL write = %04X\n", machine().describe_context(), data); @@ -1896,7 +1881,7 @@ void dcs_audio_device:: adsp_control_w(offs_t offset, uint16_t data) m_control_regs[SYSCONTROL_REG] = 0; } - /* see if SPORT1 got disabled */ + // see if SPORT1 got disabled if ((data & 0x0800) == 0) { dmadac_enable(&m_dmadac[0], m_channels, 0); @@ -1922,7 +1907,7 @@ void dcs_audio_device:: adsp_control_w(offs_t offset, uint16_t data) break; case S1_AUTOBUF_REG: - /* autobuffer off: nuke the timer, and disable the DAC */ + // autobuffer off: nuke the timer, and disable the DAC if ((data & 0x0002) == 0) { dmadac_enable(&m_dmadac[0], m_channels, 0); @@ -1976,18 +1961,17 @@ void dcs_audio_device:: adsp_control_w(offs_t offset, uint16_t data) TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq ) { - /* get the index register */ + // get the index register int reg = m_cpu->state_int(ADSP2100_I0 + m_ireg); LOGMASKED(LOG_DCS_IO, "dcs_irq: m_ireg: %x m_size: %x m_incs: %x m_channels: %d m_ireg_base: %x reg: %06x\n", m_ireg, m_size, m_incs, m_channels, m_ireg_base, reg); - /* copy the current data into the buffer */ + // copy the current data into the buffer { - int count = m_size / (2*(m_incs ? m_incs : 1)); + int const count = m_size / (2*(m_incs ? m_incs : 1)); // sf2049se was having overflow issues with fixed size of 0x400 buffer (m_size==0xb40, count=0x5a0). int16_t buffer[0x800]; - int i; - for (i = 0; i < count; i++) + for (int i = 0; i < count; i++) { buffer[i] = m_data->read_word(reg); reg += m_incs; @@ -1997,30 +1981,30 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq ) dmadac_transfer(&m_dmadac[0], m_channels, 1, m_channels, count / m_channels, buffer); } - /* check for wrapping */ + // check for wrapping m_ireg_base = m_cpu->get_ibase(m_ireg); if (reg >= m_ireg_base + m_size) { - /* reset the base pointer */ + // reset the base pointer reg = m_ireg_base; - /* generate the (internal, thats why the pulse) irq */ + // generate the (internal, thats why the pulse) irq LOGMASKED(LOG_DCS_IO, "dcs_irq: Generating interrupt\n"); m_cpu->pulse_input_line(ADSP2105_IRQ1, m_cpu->minimum_quantum_time()); } - /* store it */ + // store it m_cpu->set_state_int(ADSP2100_I0 + m_ireg, reg); LOGMASKED(LOG_DCS_IO, "dcs_irq end: m_size: %x m_incs: %x m_channels: %d m_ireg_base: %x reg: %06x\n", m_size, m_incs, m_channels, m_ireg_base, reg); } TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::sport0_irq ) { - /* this latches internally, so we just pulse */ - /* note that there is non-interrupt code that reads/modifies/writes the output_control */ - /* register; if we don't interlock it, we will eventually lose sound (see CarnEvil) */ - /* so we skip the SPORT interrupt if we read with output_control within the last 5 cycles */ - uint64_t diff = m_cpu->total_cycles() - m_output_control_cycles; + // this latches internally, so we just pulse + // note that there is non-interrupt code that reads/modifies/writes the output_control + // register; if we don't interlock it, we will eventually lose sound (see CarnEvil) + // so we skip the SPORT interrupt if we read with output_control within the last 5 cycles + uint64_t const diff = m_cpu->total_cycles() - m_output_control_cycles; if (diff > 5) { m_cpu->set_input_line(ADSP2115_SPORT0_RX, ASSERT_LINE); @@ -2031,14 +2015,14 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::sport0_irq ) void dcs_audio_device::recompute_sample_rate() { - /* calculate how long until we generate an interrupt */ + // calculate how long until we generate an interrupt - /* frequency the time per each bit sent */ + // frequency the time per each bit sent attotime sample_period; if (m_control_regs[S1_CONTROL_REG] & 0x4000) { // Use internal clock for SPORT1 Tx timing sample_period = attotime::from_hz(m_cpu->unscaled_clock()) * (2 * (m_control_regs[S1_SCLKDIV_REG] + 1)); - /* now put it down to samples, so we know what the channel frequency has to be */ + // now put it down to samples, so we know what the channel frequency has to be sample_period *= (16 * m_channels); } else { @@ -2050,7 +2034,7 @@ void dcs_audio_device::recompute_sample_rate() dmadac_enable(&m_dmadac[0], m_channels, 1); LOGMASKED(LOG_DCS_IO, "recompute_sample_rate: Channels: %d Freq: %e Size: 0x%x m_incs: 0x%x\n", m_channels, sample_period.as_hz(), m_size, m_incs); - /* fire off a timer which will hit every half-buffer */ + // fire off a timer which will hit every half-buffer if (m_incs) { attotime period = (sample_period * m_size) / (2 * m_channels * m_incs); @@ -2060,46 +2044,43 @@ void dcs_audio_device::recompute_sample_rate() void dcs_audio_device::sound_tx_callback(offs_t offset, uint32_t data) { - /* check if it's for SPORT1 */ + // check if it's for SPORT1 if (offset != 1) { LOG("sound_tx_callback: No code for offset %x\n", offset); return; } - /* check if SPORT1 is enabled */ - if (m_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */ + // check if SPORT1 is enabled + if (m_control_regs[SYSCONTROL_REG] & 0x0800) // bit 11 { - /* we only support autobuffer here (wich is what this thing uses), bail if not enabled */ - if (m_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */ + // we only support autobuffer here (wich is what this thing uses), bail if not enabled + if (m_control_regs[S1_AUTOBUF_REG] & 0x0002) // bit 1 { - /* get the autobuffer registers */ - int mreg, lreg; - uint16_t source; - + // get the autobuffer registers m_ireg = (m_control_regs[S1_AUTOBUF_REG] >> 9) & 7; - mreg = (m_control_regs[S1_AUTOBUF_REG] >> 7) & 3; - mreg |= m_ireg & 0x04; /* msb comes from ireg */ - lreg = m_ireg; + int mreg = (m_control_regs[S1_AUTOBUF_REG] >> 7) & 3; + mreg |= m_ireg & 0x04; // msb comes from ireg + int lreg = m_ireg; - /* now get the register contents in a more legible format */ - /* we depend on register indexes to be continuous (which is the case in our core) */ - source = m_cpu->state_int(ADSP2100_I0 + m_ireg); + // now get the register contents in a more legible format + // we depend on register indexes to be continuous (which is the case in our core) + uint16_t source = m_cpu->state_int(ADSP2100_I0 + m_ireg); m_incs = m_cpu->state_int(ADSP2100_M0 + mreg); m_size = m_cpu->state_int(ADSP2100_L0 + lreg); - /* get the base value, since we need to keep it around for wrapping */ + // get the base value, since we need to keep it around for wrapping //source -= m_incs; // Just clear lower 4 bits of source since some DCS versions haven't incremented yet source &= ~0xf; - /* make it go back one so we dont lose the first sample */ + // make it go back one so we dont lose the first sample m_cpu->set_state_int(ADSP2100_I0 + m_ireg, source); - /* save it as it is now */ + // save it as it is now m_ireg_base = source; LOGMASKED(LOG_DCS_IO, "sound_tx_callback: m_ireg_base: %x m_size: %x m_incs: %x \n", m_ireg_base, m_size, m_incs); - /* recompute the sample rate and timer */ + // recompute the sample rate and timer recompute_sample_rate(); return; } @@ -2107,10 +2088,10 @@ void dcs_audio_device::sound_tx_callback(offs_t offset, uint32_t data) LOG("ADSP SPORT1: trying to transmit and autobuffer not enabled!\n"); } - /* if we get there, something went wrong. Disable playing */ + // if we get there, something went wrong. Disable playing dmadac_enable(&m_dmadac[0], m_channels, 0); - /* remove timer */ + // remove timer m_reg_timer->reset(); } @@ -2122,8 +2103,11 @@ void dcs_audio_device::sound_tx_callback(offs_t offset, uint32_t data) uint16_t dcs_audio_device::dcs_polling_r(address_space &space) { - if (m_polling_count++ > 5) - space.device().execute().eat_cycles(2000); + if (!machine().side_effects_disabled()) + { + if (m_polling_count++ > 5) + space.device().execute().eat_cycles(2000); + } return m_polling_value; } @@ -2136,7 +2120,8 @@ void dcs_audio_device::dcs_polling_w(offs_t offset, uint16_t data, uint16_t mem_ uint32_t dcs_audio_device::dcs_polling32_r(address_space &space) { - space.device().execute().eat_cycles(1000); + if (!machine().side_effects_disabled()) + space.device().execute().eat_cycles(1000); return m_polling32_value; } @@ -2156,14 +2141,14 @@ void dcs_audio_device::fifo_notify(int count, int max) { hle_transfer_state &transfer = m_transfer; - /* skip if not in mid-transfer */ + // skip if not in mid-transfer if (!transfer.hle_enabled || transfer.state == 0 || m_fifo_data_r.isnull()) { transfer.fifo_entries = 0; return; } - /* preprocess a word */ + // preprocess a word transfer.fifo_entries = count; if (transfer.state != 5 || transfer.fifo_entries == transfer.writes_left || transfer.fifo_entries >= 256) { @@ -2176,7 +2161,7 @@ void dcs_audio_device::fifo_notify(int count, int max) TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::transfer_watchdog_callback ) { hle_transfer_state &transfer = m_transfer; - int starting_writes_left = param; + int const starting_writes_left = param; if (transfer.fifo_entries && starting_writes_left == transfer.writes_left) { @@ -2190,7 +2175,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::transfer_watchdog_callback ) TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback2 ) { - /* if the output is full, stall for a usec */ + // if the output is full, stall for a usec if (IS_OUTPUT_FULL()) { m_s1_ack2_timer->adjust(attotime::from_usec(1), param); @@ -2202,7 +2187,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback2 ) TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback1 ) { - /* if the output is full, stall for a usec */ + // if the output is full, stall for a usec if (IS_OUTPUT_FULL()) { m_s1_ack_timer->adjust(attotime::from_usec(1), param); @@ -2210,7 +2195,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback1 ) } output_latch_w(param); - /* chain to the next word we need to write back */ + // chain to the next word we need to write back m_s1_ack2_timer->adjust(attotime::from_usec(1)); } @@ -2222,31 +2207,29 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) switch (transfer.state) { case 0: - /* look for command 0x001a to transfer chunks of data */ if (data == 0x001a) { + // look for command 0x001a to transfer chunks of data LOGMASKED(LOG_DCS_TRANSFERS, "%s:DCS Transfer command %04X\n", machine().describe_context(), data); transfer.state++; if (transfer.hle_enabled) return 1; } - - /* look for command 0x002a to start booting the uploaded program */ else if (data == 0x002a) { + // look for command 0x002a to start booting the uploaded program LOGMASKED(LOG_DCS_TRANSFERS, "%s:DCS State change %04X\n", machine().describe_context(), data); transfer.dcs_state = 1; } - - /* anything else is ignored */ else { + // anything else is ignored LOGMASKED(LOG_DCS_TRANSFERS, "Command: %04X\n", data); } break; case 1: - /* first word is the start address */ + // first word is the start address transfer.start = data; transfer.state++; LOGMASKED(LOG_DCS_TRANSFERS, "Start address = %04X\n", transfer.start); @@ -2255,7 +2238,7 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) break; case 2: - /* second word is the stop address */ + // second word is the stop address transfer.stop = data; transfer.state++; LOGMASKED(LOG_DCS_TRANSFERS, "Stop address = %04X\n", transfer.stop); @@ -2264,23 +2247,23 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) break; case 3: - /* third word is the transfer type */ - /* transfer type 0 = program memory */ - /* transfer type 1 = SRAM bank 0 */ - /* transfer type 2 = SRAM bank 1 */ + // third word is the transfer type + // transfer type 0 = program memory + // transfer type 1 = SRAM bank 0 + // transfer type 2 = SRAM bank 1 transfer.type = data; transfer.state++; LOGMASKED(LOG_DCS_TRANSFERS, "Transfer type = %04X\n", transfer.type); - /* at this point, we can compute how many words to expect for the transfer */ + // at this point, we can compute how many words to expect for the transfer transfer.writes_left = transfer.stop - transfer.start + 1; if (transfer.type == 0) transfer.writes_left *= 2; - /* reset the checksum */ + // reset the checksum transfer.sum = 0; - /* handle the HLE case */ + // handle the HLE case if (transfer.hle_enabled) { if (transfer.type == 1 && SDRC_SM_BK == 1) @@ -2298,20 +2281,20 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) break; case 4: - /* accumulate the sum over all data */ + // accumulate the sum over all data transfer.sum += data; - /* if we're out, stop the transfer */ + // if we're out, stop the transfer if (--transfer.writes_left == 0) { LOGMASKED(LOG_DCS_TRANSFERS, "Transfer done, sum = %04X\n", transfer.sum); transfer.state = 0; } - /* handle the HLE case */ + // handle the HLE case if (transfer.hle_enabled) { - /* write the new data to memory */ + // write the new data to memory if (transfer.type == 0) { if (transfer.writes_left & 1) @@ -2322,7 +2305,7 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) else m_data->write_word(transfer.start++, data); - /* if we're done, start a timer to send the response words */ + // if we're done, start a timer to send the response words if (transfer.state == 0) m_s1_ack_timer->adjust(attotime::from_usec(1), transfer.sum); return 1; @@ -2335,7 +2318,7 @@ int dcs_audio_device::preprocess_stage_1(uint16_t data) TIMER_CALLBACK_MEMBER( dcs_audio_device::s2_ack_callback ) { - /* if the output is full, stall for a usec */ + // if the output is full, stall for a usec if (IS_OUTPUT_FULL()) { m_s2_ack_timer->adjust(attotime::from_usec(1), param); @@ -2353,24 +2336,23 @@ int dcs_audio_device::preprocess_stage_2(uint16_t data) switch (transfer.state) { case 0: - /* look for command 0x55d0 or 0x55d1 to transfer chunks of data */ if (data == 0x55d0 || data == 0x55d1) { + // look for command 0x55d0 or 0x55d1 to transfer chunks of data LOGMASKED(LOG_DCS_TRANSFERS, "%s:DCS Transfer command %04X\n", machine().describe_context(), data); transfer.state++; if (transfer.hle_enabled) return 1; } - - /* anything else is ignored */ else { + // anything else is ignored LOGMASKED(LOG_DCS_TRANSFERS, "%s:Command: %04X\n", machine().describe_context(), data); } break; case 1: - /* first word is the upper bits of the start address */ + // first word is the upper bits of the start address transfer.start = data << 16; transfer.state++; if (transfer.hle_enabled) @@ -2378,7 +2360,7 @@ int dcs_audio_device::preprocess_stage_2(uint16_t data) break; case 2: - /* second word is the lower bits of the start address */ + // second word is the lower bits of the start address transfer.start |= data; transfer.state++; LOGMASKED(LOG_DCS_TRANSFERS, "Start address = %08X\n", transfer.start); @@ -2387,7 +2369,7 @@ int dcs_audio_device::preprocess_stage_2(uint16_t data) break; case 3: - /* third word is the upper bits of the stop address */ + // third word is the upper bits of the stop address transfer.stop = data << 16; transfer.state++; if (transfer.hle_enabled) @@ -2395,15 +2377,15 @@ int dcs_audio_device::preprocess_stage_2(uint16_t data) break; case 4: - /* fourth word is the lower bits of the stop address */ + // fourth word is the lower bits of the stop address transfer.stop |= data; transfer.state++; LOGMASKED(LOG_DCS_TRANSFERS, "Stop address = %08X\n", transfer.stop); - /* at this point, we can compute how many words to expect for the transfer */ + // at this point, we can compute how many words to expect for the transfer transfer.writes_left = transfer.stop - transfer.start + 1; - /* reset the checksum */ + // reset the checksum transfer.sum = 0; if (transfer.hle_enabled) { @@ -2413,23 +2395,23 @@ int dcs_audio_device::preprocess_stage_2(uint16_t data) break; case 5: - /* accumulate the sum over all data */ + // accumulate the sum over all data transfer.sum += data; - /* if we're out, stop the transfer */ + // if we're out, stop the transfer if (--transfer.writes_left == 0) { LOGMASKED(LOG_DCS_TRANSFERS, "Transfer done, sum = %04X\n", transfer.sum); transfer.state = 0; } - /* handle the HLE case */ + // handle the HLE case if (transfer.hle_enabled) { - /* write the new data to memory */ + // write the new data to memory m_sounddata[transfer.start++] = data; - /* if we're done, start a timer to send the response words */ + // if we're done, start a timer to send the response words if (transfer.state == 0) { m_s2_ack_timer->adjust(attotime::from_usec(1), transfer.sum); @@ -2448,17 +2430,17 @@ int dcs_audio_device::preprocess_write(uint16_t data) hle_transfer_state &transfer = m_transfer; int result; - /* if we're not DCS2, skip */ + // if we're not DCS2, skip if (!m_sport0_timer) return 0; - /* state 0 - initialization phase */ + // state 0 - initialization phase if (transfer.dcs_state == 0) result = preprocess_stage_1(data); else result = preprocess_stage_2(data); - /* if we did the write, toggle the full/not full state so interrupts are generated */ + // if we did the write, toggle the full/not full state so interrupts are generated if (result && !m_input_empty_cb.isnull()) { if (m_last_input_empty) @@ -2469,22 +2451,20 @@ int dcs_audio_device::preprocess_write(uint16_t data) return result; } -/* Basic DCS system with ADSP-2105 and 2k of SRAM (T-unit, V-unit, Killer Instinct) */ +// Basic DCS system with ADSP-2105 and 2k of SRAM (T-unit, V-unit, Killer Instinct) void dcs_audio_device::add_mconfig_dcs(machine_config &config) { adsp2105_device &dcs(ADSP2105(config, "dcs", XTAL(10'000'000))); - dcs.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */ - dcs.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */ + dcs.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); // callback for serial transmit + dcs.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); // callback for timer fired dcs.set_addrmap(AS_PROGRAM, &dcs_audio_device::dcs_2k_program_map); dcs.set_addrmap(AS_DATA, &dcs_audio_device::dcs_2k_data_map); TIMER(config, m_reg_timer).configure_generic(FUNC(dcs_audio_device::dcs_irq)); TIMER(config, m_internal_timer).configure_generic(FUNC(dcs_audio_device::internal_timer_callback)); - SPEAKER(config, "mono").front_center(); - - DMADAC(config, "dac").add_route(ALL_OUTPUTS, "mono", 1.0); // AD-1851 16bit mono + DMADAC(config, "dac").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); // AD-1851 16bit mono } DEFINE_DEVICE_TYPE(DCS_AUDIO_2K, dcs_audio_2k_device, "dcs_audio_2k", "DCS Audio 2K") @@ -2494,7 +2474,7 @@ DEFINE_DEVICE_TYPE(DCS_AUDIO_2K, dcs_audio_2k_device, "dcs_audio_2k", "DCS Audio //------------------------------------------------- dcs_audio_2k_device::dcs_audio_2k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs_audio_device(mconfig, DCS_AUDIO_2K, tag, owner, clock, REV_DCS1) + dcs_audio_device(mconfig, DCS_AUDIO_2K, tag, owner, clock, REV_DCS1, 1) { } @@ -2510,11 +2490,11 @@ DEFINE_DEVICE_TYPE(DCS_AUDIO_2K_UART, dcs_audio_2k_uart_device, "dcs_audio_2k_ua //------------------------------------------------- dcs_audio_2k_uart_device::dcs_audio_2k_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs_audio_device(mconfig, DCS_AUDIO_2K_UART, tag, owner, clock, REV_DCS1) + dcs_audio_device(mconfig, DCS_AUDIO_2K_UART, tag, owner, clock, REV_DCS1, 1) { } -/* Basic DCS system with ADSP-2105 and 2k of SRAM, using a UART for communications (X-unit) */ +// Basic DCS system with ADSP-2105 and 2k of SRAM, using a UART for communications (X-unit) void dcs_audio_2k_uart_device::device_add_mconfig(machine_config &config) { dcs_audio_device::add_mconfig_dcs(config); @@ -2528,11 +2508,11 @@ DEFINE_DEVICE_TYPE(DCS_AUDIO_8K, dcs_audio_8k_device, "dcs_audio_8k", "DCS Audio //------------------------------------------------- dcs_audio_8k_device::dcs_audio_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs_audio_device(mconfig, DCS_AUDIO_8K, tag, owner, clock, REV_DCS1) + dcs_audio_device(mconfig, DCS_AUDIO_8K, tag, owner, clock, REV_DCS1, 1) { } -/* Basic DCS system with ADSP-2105 and 8k of SRAM (Wolf-unit) */ +// Basic DCS system with ADSP-2105 and 8k of SRAM (Wolf-unit) void dcs_audio_8k_device::device_add_mconfig(machine_config &config) { dcs_audio_device::add_mconfig_dcs(config); @@ -2547,7 +2527,7 @@ DEFINE_DEVICE_TYPE(DCS_AUDIO_WPC, dcs_audio_wpc_device, "dcs_audio_wpc", "DCS Au //------------------------------------------------- dcs_audio_wpc_device::dcs_audio_wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs_audio_device(mconfig, DCS_AUDIO_WPC, tag, owner, clock, REV_DCS1P5) + dcs_audio_device(mconfig, DCS_AUDIO_WPC, tag, owner, clock, REV_DCS1P5, 1) { } @@ -2563,29 +2543,26 @@ void dcs_audio_wpc_device::device_add_mconfig(machine_config &config) // dcs2_audio_device - constructor //------------------------------------------------- -dcs2_audio_device::dcs2_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - dcs_audio_device(mconfig, type, tag, owner, clock, REV_DCS1) +dcs2_audio_device::dcs2_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int outputs) : + dcs_audio_device(mconfig, type, tag, owner, clock, REV_DCS1, outputs) { } void dcs2_audio_device::add_mconfig_dcs2(machine_config &config) { adsp2115_device &dcs2(ADSP2115(config, "dcs2", XTAL(16'000'000))); - dcs2.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */ - dcs2.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */ + dcs2.sport_tx().set(FUNC(dcs2_audio_device::sound_tx_callback)); // callback for serial transmit + dcs2.timer_fired().set(FUNC(dcs2_audio_device::timer_enable_callback)); // callback for timer fired dcs2.set_addrmap(AS_PROGRAM, &dcs2_audio_device::dcs2_2115_program_map); dcs2.set_addrmap(AS_DATA, &dcs2_audio_device::dcs2_2115_data_map); - TIMER(config, "dcs_reg_timer").configure_generic(FUNC(dcs_audio_device::dcs_irq)); - TIMER(config, "dcs_sport0_timer").configure_generic(FUNC(dcs_audio_device::sport0_irq)); - TIMER(config, "dcs_int_timer").configure_generic(FUNC(dcs_audio_device::internal_timer_callback)); - TIMER(config, "dcs_hle_timer").configure_generic(FUNC(dcs_audio_device::transfer_watchdog_callback)); + TIMER(config, m_reg_timer).configure_generic(FUNC(dcs2_audio_device::dcs_irq)); + TIMER(config, m_sport0_timer).configure_generic(FUNC(dcs2_audio_device::sport0_irq)); + TIMER(config, m_internal_timer).configure_generic(FUNC(dcs2_audio_device::internal_timer_callback)); + TIMER(config, "dcs_hle_timer").configure_generic(FUNC(dcs2_audio_device::transfer_watchdog_callback)); - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "rspeaker", 1.0); - DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "lspeaker", 1.0); + DMADAC(config, "dac1").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); + DMADAC(config, "dac2").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 1); } DEFINE_DEVICE_TYPE(DCS2_AUDIO_2115, dcs2_audio_2115_device, "dcs2_audio_2115", "DCS2 Audio 2115") @@ -2595,7 +2572,7 @@ DEFINE_DEVICE_TYPE(DCS2_AUDIO_2115, dcs2_audio_2115_device, "dcs2_audio_2115", " //------------------------------------------------- dcs2_audio_2115_device::dcs2_audio_2115_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_device(mconfig, DCS2_AUDIO_2115, tag, owner, clock) + dcs2_audio_device(mconfig, DCS2_AUDIO_2115, tag, owner, clock, 2) { } @@ -2612,7 +2589,7 @@ DEFINE_DEVICE_TYPE(DCS2_AUDIO_2104, dcs2_audio_2104_device, "dcs2_audio_2104", " dcs2_audio_2104_device::dcs2_audio_2104_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_device(mconfig, DCS2_AUDIO_2104, tag, owner, clock) + dcs2_audio_device(mconfig, DCS2_AUDIO_2104, tag, owner, clock, 2) { } @@ -2621,8 +2598,8 @@ void dcs2_audio_2104_device::device_add_mconfig(machine_config &config) dcs2_audio_device::add_mconfig_dcs2(config); adsp2104_device &dcs2(ADSP2104(config.replace(), "dcs2", XTAL(16'000'000))); - dcs2.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */ - dcs2.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */ + dcs2.sport_tx().set(FUNC(dcs2_audio_2104_device::sound_tx_callback)); // callback for serial transmit + dcs2.timer_fired().set(FUNC(dcs2_audio_2104_device::timer_enable_callback)); // callback for timer fired dcs2.set_addrmap(AS_PROGRAM, &dcs2_audio_2104_device::dcs2_2104_program_map); dcs2.set_addrmap(AS_DATA, &dcs2_audio_2104_device::dcs2_2104_data_map); } @@ -2634,61 +2611,58 @@ DEFINE_DEVICE_TYPE(DCS2_AUDIO_DSIO, dcs2_audio_dsio_device, "dcs2_audio_dsio", " //------------------------------------------------- dcs2_audio_dsio_device::dcs2_audio_dsio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_device(mconfig, DCS2_AUDIO_DSIO, tag, owner, clock) + dcs2_audio_device(mconfig, DCS2_AUDIO_DSIO, tag, owner, clock, 2) { } void dcs2_audio_dsio_device::device_add_mconfig(machine_config &config) { adsp2181_device &dsio(ADSP2181(config, "dsio", XTAL(32'000'000))); - dsio.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */ - dsio.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */ - dsio.dmovlay().set(FUNC(dcs_audio_device::dmovlay_callback)); /* callback for adsp 2181 dmovlay instruction */ + dsio.sport_tx().set(FUNC(dcs2_audio_dsio_device::sound_tx_callback)); // callback for serial transmit + dsio.timer_fired().set(FUNC(dcs2_audio_dsio_device::timer_enable_callback)); // callback for timer fired + dsio.dmovlay().set(FUNC(dcs2_audio_dsio_device::dmovlay_callback)); // callback for adsp 2181 dmovlay instruction dsio.set_addrmap(AS_PROGRAM, &dcs2_audio_dsio_device::dsio_program_map); dsio.set_addrmap(AS_DATA, &dcs2_audio_dsio_device::dsio_data_map); dsio.set_addrmap(AS_IO, &dcs2_audio_dsio_device::dsio_io_map); - ADDRESS_MAP_BANK(config, "data_map_bank").set_map(&dcs2_audio_dsio_device::dsio_rambank_map).set_options(ENDIANNESS_LITTLE, 16, 14, 0x2000); + ADDRESS_MAP_BANK(config, m_ram_map).set_map(&dcs2_audio_dsio_device::dsio_rambank_map).set_options(ENDIANNESS_LITTLE, 16, 14, 0x2000); - TIMER(config, m_reg_timer).configure_generic(FUNC(dcs_audio_device::dcs_irq)); - TIMER(config, m_internal_timer).configure_generic(FUNC(dcs_audio_device::internal_timer_callback)); - TIMER(config, m_sport0_timer).configure_generic(FUNC(dcs_audio_device::sport0_irq)); // roadburn needs this to pass hardware test + TIMER(config, m_reg_timer).configure_generic(FUNC(dcs2_audio_dsio_device::dcs_irq)); + TIMER(config, m_internal_timer).configure_generic(FUNC(dcs2_audio_dsio_device::internal_timer_callback)); + TIMER(config, m_sport0_timer).configure_generic(FUNC(dcs2_audio_dsio_device::sport0_irq)); // roadburn needs this to pass hardware test - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "rspeaker", 1.0); - DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "lspeaker", 1.0); + DMADAC(config, "dac1").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); + DMADAC(config, "dac2").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 1); } //------------------------------------------------- // dcs2_audio_denver_device - constructor //------------------------------------------------- -dcs2_audio_denver_device::dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_device(mconfig, type, tag, owner, clock) +dcs2_audio_denver_device::dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int outputs) : + dcs2_audio_device(mconfig, type, tag, owner, clock, outputs) { } void dcs2_audio_denver_device::device_add_mconfig(machine_config &config) { adsp2181_device &denver(ADSP2181(config, "denver", XTAL(33'333'000))); - denver.sport_tx().set(FUNC(dcs_audio_device::sound_tx_callback)); /* callback for serial transmit */ - denver.timer_fired().set(FUNC(dcs_audio_device::timer_enable_callback)); /* callback for timer fired */ - denver.dmovlay().set(FUNC(dcs_audio_device::dmovlay_callback)); /* callback for adsp 2181 dmovlay instruction */ + denver.sport_tx().set(FUNC(dcs2_audio_denver_device::sound_tx_callback)); // callback for serial transmit + denver.timer_fired().set(FUNC(dcs2_audio_denver_device::timer_enable_callback)); // callback for timer fired + denver.dmovlay().set(FUNC(dcs2_audio_denver_device::dmovlay_callback)); // callback for adsp 2181 dmovlay instruction denver.set_addrmap(AS_PROGRAM, &dcs2_audio_denver_device::denver_program_map); denver.set_addrmap(AS_DATA, &dcs2_audio_denver_device::denver_data_map); denver.set_addrmap(AS_IO, &dcs2_audio_denver_device::denver_io_map); ADDRESS_MAP_BANK(config, m_ram_map).set_map(&dcs2_audio_denver_device::denver_rambank_map).set_options(ENDIANNESS_LITTLE, 16, 15, 0x2000*2); - TIMER(config, m_reg_timer).configure_generic(FUNC(dcs_audio_device::dcs_irq)); - TIMER(config, m_internal_timer).configure_generic(FUNC(dcs_audio_device::internal_timer_callback)); - TIMER(config, m_sport0_timer).configure_generic(FUNC(dcs_audio_device::sport0_irq)); // Atlantis driver waits for sport0 rx interrupts + TIMER(config, m_reg_timer).configure_generic(FUNC(dcs2_audio_denver_device::dcs_irq)); + TIMER(config, m_internal_timer).configure_generic(FUNC(dcs2_audio_denver_device::internal_timer_callback)); + TIMER(config, m_sport0_timer).configure_generic(FUNC(dcs2_audio_denver_device::sport0_irq)); // Atlantis driver waits for sport0 rx interrupts } dcs2_audio_denver_5ch_device::dcs2_audio_denver_5ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_5CH, tag, owner, clock) + dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_5CH, tag, owner, clock, 5) { } @@ -2696,25 +2670,18 @@ void dcs2_audio_denver_5ch_device::device_add_mconfig(machine_config &config) { dcs2_audio_denver_device::device_add_mconfig(config); - SPEAKER(config, "flspeaker").front_left(); - SPEAKER(config, "frspeaker").front_right(); - SPEAKER(config, "rlspeaker").headrest_left(); - SPEAKER(config, "rrspeaker").headrest_right(); - SPEAKER(config, "subwoofer").backrest(); - - DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "flspeaker", 1.0); - DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "frspeaker", 1.0); - DMADAC(config, "dac3").add_route(ALL_OUTPUTS, "rlspeaker", 1.0); - DMADAC(config, "dac4").add_route(ALL_OUTPUTS, "rrspeaker", 1.0); - DMADAC(config, "dac5").add_route(ALL_OUTPUTS, "subwoofer", 1.0); - DMADAC(config, "dac6"); - // Does not produce sound + DMADAC(config, "dac1").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); + DMADAC(config, "dac2").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 1); + DMADAC(config, "dac3").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 2); + DMADAC(config, "dac4").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 3); + DMADAC(config, "dac5").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 4); + DMADAC(config, "dac6"); // Does not produce sound } DEFINE_DEVICE_TYPE(DCS2_AUDIO_DENVER_5CH, dcs2_audio_denver_5ch_device, "dcs2_audio_denver_5ch", "DCS2 Audio Denver 5 Channel") dcs2_audio_denver_2ch_device::dcs2_audio_denver_2ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_2CH, tag, owner, clock) + dcs2_audio_denver_device(mconfig, DCS2_AUDIO_DENVER_2CH, tag, owner, clock, 2) { } @@ -2722,11 +2689,8 @@ void dcs2_audio_denver_2ch_device::device_add_mconfig(machine_config &config) { dcs2_audio_denver_device::device_add_mconfig(config); - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - DMADAC(config, "dac1").add_route(ALL_OUTPUTS, "rspeaker", 1.0); - DMADAC(config, "dac2").add_route(ALL_OUTPUTS, "lspeaker", 1.0); + DMADAC(config, "dac1").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0); + DMADAC(config, "dac2").add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 1); } DEFINE_DEVICE_TYPE(DCS2_AUDIO_DENVER_2CH, dcs2_audio_denver_2ch_device, "dcs2_audio_denver_2ch", "DCS2 Audio Denver 2 Channel") diff --git a/src/mame/shared/dcs.h b/src/mame/shared/dcs.h index 789fd09b3fc..b0e628ce543 100644 --- a/src/mame/shared/dcs.h +++ b/src/mame/shared/dcs.h @@ -12,14 +12,17 @@ #pragma once #include "cpu/adsp2100/adsp2100.h" -#include "sound/dmadac.h" #include "machine/bankdev.h" #include "machine/timer.h" +#include "sound/dmadac.h" -class dcs_audio_device : public device_t +class dcs_audio_device : public device_t, public device_mixer_interface { public: + enum { REV_DCS1, REV_DCS1P5, REV_DCS2, REV_DSIO, REV_DENV }; + + template void set_maincpu_tag(T &&tag) { m_maincpu.set_tag(std::forward(tag)); } // for dcs2 (int dram_in_mb, offs_t polling_offset) void set_dram_in_mb(int dram_in_mb) { m_dram_in_mb = dram_in_mb; } void set_polling_offset(offs_t polling_offset) { m_polling_offset = polling_offset; } @@ -47,6 +50,132 @@ public: void denver_postload(); void install_speedup(); + uint8_t get_rev() { return m_rev; } // TODO(RH): This can be done better, and shouldn't be necessary. + cpu_device *get_cpu() { return m_cpu; } // TODO(RH): Same. + +protected: + // construction/destruction + dcs_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rev, int outputs); + + // device_t implementation + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + void add_mconfig_dcs(machine_config &config) ATTR_COLD; + + struct sdrc_state + { + uint16_t reg[4]; + uint8_t seed; + }; + + + struct dsio_state + { + uint16_t reg[4]; + uint8_t start_on_next_write; + uint16_t channelbits; + }; + + + struct hle_transfer_state + { + uint8_t hle_enabled; + int32_t dcs_state; + int32_t state; + int32_t start; + int32_t stop; + int32_t type; + int32_t temp; + int32_t writes_left; + uint16_t sum; + int32_t fifo_entries; + timer_device *watchdog; + }; + + optional_device m_maincpu; + + required_device m_reg_timer; + optional_device m_sport0_timer; + required_device m_internal_timer; + + optional_device m_ram_map; + + optional_region_ptr m_bootrom; + optional_shared_ptr m_internal_program_ram; + optional_shared_ptr m_external_program_ram; + optional_shared_ptr m_internal_data_ram; + optional_shared_ptr m_iram; + + optional_memory_bank m_data_bank; + memory_bank_creator m_rom_page; + memory_bank_creator m_dram_page; + + adsp21xx_device *m_cpu; + address_space *m_program; + address_space *m_data; + uint8_t m_rev; + offs_t m_polling_offset; + uint32_t m_polling_count; + // sound output + uint8_t m_channels; + uint16_t m_size; + uint16_t m_incs; + dmadac_sound_device *m_dmadac[6]; + int32_t m_ireg; + uint16_t m_ireg_base; + uint16_t m_control_regs[32]; + + // memory access + uint16_t * m_sounddata; + std::unique_ptr m_sounddata_ptr; + uint32_t m_sounddata_words; + uint32_t m_sounddata_banks; + uint16_t m_sounddata_bank; + + // I/O with the host + uint8_t m_auto_ack; + uint16_t m_latch_control; + uint16_t m_input_data; + uint16_t m_output_data; + uint16_t m_pre_output_data; + uint16_t m_output_control; + uint64_t m_output_control_cycles; + uint8_t m_last_output_full; + uint8_t m_last_input_empty; + uint16_t m_progflags; + emu_timer * m_s1_ack_timer; + emu_timer * m_s1_ack2_timer; + emu_timer * m_s2_ack_timer; + + write_line_delegate m_output_full_cb; + write_line_delegate m_input_empty_cb; + + read16smo_delegate m_fifo_data_r; + read16mo_delegate m_fifo_status_r; + write_line_delegate m_fifo_reset_w; + + /* timers */ + uint8_t m_timer_enable; + bool m_timer_ignore; + uint64_t m_timer_start_cycles; + uint32_t m_timer_start_count; + uint32_t m_timer_scale; + uint32_t m_timer_period; + uint32_t m_timers_fired; + + std::unique_ptr m_sram; + uint16_t m_polling_value; + uint32_t m_polling32_value; + + int32_t m_dmovlay_val; + + sdrc_state m_sdrc; + dsio_state m_dsio; + hle_transfer_state m_transfer; + + int m_dram_in_mb; + // non public void dcs_boot(); TIMER_CALLBACK_MEMBER( dcs_reset ); @@ -104,152 +233,24 @@ public: int preprocess_stage_2(uint16_t data); int preprocess_write(uint16_t data); - void dcs2_2104_data_map(address_map &map); - void dcs2_2104_program_map(address_map &map); - void dcs2_2115_data_map(address_map &map); - void dcs2_2115_program_map(address_map &map); - void dcs_2k_data_map(address_map &map); - void dcs_2k_program_map(address_map &map); - void dcs_2k_uart_data_map(address_map &map); - void dcs_8k_data_map(address_map &map); - void dcs_8k_program_map(address_map &map); - void dcs_wpc_program_map(address_map &map); - void denver_data_map(address_map &map); - void denver_io_map(address_map &map); - void denver_program_map(address_map &map); - void denver_rambank_map(address_map &map); - void dsio_data_map(address_map &map); - void dsio_io_map(address_map &map); - void dsio_program_map(address_map &map); - void dsio_rambank_map(address_map &map); - - uint8_t get_rev() { return m_rev; } // TODO(RH): This can be done better, and shouldn't be necessary. - cpu_device *get_cpu() { return m_cpu; } // TODO(RH): Same. - - enum { REV_DCS1, REV_DCS1P5, REV_DCS2, REV_DSIO, REV_DENV }; - -protected: - // construction/destruction - dcs_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rev); - - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - void add_mconfig_dcs(machine_config &config); - - static constexpr const char *const denver_regname[4] = - { "SDRC_ROM", "SDRC_IO", "RAM_PAGE", "VER/FIFO_RESET" }; - - struct sdrc_state - { - uint16_t reg[4]; - uint8_t seed; - }; - - - struct dsio_state - { - uint16_t reg[4]; - uint8_t start_on_next_write; - uint16_t channelbits; - }; - - - struct hle_transfer_state - { - uint8_t hle_enabled; - int32_t dcs_state; - int32_t state; - int32_t start; - int32_t stop; - int32_t type; - int32_t temp; - int32_t writes_left; - uint16_t sum; - int32_t fifo_entries; - timer_device *watchdog; - }; - - adsp21xx_device *m_cpu; - address_space *m_program; - address_space *m_data; - uint8_t m_rev; - offs_t m_polling_offset; - uint32_t m_polling_count; - /* sound output */ - uint8_t m_channels; - uint16_t m_size; - uint16_t m_incs; - dmadac_sound_device *m_dmadac[6]; - required_device m_reg_timer; - optional_device m_sport0_timer; - required_device m_internal_timer; - int32_t m_ireg; - uint16_t m_ireg_base; - uint16_t m_control_regs[32]; - - /* memory access/booting */ - uint16_t * m_bootrom; - uint32_t m_bootrom_words; - uint16_t * m_sounddata; - std::unique_ptr m_sounddata_ptr; - uint32_t m_sounddata_words; - uint32_t m_sounddata_banks; - uint16_t m_sounddata_bank; - - optional_device m_ram_map; - optional_memory_bank m_data_bank; - memory_bank_creator m_rom_page; - memory_bank_creator m_dram_page; - - /* I/O with the host */ - uint8_t m_auto_ack; - uint16_t m_latch_control; - uint16_t m_input_data; - uint16_t m_output_data; - uint16_t m_pre_output_data; - uint16_t m_output_control; - uint64_t m_output_control_cycles; - uint8_t m_last_output_full; - uint8_t m_last_input_empty; - uint16_t m_progflags; - emu_timer * m_s1_ack_timer; - emu_timer * m_s1_ack2_timer; - emu_timer * m_s2_ack_timer; - - write_line_delegate m_output_full_cb; - write_line_delegate m_input_empty_cb; - - read16smo_delegate m_fifo_data_r; - read16mo_delegate m_fifo_status_r; - write_line_delegate m_fifo_reset_w; - - /* timers */ - uint8_t m_timer_enable; - bool m_timer_ignore; - uint64_t m_timer_start_cycles; - uint32_t m_timer_start_count; - uint32_t m_timer_scale; - uint32_t m_timer_period; - uint32_t m_timers_fired; - - std::unique_ptr m_sram; - uint16_t m_polling_value; - uint32_t m_polling32_value; - uint32_t *m_internal_program_ram; - uint32_t *m_external_program_ram; - uint32_t *m_internal_data_ram; - - int m_dmovlay_val; - - sdrc_state m_sdrc; - dsio_state m_dsio; - hle_transfer_state m_transfer; - - int m_dram_in_mb; - - optional_shared_ptr m_iram; - optional_device m_maincpu; + void dcs2_2104_data_map(address_map &map) ATTR_COLD; + void dcs2_2104_program_map(address_map &map) ATTR_COLD; + void dcs2_2115_data_map(address_map &map) ATTR_COLD; + void dcs2_2115_program_map(address_map &map) ATTR_COLD; + void dcs_2k_data_map(address_map &map) ATTR_COLD; + void dcs_2k_program_map(address_map &map) ATTR_COLD; + void dcs_2k_uart_data_map(address_map &map) ATTR_COLD; + void dcs_8k_data_map(address_map &map) ATTR_COLD; + void dcs_8k_program_map(address_map &map) ATTR_COLD; + void dcs_wpc_program_map(address_map &map) ATTR_COLD; + void denver_data_map(address_map &map) ATTR_COLD; + void denver_io_map(address_map &map) ATTR_COLD; + void denver_program_map(address_map &map) ATTR_COLD; + void denver_rambank_map(address_map &map) ATTR_COLD; + void dsio_data_map(address_map &map) ATTR_COLD; + void dsio_io_map(address_map &map) ATTR_COLD; + void dsio_program_map(address_map &map) ATTR_COLD; + void dsio_rambank_map(address_map &map) ATTR_COLD; }; @@ -262,13 +263,10 @@ public: dcs_audio_2k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; - + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS_AUDIO_2K, dcs_audio_2k_device) // dcs_audio_2k_uart_device @@ -279,12 +277,10 @@ public: dcs_audio_2k_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS_AUDIO_2K_UART, dcs_audio_2k_uart_device) // dcs_audio_8k_device @@ -295,12 +291,10 @@ public: dcs_audio_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS_AUDIO_8K, dcs_audio_8k_device) // dcs_audio_wpc_device @@ -310,14 +304,12 @@ public: // construction/destruction dcs_audio_wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void dcs_wpc_data_map(address_map &map); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; -}; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; -// device type definition -DECLARE_DEVICE_TYPE(DCS_AUDIO_WPC, dcs_audio_wpc_device) + void dcs_wpc_data_map(address_map &map) ATTR_COLD; +}; // dcs2_audio_device @@ -326,13 +318,15 @@ class dcs2_audio_device : public dcs_audio_device { protected: // construction/destruction - dcs2_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + dcs2_audio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int outputs); - // device-level overrides - virtual void device_start() override; - void add_mconfig_dcs2(machine_config &config); + // device_t implementation + virtual void device_start() override ATTR_COLD; + + void add_mconfig_dcs2(machine_config &config) ATTR_COLD; }; + // dcs2_audio_2115_device class dcs2_audio_2115_device : public dcs2_audio_device @@ -342,12 +336,10 @@ public: dcs2_audio_2115_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS2_AUDIO_2115, dcs2_audio_2115_device) // dcs2_audio_2104_device @@ -358,12 +350,10 @@ public: dcs2_audio_2104_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS2_AUDIO_2104, dcs2_audio_2104_device) // dcs2_audio_dsio_device @@ -374,22 +364,21 @@ public: dcs2_audio_dsio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS2_AUDIO_DSIO, dcs2_audio_dsio_device) // dcs2_audio_denver_device types + class dcs2_audio_denver_device : public dcs2_audio_device { -public: - // construction/destruction - dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // construction/destruction + dcs2_audio_denver_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int outputs); + + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; class dcs2_audio_denver_5ch_device : public dcs2_audio_denver_device @@ -397,9 +386,10 @@ class dcs2_audio_denver_5ch_device : public dcs2_audio_denver_device public: // construction/destruction dcs2_audio_denver_5ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; class dcs2_audio_denver_2ch_device : public dcs2_audio_denver_device @@ -407,14 +397,22 @@ class dcs2_audio_denver_2ch_device : public dcs2_audio_denver_device public: // construction/destruction dcs2_audio_denver_2ch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + protected: - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + // device_t implementation + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; }; -// device type definition -DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER_5CH, dcs2_audio_denver_5ch_device) +// device type declarations +DECLARE_DEVICE_TYPE(DCS_AUDIO_2K, dcs_audio_2k_device) +DECLARE_DEVICE_TYPE(DCS_AUDIO_2K_UART, dcs_audio_2k_uart_device) +DECLARE_DEVICE_TYPE(DCS_AUDIO_8K, dcs_audio_8k_device) +DECLARE_DEVICE_TYPE(DCS_AUDIO_WPC, dcs_audio_wpc_device) +DECLARE_DEVICE_TYPE(DCS2_AUDIO_2115, dcs2_audio_2115_device) +DECLARE_DEVICE_TYPE(DCS2_AUDIO_2104, dcs2_audio_2104_device) +DECLARE_DEVICE_TYPE(DCS2_AUDIO_DSIO, dcs2_audio_dsio_device) +DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER_5CH, dcs2_audio_denver_5ch_device) DECLARE_DEVICE_TYPE(DCS2_AUDIO_DENVER_2CH, dcs2_audio_denver_2ch_device) #endif // MAME_SHARED_DCS_H