maps: Finish devices/video (nw)

This commit is contained in:
Olivier Galibert 2018-04-20 17:44:39 +02:00
parent bc150a0117
commit f551279bc3
24 changed files with 153 additions and 120 deletions

View File

@ -160,9 +160,10 @@ PALETTE_INIT_MEMBER(sega315_5378_device, sega315_5378)
// default address map
ADDRESS_MAP_START(sega315_5124_device::sega315_5124)
AM_RANGE(0x0000, VRAM_SIZE-1) AM_RAM
ADDRESS_MAP_END
void sega315_5124_device::sega315_5124(address_map &map)
{
map(0x0000, VRAM_SIZE-1).ram();
}
sega315_5124_device::sega315_5124_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)

View File

@ -24,12 +24,13 @@
DEFINE_DEVICE_TYPE(BT459, bt459_device, "bt459", "Brooktree 150MHz Monolithic CMOS 256x24 Color Palette RAMDAC")
ADDRESS_MAP_START(bt459_device::map)
AM_RANGE(0x00, 0x00) AM_READWRITE(address_lo_r, address_lo_w)
AM_RANGE(0x01, 0x01) AM_READWRITE(address_hi_r, address_hi_w)
AM_RANGE(0x02, 0x02) AM_READWRITE(register_r, register_w)
AM_RANGE(0x03, 0x03) AM_READWRITE(palette_r, palette_w)
ADDRESS_MAP_END
void bt459_device::map(address_map &map)
{
map(0x00, 0x00).rw(this, FUNC(bt459_device::address_lo_r), FUNC(bt459_device::address_lo_w));
map(0x01, 0x01).rw(this, FUNC(bt459_device::address_hi_r), FUNC(bt459_device::address_hi_w));
map(0x02, 0x02).rw(this, FUNC(bt459_device::register_r), FUNC(bt459_device::register_w));
map(0x03, 0x03).rw(this, FUNC(bt459_device::palette_r), FUNC(bt459_device::palette_w));
}
bt459_device::bt459_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, BT459, tag, owner, clock),

View File

@ -222,9 +222,10 @@ const int STATUS_LIGHT_PEN_UPDATE = 0x20;
//**************************************************************************
// default address map
ADDRESS_MAP_START(crt9007_device::crt9007)
AM_RANGE(0x0000, 0x3fff) AM_RAM
ADDRESS_MAP_END
void crt9007_device::crt9007(address_map &map)
{
map(0x0000, 0x3fff).ram();
}

View File

@ -33,9 +33,10 @@ DEFINE_DEVICE_TYPE(EF9345, ef9345_device, "ef9345", "EF9345")
DEFINE_DEVICE_TYPE(TS9347, ts9347_device, "ts9347", "TS9347")
// default address map
ADDRESS_MAP_START(ef9345_device::ef9345)
AM_RANGE(0x0000, 0x3fff) AM_RAM
ADDRESS_MAP_END
void ef9345_device::ef9345(address_map &map)
{
map(0x0000, 0x3fff).ram();
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -33,9 +33,10 @@ DEFINE_DEVICE_TYPE(EF9364, ef9364_device, "ef9364", "Thomson EF9364")
//-------------------------------------------------
// default address map
//-------------------------------------------------
ADDRESS_MAP_START(ef9364_device::ef9364)
AM_RANGE(0x00000, ( ( ef9364_device::TXTPLANE_MAX_SIZE * ef9364_device::MAX_TXTPLANES ) - 1 ) ) AM_RAM
ADDRESS_MAP_END
void ef9364_device::ef9364(address_map &map)
{
map(0x00000, ef9364_device::TXTPLANE_MAX_SIZE * ef9364_device::MAX_TXTPLANES - 1).ram();
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -166,9 +166,10 @@ const tiny_rom_entry *ef9365_device::device_rom_region() const
// default address map
// Up to 512*512 per bitplane, 8 bitplanes max.
//-------------------------------------------------
ADDRESS_MAP_START(ef9365_device::ef9365)
AM_RANGE(0x00000, ( ( ef9365_device::BITPLANE_MAX_SIZE * ef9365_device::MAX_BITPLANES ) - 1 ) ) AM_RAM
ADDRESS_MAP_END
void ef9365_device::ef9365(address_map &map)
{
map(0x00000, ef9365_device::BITPLANE_MAX_SIZE * ef9365_device::MAX_BITPLANES - 1).ram();
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -5,14 +5,17 @@
DEFINE_DEVICE_TYPE(GEFORCE_7600GS, geforce_7600gs_device, "geforce_7600gs", "NVIDIA GeForce 7600GS")
ADDRESS_MAP_START(geforce_7600gs_device::map1)
ADDRESS_MAP_END
void geforce_7600gs_device::map1(address_map &map)
{
}
ADDRESS_MAP_START(geforce_7600gs_device::map2)
ADDRESS_MAP_END
void geforce_7600gs_device::map2(address_map &map)
{
}
ADDRESS_MAP_START(geforce_7600gs_device::map3)
ADDRESS_MAP_END
void geforce_7600gs_device::map3(address_map &map)
{
}
geforce_7600gs_device::geforce_7600gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_device(mconfig, GEFORCE_7600GS, tag, owner, clock)

View File

@ -72,9 +72,10 @@ DEFINE_DEVICE_TYPE(HD66421, hd66421_device, "hd66421", "Hitachi HD66421 LCD Cont
// default address map
ADDRESS_MAP_START(hd66421_device::hd66421)
AM_RANGE(0x0000, HD66421_RAM_SIZE) AM_RAM
ADDRESS_MAP_END
void hd66421_device::hd66421(address_map &map)
{
map(0x0000, HD66421_RAM_SIZE).ram();
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -22,14 +22,16 @@
// device type definition
DEFINE_DEVICE_TYPE(HUC6272, huc6272_device, "huc6272", "Hudson HuC6272 \"King\"")
ADDRESS_MAP_START(huc6272_device::microprg_map)
AM_RANGE(0x00, 0x0f) AM_RAM AM_SHARE("microprg_ram")
ADDRESS_MAP_END
void huc6272_device::microprg_map(address_map &map)
{
map(0x00, 0x0f).ram().share("microprg_ram");
}
ADDRESS_MAP_START(huc6272_device::kram_map)
AM_RANGE(0x000000, 0x0fffff) AM_RAM AM_SHARE("kram_page0")
AM_RANGE(0x100000, 0x1fffff) AM_RAM AM_SHARE("kram_page1")
ADDRESS_MAP_END
void huc6272_device::kram_map(address_map &map)
{
map(0x000000, 0x0fffff).ram().share("kram_page0");
map(0x100000, 0x1fffff).ram().share("kram_page1");
}
//**************************************************************************

View File

@ -29,17 +29,18 @@
// device type definition
DEFINE_DEVICE_TYPE(M50458, m50458_device, "m50458", "Mitsubishi M50458 OSD")
ADDRESS_MAP_START(m50458_device::m50458_vram)
AM_RANGE(0x0000, 0x023f) AM_RAM // vram
AM_RANGE(0x0240, 0x0241) AM_WRITE(vreg_120_w)
AM_RANGE(0x0242, 0x0243) AM_WRITE(vreg_121_w)
AM_RANGE(0x0244, 0x0245) AM_WRITE(vreg_122_w)
AM_RANGE(0x0246, 0x0247) AM_WRITE(vreg_123_w)
AM_RANGE(0x0248, 0x0249) AM_WRITE(vreg_124_w)
AM_RANGE(0x024a, 0x024b) AM_WRITE(vreg_125_w)
AM_RANGE(0x024c, 0x024d) AM_WRITE(vreg_126_w)
AM_RANGE(0x024e, 0x024f) AM_WRITE(vreg_127_w)
ADDRESS_MAP_END
void m50458_device::m50458_vram(address_map &map)
{
map(0x0000, 0x023f).ram(); // vram
map(0x0240, 0x0241).w(this, FUNC(m50458_device::vreg_120_w));
map(0x0242, 0x0243).w(this, FUNC(m50458_device::vreg_121_w));
map(0x0244, 0x0245).w(this, FUNC(m50458_device::vreg_122_w));
map(0x0246, 0x0247).w(this, FUNC(m50458_device::vreg_123_w));
map(0x0248, 0x0249).w(this, FUNC(m50458_device::vreg_124_w));
map(0x024a, 0x024b).w(this, FUNC(m50458_device::vreg_125_w));
map(0x024c, 0x024d).w(this, FUNC(m50458_device::vreg_126_w));
map(0x024e, 0x024f).w(this, FUNC(m50458_device::vreg_127_w));
}
// internal GFX ROM (TODO: GFXs in here should be 12x18, not 16x18)
// (also note: ROM length CAN'T be 0x1200)

View File

@ -23,12 +23,13 @@
// device type definition
DEFINE_DEVICE_TYPE(MB90082, mb90082_device, "mb90082", "Fujitsu MB90082 OSD")
ADDRESS_MAP_START(mb90082_device::mb90082_vram)
AM_RANGE(0x0000, 0x023f) AM_RAM // main screen vram
AM_RANGE(0x0400, 0x063f) AM_RAM // main screen attr
void mb90082_device::mb90082_vram(address_map &map)
{
map(0x0000, 0x023f).ram(); // main screen vram
map(0x0400, 0x063f).ram(); // main screen attr
// AM_RANGE(0x0800, 0x0a3f) AM_RAM // sub screen vram
// AM_RANGE(0x0c00, 0x0e3f) AM_RAM // sub screen attr
ADDRESS_MAP_END
}
/* charset is undumped, but apparently a normal ASCII one is enough for the time being (for example "fnt0808.x1" in Sharp X1) */
ROM_START( mb90082 )

View File

@ -36,17 +36,19 @@ TODO:
DEFINE_DEVICE_TYPE(MB_VCU, mb_vcu_device, "mb_vcu", "Mazer Blazer custom VCU")
ADDRESS_MAP_START(mb_vcu_device::mb_vcu_vram)
AM_RANGE(0x00000,0x7ffff) AM_RAM // enough for a 256x256x4 x 2 pages of framebuffer with 4 layers (TODO: doubled for simplicity)
ADDRESS_MAP_END
void mb_vcu_device::mb_vcu_vram(address_map &map)
{
map(0x00000, 0x7ffff).ram(); // enough for a 256x256x4 x 2 pages of framebuffer with 4 layers (TODO: doubled for simplicity)
}
ADDRESS_MAP_START(mb_vcu_device::mb_vcu_pal_ram)
AM_RANGE(0x0000, 0x00ff) AM_RAM
AM_RANGE(0x0200, 0x02ff) AM_RAM
AM_RANGE(0x0400, 0x04ff) AM_RAM
AM_RANGE(0x0600, 0x06ff) AM_READWRITE(mb_vcu_paletteram_r,mb_vcu_paletteram_w)
ADDRESS_MAP_END
void mb_vcu_device::mb_vcu_pal_ram(address_map &map)
{
map(0x0000, 0x00ff).ram();
map(0x0200, 0x02ff).ram();
map(0x0400, 0x04ff).ram();
map(0x0600, 0x06ff).rw(this, FUNC(mb_vcu_device::mb_vcu_paletteram_r), FUNC(mb_vcu_device::mb_vcu_paletteram_w));
}
READ8_MEMBER( mb_vcu_device::mb_vcu_paletteram_r )
{

View File

@ -1438,9 +1438,10 @@ device_memory_interface::space_config_vector mos8563_device::memory_space_config
}
// default address maps
ADDRESS_MAP_START(mos8563_device::mos8563_videoram_map)
AM_RANGE(0x0000, 0xffff) AM_RAM
ADDRESS_MAP_END
void mos8563_device::mos8563_videoram_map(address_map &map)
{
map(0x0000, 0xffff).ram();
}
r6545_1_device::r6545_1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)

View File

@ -225,13 +225,15 @@ DEFINE_DEVICE_TYPE(MOS8566, mos8566_device, "mos8566", "MOS 8566 VIC-II")
// default address maps
ADDRESS_MAP_START(mos6566_device::mos6566_videoram_map)
AM_RANGE(0x0000, 0x3fff) AM_RAM
ADDRESS_MAP_END
void mos6566_device::mos6566_videoram_map(address_map &map)
{
map(0x0000, 0x3fff).ram();
}
ADDRESS_MAP_START(mos6566_device::mos6566_colorram_map)
AM_RANGE(0x000, 0x3ff) AM_RAM
ADDRESS_MAP_END
void mos6566_device::mos6566_colorram_map(address_map &map)
{
map(0x000, 0x3ff).ram();
}
//-------------------------------------------------

View File

@ -87,11 +87,12 @@ DEFINE_DEVICE_TYPE(PPU_2C05_04, ppu2c05_04_device, "ppu2c05_04", "2C05_04 PPU")
// default address map
ADDRESS_MAP_START(ppu2c0x_device::ppu2c0x)
AM_RANGE(0x0000, 0x3eff) AM_RAM
AM_RANGE(0x3f00, 0x3fff) AM_READWRITE(palette_read, palette_write)
void ppu2c0x_device::ppu2c0x(address_map &map)
{
map(0x0000, 0x3eff).ram();
map(0x3f00, 0x3fff).rw(this, FUNC(ppu2c0x_device::palette_read), FUNC(ppu2c0x_device::palette_write));
// AM_RANGE(0x0000, 0x3fff) AM_RAM
ADDRESS_MAP_END
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -17,12 +17,13 @@
#include "video/ramdac.h"
// default address map
ADDRESS_MAP_START(ramdac_device::ramdac_palram)
AM_RANGE(0x000, 0x0ff) AM_RAM // R bank
AM_RANGE(0x100, 0x1ff) AM_RAM // G bank
AM_RANGE(0x200, 0x2ff) AM_RAM // B bank
AM_RANGE(0x300, 0x3ff) AM_NOP
ADDRESS_MAP_END
void ramdac_device::ramdac_palram(address_map &map)
{
map(0x000, 0x0ff).ram(); // R bank
map(0x100, 0x1ff).ram(); // G bank
map(0x200, 0x2ff).ram(); // B bank
map(0x300, 0x3ff).noprw();
}
//**************************************************************************
// GLOBAL VARIABLES

View File

@ -23,9 +23,10 @@ DEFINE_DEVICE_TYPE(SCN2674, scn2674_device, "scn2674", "Signetics SCN2674 AVDC")
// default address map
ADDRESS_MAP_START(scn2674_device::scn2674_vram)
AM_RANGE(0x0000, 0xffff) AM_NOP
ADDRESS_MAP_END
void scn2674_device::scn2674_vram(address_map &map)
{
map(0x0000, 0xffff).noprw();
}
scn2672_device::scn2672_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: scn2674_device(mconfig, SCN2672, tag, owner, clock)

View File

@ -66,9 +66,10 @@ DEFINE_DEVICE_TYPE(SED1330, sed1330_device, "sed1330", "Epson SED1330")
// default address map
ADDRESS_MAP_START(sed1330_device::sed1330)
AM_RANGE(0x0000, 0xffff) AM_RAM
ADDRESS_MAP_END
void sed1330_device::sed1330(address_map &map)
{
map(0x0000, 0xffff).ram();
}
// internal character generator ROM

View File

@ -57,9 +57,10 @@ DEFINE_DEVICE_TYPE(TMS3556, tms3556_device, "tms3556", "Texas Instruments TMS355
// default address map
ADDRESS_MAP_START(tms3556_device::tms3556)
AM_RANGE(0x0000, 0xffff) AM_RAM
ADDRESS_MAP_END
void tms3556_device::tms3556(address_map &map)
{
map(0x0000, 0xffff).ram();
}
//-------------------------------------------------
// memory_space_config - return a description of

View File

@ -49,10 +49,11 @@ DEFINE_DEVICE_TYPE(TMS9129, tms9129_device, "tms9129", "TMS9129 VDP")
/*
The TMS9928 has an own address space.
*/
ADDRESS_MAP_START(tms9928a_device::memmap)
ADDRESS_MAP_GLOBAL_MASK(0x3fff)
AM_RANGE(0x0000, 0x3fff) AM_RAM
ADDRESS_MAP_END
void tms9928a_device::memmap(address_map &map)
{
map.global_mask(0x3fff);
map(0x0000, 0x3fff).ram();
}
tms9928a_device::tms9928a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool is_50hz, bool is_reva, bool is_99)
: device_t(mconfig, type, tag, owner, clock)

View File

@ -149,9 +149,10 @@ DEFINE_DEVICE_TYPE(UPD7220, upd7220_device, "upd7220", "NEC uPD7220")
// default address map
ADDRESS_MAP_START(upd7220_device::upd7220_vram)
AM_RANGE(0x00000, 0x3ffff) AM_RAM
ADDRESS_MAP_END
void upd7220_device::upd7220_vram(address_map &map)
{
map(0x00000, 0x3ffff).ram();
}
// internal 128x14 control ROM

View File

@ -21,10 +21,11 @@
DEFINE_DEVICE_TYPE(UPD7227, upd7227_device, "upd7227", "NEC uPD7227")
ADDRESS_MAP_START(upd7227_device::upd7227_map)
AM_RANGE(0x00, 0x27) AM_RAM
AM_RANGE(0x40, 0x67) AM_RAM
ADDRESS_MAP_END
void upd7227_device::upd7227_map(address_map &map)
{
map(0x00, 0x27).ram();
map(0x40, 0x67).ram();
}

View File

@ -89,10 +89,11 @@ static const char *const v9938_modes[] = {
Similar to the TMS9928, the V9938 has an own address space. It can handle
at most 192 KiB RAM (128 KiB base, 64 KiB expansion).
*/
ADDRESS_MAP_START(v99x8_device::memmap)
ADDRESS_MAP_GLOBAL_MASK(0x3ffff)
AM_RANGE(0x00000, 0x2ffff) AM_RAM
ADDRESS_MAP_END
void v99x8_device::memmap(address_map &map)
{
map.global_mask(0x3ffff);
map(0x00000, 0x2ffff).ram();
}
// devices

View File

@ -38,27 +38,32 @@ MACHINE_CONFIG_END
DEFINE_DEVICE_TYPE(VOODOO_PCI, voodoo_pci_device, "voodoo_pci", "Voodoo PCI")
ADDRESS_MAP_START(voodoo_pci_device::config_map)
AM_IMPORT_FROM(pci_device::config_map)
AM_RANGE(0x40, 0x5f) AM_READWRITE (pcictrl_r, pcictrl_w)
ADDRESS_MAP_END
void voodoo_pci_device::config_map(address_map &map)
{
pci_device::config_map(map);
map(0x40, 0x5f).rw(this, FUNC(voodoo_pci_device::pcictrl_r), FUNC(voodoo_pci_device::pcictrl_w));
}
// VOODOO_1 & VOODOO_2 map
ADDRESS_MAP_START(voodoo_pci_device::voodoo_reg_map)
AM_RANGE(0x0, 0x00ffffff) AM_DEVREADWRITE("voodoo", voodoo_device, voodoo_r, voodoo_w)
ADDRESS_MAP_END
void voodoo_pci_device::voodoo_reg_map(address_map &map)
{
map(0x0, 0x00ffffff).rw("voodoo", FUNC(voodoo_device::voodoo_r), FUNC(voodoo_device::voodoo_w));
}
// VOODOO_BANSHEE and VOODOO_3 maps
ADDRESS_MAP_START(voodoo_pci_device::banshee_reg_map)
AM_RANGE(0x0, 0x01ffffff) AM_DEVREADWRITE("voodoo", voodoo_banshee_device, banshee_r, banshee_w)
ADDRESS_MAP_END
void voodoo_pci_device::banshee_reg_map(address_map &map)
{
map(0x0, 0x01ffffff).rw("voodoo", FUNC(voodoo_banshee_device::banshee_r), FUNC(voodoo_banshee_device::banshee_w));
}
ADDRESS_MAP_START(voodoo_pci_device::lfb_map)
AM_RANGE(0x0, 0x01ffffff) AM_DEVREADWRITE("voodoo", voodoo_banshee_device, banshee_fb_r, banshee_fb_w)
ADDRESS_MAP_END
void voodoo_pci_device::lfb_map(address_map &map)
{
map(0x0, 0x01ffffff).rw("voodoo", FUNC(voodoo_banshee_device::banshee_fb_r), FUNC(voodoo_banshee_device::banshee_fb_w));
}
ADDRESS_MAP_START(voodoo_pci_device::io_map)
AM_RANGE(0x000, 0x0ff) AM_DEVREADWRITE("voodoo", voodoo_banshee_device, banshee_io_r, banshee_io_w)
ADDRESS_MAP_END
void voodoo_pci_device::io_map(address_map &map)
{
map(0x000, 0x0ff).rw("voodoo", FUNC(voodoo_banshee_device::banshee_io_r), FUNC(voodoo_banshee_device::banshee_io_w));
}
voodoo_pci_device::voodoo_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_device(mconfig, VOODOO_PCI, tag, owner, clock),