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https://github.com/holub/mame
synced 2025-05-15 10:28:16 +03:00
Hooked up some North Bridge BIOS banks to X-Tom 3d [Angelo Salese]
This commit is contained in:
Angelo Salese
parent
2133835fe1
commit
f55b4b99e9
@ -2,6 +2,11 @@
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X Tom 3D
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TODO:
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- clears a work RAM snippet then jumps to that snippet ... it doesn't do
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that if you soft reset emulation.
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- understand how to load game ROMs
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This game runs on PC-based hardware.
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Major components are....
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@ -64,6 +69,12 @@ public:
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{ }
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UINT32 *m_bios_ram;
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UINT32 *m_bios_ext1_ram;
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UINT32 *m_bios_ext2_ram;
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UINT32 *m_bios_ext3_ram;
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UINT32 *m_bios_ext4_ram;
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UINT32 *m_isa_ram1;
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UINT32 *m_isa_ram2;
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int m_dma_channel;
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UINT8 m_dma_offset[2][4];
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UINT8 m_at_pages[0x10];
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@ -79,6 +90,15 @@ public:
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required_device<pic8259_device> m_pic8259_2;
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DECLARE_READ8_MEMBER( get_slave_ack );
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DECLARE_WRITE32_MEMBER( isa_ram1_w );
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DECLARE_WRITE32_MEMBER( isa_ram2_w );
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DECLARE_WRITE32_MEMBER( bios_ext1_ram_w );
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DECLARE_WRITE32_MEMBER( bios_ext2_ram_w );
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DECLARE_WRITE32_MEMBER( bios_ext3_ram_w );
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DECLARE_WRITE32_MEMBER( bios_ext4_ram_w );
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DECLARE_WRITE32_MEMBER( bios_ram_w );
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@ -98,25 +118,81 @@ static UINT8 mxtc_config_r(device_t *busdevice, device_t *device, int function,
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static void mxtc_config_w(device_t *busdevice, device_t *device, int function, int reg, UINT8 data)
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{
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xtom3d_state *state = busdevice->machine().driver_data<xtom3d_state>();
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// mame_printf_debug("%s:MXTC: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data);
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printf("MXTC: write %d, %02X, %02X\n", function, reg, data);
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/*
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memory banking with North Bridge:
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0x59 (PAM0) xxxx ---- BIOS area 0xf0000-0xfffff
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---- xxxx Reserved
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0x5a (PAM1) xxxx ---- ISA add-on BIOS 0xc4000 - 0xc7fff
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---- xxxx ISA add-on BIOS 0xc0000 - 0xc3fff
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0x5b (PAM2) xxxx ---- ISA add-on BIOS 0xcc000 - 0xcffff
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---- xxxx ISA add-on BIOS 0xc8000 - 0xcbfff
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0x5c (PAM3) xxxx ---- ISA add-on BIOS 0xd4000 - 0xd7fff
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---- xxxx ISA add-on BIOS 0xd0000 - 0xd3fff
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0x5d (PAM4) xxxx ---- ISA add-on BIOS 0xdc000 - 0xdffff
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---- xxxx ISA add-on BIOS 0xd8000 - 0xdbfff
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0x5e (PAM5) xxxx ---- BIOS extension 0xe4000 - 0xe7fff
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---- xxxx BIOS extension 0xe0000 - 0xe3fff
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0x5f (PAM6) xxxx ---- BIOS extension 0xec000 - 0xeffff
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---- xxxx BIOS extension 0xe8000 - 0xebfff
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3210 -> 3 = reserved, 2 = Cache Enable, 1 = Write Enable, 0 = Read Enable
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*/
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#if 1
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switch(reg)
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{
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case 0x59: // PAM0
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case 0x59: // PAM0
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{
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if (data & 0x10) // enable RAM access to region 0xf0000 - 0xfffff
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{
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memory_set_bankptr(busdevice->machine(), "bank1", state->m_bios_ram);
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}
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memory_set_bankptr(busdevice->machine(), "bios_bank", state->m_bios_ram);
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else // disable RAM access (reads go to BIOS ROM)
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{
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memory_set_bankptr(busdevice->machine(), "bank1", busdevice->machine().region("bios")->base() + 0x10000);
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}
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memory_set_bankptr(busdevice->machine(), "bios_bank", busdevice->machine().region("bios")->base() + 0x10000);
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break;
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}
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case 0x5a: // PAM1
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{
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if (data & 0x1)
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memory_set_bankptr(busdevice->machine(), "video_bank1", state->m_isa_ram1);
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else
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memory_set_bankptr(busdevice->machine(), "video_bank1", busdevice->machine().region("video_bios")->base() + 0);
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if (data & 0x10)
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memory_set_bankptr(busdevice->machine(), "video_bank2", state->m_isa_ram2);
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else
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memory_set_bankptr(busdevice->machine(), "video_bank2", busdevice->machine().region("video_bios")->base() + 0x4000);
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break;
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}
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case 0x5e: // PAM5
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{
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if (data & 0x1)
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memory_set_bankptr(busdevice->machine(), "bios_ext1", state->m_bios_ext1_ram);
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else
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memory_set_bankptr(busdevice->machine(), "bios_ext1", busdevice->machine().region("bios")->base() + 0);
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if (data & 0x10)
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memory_set_bankptr(busdevice->machine(), "bios_ext2", state->m_bios_ext2_ram);
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else
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memory_set_bankptr(busdevice->machine(), "bios_ext2", busdevice->machine().region("bios")->base() + 0x4000);
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break;
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}
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case 0x5f: // PAM6
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{
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if (data & 0x1)
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memory_set_bankptr(busdevice->machine(), "bios_ext3", state->m_bios_ext3_ram);
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else
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memory_set_bankptr(busdevice->machine(), "bios_ext3", busdevice->machine().region("bios")->base() + 0x8000);
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if (data & 0x10)
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memory_set_bankptr(busdevice->machine(), "bios_ext4", state->m_bios_ext4_ram);
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else
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memory_set_bankptr(busdevice->machine(), "bios_ext4", busdevice->machine().region("bios")->base() + 0xc000);
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break;
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}
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}
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#endif
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state->m_mxtc_config_reg[reg] = data;
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}
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@ -232,28 +308,78 @@ static void intel82371ab_pci_w(device_t *busdevice, device_t *device, int functi
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}
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}
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WRITE32_MEMBER(xtom3d_state::isa_ram1_w)
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{
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if (m_mxtc_config_reg[0x5a] & 0x2) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_isa_ram1 + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::isa_ram2_w)
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{
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if (m_mxtc_config_reg[0x5a] & 0x2) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_isa_ram2 + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::bios_ext1_ram_w)
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{
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if (m_mxtc_config_reg[0x5e] & 0x2) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ext1_ram + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::bios_ext2_ram_w)
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{
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if (m_mxtc_config_reg[0x5e] & 0x20) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ext2_ram + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::bios_ext3_ram_w)
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{
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if (m_mxtc_config_reg[0x5f] & 0x2) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ext3_ram + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::bios_ext4_ram_w)
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{
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if (m_mxtc_config_reg[0x5f] & 0x20) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ext4_ram + offset);
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}
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}
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WRITE32_MEMBER(xtom3d_state::bios_ram_w)
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{
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//if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled
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#if 1
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if (m_mxtc_config_reg[0x59] & 0x20) // write to RAM if this region is write-enabled
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{
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COMBINE_DATA(m_bios_ram + offset);
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}
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#endif
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}
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static READ32_DEVICE_HANDLER( ide_r )
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{
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return -1;
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return -1; // crashes otherwise
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return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
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}
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static WRITE32_DEVICE_HANDLER( ide_w )
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{
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if(0)
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ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
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if(0) // crashes otherwise
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ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
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}
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static READ32_DEVICE_HANDLER( fdc_r )
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@ -409,12 +535,14 @@ static I8237_INTERFACE( dma8237_2_config )
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static ADDRESS_MAP_START(xtom3d_map, AS_PROGRAM, 32, xtom3d_state)
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AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
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AM_RANGE(0x000a0000, 0x000bffff) AM_RAM
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AM_RANGE(0x000c0000, 0x000c7fff) AM_ROM AM_REGION("video_bios", 0)
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AM_RANGE(0x000e0000, 0x000effff) AM_RAM // TODO: PAM register banks this region
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AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bank1")
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AM_RANGE(0x000f0000, 0x000fffff) AM_WRITE(bios_ram_w)
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AM_RANGE(0x000c0000, 0x000c3fff) AM_ROMBANK("video_bank1") AM_WRITE(isa_ram1_w)
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AM_RANGE(0x000c4000, 0x000c7fff) AM_ROMBANK("video_bank2") AM_WRITE(isa_ram2_w)
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AM_RANGE(0x000e0000, 0x000e3fff) AM_ROMBANK("bios_ext1") AM_WRITE(bios_ext1_ram_w)
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AM_RANGE(0x000e4000, 0x000e7fff) AM_ROMBANK("bios_ext2") AM_WRITE(bios_ext2_ram_w)
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AM_RANGE(0x000e8000, 0x000ebfff) AM_ROMBANK("bios_ext3") AM_WRITE(bios_ext3_ram_w)
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AM_RANGE(0x000ec000, 0x000effff) AM_ROMBANK("bios_ext4") AM_WRITE(bios_ext4_ram_w)
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AM_RANGE(0x000f0000, 0x000fffff) AM_ROMBANK("bios_bank") AM_WRITE(bios_ram_w)
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AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
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// AM_RANGE(0x02000000, 0x02000003) // protection dongle lies there?
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AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
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ADDRESS_MAP_END
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@ -542,7 +670,14 @@ static const struct pc_vga_interface vga_interface =
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static MACHINE_START( xtom3d )
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{
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xtom3d_state *state = machine.driver_data<xtom3d_state>();
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state->m_bios_ram = auto_alloc_array(machine, UINT32, 0x20000/4);
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state->m_bios_ram = auto_alloc_array(machine, UINT32, 0x10000/4);
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state->m_bios_ext1_ram = auto_alloc_array(machine, UINT32, 0x4000/4);
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state->m_bios_ext2_ram = auto_alloc_array(machine, UINT32, 0x4000/4);
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state->m_bios_ext3_ram = auto_alloc_array(machine, UINT32, 0x4000/4);
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state->m_bios_ext4_ram = auto_alloc_array(machine, UINT32, 0x4000/4);
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state->m_isa_ram1 = auto_alloc_array(machine, UINT32, 0x4000/4);
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state->m_isa_ram2 = auto_alloc_array(machine, UINT32, 0x4000/4);
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init_pc_common(machine, PCCOMMON_KEYBOARD_AT, xtom3d_set_keyb_int);
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@ -555,7 +690,13 @@ static MACHINE_START( xtom3d )
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static MACHINE_RESET( xtom3d )
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{
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memory_set_bankptr(machine, "bank1", machine.region("bios")->base() + 0x10000);
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memory_set_bankptr(machine, "bios_bank", machine.region("bios")->base() + 0x10000);
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memory_set_bankptr(machine, "bios_ext1", machine.region("bios")->base() + 0);
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memory_set_bankptr(machine, "bios_ext2", machine.region("bios")->base() + 0x4000);
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memory_set_bankptr(machine, "bios_ext3", machine.region("bios")->base() + 0x8000);
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memory_set_bankptr(machine, "bios_ext4", machine.region("bios")->base() + 0xc000);
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memory_set_bankptr(machine, "video_bank1", machine.region("video_bios")->base() + 0);
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memory_set_bankptr(machine, "video_bank2", machine.region("video_bios")->base() + 0x4000);
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}
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@ -590,7 +731,7 @@ ROM_START( xtom3d )
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ROM_REGION32_LE(0x20000, "bios", 0)
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ROM_LOAD( "bios.u22", 0x000000, 0x020000, CRC(f7c58044) SHA1(fd967d009e0d3c8ed9dd7be852946f2b9dee7671) )
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ROM_REGION( 0x8000, "video_bios", 0 ) // TODO: needs proper video BIOS dumped
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ROM_REGION( 0x8000, "video_bios", 0 ) // TODO: no VGA card is hooked up, to be removed
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ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, BAD_DUMP CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
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ROM_CONTINUE( 0x0001, 0x4000 )
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