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https://github.com/holub/mame
synced 2025-07-04 17:38:08 +03:00
osborne1 hack until we can get bank selection working properly
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@ -38,7 +38,9 @@ used, and the value on the data bus is completley ignored.
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03 - Clear BIT 9 signal (map bank 1/2 into F000-FFFF)
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03 - Clear BIT 9 signal (map bank 1/2 into F000-FFFF)
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TODO:
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TODO:
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- Implement ROM/IO bank selection properly
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- Implement serial port
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- Implement serial port
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- Implement reset key (generates NMI and affects bank selection)
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- Verify frequency of the beep/audio alarm.
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- Verify frequency of the beep/audio alarm.
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***************************************************************************/
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***************************************************************************/
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@ -97,6 +97,7 @@ READ8_MEMBER( osborne1_state::osborne1_2000_r )
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WRITE8_MEMBER( osborne1_state::osborne1_2000_w )
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WRITE8_MEMBER( osborne1_state::osborne1_2000_w )
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{
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{
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#if 0
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/* Check whether regular RAM is enabled */
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/* Check whether regular RAM is enabled */
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if ( !m_bank2_enabled || (m_in_irq_handler && m_bankswitch == RAMMODE) )
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if ( !m_bank2_enabled || (m_in_irq_handler && m_bankswitch == RAMMODE) )
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{
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{
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@ -119,6 +120,40 @@ WRITE8_MEMBER( osborne1_state::osborne1_2000_w )
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if ( 0xC00 == (offset & 0xC00) ) /* Video PIA */
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if ( 0xC00 == (offset & 0xC00) ) /* Video PIA */
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m_pia1->write(space, offset & 0x03, data);
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m_pia1->write(space, offset & 0x03, data);
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}
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}
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#else
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// This code is a nasty hack that doesn't reflect hardware operation,
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// but it gets us by while the bank selection implementation is inadequate
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if ( ! m_bank2_enabled )
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{
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m_ram->pointer()[ 0x2000 + offset ] = data;
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}
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else
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{
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if ( m_in_irq_handler && m_bankswitch == RAMMODE )
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{
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m_ram->pointer()[ 0x2000 + offset ] = data;
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}
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/* Handle writes to the I/O area */
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switch( offset & 0x1F00 )
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{
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case 0x100: /* Floppy */
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m_fdc->write(space, offset & 0x03, data);
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break;
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case 0x400: /* SCREEN-PAC */
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m_resolution = data & 0x01;
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m_hc_left = (data >> 1) & 0x01;
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break;
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case 0x900: /* IEEE488 PIA */
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m_pia0->write(space, offset & 0x03, data );
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break;
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case 0xA00: /* Serial */
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break;
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case 0xC00: /* Video PIA */
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m_pia1->write(space, offset & 0x03, data );
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break;
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}
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}
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#endif
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}
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}
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@ -393,9 +428,8 @@ TIMER_CALLBACK_MEMBER(osborne1_state::setup_osborne1)
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void osborne1_state::machine_reset()
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void osborne1_state::machine_reset()
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{
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{
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address_space& space = m_maincpu->space(AS_PROGRAM);
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/* Initialize memory configuration */
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/* Initialize memory configuration */
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osborne1_bankswitch_w( space, 0x00, 0 );
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osborne1_bankswitch_w( m_maincpu->space(AS_IO), 0x00, 0 );
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m_pia_0_irq_state = FALSE;
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m_pia_0_irq_state = FALSE;
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m_pia_1_irq_state = FALSE;
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m_pia_1_irq_state = FALSE;
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@ -408,6 +442,7 @@ void osborne1_state::machine_reset()
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memset( m_ram->pointer() + 0x10000, 0xFF, 0x1000 );
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memset( m_ram->pointer() + 0x10000, 0xFF, 0x1000 );
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address_space& space = m_maincpu->space(AS_PROGRAM);
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space.set_direct_update_handler(direct_update_delegate(FUNC(osborne1_state::osborne1_opbase), this));
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space.set_direct_update_handler(direct_update_delegate(FUNC(osborne1_state::osborne1_opbase), this));
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}
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}
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@ -487,9 +522,8 @@ int osborne1_daisy_device::z80daisy_irq_ack()
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osborne1_state *state = machine().driver_data<osborne1_state>();
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osborne1_state *state = machine().driver_data<osborne1_state>();
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/* Enable ROM and I/O when IRQ is acknowledged */
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/* Enable ROM and I/O when IRQ is acknowledged */
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UINT8 old_bankswitch = state->m_bankswitch;
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UINT8 old_bankswitch = state->m_bankswitch;
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address_space& space = state->m_maincpu->space(AS_PROGRAM);
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state->osborne1_bankswitch_w( space, 0, 0 );
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state->osborne1_bankswitch_w( state->m_maincpu->space(AS_IO), 0, 0 );
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state->m_bankswitch = old_bankswitch;
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state->m_bankswitch = old_bankswitch;
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state->m_in_irq_handler = 1;
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state->m_in_irq_handler = 1;
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return 0xF8;
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return 0xF8;
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