Converted asteroid/bzone/funworld/itech8/kongambl/legionna/leland/quakeat/
quizpun2/segas24/twincobr/warpwarp to driver_device. [Atari Ace]
This commit is contained in:
parent
23c4b887a6
commit
f5dceea8a6
3
.gitattributes
vendored
3
.gitattributes
vendored
@ -1350,6 +1350,7 @@ src/mame/audio/canyon.c svneol=native#text/plain
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src/mame/audio/carnival.c svneol=native#text/plain
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src/mame/audio/cchasm.c svneol=native#text/plain
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src/mame/audio/cclimber.c svneol=native#text/plain
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src/mame/audio/cclimber.h svneol=native#text/plain
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src/mame/audio/cinemat.c svneol=native#text/plain
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src/mame/audio/circus.c svneol=native#text/plain
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src/mame/audio/cliffhgr.c svneol=native#text/plain
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@ -1370,6 +1371,7 @@ src/mame/audio/firetrk.c svneol=native#text/plain
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src/mame/audio/flower.c svneol=native#text/plain
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src/mame/audio/galaga.c svneol=native#text/plain
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src/mame/audio/galaxian.c svneol=native#text/plain
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src/mame/audio/galaxian.h svneol=native#text/plain
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src/mame/audio/geebee.c svneol=native#text/plain
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src/mame/audio/gomoku.c svneol=native#text/plain
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src/mame/audio/gorf.c svneol=native#text/plain
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@ -3615,6 +3617,7 @@ src/mame/machine/segamsys.c svneol=native#text/plain
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src/mame/machine/segas24.c svneol=native#text/plain
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src/mame/machine/segas32.c svneol=native#text/plain
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src/mame/machine/seibuspi.c svneol=native#text/plain
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src/mame/machine/seibuspi.h svneol=native#text/plain
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src/mame/machine/seicop.c svneol=native#text/plain
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src/mame/machine/seicop.h svneol=native#text/plain
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src/mame/machine/simpsons.c svneol=native#text/plain
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@ -8,6 +8,9 @@
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****************************************************************************/
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#ifndef __TMS34061_H__
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#define __TMS34061_H__
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/* register constants */
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enum
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{
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@ -68,3 +71,5 @@ WRITE8_HANDLER( tms34061_latch_w );
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/* video update handling */
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void tms34061_get_display_state(struct tms34061_display *state);
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#endif
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8
src/mame/audio/cclimber.h
Normal file
8
src/mame/audio/cclimber.h
Normal file
@ -0,0 +1,8 @@
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#include "sound/samples.h"
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#include "sound/ay8910.h"
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extern const ay8910_interface cclimber_ay8910_interface;
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extern const samples_interface cclimber_samples_interface;
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WRITE8_HANDLER( cclimber_sample_trigger_w );
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WRITE8_HANDLER( cclimber_sample_rate_w );
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WRITE8_HANDLER( cclimber_sample_volume_w );
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13
src/mame/audio/galaxian.h
Normal file
13
src/mame/audio/galaxian.h
Normal file
@ -0,0 +1,13 @@
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#define GAL_AUDIO "discrete"
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MACHINE_CONFIG_EXTERN( mooncrst_audio );
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MACHINE_CONFIG_EXTERN( galaxian_audio );
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WRITE8_DEVICE_HANDLER( galaxian_sound_w );
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WRITE8_DEVICE_HANDLER( galaxian_pitch_w );
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WRITE8_DEVICE_HANDLER( galaxian_vol_w );
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WRITE8_DEVICE_HANDLER( galaxian_noise_enable_w );
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WRITE8_DEVICE_HANDLER( galaxian_background_enable_w );
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WRITE8_DEVICE_HANDLER( galaxian_shoot_enable_w );
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WRITE8_DEVICE_HANDLER( galaxian_lfo_freq_w );
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@ -180,11 +180,11 @@
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#include "includes/funworld.h"
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class _4roses_state : public driver_device
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class _4roses_state : public funworld_state
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{
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public:
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_4roses_state(running_machine &machine, const driver_device_config_base &config)
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: driver_device(machine, config) { }
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: funworld_state(machine, config) { }
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};
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@ -201,8 +201,8 @@ public:
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static ADDRESS_MAP_START( 4roses_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x07ff) AM_RAM // AM_SHARE("nvram")
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x8000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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@ -221,9 +221,9 @@ static WRITE8_HANDLER( llander_led_w )
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{
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"lamp0", "lamp1", "lamp2", "lamp3", "lamp4"
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};
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int i;
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int i;
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for (i = 0; i < 5; i++)
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for (i = 0; i < 5; i++)
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output_set_value(lampname[i], (data >> (4 - i)) & 1);
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}
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@ -237,8 +237,8 @@ static WRITE8_HANDLER( llander_led_w )
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static ADDRESS_MAP_START( asteroid_map, ADDRESS_SPACE_PROGRAM, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0x7fff)
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AM_RANGE(0x0000, 0x01ff) AM_RAM
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE(&asteroid_ram2)
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE_MEMBER(asteroid_state, ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE_MEMBER(asteroid_state, ram2)
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AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
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AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
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AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
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@ -258,8 +258,8 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( astdelux_map, ADDRESS_SPACE_PROGRAM, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0x7fff)
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AM_RANGE(0x0000, 0x01ff) AM_RAM
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE(&asteroid_ram2)
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_BASE_MEMBER(asteroid_state, ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_BASE_MEMBER(asteroid_state, ram2)
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AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
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AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
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AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
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@ -501,18 +501,19 @@ static INPUT_PORTS_START( astdelux )
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PORT_DIPSETTING ( 0xc0, "1 Coin Each 2 Coins" )
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PORT_DIPSETTING ( 0xe0, DEF_STR( None ) )
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/* The manual includes a 3rd DIP controlling the number & configuration of coin counters, defined as:
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PORT_START("DSW3") // 4-Toggle switch located on game PCB at M12
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PORT_DIPNAME( 0x03, 0x00, "Coin Counters" ) PORT_DIPLOCATION("M12:1,2")
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PORT_DIPSETTING ( 0x00, "1=Left, Center & Right" ) // "For games having these coin doors: Thai 1Baht/1Baht, German 1DM/1DM, US 25c/25c,
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/* The manual includes a 3rd DIP controlling the number & configuration of coin counters, defined as: */
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#if 0
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PORT_START("DSW3") // 4-Toggle switch located on game PCB at M12
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PORT_DIPNAME( 0x03, 0x00, "Coin Counters" ) PORT_DIPLOCATION("M12:1,2")
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PORT_DIPSETTING ( 0x00, "1=Left, Center & Right" ) // "For games having these coin doors: Thai 1Baht/1Baht, German 1DM/1DM, US 25c/25c,
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// Belgian or French 5Fr/5Fr, Swiss or French 1Fr/1Fr, US 25c/25c/25c,
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// Japanese 100Y/100Y, Swedish 1Kr/1Kr, UK 10P/10P, Australian 20c/20c, or Italian 100L/100L."
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PORT_DIPSETTING ( 0x01, "1=Left & Center, 2=Right" ) // "For games having these coin doors: German 2DM/1DM, German 1DM/5DM, US 25c/25c/1$, or US 25c/1$."
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PORT_DIPSETTING ( 0x02, "1=Left, 2=Center & Right" ) // "No coin door is currently designed for this configuration."
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PORT_DIPSETTING ( 0x03, "1=Left, 2=Center, 3=Right" ) // "For games having these coin doors: German 1DM/2DM/5DM."
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PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "M12:3" ) // Listed as "Unused"
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PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "M12:4" ) // Listed as "Unused"
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*/
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PORT_DIPSETTING ( 0x01, "1=Left & Center, 2=Right" ) // "For games having these coin doors: German 2DM/1DM, German 1DM/5DM, US 25c/25c/1$, or US 25c/1$."
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PORT_DIPSETTING ( 0x02, "1=Left, 2=Center & Right" ) // "No coin door is currently designed for this configuration."
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PORT_DIPSETTING ( 0x03, "1=Left, 2=Center, 3=Right" ) // "For games having these coin doors: German 1DM/2DM/5DM."
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PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "M12:3" ) // Listed as "Unused"
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PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "M12:4" ) // Listed as "Unused"
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#endif
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INPUT_PORTS_END
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@ -609,7 +610,7 @@ static const pokey_interface pokey_config =
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*
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*************************************/
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static MACHINE_CONFIG_START( asteroid, driver_device )
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static MACHINE_CONFIG_START( asteroid, asteroid_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/8)
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@ -310,7 +310,7 @@ static const eeprom_interface eeprom_intf =
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*
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*************************************/
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static MACHINE_CONFIG_START( ataxx, driver_device )
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static MACHINE_CONFIG_START( ataxx, leland_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("master", Z80, 6000000)
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@ -214,12 +214,6 @@
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#include "bzone.lh"
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static UINT8 analog_data;
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static UINT8 rb_input_select;
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/*************************************
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*
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* Save state registration
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@ -228,14 +222,16 @@ static UINT8 rb_input_select;
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static MACHINE_START( bzone )
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{
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state_save_register_global(machine, analog_data);
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bzone_state *state = machine->driver_data<bzone_state>();
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state_save_register_global(machine, state->analog_data);
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}
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static MACHINE_START( redbaron )
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{
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state_save_register_global(machine, analog_data);
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state_save_register_global(machine, rb_input_select);
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bzone_state *state = machine->driver_data<bzone_state>();
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state_save_register_global(machine, state->analog_data);
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state_save_register_global(machine, state->rb_input_select);
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}
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@ -281,12 +277,14 @@ static WRITE8_HANDLER( bzone_coin_counter_w )
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static READ8_DEVICE_HANDLER( redbaron_joy_r )
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{
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return input_port_read(device->machine, rb_input_select ? "FAKE1" : "FAKE2");
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bzone_state *state = device->machine->driver_data<bzone_state>();
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return input_port_read(device->machine, state->rb_input_select ? "FAKE1" : "FAKE2");
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}
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static WRITE8_DEVICE_HANDLER( redbaron_joysound_w )
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{
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rb_input_select = data & 1;
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bzone_state *state = device->machine->driver_data<bzone_state>();
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state->rb_input_select = data & 1;
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redbaron_sounds_w(device, offset, data);
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}
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@ -549,7 +547,7 @@ static const pokey_interface redbaron_pokey_interface =
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*
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*************************************/
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static MACHINE_CONFIG_START( bzone_base, driver_device )
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static MACHINE_CONFIG_START( bzone_base, bzone_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, BZONE_MASTER_CLOCK / 8)
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@ -782,16 +780,18 @@ ROM_END
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static READ8_HANDLER( analog_data_r )
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{
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return analog_data;
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bzone_state *state = space->machine->driver_data<bzone_state>();
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return state->analog_data;
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}
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static WRITE8_HANDLER( analog_select_w )
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{
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bzone_state *state = space->machine->driver_data<bzone_state>();
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static const char *const analog_port[] = { "AN0", "AN1", "AN2" };
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if (offset <= 2)
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analog_data = input_port_read(space->machine, analog_port[offset]);
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state->analog_data = input_port_read(space->machine, analog_port[offset]);
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}
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@ -799,8 +799,8 @@ static ADDRESS_MAP_START( funworld_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0c00, 0x0c01) AM_DEVWRITE("ay8910", ay8910_address_data_w)
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AM_RANGE(0x0e00, 0x0e00) AM_DEVWRITE("crtc", mc6845_address_w)
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AM_RANGE(0x0e01, 0x0e01) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
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AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x4000, 0x4000) AM_READNOP
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AM_RANGE(0x8000, 0xbfff) AM_ROM
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AM_RANGE(0xc000, 0xffff) AM_ROM
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@ -836,8 +836,8 @@ static ADDRESS_MAP_START( funquiz_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x1800, 0x1800) AM_WRITE(question_bank_w)
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AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x4000, 0x7fff) AM_READ(questions_r)
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AM_RANGE(0xc000, 0xffff) AM_ROM
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@ -854,8 +854,8 @@ static ADDRESS_MAP_START( magicrd2_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x2c00, 0x2cff) AM_RAM /* range for protection */
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AM_RANGE(0x3600, 0x36ff) AM_RAM /* some games use $3603-05 range for protection */
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AM_RANGE(0x3c00, 0x3cff) AM_RAM /* range for protection */
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AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x6000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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@ -869,8 +869,8 @@ static ADDRESS_MAP_START( cuoreuno_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0e01, 0x0e01) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
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AM_RANGE(0x2000, 0x2000) AM_READNOP /* some unknown reads */
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AM_RANGE(0x3e00, 0x3fff) AM_RAM /* some games use $3e03-05 range for protection */
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x8000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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@ -884,8 +884,8 @@ static ADDRESS_MAP_START( saloon_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x1800, 0x1800) AM_DEVREAD("ay8910", ay8910_r)
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AM_RANGE(0x1800, 0x1801) AM_DEVWRITE("ay8910", ay8910_address_data_w)
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// AM_RANGE(0x2000, 0x2000) AM_READNOP /* some unknown reads... maybe a DSW */
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&funworld_videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&funworld_colorram)
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AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE_MEMBER(funworld_state, videoram)
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AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE_MEMBER(funworld_state, colorram)
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AM_RANGE(0x8000, 0xffff) AM_ROM
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ADDRESS_MAP_END
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@ -2107,7 +2107,7 @@ static const mc6845_interface mc6845_intf =
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* Machine Drivers *
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**************************/
|
||||
|
||||
static MACHINE_CONFIG_START( fw1stpal, driver_device )
|
||||
static MACHINE_CONFIG_START( fw1stpal, funworld_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M65SC02, MASTER_CLOCK/8) /* 2MHz */
|
||||
MCFG_CPU_PROGRAM_MAP(funworld_map)
|
||||
|
@ -519,25 +519,6 @@
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Static data
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT8 blitter_int;
|
||||
static UINT8 tms34061_int;
|
||||
static UINT8 periodic_int;
|
||||
|
||||
static UINT8 sound_data;
|
||||
|
||||
static UINT8 pia_porta_data;
|
||||
static UINT8 pia_portb_data;
|
||||
|
||||
static const rectangle *visarea;
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* 6821 PIA interface
|
||||
@ -590,12 +571,13 @@ static const via6522_interface via_interface =
|
||||
|
||||
void itech8_update_interrupts(running_machine *machine, int periodic, int tms34061, int blitter)
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
device_type main_cpu_type = machine->device("maincpu")->type();
|
||||
|
||||
/* update the states */
|
||||
if (periodic != -1) periodic_int = periodic;
|
||||
if (tms34061 != -1) tms34061_int = tms34061;
|
||||
if (blitter != -1) blitter_int = blitter;
|
||||
if (periodic != -1) state->periodic_int = periodic;
|
||||
if (tms34061 != -1) state->tms34061_int = tms34061;
|
||||
if (blitter != -1) state->blitter_int = blitter;
|
||||
|
||||
/* handle the 6809 case */
|
||||
if (main_cpu_type == M6809 || main_cpu_type == HD6309)
|
||||
@ -609,8 +591,8 @@ void itech8_update_interrupts(running_machine *machine, int periodic, int tms340
|
||||
/* handle the 68000 case */
|
||||
else
|
||||
{
|
||||
cputag_set_input_line(machine, "maincpu", 2, blitter_int ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(machine, "maincpu", 3, periodic_int ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(machine, "maincpu", 2, state->blitter_int ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(machine, "maincpu", 3, state->periodic_int ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -669,6 +651,7 @@ static MACHINE_START( sstrike )
|
||||
|
||||
static MACHINE_RESET( itech8 )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
device_type main_cpu_type = machine->device("maincpu")->type();
|
||||
|
||||
/* make sure bank 0 is selected */
|
||||
@ -679,10 +662,10 @@ static MACHINE_RESET( itech8 )
|
||||
}
|
||||
|
||||
/* set the visible area */
|
||||
if (visarea)
|
||||
if (state->visarea)
|
||||
{
|
||||
machine->primary_screen->set_visible_area(visarea->min_x, visarea->max_x, visarea->min_y, visarea->max_y);
|
||||
visarea = NULL;
|
||||
machine->primary_screen->set_visible_area(state->visarea->min_x, state->visarea->max_x, state->visarea->min_y, state->visarea->max_y);
|
||||
state->visarea = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
@ -745,7 +728,8 @@ static WRITE8_HANDLER( rimrockn_bank_w )
|
||||
|
||||
static CUSTOM_INPUT( special_r )
|
||||
{
|
||||
return pia_portb_data & 0x01;
|
||||
itech8_state *state = field->port->machine->driver_data<itech8_state>();
|
||||
return state->pia_portb_data & 0x01;
|
||||
}
|
||||
|
||||
|
||||
@ -757,20 +741,22 @@ static CUSTOM_INPUT( special_r )
|
||||
|
||||
static WRITE8_DEVICE_HANDLER( pia_porta_out )
|
||||
{
|
||||
itech8_state *state = device->machine->driver_data<itech8_state>();
|
||||
logerror("PIA port A write = %02x\n", data);
|
||||
pia_porta_data = data;
|
||||
state->pia_porta_data = data;
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( pia_portb_out )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
logerror("PIA port B write = %02x\n", data);
|
||||
|
||||
/* bit 0 provides feedback to the main CPU */
|
||||
/* bit 4 controls the ticket dispenser */
|
||||
/* bit 5 controls the coin counter */
|
||||
/* bit 6 controls the diagnostic sound LED */
|
||||
pia_portb_data = data;
|
||||
state->pia_portb_data = data;
|
||||
ticket_dispenser_w(space->machine->device("ticket"), 0, (data & 0x10) << 3);
|
||||
coin_counter_w(space->machine, 0, (data & 0x20) >> 5);
|
||||
}
|
||||
@ -778,13 +764,14 @@ static WRITE8_HANDLER( pia_portb_out )
|
||||
|
||||
static WRITE8_DEVICE_HANDLER( ym2203_portb_out )
|
||||
{
|
||||
itech8_state *state = device->machine->driver_data<itech8_state>();
|
||||
logerror("YM2203 port B write = %02x\n", data);
|
||||
|
||||
/* bit 0 provides feedback to the main CPU */
|
||||
/* bit 5 controls the coin counter */
|
||||
/* bit 6 controls the diagnostic sound LED */
|
||||
/* bit 7 controls the ticket dispenser */
|
||||
pia_portb_data = data;
|
||||
state->pia_portb_data = data;
|
||||
ticket_dispenser_w(device->machine->device("ticket"), 0, data & 0x80);
|
||||
coin_counter_w(device->machine, 0, (data & 0x20) >> 5);
|
||||
}
|
||||
@ -799,7 +786,8 @@ static WRITE8_DEVICE_HANDLER( ym2203_portb_out )
|
||||
|
||||
static TIMER_CALLBACK( delayed_sound_data_w )
|
||||
{
|
||||
sound_data = param;
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
state->sound_data = param;
|
||||
cputag_set_input_line(machine, "soundcpu", M6809_IRQ_LINE, ASSERT_LINE);
|
||||
}
|
||||
|
||||
@ -823,8 +811,9 @@ static WRITE8_HANDLER( gtg2_sound_data_w )
|
||||
|
||||
static READ8_HANDLER( sound_data_r )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
cputag_set_input_line(space->machine, "soundcpu", M6809_IRQ_LINE, CLEAR_LINE);
|
||||
return sound_data;
|
||||
return state->sound_data;
|
||||
}
|
||||
|
||||
|
||||
@ -837,8 +826,9 @@ static READ8_HANDLER( sound_data_r )
|
||||
|
||||
static WRITE16_HANDLER( grom_bank16_w )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
if (ACCESSING_BITS_8_15)
|
||||
*itech8_grom_bank = data >> 8;
|
||||
*state->grom_bank = data >> 8;
|
||||
}
|
||||
|
||||
|
||||
@ -868,7 +858,7 @@ static ADDRESS_MAP_START( tmslo_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x0fff) AM_READWRITE(itech8_tms34061_r, itech8_tms34061_w)
|
||||
AM_RANGE(0x1100, 0x1100) AM_WRITENOP
|
||||
AM_RANGE(0x1120, 0x1120) AM_WRITE(sound_data_w)
|
||||
AM_RANGE(0x1140, 0x1140) AM_READ_PORT("40") AM_WRITEONLY AM_BASE(&itech8_grom_bank)
|
||||
AM_RANGE(0x1140, 0x1140) AM_READ_PORT("40") AM_WRITEONLY AM_BASE_MEMBER(itech8_state, grom_bank)
|
||||
AM_RANGE(0x1160, 0x1160) AM_READ_PORT("60") AM_WRITE(itech8_page_w)
|
||||
AM_RANGE(0x1180, 0x1180) AM_READ_PORT("80") AM_WRITE(tms34061_latch_w)
|
||||
AM_RANGE(0x11a0, 0x11a0) AM_WRITE(itech8_nmi_ack_w)
|
||||
@ -884,7 +874,7 @@ static ADDRESS_MAP_START( tmshi_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(itech8_tms34061_r, itech8_tms34061_w)
|
||||
AM_RANGE(0x0100, 0x0100) AM_WRITENOP
|
||||
AM_RANGE(0x0120, 0x0120) AM_WRITE(sound_data_w)
|
||||
AM_RANGE(0x0140, 0x0140) AM_READ_PORT("40") AM_WRITEONLY AM_BASE(&itech8_grom_bank)
|
||||
AM_RANGE(0x0140, 0x0140) AM_READ_PORT("40") AM_WRITEONLY AM_BASE_MEMBER(itech8_state, grom_bank)
|
||||
AM_RANGE(0x0160, 0x0160) AM_READ_PORT("60") AM_WRITE(itech8_page_w)
|
||||
AM_RANGE(0x0180, 0x0180) AM_READ_PORT("80") AM_WRITE(tms34061_latch_w)
|
||||
AM_RANGE(0x01a0, 0x01a0) AM_WRITE(itech8_nmi_ack_w)
|
||||
@ -901,7 +891,7 @@ static ADDRESS_MAP_START( gtg2_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0120, 0x0120) AM_READ_PORT("60") AM_WRITE(itech8_page_w)
|
||||
AM_RANGE(0x0140, 0x015f) AM_WRITE(itech8_palette_w)
|
||||
AM_RANGE(0x0140, 0x0140) AM_READ_PORT("80")
|
||||
AM_RANGE(0x0160, 0x0160) AM_WRITEONLY AM_BASE(&itech8_grom_bank)
|
||||
AM_RANGE(0x0160, 0x0160) AM_WRITEONLY AM_BASE_MEMBER(itech8_state, grom_bank)
|
||||
AM_RANGE(0x0180, 0x019f) AM_READWRITE(itech8_blitter_r, blitter_w)
|
||||
AM_RANGE(0x01c0, 0x01c0) AM_WRITE(gtg2_sound_data_w)
|
||||
AM_RANGE(0x01e0, 0x01e0) AM_WRITE(tms34061_latch_w)
|
||||
@ -917,7 +907,7 @@ static ADDRESS_MAP_START( ninclown_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000080, 0x003fff) AM_RAM AM_SHARE("nvram")
|
||||
AM_RANGE(0x004000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100080, 0x100081) AM_WRITE8(sound_data_w, 0xff00)
|
||||
AM_RANGE(0x100100, 0x100101) AM_READ_PORT("40") AM_WRITE(grom_bank16_w) AM_BASE((UINT16 **)&itech8_grom_bank)
|
||||
AM_RANGE(0x100100, 0x100101) AM_READ_PORT("40") AM_WRITE(grom_bank16_w) AM_BASE_MEMBER(itech8_state, grom_bank)
|
||||
AM_RANGE(0x100180, 0x100181) AM_READ_PORT("60") AM_WRITE(display_page16_w)
|
||||
AM_RANGE(0x100240, 0x100241) AM_WRITE8(tms34061_latch_w, 0xff00)
|
||||
AM_RANGE(0x100280, 0x100281) AM_READ_PORT("80") AM_WRITENOP
|
||||
@ -1691,7 +1681,7 @@ static const ym3812_interface ym3812_config =
|
||||
|
||||
/************* core pieces ******************/
|
||||
|
||||
static MACHINE_CONFIG_START( itech8_core_lo, driver_device )
|
||||
static MACHINE_CONFIG_START( itech8_core_lo, itech8_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M6809, CLOCK_8MHz/4)
|
||||
@ -2668,29 +2658,33 @@ static DRIVER_INIT( sstrike )
|
||||
|
||||
static DRIVER_INIT( hstennis )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
static const rectangle visible = { 0, 375, 0, 239 };
|
||||
visarea = &visible;
|
||||
state->visarea = &visible;
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( arligntn )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
static const rectangle visible = { 16, 389, 0, 239 };
|
||||
visarea = &visible;
|
||||
state->visarea = &visible;
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( peggle )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
static const rectangle visible = { 18, 367, 0, 239 };
|
||||
visarea = &visible;
|
||||
state->visarea = &visible;
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( neckneck )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
static const rectangle visible = { 8, 375, 0, 239 };
|
||||
visarea = &visible;
|
||||
state->visarea = &visible;
|
||||
}
|
||||
|
||||
|
||||
|
@ -18,6 +18,16 @@
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "machine/eeprom.h"
|
||||
|
||||
|
||||
class kongambl_state : public driver_device
|
||||
{
|
||||
public:
|
||||
kongambl_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
};
|
||||
|
||||
|
||||
static VIDEO_START(kongambl)
|
||||
{
|
||||
device_t *k056832 = machine->device("k056832");
|
||||
@ -126,7 +136,7 @@ static const k053247_interface k053247_intf =
|
||||
kongambl_sprite_callback
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( kongambl, driver_device )
|
||||
static MACHINE_CONFIG_START( kongambl, kongambl_state )
|
||||
MCFG_CPU_ADD("maincpu", M68EC020, 25000000)
|
||||
MCFG_CPU_PROGRAM_MAP(kongambl_map)
|
||||
|
||||
|
@ -83,10 +83,10 @@ static ADDRESS_MAP_START( legionna_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) /* palette xRRRRxGGGGxBBBBx ? */
|
||||
AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
|
||||
AM_RANGE(0x106000, 0x107fff) AM_RAM
|
||||
@ -98,10 +98,10 @@ static ADDRESS_MAP_START( heatbrl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103000, 0x103fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x108000, 0x11ffff) AM_RAM
|
||||
@ -112,10 +112,10 @@ static ADDRESS_MAP_START( godzilla_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(godzilla_mcu_r, godzilla_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM
|
||||
AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x103800, 0x103fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102800, 0x1037ff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103800, 0x103fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
|
||||
AM_RANGE(0x106000, 0x1067ff) AM_RAM
|
||||
@ -137,10 +137,10 @@ static ADDRESS_MAP_START( denjinmk_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102800, 0x103fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102800, 0x103fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM_WRITE(denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x105000, 0x105fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram)
|
||||
AM_RANGE(0x106000, 0x107fff) AM_RAM
|
||||
@ -153,10 +153,10 @@ static ADDRESS_MAP_START( grainbow_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(grainbow_mcu_r, grainbow_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM//_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x105000, 0x105fff) AM_RAM
|
||||
@ -169,10 +169,10 @@ static ADDRESS_MAP_START( cupsoc_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM
|
||||
AM_RANGE(0x105000, 0x106fff) AM_RAM
|
||||
@ -188,10 +188,10 @@ static ADDRESS_MAP_START( cupsocs_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsocs_mcu_r,cupsocs_mcu_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM
|
||||
AM_RANGE(0x105000, 0x106fff) AM_RAM
|
||||
@ -207,10 +207,10 @@ static ADDRESS_MAP_START( cupsocbl_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
//AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100000, 0x1007ff) AM_READWRITE(copdxbl_0_r,copdxbl_0_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE_MEMBER(legionna_state, back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE_MEMBER(legionna_state, fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE_MEMBER(legionna_state, mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE_MEMBER(legionna_state, textram)
|
||||
AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram)
|
||||
AM_RANGE(0x104000, 0x104fff) AM_RAM
|
||||
AM_RANGE(0x105000, 0x106fff) AM_RAM
|
||||
@ -1046,7 +1046,7 @@ GFXDECODE_END
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( legionna, driver_device )
|
||||
static MACHINE_CONFIG_START( legionna, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */
|
||||
@ -1079,7 +1079,7 @@ static MACHINE_CONFIG_START( legionna, driver_device )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( heatbrl, driver_device )
|
||||
static MACHINE_CONFIG_START( heatbrl, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */
|
||||
@ -1111,7 +1111,7 @@ static MACHINE_CONFIG_START( heatbrl, driver_device )
|
||||
SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( godzilla, driver_device )
|
||||
static MACHINE_CONFIG_START( godzilla, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, 20000000/2)
|
||||
@ -1143,7 +1143,7 @@ static MACHINE_CONFIG_START( godzilla, driver_device )
|
||||
SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( denjinmk, driver_device )
|
||||
static MACHINE_CONFIG_START( denjinmk, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, 20000000/2)
|
||||
@ -1175,7 +1175,7 @@ static MACHINE_CONFIG_START( denjinmk, driver_device )
|
||||
SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(14318180/4,1320000)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( grainbow, driver_device )
|
||||
static MACHINE_CONFIG_START( grainbow, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, 20000000/2)
|
||||
@ -1208,7 +1208,7 @@ static MACHINE_CONFIG_START( grainbow, driver_device )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( cupsoc, driver_device )
|
||||
static MACHINE_CONFIG_START( cupsoc, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000,20000000/2)
|
||||
@ -1245,7 +1245,7 @@ static MACHINE_CONFIG_DERIVED( cupsocs, cupsoc )
|
||||
MCFG_CPU_PROGRAM_MAP(cupsocs_mem)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( cupsocbl, driver_device )
|
||||
static MACHINE_CONFIG_START( cupsocbl, legionna_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000,12000000)
|
||||
|
@ -731,7 +731,7 @@ static const eeprom_interface eeprom_intf =
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( leland, driver_device )
|
||||
static MACHINE_CONFIG_START( leland, leland_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("master", Z80, MASTER_CLOCK/2)
|
||||
@ -1991,8 +1991,9 @@ static void init_master_ports(running_machine *machine, UINT8 mvram_base, UINT8
|
||||
|
||||
static DRIVER_INIT( cerberus )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = cerberus_bankswitch;
|
||||
state->update_master_bank = cerberus_bankswitch;
|
||||
memory_set_bankptr(machine, "bank1", machine->region("master")->base() + 0x2000);
|
||||
memory_set_bankptr(machine, "bank2", machine->region("master")->base() + 0xa000);
|
||||
memory_set_bankptr(machine, "bank3", machine->region("slave")->base() + 0x2000);
|
||||
@ -2008,8 +2009,9 @@ static DRIVER_INIT( cerberus )
|
||||
|
||||
static DRIVER_INIT( mayhem )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = mayhem_bankswitch;
|
||||
state->update_master_bank = mayhem_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x00, 0xc0);
|
||||
@ -2018,8 +2020,9 @@ static DRIVER_INIT( mayhem )
|
||||
|
||||
static DRIVER_INIT( powrplay )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = mayhem_bankswitch;
|
||||
state->update_master_bank = mayhem_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x40, 0x80);
|
||||
@ -2028,8 +2031,9 @@ static DRIVER_INIT( powrplay )
|
||||
|
||||
static DRIVER_INIT( wseries )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = mayhem_bankswitch;
|
||||
state->update_master_bank = mayhem_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x40, 0x80);
|
||||
@ -2038,8 +2042,9 @@ static DRIVER_INIT( wseries )
|
||||
|
||||
static DRIVER_INIT( alleymas )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = mayhem_bankswitch;
|
||||
state->update_master_bank = mayhem_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x00, 0xc0);
|
||||
@ -2047,14 +2052,15 @@ static DRIVER_INIT( alleymas )
|
||||
/* kludge warning: the game uses location E0CA to determine if the joysticks are available */
|
||||
/* it gets cleared by the code, but there is no obvious way for the value to be set to a */
|
||||
/* non-zero value. If the value is zero, the joystick is never read. */
|
||||
alleymas_kludge_mem = memory_install_write8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM), 0xe0ca, 0xe0ca, 0, 0, alleymas_joystick_kludge);
|
||||
state->alleymas_kludge_mem = memory_install_write8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM), 0xe0ca, 0xe0ca, 0, 0, alleymas_joystick_kludge);
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( upyoural )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = mayhem_bankswitch;
|
||||
state->update_master_bank = mayhem_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x00, 0xc0);
|
||||
@ -2063,8 +2069,9 @@ static DRIVER_INIT( upyoural )
|
||||
|
||||
static DRIVER_INIT( dangerz )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = dangerz_bankswitch;
|
||||
state->update_master_bank = dangerz_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x40, 0x80);
|
||||
@ -2078,8 +2085,9 @@ static DRIVER_INIT( dangerz )
|
||||
|
||||
static DRIVER_INIT( basebal2 )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = basebal2_bankswitch;
|
||||
state->update_master_bank = basebal2_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x00, 0xc0);
|
||||
@ -2088,8 +2096,9 @@ static DRIVER_INIT( basebal2 )
|
||||
|
||||
static DRIVER_INIT( dblplay )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = basebal2_bankswitch;
|
||||
state->update_master_bank = basebal2_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x80, 0x40);
|
||||
@ -2098,8 +2107,9 @@ static DRIVER_INIT( dblplay )
|
||||
|
||||
static DRIVER_INIT( strkzone )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = basebal2_bankswitch;
|
||||
state->update_master_bank = basebal2_bankswitch;
|
||||
|
||||
/* set up the master CPU I/O ports */
|
||||
init_master_ports(machine, 0x00, 0x40);
|
||||
@ -2108,8 +2118,9 @@ static DRIVER_INIT( strkzone )
|
||||
|
||||
static DRIVER_INIT( redlin2p )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = redline_bankswitch;
|
||||
state->update_master_bank = redline_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
|
||||
@ -2126,8 +2137,9 @@ static DRIVER_INIT( redlin2p )
|
||||
|
||||
static DRIVER_INIT( quarterb )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
|
||||
@ -2138,8 +2150,9 @@ static DRIVER_INIT( quarterb )
|
||||
|
||||
static DRIVER_INIT( viper )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2157,8 +2170,9 @@ static DRIVER_INIT( viper )
|
||||
|
||||
static DRIVER_INIT( teamqb )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2175,8 +2189,9 @@ static DRIVER_INIT( teamqb )
|
||||
|
||||
static DRIVER_INIT( aafb )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2193,8 +2208,9 @@ static DRIVER_INIT( aafb )
|
||||
|
||||
static DRIVER_INIT( aafbb )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2211,8 +2227,9 @@ static DRIVER_INIT( aafbb )
|
||||
|
||||
static DRIVER_INIT( aafbd2p )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = viper_bankswitch;
|
||||
state->update_master_bank = viper_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2229,8 +2246,9 @@ static DRIVER_INIT( aafbd2p )
|
||||
|
||||
static DRIVER_INIT( offroad )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = offroad_bankswitch;
|
||||
state->update_master_bank = offroad_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2249,8 +2267,9 @@ static DRIVER_INIT( offroad )
|
||||
|
||||
static DRIVER_INIT( offroadt )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = offroad_bankswitch;
|
||||
state->update_master_bank = offroad_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
@ -2268,8 +2287,9 @@ static DRIVER_INIT( offroadt )
|
||||
|
||||
static DRIVER_INIT( pigout )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* master CPU bankswitching */
|
||||
leland_update_master_bank = offroad_bankswitch;
|
||||
state->update_master_bank = offroad_bankswitch;
|
||||
|
||||
leland_rotate_memory(machine, "master");
|
||||
leland_rotate_memory(machine, "slave");
|
||||
|
@ -62,6 +62,18 @@ TODO:
|
||||
#include "machine/pic8259.h"
|
||||
/* Insert IBM PC includes here */
|
||||
|
||||
|
||||
class quakeat_state : public driver_device
|
||||
{
|
||||
public:
|
||||
quakeat_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
device_t *pic8259_1;
|
||||
device_t *pic8259_2;
|
||||
};
|
||||
|
||||
|
||||
static VIDEO_START(quake)
|
||||
{
|
||||
}
|
||||
@ -71,11 +83,6 @@ static SCREEN_UPDATE(quake)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct {
|
||||
device_t *pic8259_1;
|
||||
device_t *pic8259_2;
|
||||
} quakeat_devices;
|
||||
|
||||
static ADDRESS_MAP_START( quake_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x0000ffff) AM_ROM AM_REGION("pc_bios", 0) /* BIOS */
|
||||
ADDRESS_MAP_END
|
||||
@ -129,25 +136,27 @@ INPUT_PORTS_END
|
||||
|
||||
static IRQ_CALLBACK(irq_callback)
|
||||
{
|
||||
quakeat_state *state = device->machine->driver_data<quakeat_state>();
|
||||
int r = 0;
|
||||
r = pic8259_acknowledge( quakeat_devices.pic8259_2);
|
||||
r = pic8259_acknowledge( state->pic8259_2);
|
||||
if (r==0)
|
||||
{
|
||||
r = pic8259_acknowledge( quakeat_devices.pic8259_1);
|
||||
r = pic8259_acknowledge( state->pic8259_1);
|
||||
}
|
||||
return r;
|
||||
}
|
||||
|
||||
static MACHINE_START(quakeat)
|
||||
{
|
||||
quakeat_state *state = machine->driver_data<quakeat_state>();
|
||||
cpu_set_irq_callback(machine->device("maincpu"), irq_callback);
|
||||
|
||||
quakeat_devices.pic8259_1 = machine->device( "pic8259_1" );
|
||||
quakeat_devices.pic8259_2 = machine->device( "pic8259_2" );
|
||||
state->pic8259_1 = machine->device( "pic8259_1" );
|
||||
state->pic8259_2 = machine->device( "pic8259_2" );
|
||||
}
|
||||
/*************************************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( quake, driver_device )
|
||||
static MACHINE_CONFIG_START( quake, quakeat_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", PENTIUM, 233000000) /* Pentium II, 233MHz */
|
||||
MCFG_CPU_PROGRAM_MAP(quake_map)
|
||||
|
@ -42,51 +42,78 @@ Notes:
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "sound/2203intf.h"
|
||||
|
||||
|
||||
typedef enum { STATE_IDLE = 0, STATE_ADDR_R, STATE_ROM_R, STATE_EEPROM_R, STATE_EEPROM_W } prot_state;
|
||||
struct prot_t {
|
||||
prot_state state;
|
||||
int wait_param;
|
||||
int param;
|
||||
int cmd;
|
||||
int addr;
|
||||
};
|
||||
|
||||
class quizpun2_state : public driver_device
|
||||
{
|
||||
public:
|
||||
quizpun2_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
struct prot_t prot;
|
||||
UINT8 *bg_ram;
|
||||
UINT8 *fg_ram;
|
||||
tilemap_t *bg_tmap;
|
||||
tilemap_t *fg_tmap;
|
||||
};
|
||||
|
||||
|
||||
#define VERBOSE_PROTECTION_LOG 0
|
||||
|
||||
/***************************************************************************
|
||||
Video Hardware
|
||||
***************************************************************************/
|
||||
|
||||
static UINT8 *bg_ram, *fg_ram;
|
||||
static tilemap_t *bg_tmap, *fg_tmap;
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
{
|
||||
UINT16 code = bg_ram[ tile_index * 2 ] + bg_ram[ tile_index * 2 + 1 ] * 256;
|
||||
quizpun2_state *state = machine->driver_data<quizpun2_state>();
|
||||
UINT16 code = state->bg_ram[ tile_index * 2 ] + state->bg_ram[ tile_index * 2 + 1 ] * 256;
|
||||
SET_TILE_INFO(0, code, 0, 0);
|
||||
}
|
||||
|
||||
static TILE_GET_INFO( get_fg_tile_info )
|
||||
{
|
||||
UINT16 code = fg_ram[ tile_index * 4 ] + fg_ram[ tile_index * 4 + 1 ] * 256;
|
||||
UINT8 color = fg_ram[ tile_index * 4 + 2 ];
|
||||
quizpun2_state *state = machine->driver_data<quizpun2_state>();
|
||||
UINT16 code = state->fg_ram[ tile_index * 4 ] + state->fg_ram[ tile_index * 4 + 1 ] * 256;
|
||||
UINT8 color = state->fg_ram[ tile_index * 4 + 2 ];
|
||||
SET_TILE_INFO(1, code, color & 0x0f, 0);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( bg_ram_w )
|
||||
{
|
||||
bg_ram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tmap, offset/2);
|
||||
quizpun2_state *state = space->machine->driver_data<quizpun2_state>();
|
||||
state->bg_ram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tmap, offset/2);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( fg_ram_w )
|
||||
{
|
||||
fg_ram[offset] = data;
|
||||
tilemap_mark_tile_dirty(fg_tmap, offset/4);
|
||||
quizpun2_state *state = space->machine->driver_data<quizpun2_state>();
|
||||
state->fg_ram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->fg_tmap, offset/4);
|
||||
}
|
||||
|
||||
static VIDEO_START(quizpun2)
|
||||
{
|
||||
bg_tmap = tilemap_create( machine, get_bg_tile_info, tilemap_scan_rows, 8,16, 0x20,0x20 );
|
||||
fg_tmap = tilemap_create( machine, get_fg_tile_info, tilemap_scan_rows, 8,16, 0x20,0x20 );
|
||||
quizpun2_state *state = machine->driver_data<quizpun2_state>();
|
||||
state->bg_tmap = tilemap_create( machine, get_bg_tile_info, tilemap_scan_rows, 8,16, 0x20,0x20 );
|
||||
state->fg_tmap = tilemap_create( machine, get_fg_tile_info, tilemap_scan_rows, 8,16, 0x20,0x20 );
|
||||
|
||||
tilemap_set_transparent_pen(bg_tmap, 0);
|
||||
tilemap_set_transparent_pen(fg_tmap, 0);
|
||||
tilemap_set_transparent_pen(state->bg_tmap, 0);
|
||||
tilemap_set_transparent_pen(state->fg_tmap, 0);
|
||||
}
|
||||
|
||||
static SCREEN_UPDATE(quizpun2)
|
||||
{
|
||||
quizpun2_state *state = screen->machine->driver_data<quizpun2_state>();
|
||||
int layers_ctrl = -1;
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
@ -99,11 +126,11 @@ static SCREEN_UPDATE(quizpun2)
|
||||
}
|
||||
#endif
|
||||
|
||||
if (layers_ctrl & 1) tilemap_draw(bitmap,cliprect, bg_tmap, TILEMAP_DRAW_OPAQUE, 0);
|
||||
if (layers_ctrl & 1) tilemap_draw(bitmap,cliprect, state->bg_tmap, TILEMAP_DRAW_OPAQUE, 0);
|
||||
else bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||
|
||||
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||
if (layers_ctrl & 2) tilemap_draw(bitmap,cliprect, fg_tmap, 0, 0);
|
||||
if (layers_ctrl & 2) tilemap_draw(bitmap,cliprect, state->fg_tmap, 0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -119,17 +146,10 @@ bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
typedef enum { STATE_IDLE = 0, STATE_ADDR_R, STATE_ROM_R, STATE_EEPROM_R, STATE_EEPROM_W } prot_state;
|
||||
static struct {
|
||||
prot_state state;
|
||||
int wait_param;
|
||||
int param;
|
||||
int cmd;
|
||||
int addr;
|
||||
} prot;
|
||||
|
||||
static MACHINE_RESET( quizpun2 )
|
||||
{
|
||||
quizpun2_state *state = machine->driver_data<quizpun2_state>();
|
||||
struct prot_t &prot = state->prot;
|
||||
prot.state = STATE_IDLE;
|
||||
prot.wait_param = 0;
|
||||
prot.param = 0;
|
||||
@ -139,6 +159,8 @@ static MACHINE_RESET( quizpun2 )
|
||||
|
||||
static void log_protection( address_space *space, const char *warning )
|
||||
{
|
||||
quizpun2_state *state = space->machine->driver_data<quizpun2_state>();
|
||||
struct prot_t &prot = state->prot;
|
||||
logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", cpu_get_pc(space->cpu), warning,
|
||||
prot.state,
|
||||
prot.wait_param,
|
||||
@ -150,6 +172,8 @@ static void log_protection( address_space *space, const char *warning )
|
||||
|
||||
static READ8_HANDLER( quizpun2_protection_r )
|
||||
{
|
||||
quizpun2_state *state = space->machine->driver_data<quizpun2_state>();
|
||||
struct prot_t &prot = state->prot;
|
||||
UINT8 ret;
|
||||
|
||||
switch ( prot.state )
|
||||
@ -204,6 +228,8 @@ static READ8_HANDLER( quizpun2_protection_r )
|
||||
|
||||
static WRITE8_HANDLER( quizpun2_protection_w )
|
||||
{
|
||||
quizpun2_state *state = space->machine->driver_data<quizpun2_state>();
|
||||
struct prot_t &prot = state->prot;
|
||||
switch ( prot.state )
|
||||
{
|
||||
case STATE_EEPROM_W:
|
||||
@ -294,8 +320,8 @@ static ADDRESS_MAP_START( quizpun2_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE( 0x0000, 0x7fff ) AM_ROM
|
||||
AM_RANGE( 0x8000, 0x9fff ) AM_ROMBANK("bank1")
|
||||
|
||||
AM_RANGE( 0xa000, 0xbfff ) AM_RAM_WRITE( fg_ram_w ) AM_BASE( &fg_ram ) // 4 * 800
|
||||
AM_RANGE( 0xc000, 0xc7ff ) AM_RAM_WRITE( bg_ram_w ) AM_BASE( &bg_ram ) // 4 * 400
|
||||
AM_RANGE( 0xa000, 0xbfff ) AM_RAM_WRITE( fg_ram_w ) AM_BASE_MEMBER(quizpun2_state, fg_ram ) // 4 * 800
|
||||
AM_RANGE( 0xc000, 0xc7ff ) AM_RAM_WRITE( bg_ram_w ) AM_BASE_MEMBER(quizpun2_state, bg_ram ) // 4 * 400
|
||||
AM_RANGE( 0xc800, 0xcfff ) AM_RAM //
|
||||
|
||||
AM_RANGE( 0xd000, 0xd3ff ) AM_RAM_WRITE( paletteram_xRRRRRGGGGGBBBBB_le_w ) AM_BASE_GENERIC( paletteram )
|
||||
@ -415,7 +441,7 @@ GFXDECODE_END
|
||||
Machine Drivers
|
||||
***************************************************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( quizpun2, driver_device )
|
||||
static MACHINE_CONFIG_START( quizpun2, quizpun2_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, XTAL_8MHz / 2) // 4 MHz?
|
||||
MCFG_CPU_PROGRAM_MAP(quizpun2_map)
|
||||
|
@ -345,55 +345,50 @@ Notes:
|
||||
#define VIDEO_CLOCK XTAL_32MHz
|
||||
|
||||
|
||||
UINT16* s24_mainram1;
|
||||
|
||||
|
||||
// Floppy Fisk Controller
|
||||
|
||||
static int fdc_status, fdc_track, fdc_sector, fdc_data;
|
||||
static int fdc_phys_track, fdc_irq, fdc_drq, fdc_span, fdc_index_count;
|
||||
static UINT8 *fdc_pt;
|
||||
static int track_size;
|
||||
|
||||
static void fdc_init(void)
|
||||
static void fdc_init(running_machine *machine)
|
||||
{
|
||||
fdc_status = 0;
|
||||
fdc_track = 0;
|
||||
fdc_sector = 0;
|
||||
fdc_data = 0;
|
||||
fdc_phys_track = 0;
|
||||
fdc_irq = 0;
|
||||
fdc_drq = 0;
|
||||
fdc_index_count = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
state->fdc_status = 0;
|
||||
state->fdc_track = 0;
|
||||
state->fdc_sector = 0;
|
||||
state->fdc_data = 0;
|
||||
state->fdc_phys_track = 0;
|
||||
state->fdc_irq = 0;
|
||||
state->fdc_drq = 0;
|
||||
state->fdc_index_count = 0;
|
||||
}
|
||||
|
||||
static READ16_HANDLER( fdc_r )
|
||||
{
|
||||
if(!track_size)
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(!state->track_size)
|
||||
return 0xffff;
|
||||
|
||||
switch(offset) {
|
||||
case 0:
|
||||
fdc_irq = 0;
|
||||
return fdc_status;
|
||||
state->fdc_irq = 0;
|
||||
return state->fdc_status;
|
||||
case 1:
|
||||
return fdc_track;
|
||||
return state->fdc_track;
|
||||
case 2:
|
||||
return fdc_sector;
|
||||
return state->fdc_sector;
|
||||
case 3:
|
||||
default: {
|
||||
int res = fdc_data;
|
||||
if(fdc_drq) {
|
||||
fdc_span--;
|
||||
// logerror("Read %02x (%d)\n", res, fdc_span);
|
||||
if(fdc_span) {
|
||||
fdc_pt++;
|
||||
fdc_data = *fdc_pt;
|
||||
int res = state->fdc_data;
|
||||
if(state->fdc_drq) {
|
||||
state->fdc_span--;
|
||||
// logerror("Read %02x (%d)\n", res, state->fdc_span);
|
||||
if(state->fdc_span) {
|
||||
state->fdc_pt++;
|
||||
state->fdc_data = *state->fdc_pt;
|
||||
} else {
|
||||
logerror("FDC: transfert complete\n");
|
||||
fdc_drq = 0;
|
||||
fdc_status = 0;
|
||||
fdc_irq = 1;
|
||||
state->fdc_drq = 0;
|
||||
state->fdc_status = 0;
|
||||
state->fdc_irq = 1;
|
||||
}
|
||||
} else
|
||||
logerror("FDC: data read with drq down\n");
|
||||
@ -404,54 +399,55 @@ static READ16_HANDLER( fdc_r )
|
||||
|
||||
static WRITE16_HANDLER( fdc_w )
|
||||
{
|
||||
if(!track_size)
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(!state->track_size)
|
||||
return;
|
||||
|
||||
if(ACCESSING_BITS_0_7) {
|
||||
data &= 0xff;
|
||||
switch(offset) {
|
||||
case 0:
|
||||
fdc_irq = 0;
|
||||
state->fdc_irq = 0;
|
||||
switch(data >> 4) {
|
||||
case 0x0:
|
||||
logerror("FDC: Restore\n");
|
||||
fdc_phys_track = fdc_track = 0;
|
||||
fdc_irq = 1;
|
||||
fdc_status = 4;
|
||||
state->fdc_phys_track = state->fdc_track = 0;
|
||||
state->fdc_irq = 1;
|
||||
state->fdc_status = 4;
|
||||
break;
|
||||
case 0x1:
|
||||
logerror("FDC: Seek %d\n", fdc_data);
|
||||
fdc_phys_track = fdc_track = fdc_data;
|
||||
fdc_irq = 1;
|
||||
fdc_status = fdc_track ? 0 : 4;
|
||||
logerror("FDC: Seek %d\n", state->fdc_data);
|
||||
state->fdc_phys_track = state->fdc_track = state->fdc_data;
|
||||
state->fdc_irq = 1;
|
||||
state->fdc_status = state->fdc_track ? 0 : 4;
|
||||
break;
|
||||
case 0x9:
|
||||
logerror("Read multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
|
||||
fdc_pt = space->machine->region("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
|
||||
fdc_span = track_size;
|
||||
fdc_status = 3;
|
||||
fdc_drq = 1;
|
||||
fdc_data = *fdc_pt;
|
||||
logerror("Read multiple [%02x] %d..%d side %d track %d\n", data, state->fdc_sector, state->fdc_sector+state->fdc_data-1, data & 8 ? 1 : 0, state->fdc_phys_track);
|
||||
state->fdc_pt = space->machine->region("floppy")->base() + state->track_size*(2*state->fdc_phys_track+(data & 8 ? 1 : 0));
|
||||
state->fdc_span = state->track_size;
|
||||
state->fdc_status = 3;
|
||||
state->fdc_drq = 1;
|
||||
state->fdc_data = *state->fdc_pt;
|
||||
break;
|
||||
case 0xb:
|
||||
logerror("Write multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
|
||||
fdc_pt = space->machine->region("floppy")->base() + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
|
||||
fdc_span = track_size;
|
||||
fdc_status = 3;
|
||||
fdc_drq = 1;
|
||||
logerror("Write multiple [%02x] %d..%d side %d track %d\n", data, state->fdc_sector, state->fdc_sector+state->fdc_data-1, data & 8 ? 1 : 0, state->fdc_phys_track);
|
||||
state->fdc_pt = space->machine->region("floppy")->base() + state->track_size*(2*state->fdc_phys_track+(data & 8 ? 1 : 0));
|
||||
state->fdc_span = state->track_size;
|
||||
state->fdc_status = 3;
|
||||
state->fdc_drq = 1;
|
||||
break;
|
||||
case 0xd:
|
||||
logerror("FDC: Forced interrupt\n");
|
||||
fdc_span = 0;
|
||||
fdc_drq = 0;
|
||||
fdc_irq = data & 1;
|
||||
fdc_status = 0;
|
||||
state->fdc_span = 0;
|
||||
state->fdc_drq = 0;
|
||||
state->fdc_irq = data & 1;
|
||||
state->fdc_status = 0;
|
||||
break;
|
||||
case 0xf:
|
||||
if(data == 0xfe)
|
||||
logerror("FDC: Assign mode %02x\n", fdc_data);
|
||||
logerror("FDC: Assign mode %02x\n", state->fdc_data);
|
||||
else if(data == 0xfd)
|
||||
logerror("FDC: Assign parameter %02x\n", fdc_data);
|
||||
logerror("FDC: Assign parameter %02x\n", state->fdc_data);
|
||||
else
|
||||
logerror("FDC: Unknown command %02x\n", data);
|
||||
break;
|
||||
@ -462,26 +458,26 @@ static WRITE16_HANDLER( fdc_w )
|
||||
break;
|
||||
case 1:
|
||||
logerror("FDC: Track register %02x\n", data);
|
||||
fdc_track = data;
|
||||
state->fdc_track = data;
|
||||
break;
|
||||
case 2:
|
||||
logerror("FDC: Sector register %02x\n", data);
|
||||
fdc_sector = data;
|
||||
state->fdc_sector = data;
|
||||
break;
|
||||
case 3:
|
||||
if(fdc_drq) {
|
||||
// logerror("Write %02x (%d)\n", data, fdc_span);
|
||||
*fdc_pt++ = data;
|
||||
fdc_span--;
|
||||
if(!fdc_span) {
|
||||
if(state->fdc_drq) {
|
||||
// logerror("Write %02x (%d)\n", data, state->fdc_span);
|
||||
*state->fdc_pt++ = data;
|
||||
state->fdc_span--;
|
||||
if(!state->fdc_span) {
|
||||
logerror("FDC: transfert complete\n");
|
||||
fdc_drq = 0;
|
||||
fdc_status = 0;
|
||||
fdc_irq = 1;
|
||||
state->fdc_drq = 0;
|
||||
state->fdc_status = 0;
|
||||
state->fdc_irq = 1;
|
||||
}
|
||||
} else
|
||||
logerror("FDC: Data register %02x\n", data);
|
||||
fdc_data = data;
|
||||
state->fdc_data = data;
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -489,10 +485,11 @@ static WRITE16_HANDLER( fdc_w )
|
||||
|
||||
static READ16_HANDLER( fdc_status_r )
|
||||
{
|
||||
if(!track_size)
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(!state->track_size)
|
||||
return 0xffff;
|
||||
|
||||
return 0x90 | (fdc_irq ? 2 : 0) | (fdc_drq ? 1 : 0) | (fdc_phys_track ? 0x40 : 0) | (fdc_index_count ? 0x20 : 0);
|
||||
return 0x90 | (state->fdc_irq ? 2 : 0) | (state->fdc_drq ? 1 : 0) | (state->fdc_phys_track ? 0x40 : 0) | (state->fdc_index_count ? 0x20 : 0);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( fdc_ctrl_w )
|
||||
@ -555,20 +552,20 @@ static UINT8 dcclub_io_r(running_machine *machine, int port)
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
static int cur_input_line;
|
||||
|
||||
static UINT8 mahmajn_io_r(running_machine *machine, int port)
|
||||
{
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
static const char *const keynames[] = { "MJ0", "MJ1", "MJ2", "MJ3", "MJ4", "MJ5", "P1", "P2" };
|
||||
|
||||
switch(port)
|
||||
{
|
||||
case 0:
|
||||
return ~(1 << cur_input_line);
|
||||
return ~(1 << state->cur_input_line);
|
||||
case 1:
|
||||
return 0xff;
|
||||
case 2:
|
||||
return input_port_read(machine, keynames[cur_input_line]);
|
||||
return input_port_read(machine, keynames[state->cur_input_line]);
|
||||
case 3:
|
||||
return 0xff;
|
||||
case 4:
|
||||
@ -585,11 +582,12 @@ static UINT8 mahmajn_io_r(running_machine *machine, int port)
|
||||
|
||||
static void mahmajn_io_w(running_machine *machine, int port, UINT8 data)
|
||||
{
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
switch(port)
|
||||
{
|
||||
case 3:
|
||||
if(data & 4)
|
||||
cur_input_line = (cur_input_line + 1) & 7;
|
||||
state->cur_input_line = (state->cur_input_line + 1) & 7;
|
||||
break;
|
||||
case 7: // DAC
|
||||
dac_signed_data_w(machine->device("dac"), data);
|
||||
@ -613,21 +611,22 @@ static void hotrod_io_w(running_machine *machine, int port, UINT8 data)
|
||||
}
|
||||
}
|
||||
|
||||
static UINT8 hotrod_ctrl_cur;
|
||||
|
||||
static WRITE16_HANDLER( hotrod3_ctrl_w )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
static const char *const portnames[] = { "PEDAL1", "PEDAL2", "PEDAL3", "PEDAL4" };
|
||||
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
data &= 3;
|
||||
hotrod_ctrl_cur = input_port_read_safe(space->machine, portnames[data], 0);
|
||||
state->hotrod_ctrl_cur = input_port_read_safe(space->machine, portnames[data], 0);
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER( hotrod3_ctrl_r )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
switch(offset)
|
||||
@ -653,8 +652,8 @@ static READ16_HANDLER( hotrod3_ctrl_r )
|
||||
case 8:
|
||||
{
|
||||
// Serial ADCs for the accel
|
||||
int v = hotrod_ctrl_cur & 0x80;
|
||||
hotrod_ctrl_cur <<= 1;
|
||||
int v = state->hotrod_ctrl_cur & 0x80;
|
||||
state->hotrod_ctrl_cur <<= 1;
|
||||
return v ? 0xff : 0;
|
||||
}
|
||||
}
|
||||
@ -676,13 +675,13 @@ static WRITE16_HANDLER( iod_w )
|
||||
|
||||
// Cpu #1 reset control
|
||||
|
||||
static UINT8 resetcontrol, prev_resetcontrol;
|
||||
|
||||
static void reset_reset(running_machine *machine)
|
||||
{
|
||||
int changed = resetcontrol ^ prev_resetcontrol;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
int changed = state->resetcontrol ^ state->prev_resetcontrol;
|
||||
if(changed & 2) {
|
||||
if(resetcontrol & 2) {
|
||||
if(state->resetcontrol & 2) {
|
||||
cputag_set_input_line(machine, "sub", INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
|
||||
// mame_printf_debug("enable 2nd cpu!\n");
|
||||
@ -694,39 +693,42 @@ static void reset_reset(running_machine *machine)
|
||||
}
|
||||
if(changed & 4)
|
||||
devtag_reset(machine, "ymsnd");
|
||||
prev_resetcontrol = resetcontrol;
|
||||
state->prev_resetcontrol = state->resetcontrol;
|
||||
}
|
||||
|
||||
static void resetcontrol_w(address_space *space, UINT8 data)
|
||||
{
|
||||
resetcontrol = data;
|
||||
logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
state->resetcontrol = data;
|
||||
logerror("Reset control %02x ('%s':%x)\n", state->resetcontrol, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
reset_reset(space->machine);
|
||||
}
|
||||
|
||||
|
||||
// Rom board bank access
|
||||
|
||||
static UINT8 curbank;
|
||||
|
||||
static void reset_bank(running_machine *machine)
|
||||
{
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
if (machine->region("romboard")->base())
|
||||
{
|
||||
memory_set_bank(machine, "bank1", curbank & 15);
|
||||
memory_set_bank(machine, "bank2", curbank & 15);
|
||||
memory_set_bank(machine, "bank1", state->curbank & 15);
|
||||
memory_set_bank(machine, "bank2", state->curbank & 15);
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER( curbank_r )
|
||||
{
|
||||
return curbank;
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
return state->curbank;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( curbank_w )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(ACCESSING_BITS_0_7) {
|
||||
curbank = data & 0xff;
|
||||
state->curbank = data & 0xff;
|
||||
reset_bank(space->machine);
|
||||
}
|
||||
}
|
||||
@ -743,20 +745,20 @@ static const UINT8 qrouka_mlt[8] = { 1, 6, 4, 7, 0, 5, 3, 2 };
|
||||
static const UINT8 quizmeku_mlt[8] = { 0, 3, 2, 4, 6, 1, 7, 5 };
|
||||
static const UINT8 dcclub_mlt[8] = { 4, 7, 3, 0, 2, 6, 5, 1 };
|
||||
|
||||
static UINT8 mlatch;
|
||||
static const UINT8 *mlatch_table;
|
||||
|
||||
static READ16_HANDLER( mlatch_r )
|
||||
{
|
||||
return mlatch;
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
return state->mlatch;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( mlatch_w )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(ACCESSING_BITS_0_7) {
|
||||
int i;
|
||||
UINT8 mxor = 0;
|
||||
if(!mlatch_table) {
|
||||
if(!state->mlatch_table) {
|
||||
logerror("Protection: magic latch accessed but no table loaded (%s:%x)\n", space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
return;
|
||||
}
|
||||
@ -765,13 +767,13 @@ static WRITE16_HANDLER( mlatch_w )
|
||||
|
||||
if(data != 0xff) {
|
||||
for(i=0; i<8; i++)
|
||||
if(mlatch & (1<<i))
|
||||
mxor |= 1 << mlatch_table[i];
|
||||
mlatch = data ^ mxor;
|
||||
logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, mlatch, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
if(state->mlatch & (1<<i))
|
||||
mxor |= 1 << state->mlatch_table[i];
|
||||
state->mlatch = data ^ mxor;
|
||||
logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, state->mlatch, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
} else {
|
||||
logerror("Magic latch reset (%s:%x)\n", space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
mlatch = 0x00;
|
||||
state->mlatch = 0x00;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -786,24 +788,21 @@ enum {
|
||||
IRQ_SPRITE = 4
|
||||
};
|
||||
|
||||
static UINT16 irq_timera;
|
||||
static UINT8 irq_timerb;
|
||||
static UINT8 irq_allow0, irq_allow1;
|
||||
static int irq_timer_pend0, irq_timer_pend1, irq_yms, irq_vblank, irq_sprite;
|
||||
static timer_device *irq_timer, *irq_timer_clear;
|
||||
|
||||
static TIMER_DEVICE_CALLBACK( irq_timer_cb )
|
||||
{
|
||||
irq_timer_pend0 = irq_timer_pend1 = 1;
|
||||
if(irq_allow0 & (1 << IRQ_TIMER))
|
||||
segas24_state *state = timer.machine->driver_data<segas24_state>();
|
||||
state->irq_timer_pend0 = state->irq_timer_pend1 = 1;
|
||||
if(state->irq_allow0 & (1 << IRQ_TIMER))
|
||||
cputag_set_input_line(timer.machine, "maincpu", IRQ_TIMER+1, ASSERT_LINE);
|
||||
if(irq_allow1 & (1 << IRQ_TIMER))
|
||||
if(state->irq_allow1 & (1 << IRQ_TIMER))
|
||||
cputag_set_input_line(timer.machine, "sub", IRQ_TIMER+1, ASSERT_LINE);
|
||||
}
|
||||
|
||||
static TIMER_DEVICE_CALLBACK( irq_timer_clear_cb )
|
||||
{
|
||||
irq_sprite = irq_vblank = 0;
|
||||
segas24_state *state = timer.machine->driver_data<segas24_state>();
|
||||
state->irq_sprite = state->irq_vblank = 0;
|
||||
cputag_set_input_line(timer.machine, "maincpu", IRQ_VBLANK+1, CLEAR_LINE);
|
||||
cputag_set_input_line(timer.machine, "maincpu", IRQ_SPRITE+1, CLEAR_LINE);
|
||||
cputag_set_input_line(timer.machine, "sub", IRQ_VBLANK+1, CLEAR_LINE);
|
||||
@ -812,92 +811,95 @@ static TIMER_DEVICE_CALLBACK( irq_timer_clear_cb )
|
||||
|
||||
static void irq_init(running_machine *machine)
|
||||
{
|
||||
irq_timera = 0;
|
||||
irq_timerb = 0;
|
||||
irq_allow0 = 0;
|
||||
irq_allow1 = 0;
|
||||
irq_timer_pend0 = 0;
|
||||
irq_timer_pend1 = 0;
|
||||
irq_vblank = 0;
|
||||
irq_sprite = 0;
|
||||
irq_timer = machine->device<timer_device>("irq_timer");
|
||||
irq_timer_clear = machine->device<timer_device>("irq_timer_clear");
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
state->irq_timera = 0;
|
||||
state->irq_timerb = 0;
|
||||
state->irq_allow0 = 0;
|
||||
state->irq_allow1 = 0;
|
||||
state->irq_timer_pend0 = 0;
|
||||
state->irq_timer_pend1 = 0;
|
||||
state->irq_vblank = 0;
|
||||
state->irq_sprite = 0;
|
||||
state->irq_timer = machine->device<timer_device>("irq_timer");
|
||||
state->irq_timer_clear = machine->device<timer_device>("irq_timer_clear");
|
||||
}
|
||||
|
||||
static void irq_timer_reset(void)
|
||||
static void irq_timer_reset(running_machine *machine)
|
||||
{
|
||||
int freq = (irq_timerb << 12) | irq_timera;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
int freq = (state->irq_timerb << 12) | state->irq_timera;
|
||||
freq &= 0x1fff;
|
||||
|
||||
irq_timer->adjust(attotime::from_hz(freq), 0, attotime::from_hz(freq));
|
||||
logerror("New timer frequency: %0d [%02x %04x]\n", freq, irq_timerb, irq_timera);
|
||||
state->irq_timer->adjust(attotime::from_hz(freq), 0, attotime::from_hz(freq));
|
||||
logerror("New timer frequency: %0d [%02x %04x]\n", freq, state->irq_timerb, state->irq_timera);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER(irq_w)
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
switch(offset) {
|
||||
case 0: {
|
||||
UINT16 old_ta = irq_timera;
|
||||
COMBINE_DATA(&irq_timera);
|
||||
if(old_ta != irq_timera)
|
||||
irq_timer_reset();
|
||||
UINT16 old_ta = state->irq_timera;
|
||||
COMBINE_DATA(&state->irq_timera);
|
||||
if(old_ta != state->irq_timera)
|
||||
irq_timer_reset(space->machine);
|
||||
break;
|
||||
}
|
||||
case 1:
|
||||
if(ACCESSING_BITS_0_7) {
|
||||
UINT8 old_tb = irq_timerb;
|
||||
irq_timerb = data;
|
||||
if(old_tb != irq_timerb)
|
||||
irq_timer_reset();
|
||||
UINT8 old_tb = state->irq_timerb;
|
||||
state->irq_timerb = data;
|
||||
if(old_tb != state->irq_timerb)
|
||||
irq_timer_reset(space->machine);
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
irq_allow0 = data;
|
||||
irq_timer_pend0 = 0;
|
||||
state->irq_allow0 = data;
|
||||
state->irq_timer_pend0 = 0;
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_TIMER+1, CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_VBLANK+1, irq_vblank && (irq_allow0 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_SPRITE+1, irq_sprite && (irq_allow0 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_YM2151+1, state->irq_yms && (state->irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_VBLANK+1, state->irq_vblank && (state->irq_allow0 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_SPRITE+1, state->irq_sprite && (state->irq_allow0 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
break;
|
||||
case 3:
|
||||
irq_allow1 = data;
|
||||
irq_timer_pend1 = 0;
|
||||
state->irq_allow1 = data;
|
||||
state->irq_timer_pend1 = 0;
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_TIMER+1, CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_VBLANK+1, irq_vblank && (irq_allow1 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_SPRITE+1, irq_sprite && (irq_allow1 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_YM2151+1, state->irq_yms && (state->irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_VBLANK+1, state->irq_vblank && (state->irq_allow1 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_SPRITE+1, state->irq_sprite && (state->irq_allow1 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER(irq_r)
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
switch(offset) {
|
||||
case 0: {
|
||||
int pc = cpu_get_pc(space->cpu);
|
||||
static int turns;
|
||||
if(pc == 0x84a4 || pc == 0x84a6)
|
||||
return 0;
|
||||
if(pc == 0x84aa || pc == 0x84ac) {
|
||||
// limit = 0x1b5f
|
||||
turns = 0x0100;
|
||||
state->turns = 0x0100;
|
||||
return 1;
|
||||
}
|
||||
if(pc == 0x84ba || pc == 0x84bc) {
|
||||
// 26 cycles/read
|
||||
turns--;
|
||||
return turns ? 1 : 0x200;
|
||||
state->turns--;
|
||||
return state->turns ? 1 : 0x200;
|
||||
}
|
||||
// 84c8
|
||||
// -> 85ac / 85bc?
|
||||
break;
|
||||
}
|
||||
case 2:
|
||||
irq_timer_pend0 = 0;
|
||||
state->irq_timer_pend0 = 0;
|
||||
cputag_set_input_line(space->machine, "maincpu", IRQ_TIMER+1, CLEAR_LINE);
|
||||
break;
|
||||
case 3:
|
||||
irq_timer_pend1 = 0;
|
||||
state->irq_timer_pend1 = 0;
|
||||
cputag_set_input_line(space->machine, "sub", IRQ_TIMER+1, CLEAR_LINE);
|
||||
break;
|
||||
}
|
||||
@ -906,41 +908,43 @@ static READ16_HANDLER(irq_r)
|
||||
|
||||
static INTERRUPT_GEN(irq_vbl)
|
||||
{
|
||||
segas24_state *state = device->machine->driver_data<segas24_state>();
|
||||
int irq, mask;
|
||||
|
||||
if(cpu_getiloops(device)) {
|
||||
irq = IRQ_SPRITE;
|
||||
irq_sprite = 1;
|
||||
state->irq_sprite = 1;
|
||||
} else {
|
||||
irq = IRQ_VBLANK;
|
||||
irq_vblank = 1;
|
||||
state->irq_vblank = 1;
|
||||
}
|
||||
|
||||
irq_timer_clear->adjust(attotime::from_hz(VIDEO_CLOCK/2/656.0));
|
||||
state->irq_timer_clear->adjust(attotime::from_hz(VIDEO_CLOCK/2/656.0));
|
||||
|
||||
mask = 1 << irq;
|
||||
|
||||
if(irq_allow0 & mask)
|
||||
if(state->irq_allow0 & mask)
|
||||
cputag_set_input_line(device->machine, "maincpu", 1+irq, ASSERT_LINE);
|
||||
|
||||
if(irq_allow1 & mask)
|
||||
if(state->irq_allow1 & mask)
|
||||
cputag_set_input_line(device->machine, "sub", 1+irq, ASSERT_LINE);
|
||||
|
||||
if(!cpu_getiloops(device)) {
|
||||
// Ensure one index pulse every 20 frames
|
||||
// The is some code in bnzabros at 0x852 that makes it crash
|
||||
// if the pulse train is too fast
|
||||
fdc_index_count++;
|
||||
if(fdc_index_count >= 20)
|
||||
fdc_index_count = 0;
|
||||
state->fdc_index_count++;
|
||||
if(state->fdc_index_count >= 20)
|
||||
state->fdc_index_count = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void irq_ym(device_t *device, int irq)
|
||||
{
|
||||
irq_yms = irq;
|
||||
cputag_set_input_line(device->machine, "maincpu", IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(device->machine, "sub", IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
segas24_state *state = device->machine->driver_data<segas24_state>();
|
||||
state->irq_yms = irq;
|
||||
cputag_set_input_line(device->machine, "maincpu", IRQ_YM2151+1, state->irq_yms && (state->irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(device->machine, "sub", IRQ_YM2151+1, state->irq_yms && (state->irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -1031,7 +1035,7 @@ ADDRESS_MAP_END
|
||||
*************************************/
|
||||
|
||||
static ADDRESS_MAP_START( system24_cpu2_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_MIRROR(0x040000) AM_RAM AM_SHARE("share2") AM_BASE(&s24_mainram1)
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_MIRROR(0x040000) AM_RAM AM_SHARE("share2")
|
||||
AM_RANGE(0x080000, 0x0bffff) AM_MIRROR(0x040000) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x100000, 0x13ffff) AM_MIRROR(0x0c0000) AM_ROM AM_REGION("maincpu", 0)
|
||||
AM_RANGE(0x200000, 0x20ffff) AM_MIRROR(0x110000) AM_READWRITE(sys24_tile_r, sys24_tile_w)
|
||||
@ -1069,8 +1073,9 @@ ADDRESS_MAP_END
|
||||
|
||||
static MACHINE_START( system24 )
|
||||
{
|
||||
if (track_size)
|
||||
machine->device<nvram_device>("floppy_nvram")->set_base(machine->region("floppy")->base(), 2*track_size);
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
if (state->track_size)
|
||||
machine->device<nvram_device>("floppy_nvram")->set_base(machine->region("floppy")->base(), 2*state->track_size);
|
||||
|
||||
UINT8 *usr1 = machine->region("romboard")->base();
|
||||
if (usr1)
|
||||
@ -1082,13 +1087,14 @@ static MACHINE_START( system24 )
|
||||
|
||||
static MACHINE_RESET( system24 )
|
||||
{
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
cputag_set_input_line(machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
|
||||
prev_resetcontrol = resetcontrol = 0x06;
|
||||
fdc_init();
|
||||
curbank = 0;
|
||||
state->prev_resetcontrol = state->resetcontrol = 0x06;
|
||||
fdc_init(machine);
|
||||
state->curbank = 0;
|
||||
reset_bank(machine);
|
||||
irq_init(machine);
|
||||
mlatch = 0x00;
|
||||
state->mlatch = 0x00;
|
||||
}
|
||||
|
||||
/*************************************
|
||||
@ -1766,7 +1772,7 @@ static const ym2151_interface ym2151_config =
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( system24, driver_device )
|
||||
static MACHINE_CONFIG_START( system24, segas24_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, MASTER_CLOCK/2)
|
||||
MCFG_CPU_PROGRAM_MAP(system24_cpu1_map)
|
||||
@ -2155,52 +2161,59 @@ ROM_END
|
||||
|
||||
static DRIVER_INIT( qgh )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = qgh_mlt;
|
||||
track_size = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = qgh_mlt;
|
||||
state->track_size = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( dcclub )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(dcclub_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = dcclub_mlt;
|
||||
track_size = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, dcclub_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = dcclub_mlt;
|
||||
state->track_size = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( qrouka )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = qrouka_mlt;
|
||||
track_size = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = qrouka_mlt;
|
||||
state->track_size = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( quizmeku )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = quizmeku_mlt;
|
||||
track_size = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = quizmeku_mlt;
|
||||
state->track_size = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( mahmajn )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = mahmajn_mlt;
|
||||
track_size = 0;
|
||||
cur_input_line = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = mahmajn_mlt;
|
||||
state->track_size = 0;
|
||||
state->cur_input_line = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( mahmajn2 )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = mahmajn2_mlt;
|
||||
track_size = 0;
|
||||
cur_input_line = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = mahmajn2_mlt;
|
||||
state->track_size = 0;
|
||||
state->cur_input_line = 0;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( hotrod )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
|
||||
// Sector Size
|
||||
// 1 8192
|
||||
@ -2210,13 +2223,14 @@ static DRIVER_INIT( hotrod )
|
||||
// 5 512
|
||||
// 6 256
|
||||
|
||||
track_size = 0x2f00;
|
||||
state->track_size = 0x2f00;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( bnzabros )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = bnzabros_mlt;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = bnzabros_mlt;
|
||||
|
||||
// Sector Size
|
||||
// 1 2048
|
||||
@ -2227,71 +2241,79 @@ static DRIVER_INIT( bnzabros )
|
||||
// 6 1024
|
||||
// 7 256
|
||||
|
||||
track_size = 0x2d00;
|
||||
state->track_size = 0x2d00;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( sspirits )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( sspiritj )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2f00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2f00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( dcclubfd )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(dcclub_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = dcclub_mlt;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, dcclub_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = dcclub_mlt;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( sgmast )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( qsww )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( gground )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( crkdown )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
static DRIVER_INIT( roughrac )
|
||||
{
|
||||
system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
mlatch_table = 0;
|
||||
track_size = 0x2d00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
system24temp_sys16_io_set_callbacks(machine, hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
|
||||
state->mlatch_table = 0;
|
||||
state->track_size = 0x2d00;
|
||||
s24_fd1094_driver_init(machine);
|
||||
}
|
||||
|
||||
|
@ -303,7 +303,7 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_program_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&twincobr_sharedram)
|
||||
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE_MEMBER(twincobr_state, sharedram)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
|
||||
@ -556,7 +556,7 @@ static const ym3812_interface ym3812_config =
|
||||
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( twincobr, driver_device )
|
||||
static MACHINE_CONFIG_START( twincobr, twincobr_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, XTAL_28MHz/4) /* 7MHz - Main board Crystal is 28MHz */
|
||||
|
@ -127,16 +127,16 @@ out:
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "cpu/tms32010/tms32010.h"
|
||||
#include "sound/3812intf.h"
|
||||
#include "includes/toaplipt.h"
|
||||
#include "includes/twincobr.h"
|
||||
#include "sound/3812intf.h"
|
||||
|
||||
|
||||
class wardner_state : public driver_device
|
||||
class wardner_state : public twincobr_state
|
||||
{
|
||||
public:
|
||||
wardner_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
: twincobr_state(machine, config) { }
|
||||
|
||||
UINT8 *rambase_ae00;
|
||||
UINT8 *rambase_c000;
|
||||
@ -146,14 +146,14 @@ public:
|
||||
static WRITE8_HANDLER( wardner_ramrom_bank_sw )
|
||||
{
|
||||
wardner_state *state = space->machine->driver_data<wardner_state>();
|
||||
if (wardner_membank != data) {
|
||||
if (state->wardner_membank != data) {
|
||||
int bankaddress = 0;
|
||||
|
||||
address_space *mainspace;
|
||||
UINT8 *RAM = space->machine->region("maincpu")->base();
|
||||
|
||||
mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
wardner_membank = data;
|
||||
state->wardner_membank = data;
|
||||
|
||||
if (data)
|
||||
{
|
||||
@ -187,10 +187,11 @@ static WRITE8_HANDLER( wardner_ramrom_bank_sw )
|
||||
|
||||
STATE_POSTLOAD( wardner_restore_bank )
|
||||
{
|
||||
wardner_state *state = machine->driver_data<wardner_state>();
|
||||
address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
|
||||
wardner_ramrom_bank_sw(space,0,1); /* Dummy value to ensure restoration */
|
||||
wardner_ramrom_bank_sw(space,0,wardner_membank);
|
||||
wardner_ramrom_bank_sw(space,0,state->wardner_membank);
|
||||
}
|
||||
|
||||
|
||||
|
@ -138,11 +138,9 @@ TODO:
|
||||
#define MASTER_CLOCK XTAL_18_432MHz
|
||||
|
||||
|
||||
|
||||
static int handle_joystick;
|
||||
|
||||
static READ8_HANDLER( geebee_in_r )
|
||||
{
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
int res;
|
||||
static const char *const portnames[] = { "SW0", "SW1", "DSW2", "PLACEHOLDER" }; // "IN1" & "IN2" are read separately when offset==3
|
||||
|
||||
@ -151,7 +149,7 @@ static READ8_HANDLER( geebee_in_r )
|
||||
if (offset == 3)
|
||||
{
|
||||
res = input_port_read(space->machine, (flip_screen_get(space->machine) & 1) ? "IN2" : "IN1"); // read player 2 input in cocktail mode
|
||||
if (handle_joystick)
|
||||
if (state->handle_joystick)
|
||||
{
|
||||
/* map digital two-way joystick to two fixed VOLIN values */
|
||||
if (res & 2) return 0x9f;
|
||||
@ -164,13 +162,14 @@ static READ8_HANDLER( geebee_in_r )
|
||||
|
||||
static WRITE8_HANDLER( geebee_out6_w )
|
||||
{
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
switch (offset & 3)
|
||||
{
|
||||
case 0:
|
||||
warpwarp_ball_h = data;
|
||||
state->ball_h = data;
|
||||
break;
|
||||
case 1:
|
||||
warpwarp_ball_v = data;
|
||||
state->ball_v = data;
|
||||
break;
|
||||
case 2:
|
||||
/* n.c. */
|
||||
@ -183,6 +182,7 @@ static WRITE8_HANDLER( geebee_out6_w )
|
||||
|
||||
static WRITE8_HANDLER( geebee_out7_w )
|
||||
{
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
switch (offset & 7)
|
||||
{
|
||||
case 0:
|
||||
@ -202,12 +202,12 @@ static WRITE8_HANDLER( geebee_out7_w )
|
||||
coin_lockout_global_w(space->machine, ~data & 1);
|
||||
break;
|
||||
case 5:
|
||||
if( geebee_bgw != (data & 1) )
|
||||
if( state->geebee_bgw != (data & 1) )
|
||||
tilemap_mark_all_tiles_dirty_all(space->machine);
|
||||
geebee_bgw = data & 1;
|
||||
state->geebee_bgw = data & 1;
|
||||
break;
|
||||
case 6:
|
||||
warpwarp_ball_on = data & 1;
|
||||
state->ball_on = data & 1;
|
||||
break;
|
||||
case 7:
|
||||
flip_screen_set(space->machine, data & 1);
|
||||
@ -231,10 +231,11 @@ static READ8_DEVICE_HANDLER( warpwarp_dsw1_r )
|
||||
/* Read mux Controller Inputs */
|
||||
static READ8_DEVICE_HANDLER( warpwarp_vol_r )
|
||||
{
|
||||
warpwarp_state *state = device->machine->driver_data<warpwarp_state>();
|
||||
int res;
|
||||
|
||||
res = input_port_read(device->machine, (flip_screen_get(device->machine) & 1) ? "VOLIN2" : "VOLIN1");
|
||||
if (handle_joystick)
|
||||
if (state->handle_joystick)
|
||||
{
|
||||
if (res & 1) return 0x0f;
|
||||
if (res & 2) return 0x3f;
|
||||
@ -247,13 +248,14 @@ static READ8_DEVICE_HANDLER( warpwarp_vol_r )
|
||||
|
||||
static WRITE8_HANDLER( warpwarp_out0_w )
|
||||
{
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
switch (offset & 3)
|
||||
{
|
||||
case 0:
|
||||
warpwarp_ball_h = data;
|
||||
state->ball_h = data;
|
||||
break;
|
||||
case 1:
|
||||
warpwarp_ball_v = data;
|
||||
state->ball_v = data;
|
||||
break;
|
||||
case 2:
|
||||
warpwarp_sound_w(space->machine->device("warpwarp"),0,data);
|
||||
@ -266,6 +268,7 @@ static WRITE8_HANDLER( warpwarp_out0_w )
|
||||
|
||||
static WRITE8_HANDLER( warpwarp_out3_w )
|
||||
{
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
switch (offset & 7)
|
||||
{
|
||||
case 0:
|
||||
@ -287,7 +290,7 @@ static WRITE8_HANDLER( warpwarp_out3_w )
|
||||
coin_counter_w(space->machine, 0,data & 1);
|
||||
break;
|
||||
case 6:
|
||||
warpwarp_ball_on = data & 1;
|
||||
state->ball_on = data & 1;
|
||||
cpu_interrupt_enable(space->machine->device("maincpu"), data & 1);
|
||||
if (~data & 1)
|
||||
cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
|
||||
@ -302,7 +305,7 @@ static WRITE8_HANDLER( warpwarp_out3_w )
|
||||
|
||||
static ADDRESS_MAP_START( geebee_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x1fff) AM_ROM
|
||||
AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x400) AM_RAM_WRITE(geebee_videoram_w) AM_BASE(&geebee_videoram) // mirror used by kaitei due to a bug
|
||||
AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x400) AM_RAM_WRITE(geebee_videoram_w) AM_BASE_MEMBER(warpwarp_state, geebee_videoram) // mirror used by kaitei due to a bug
|
||||
AM_RANGE(0x3000, 0x37ff) AM_ROM AM_REGION("gfx1", 0) // 3000-33ff in geebee
|
||||
AM_RANGE(0x4000, 0x40ff) AM_RAM
|
||||
AM_RANGE(0x5000, 0x53ff) AM_READ(geebee_in_r)
|
||||
@ -320,7 +323,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( bombbee_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x1fff) AM_ROM
|
||||
AM_RANGE(0x2000, 0x23ff) AM_RAM
|
||||
AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(warpwarp_videoram_w) AM_BASE(&warpwarp_videoram)
|
||||
AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(warpwarp_videoram_w) AM_BASE_MEMBER(warpwarp_state, videoram)
|
||||
AM_RANGE(0x4800, 0x4fff) AM_ROM AM_REGION("gfx1", 0)
|
||||
AM_RANGE(0x6000, 0x600f) AM_READWRITE(warpwarp_sw_r, warpwarp_out0_w)
|
||||
AM_RANGE(0x6010, 0x601f) AM_DEVREADWRITE("warpwarp", warpwarp_vol_r, warpwarp_music1_w)
|
||||
@ -331,7 +334,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( warpwarp_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x83ff) AM_RAM
|
||||
AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(warpwarp_videoram_w) AM_BASE(&warpwarp_videoram)
|
||||
AM_RANGE(0x4000, 0x47ff) AM_RAM_WRITE(warpwarp_videoram_w) AM_BASE_MEMBER(warpwarp_state, videoram)
|
||||
AM_RANGE(0x4800, 0x4fff) AM_ROM AM_REGION("gfx1", 0)
|
||||
AM_RANGE(0xc000, 0xc00f) AM_READWRITE(warpwarp_sw_r, warpwarp_out0_w)
|
||||
AM_RANGE(0xc010, 0xc01f) AM_DEVREADWRITE("warpwarp", warpwarp_vol_r, warpwarp_music1_w)
|
||||
@ -718,7 +721,7 @@ GFXDECODE_END
|
||||
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( geebee, driver_device )
|
||||
static MACHINE_CONFIG_START( geebee, warpwarp_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I8080, MASTER_CLOCK/9) /* verified on pcb */
|
||||
@ -755,7 +758,7 @@ static MACHINE_CONFIG_DERIVED( navarone, geebee )
|
||||
MCFG_VIDEO_START(navarone)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( bombbee, driver_device )
|
||||
static MACHINE_CONFIG_START( bombbee, warpwarp_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", I8080, MASTER_CLOCK/9) /* 18.432 MHz / 9 */
|
||||
@ -918,65 +921,72 @@ ROM_END
|
||||
|
||||
static DRIVER_INIT( geebee )
|
||||
{
|
||||
handle_joystick = 0;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 0;
|
||||
|
||||
warpwarp_ball_pen = 1;
|
||||
warpwarp_ball_sizex = 4;
|
||||
warpwarp_ball_sizey = 4;
|
||||
state->ball_pen = 1;
|
||||
state->ball_sizex = 4;
|
||||
state->ball_sizey = 4;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( navarone )
|
||||
{
|
||||
handle_joystick = 1;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 1;
|
||||
|
||||
warpwarp_ball_pen = 1;
|
||||
warpwarp_ball_sizex = 4;
|
||||
warpwarp_ball_sizey = 4;
|
||||
state->ball_pen = 1;
|
||||
state->ball_sizex = 4;
|
||||
state->ball_sizey = 4;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( kaitein )
|
||||
{
|
||||
handle_joystick = 1;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 1;
|
||||
|
||||
warpwarp_ball_pen = 1;
|
||||
warpwarp_ball_sizex = 1;
|
||||
warpwarp_ball_sizey = 16;
|
||||
state->ball_pen = 1;
|
||||
state->ball_sizex = 1;
|
||||
state->ball_sizey = 16;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( kaitei )
|
||||
{
|
||||
handle_joystick = 0;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 0;
|
||||
|
||||
warpwarp_ball_pen = 1;
|
||||
warpwarp_ball_sizex = 1;
|
||||
warpwarp_ball_sizey = 16;
|
||||
state->ball_pen = 1;
|
||||
state->ball_sizex = 1;
|
||||
state->ball_sizey = 16;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( sos )
|
||||
{
|
||||
handle_joystick = 1;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 1;
|
||||
|
||||
warpwarp_ball_pen = 0;
|
||||
warpwarp_ball_sizex = 4;
|
||||
warpwarp_ball_sizey = 2;
|
||||
state->ball_pen = 0;
|
||||
state->ball_sizex = 4;
|
||||
state->ball_sizey = 2;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( bombbee )
|
||||
{
|
||||
handle_joystick = 0;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 0;
|
||||
|
||||
warpwarp_ball_pen = 0x200;
|
||||
warpwarp_ball_sizex = 4;
|
||||
warpwarp_ball_sizey = 4;
|
||||
state->ball_pen = 0x200;
|
||||
state->ball_sizex = 4;
|
||||
state->ball_sizey = 4;
|
||||
}
|
||||
|
||||
static DRIVER_INIT( warpwarp )
|
||||
{
|
||||
handle_joystick = 1;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->handle_joystick = 1;
|
||||
|
||||
warpwarp_ball_pen = 0x200;
|
||||
warpwarp_ball_sizex = 4;
|
||||
warpwarp_ball_sizey = 4;
|
||||
state->ball_pen = 0x200;
|
||||
state->ball_sizex = 4;
|
||||
state->ball_sizey = 4;
|
||||
}
|
||||
|
||||
|
||||
|
@ -6,6 +6,17 @@
|
||||
|
||||
#include "sound/discrete.h"
|
||||
|
||||
class asteroid_state : public driver_device
|
||||
{
|
||||
public:
|
||||
asteroid_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
UINT8 *ram1;
|
||||
UINT8 *ram2;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in machine/asteroid.c -----------*/
|
||||
|
||||
INTERRUPT_GEN( asteroid_interrupt );
|
||||
@ -23,7 +34,6 @@ WRITE8_HANDLER( astdelux_led_w );
|
||||
|
||||
MACHINE_RESET( asteroid );
|
||||
|
||||
extern UINT8 *asteroid_ram1, *asteroid_ram2;
|
||||
|
||||
/*----------- defined in audio/asteroid.c -----------*/
|
||||
|
||||
|
@ -9,8 +9,18 @@
|
||||
#define BZONE_MASTER_CLOCK (XTAL_12_096MHz)
|
||||
#define BZONE_CLOCK_3KHZ (MASTER_CLOCK / 4096)
|
||||
|
||||
/*----------- defined in audio/bzone.c -----------*/
|
||||
class bzone_state : public driver_device
|
||||
{
|
||||
public:
|
||||
bzone_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
UINT8 analog_data;
|
||||
UINT8 rb_input_select;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in audio/bzone.c -----------*/
|
||||
|
||||
WRITE8_DEVICE_HANDLER( bzone_sounds_w );
|
||||
|
||||
|
@ -1,7 +1,16 @@
|
||||
/*----------- defined in video/funworld.c -----------*/
|
||||
class funworld_state : public driver_device
|
||||
{
|
||||
public:
|
||||
funworld_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
extern UINT8* funworld_videoram;
|
||||
extern UINT8* funworld_colorram;
|
||||
UINT8* videoram;
|
||||
UINT8* colorram;
|
||||
tilemap_t *bg_tilemap;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in video/funworld.c -----------*/
|
||||
|
||||
WRITE8_HANDLER( funworld_videoram_w );
|
||||
WRITE8_HANDLER( funworld_colorram_w );
|
||||
|
@ -5,6 +5,56 @@
|
||||
|
||||
**************************************************************************/
|
||||
|
||||
#include "video/tms34061.h"
|
||||
|
||||
#define YBUFFER_COUNT 15
|
||||
|
||||
class itech8_state : public driver_device
|
||||
{
|
||||
public:
|
||||
itech8_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
UINT8 *grom_bank;
|
||||
UINT8 blitter_int;
|
||||
UINT8 tms34061_int;
|
||||
UINT8 periodic_int;
|
||||
UINT8 sound_data;
|
||||
UINT8 pia_porta_data;
|
||||
UINT8 pia_portb_data;
|
||||
const rectangle *visarea;
|
||||
UINT8 z80_ctrl;
|
||||
UINT8 z80_port_val;
|
||||
UINT8 z80_clear_to_send;
|
||||
UINT16 sensor0;
|
||||
UINT16 sensor1;
|
||||
UINT16 sensor2;
|
||||
UINT16 sensor3;
|
||||
UINT8 curvx;
|
||||
UINT8 curvy;
|
||||
UINT8 curx;
|
||||
INT8 xbuffer[YBUFFER_COUNT];
|
||||
INT8 ybuffer[YBUFFER_COUNT];
|
||||
int ybuffer_next;
|
||||
int curxpos;
|
||||
int last_ytotal;
|
||||
UINT8 crosshair_vis;
|
||||
UINT8 blitter_data[16];
|
||||
UINT8 blit_in_progress;
|
||||
UINT8 page_select;
|
||||
offs_t fetch_offset;
|
||||
UINT8 fetch_rle_count;
|
||||
UINT8 fetch_rle_value;
|
||||
UINT8 fetch_rle_literal;
|
||||
struct tms34061_display tms_state;
|
||||
UINT8 *grom_base;
|
||||
UINT32 grom_size;
|
||||
UINT8 grmatch_palcontrol;
|
||||
UINT8 grmatch_xscroll;
|
||||
rgb_t grmatch_palette[2][16];
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in drivers/itech8.c -----------*/
|
||||
|
||||
void itech8_update_interrupts(running_machine *machine, int periodic, int tms34061, int blitter);
|
||||
@ -25,8 +75,6 @@ SCREEN_UPDATE( slikshot );
|
||||
|
||||
/*----------- defined in video/itech8.c -----------*/
|
||||
|
||||
extern UINT8 *itech8_grom_bank;
|
||||
|
||||
VIDEO_START( itech8 );
|
||||
|
||||
WRITE8_HANDLER( itech8_page_w );
|
||||
|
@ -1,10 +1,33 @@
|
||||
class legionna_state : public driver_device
|
||||
{
|
||||
public:
|
||||
legionna_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
UINT16 *back_data;
|
||||
UINT16 *fore_data;
|
||||
UINT16 *mid_data;
|
||||
UINT16 *scrollram16;
|
||||
UINT16 *textram;
|
||||
UINT16 layer_disable;
|
||||
int sprite_xoffs;
|
||||
int sprite_yoffs;
|
||||
tilemap_t *background_layer;
|
||||
tilemap_t *foreground_layer;
|
||||
tilemap_t *midground_layer;
|
||||
tilemap_t *text_layer;
|
||||
int has_extended_banking;
|
||||
int has_extended_priority;
|
||||
UINT16 back_gfx_bank;
|
||||
UINT16 fore_gfx_bank;
|
||||
UINT16 mid_gfx_bank;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in video/legionna.c -----------*/
|
||||
|
||||
extern UINT16 *legionna_back_data,*legionna_fore_data,*legionna_mid_data,*legionna_scrollram16,*legionna_textram;
|
||||
extern UINT16 legionna_layer_disable;
|
||||
|
||||
void heatbrl_setgfxbank(UINT16 data);
|
||||
void denjinmk_setgfxbank(UINT16 data);
|
||||
void heatbrl_setgfxbank(running_machine *machine, UINT16 data);
|
||||
void denjinmk_setgfxbank(running_machine *machine, UINT16 data);
|
||||
WRITE16_HANDLER( legionna_background_w );
|
||||
WRITE16_HANDLER( legionna_foreground_w );
|
||||
WRITE16_HANDLER( legionna_midground_w );
|
||||
|
@ -10,6 +10,62 @@
|
||||
#define ATAXX_EXTRA_TRAM_SIZE 0x800
|
||||
|
||||
|
||||
struct vram_state_data
|
||||
{
|
||||
UINT16 addr;
|
||||
UINT8 latch[2];
|
||||
};
|
||||
|
||||
|
||||
|
||||
class leland_state : public driver_device
|
||||
{
|
||||
public:
|
||||
leland_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
UINT8 dac_control;
|
||||
UINT8 *alleymas_kludge_mem;
|
||||
UINT8 *ataxx_qram;
|
||||
UINT8 gfx_control;
|
||||
UINT8 wcol_enable;
|
||||
emu_timer *master_int_timer;
|
||||
UINT8 *master_base;
|
||||
UINT8 *slave_base;
|
||||
UINT8 *xrom_base;
|
||||
UINT32 master_length;
|
||||
UINT32 slave_length;
|
||||
UINT32 xrom_length;
|
||||
int dangerz_x;
|
||||
int dangerz_y;
|
||||
UINT8 analog_result;
|
||||
UINT8 dial_last_input[4];
|
||||
UINT8 dial_last_result[4];
|
||||
UINT8 keycard_shift;
|
||||
UINT8 keycard_bit;
|
||||
UINT8 keycard_state;
|
||||
UINT8 keycard_clock;
|
||||
UINT8 keycard_command[3];
|
||||
UINT8 top_board_bank;
|
||||
UINT8 sound_port_bank;
|
||||
UINT8 alternate_bank;
|
||||
UINT8 master_bank;
|
||||
void (*update_master_bank)(running_machine *machine);
|
||||
UINT32 xrom1_addr;
|
||||
UINT32 xrom2_addr;
|
||||
UINT8 battery_ram_enable;
|
||||
UINT8 *battery_ram;
|
||||
UINT8 *extra_tram;
|
||||
UINT8 *video_ram;
|
||||
struct vram_state_data vram_state[2];
|
||||
UINT16 xscroll;
|
||||
UINT16 yscroll;
|
||||
UINT8 gfxbank;
|
||||
UINT16 last_scanline;
|
||||
emu_timer *scanline_timer;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in machine/leland.c -----------*/
|
||||
|
||||
#define SERIAL_TYPE_NONE 0
|
||||
@ -18,13 +74,9 @@
|
||||
#define SERIAL_TYPE_ENCRYPT 3
|
||||
#define SERIAL_TYPE_ENCRYPT_XOR 4
|
||||
|
||||
extern UINT8 leland_dac_control;
|
||||
extern void (*leland_update_master_bank)(running_machine *machine);
|
||||
|
||||
READ8_HANDLER( cerberus_dial_1_r );
|
||||
READ8_HANDLER( cerberus_dial_2_r );
|
||||
|
||||
extern UINT8 *alleymas_kludge_mem;
|
||||
WRITE8_HANDLER( alleymas_joystick_kludge );
|
||||
|
||||
READ8_HANDLER( dangerz_input_y_r );
|
||||
@ -120,8 +172,6 @@ ADDRESS_MAP_EXTERN(ataxx_80186_map_io, 16);
|
||||
|
||||
/*----------- defined in video/leland.c -----------*/
|
||||
|
||||
extern UINT8 *ataxx_qram;
|
||||
|
||||
WRITE8_HANDLER( leland_scroll_w );
|
||||
WRITE8_DEVICE_HANDLER( leland_gfx_port_w );
|
||||
|
||||
|
@ -1,3 +1,50 @@
|
||||
class segas24_state : public driver_device
|
||||
{
|
||||
public:
|
||||
segas24_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
int fdc_status;
|
||||
int fdc_track;
|
||||
int fdc_sector;
|
||||
int fdc_data;
|
||||
int fdc_phys_track;
|
||||
int fdc_irq;
|
||||
int fdc_drq;
|
||||
int fdc_span;
|
||||
int fdc_index_count;
|
||||
UINT8 *fdc_pt;
|
||||
int track_size;
|
||||
int cur_input_line;
|
||||
UINT8 hotrod_ctrl_cur;
|
||||
UINT8 resetcontrol;
|
||||
UINT8 prev_resetcontrol;
|
||||
UINT8 curbank;
|
||||
UINT8 mlatch;
|
||||
const UINT8 *mlatch_table;
|
||||
UINT16 irq_timera;
|
||||
UINT8 irq_timerb;
|
||||
UINT8 irq_allow0;
|
||||
UINT8 irq_allow1;
|
||||
int irq_timer_pend0;
|
||||
int irq_timer_pend1;
|
||||
int irq_yms;
|
||||
int irq_vblank;
|
||||
int irq_sprite;
|
||||
timer_device *irq_timer;
|
||||
timer_device *irq_timer_clear;
|
||||
int turns;
|
||||
UINT16 *system24temp_sys16_shared_ram;
|
||||
UINT8 (*system24temp_sys16_io_io_r)(running_machine *machine, int port);
|
||||
void (*system24temp_sys16_io_io_w)(running_machine *machine, int port, UINT8 data);
|
||||
void (*system24temp_sys16_io_cnt_w)(address_space *space, UINT8 data);
|
||||
read16_space_func system24temp_sys16_io_iod_r;
|
||||
write16_space_func system24temp_sys16_io_iod_w;
|
||||
UINT8 system24temp_sys16_io_cnt;
|
||||
UINT8 system24temp_sys16_io_dir;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in machine/segas24.c -----------*/
|
||||
|
||||
/* system24temp_ functions / variables are from shared rewrite files,
|
||||
@ -7,11 +54,14 @@
|
||||
|
||||
/* New Code */
|
||||
|
||||
void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(address_space *space, UINT8 data),
|
||||
read16_space_func iod_r,
|
||||
write16_space_func iod_w);
|
||||
void system24temp_sys16_io_set_callbacks(
|
||||
running_machine *machine,
|
||||
UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(address_space *space, UINT8 data),
|
||||
read16_space_func iod_r,
|
||||
write16_space_func iod_w);
|
||||
|
||||
READ16_HANDLER ( system24temp_sys16_io_r );
|
||||
WRITE16_HANDLER( system24temp_sys16_io_w );
|
||||
READ32_HANDLER ( system24temp_sys16_io_dword_r );
|
||||
@ -19,11 +69,6 @@ READ32_HANDLER ( system24temp_sys16_io_dword_r );
|
||||
/* End New Code */
|
||||
|
||||
|
||||
/*----------- defined in drivers/segas24.c -----------*/
|
||||
|
||||
extern UINT16 *s24_mainram1;
|
||||
|
||||
|
||||
/*----------- defined in machine/s24fd.c -----------*/
|
||||
|
||||
extern void s24_fd1094_machine_init(running_machine *machine);
|
||||
|
@ -7,9 +7,53 @@
|
||||
#include "video/mc6845.h"
|
||||
|
||||
|
||||
class twincobr_state : public driver_device
|
||||
{
|
||||
public:
|
||||
twincobr_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
int toaplan_main_cpu;
|
||||
int wardner_membank;
|
||||
UINT8 *sharedram;
|
||||
INT32 fg_rom_bank;
|
||||
INT32 bg_ram_bank;
|
||||
INT32 wardner_sprite_hack;
|
||||
int intenable;
|
||||
int dsp_on;
|
||||
int dsp_BIO;
|
||||
int fsharkbt_8741;
|
||||
int dsp_execute;
|
||||
UINT32 dsp_addr_w;
|
||||
UINT32 main_ram_seg;
|
||||
UINT16 *bgvideoram16;
|
||||
UINT16 *fgvideoram16;
|
||||
UINT16 *txvideoram16;
|
||||
size_t bgvideoram_size;
|
||||
size_t fgvideoram_size;
|
||||
size_t txvideoram_size;
|
||||
INT32 txscrollx;
|
||||
INT32 txscrolly;
|
||||
INT32 fgscrollx;
|
||||
INT32 fgscrolly;
|
||||
INT32 bgscrollx;
|
||||
INT32 bgscrolly;
|
||||
INT32 txoffs;
|
||||
INT32 fgoffs;
|
||||
INT32 bgoffs;
|
||||
INT32 scroll_x;
|
||||
INT32 scroll_y;
|
||||
INT32 display_on;
|
||||
INT32 flip_screen;
|
||||
tilemap_t *bg_tilemap;
|
||||
tilemap_t *fg_tilemap;
|
||||
tilemap_t *tx_tilemap;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in drivers/wardner.c -----------*/
|
||||
|
||||
extern STATE_POSTLOAD( wardner_restore_bank );
|
||||
STATE_POSTLOAD( wardner_restore_bank );
|
||||
|
||||
/*----------- defined in machine/twincobr.c -----------*/
|
||||
|
||||
@ -41,17 +85,14 @@ MACHINE_RESET( wardner );
|
||||
extern void twincobr_driver_savestate(running_machine *machine);
|
||||
extern void wardner_driver_savestate(running_machine *machine);
|
||||
|
||||
extern int toaplan_main_cpu; /* Main CPU type. 0 = 68000, 1 = Z80 */
|
||||
extern int wardner_membank;
|
||||
|
||||
extern UINT8 *twincobr_sharedram;
|
||||
|
||||
|
||||
/*----------- defined in video/twincobr.c -----------*/
|
||||
extern const mc6845_interface twincobr_mc6845_intf;
|
||||
|
||||
extern void twincobr_flipscreen(running_machine *machine, int flip);
|
||||
extern void twincobr_display(int enable);
|
||||
extern void twincobr_display(running_machine *machine, int enable);
|
||||
|
||||
READ16_HANDLER( twincobr_txram_r );
|
||||
READ16_HANDLER( twincobr_bgram_r );
|
||||
@ -78,9 +119,6 @@ WRITE8_HANDLER( wardner_exscroll_w );
|
||||
READ8_HANDLER( wardner_sprite_r );
|
||||
WRITE8_HANDLER( wardner_sprite_w );
|
||||
|
||||
extern INT32 twincobr_fg_rom_bank;
|
||||
extern INT32 twincobr_bg_ram_bank;
|
||||
extern INT32 wardner_sprite_hack;
|
||||
|
||||
VIDEO_START( toaplan0 );
|
||||
SCREEN_UPDATE( toaplan0 );
|
||||
|
@ -1,12 +1,26 @@
|
||||
#include "devlegcy.h"
|
||||
|
||||
/*----------- defined in video/warpwarp.c -----------*/
|
||||
class warpwarp_state : public driver_device
|
||||
{
|
||||
public:
|
||||
warpwarp_state(running_machine &machine, const driver_device_config_base &config)
|
||||
: driver_device(machine, config) { }
|
||||
|
||||
extern UINT8 *geebee_videoram,*warpwarp_videoram;
|
||||
extern int geebee_bgw;
|
||||
extern int warpwarp_ball_on;
|
||||
extern int warpwarp_ball_h, warpwarp_ball_v;
|
||||
extern int warpwarp_ball_pen, warpwarp_ball_sizex, warpwarp_ball_sizey;
|
||||
UINT8 *geebee_videoram;
|
||||
UINT8 *videoram;
|
||||
int geebee_bgw;
|
||||
int ball_on;
|
||||
int ball_h;
|
||||
int ball_v;
|
||||
int ball_pen;
|
||||
int ball_sizex;
|
||||
int ball_sizey;
|
||||
int handle_joystick;
|
||||
tilemap_t *bg_tilemap;
|
||||
};
|
||||
|
||||
|
||||
/*----------- defined in video/warpwarp.c -----------*/
|
||||
|
||||
PALETTE_INIT( geebee );
|
||||
PALETTE_INIT( navarone );
|
||||
|
@ -12,7 +12,6 @@
|
||||
#include "video/avgdvg.h"
|
||||
#include "includes/asteroid.h"
|
||||
|
||||
UINT8 *asteroid_ram1, *asteroid_ram2;
|
||||
|
||||
INTERRUPT_GEN( asteroid_interrupt )
|
||||
{
|
||||
@ -95,15 +94,16 @@ READ8_HANDLER( asteroid_DSW1_r )
|
||||
|
||||
WRITE8_HANDLER( asteroid_bank_switch_w )
|
||||
{
|
||||
asteroid_state *state = space->machine->driver_data<asteroid_state>();
|
||||
if (data & 4)
|
||||
{
|
||||
memory_set_bankptr(space->machine, "bank1", asteroid_ram2);
|
||||
memory_set_bankptr(space->machine, "bank2", asteroid_ram1);
|
||||
memory_set_bankptr(space->machine, "bank1", state->ram2);
|
||||
memory_set_bankptr(space->machine, "bank2", state->ram1);
|
||||
}
|
||||
else
|
||||
{
|
||||
memory_set_bankptr(space->machine, "bank1", asteroid_ram1);
|
||||
memory_set_bankptr(space->machine, "bank2", asteroid_ram2);
|
||||
memory_set_bankptr(space->machine, "bank1", state->ram1);
|
||||
memory_set_bankptr(space->machine, "bank2", state->ram2);
|
||||
}
|
||||
|
||||
set_led_status (space->machine, 0, ~data & 0x02);
|
||||
@ -113,15 +113,16 @@ WRITE8_HANDLER( asteroid_bank_switch_w )
|
||||
|
||||
WRITE8_HANDLER( astdelux_bank_switch_w )
|
||||
{
|
||||
asteroid_state *state = space->machine->driver_data<asteroid_state>();
|
||||
if (data & 0x80)
|
||||
{
|
||||
memory_set_bankptr(space->machine, "bank1", asteroid_ram2);
|
||||
memory_set_bankptr(space->machine, "bank2", asteroid_ram1);
|
||||
memory_set_bankptr(space->machine, "bank1", state->ram2);
|
||||
memory_set_bankptr(space->machine, "bank2", state->ram1);
|
||||
}
|
||||
else
|
||||
{
|
||||
memory_set_bankptr(space->machine, "bank1", asteroid_ram1);
|
||||
memory_set_bankptr(space->machine, "bank2", asteroid_ram2);
|
||||
memory_set_bankptr(space->machine, "bank1", state->ram1);
|
||||
memory_set_bankptr(space->machine, "bank2", state->ram2);
|
||||
}
|
||||
}
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -156,7 +156,7 @@ void s24_fd1094_driver_init(running_machine *machine)
|
||||
{
|
||||
int i;
|
||||
|
||||
s24_fd1094_cpuregion = (UINT16*)s24_mainram1;
|
||||
s24_fd1094_cpuregion = (UINT16*)memory_get_shared(*machine, "share2");
|
||||
s24_fd1094_cpuregionsize = 0x40000;
|
||||
s24_fd1094_key = machine->region("fd1094key")->base();
|
||||
|
||||
|
@ -7,15 +7,16 @@
|
||||
*/
|
||||
|
||||
#ifdef UNUSED_FUNCTION
|
||||
UINT16 *system24temp_sys16_shared_ram;
|
||||
READ16_HANDLER( system24temp_sys16_shared_ram_r )
|
||||
{
|
||||
return system24temp_sys16_shared_ram[offset];
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
return state->system24temp_sys16_shared_ram[offset];
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( system24temp_sys16_shared_ram_w )
|
||||
{
|
||||
COMBINE_DATA(system24temp_sys16_shared_ram + offset);
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
COMBINE_DATA(state->system24temp_sys16_shared_ram + offset);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -25,33 +26,30 @@ WRITE16_HANDLER( system24temp_sys16_shared_ram_w )
|
||||
range
|
||||
*/
|
||||
|
||||
static UINT8 (*system24temp_sys16_io_io_r)(running_machine *machine, int port);
|
||||
static void (*system24temp_sys16_io_io_w)(running_machine *machine, int port, UINT8 data);
|
||||
static void (*system24temp_sys16_io_cnt_w)(address_space *space, UINT8 data);
|
||||
static READ16_HANDLER ((*system24temp_sys16_io_iod_r));
|
||||
static WRITE16_HANDLER((*system24temp_sys16_io_iod_w));
|
||||
static UINT8 system24temp_sys16_io_cnt, system24temp_sys16_io_dir;
|
||||
|
||||
void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(address_space *space, UINT8 data),
|
||||
read16_space_func iod_r,
|
||||
write16_space_func iod_w)
|
||||
void system24temp_sys16_io_set_callbacks(
|
||||
running_machine *machine,
|
||||
UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(address_space *space, UINT8 data),
|
||||
read16_space_func iod_r,
|
||||
write16_space_func iod_w)
|
||||
{
|
||||
system24temp_sys16_io_io_r = io_r;
|
||||
system24temp_sys16_io_io_w = io_w;
|
||||
system24temp_sys16_io_cnt_w = cnt_w;
|
||||
system24temp_sys16_io_iod_r = iod_r;
|
||||
system24temp_sys16_io_iod_w = iod_w;
|
||||
system24temp_sys16_io_cnt = 0x00;
|
||||
system24temp_sys16_io_dir = 0x00;
|
||||
segas24_state *state = machine->driver_data<segas24_state>();
|
||||
state->system24temp_sys16_io_io_r = io_r;
|
||||
state->system24temp_sys16_io_io_w = io_w;
|
||||
state->system24temp_sys16_io_cnt_w = cnt_w;
|
||||
state->system24temp_sys16_io_iod_r = iod_r;
|
||||
state->system24temp_sys16_io_iod_w = iod_w;
|
||||
state->system24temp_sys16_io_cnt = 0x00;
|
||||
state->system24temp_sys16_io_dir = 0x00;
|
||||
}
|
||||
|
||||
READ16_HANDLER ( system24temp_sys16_io_r )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
// logerror("IO read %02x (%s:%x)\n", offset, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
if(offset < 8)
|
||||
return system24temp_sys16_io_io_r ? system24temp_sys16_io_io_r(space->machine,offset) : 0xff;
|
||||
return state->system24temp_sys16_io_io_r ? state->system24temp_sys16_io_io_r(space->machine,offset) : 0xff;
|
||||
else if (offset < 0x20) {
|
||||
switch(offset) {
|
||||
case 0x8:
|
||||
@ -63,15 +61,15 @@ READ16_HANDLER ( system24temp_sys16_io_r )
|
||||
case 0xb:
|
||||
return 'A';
|
||||
case 0xe:
|
||||
return system24temp_sys16_io_cnt;
|
||||
return state->system24temp_sys16_io_cnt;
|
||||
case 0xf:
|
||||
return system24temp_sys16_io_dir;
|
||||
return state->system24temp_sys16_io_dir;
|
||||
default:
|
||||
logerror("IO control read %02x (%s:%x)\n", offset, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
return 0xff;
|
||||
}
|
||||
} else
|
||||
return system24temp_sys16_io_iod_r ? system24temp_sys16_io_iod_r(space, offset & 0x1f, mem_mask) : 0xff;
|
||||
return state->system24temp_sys16_io_iod_r ? state->system24temp_sys16_io_iod_r(space, offset & 0x1f, mem_mask) : 0xff;
|
||||
}
|
||||
|
||||
READ32_HANDLER(system24temp_sys16_io_dword_r)
|
||||
@ -82,29 +80,30 @@ READ32_HANDLER(system24temp_sys16_io_dword_r)
|
||||
|
||||
WRITE16_HANDLER( system24temp_sys16_io_w )
|
||||
{
|
||||
segas24_state *state = space->machine->driver_data<segas24_state>();
|
||||
if(ACCESSING_BITS_0_7) {
|
||||
if(offset < 8) {
|
||||
if(!(system24temp_sys16_io_dir & (1 << offset))) {
|
||||
logerror("IO port write on input-only port (%d, [%02x], %02x, %s:%x)\n", offset, system24temp_sys16_io_dir, data & 0xff, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
if(!(state->system24temp_sys16_io_dir & (1 << offset))) {
|
||||
logerror("IO port write on input-only port (%d, [%02x], %02x, %s:%x)\n", offset, state->system24temp_sys16_io_dir, data & 0xff, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
return;
|
||||
}
|
||||
if(system24temp_sys16_io_io_w)
|
||||
system24temp_sys16_io_io_w(space->machine, offset, data);
|
||||
if(state->system24temp_sys16_io_io_w)
|
||||
state->system24temp_sys16_io_io_w(space->machine, offset, data);
|
||||
} else if (offset < 0x20) {
|
||||
switch(offset) {
|
||||
case 0xe:
|
||||
system24temp_sys16_io_cnt = data;
|
||||
if(system24temp_sys16_io_cnt_w)
|
||||
system24temp_sys16_io_cnt_w(space, data & 7);
|
||||
state->system24temp_sys16_io_cnt = data;
|
||||
if(state->system24temp_sys16_io_cnt_w)
|
||||
state->system24temp_sys16_io_cnt_w(space, data & 7);
|
||||
break;
|
||||
case 0xf:
|
||||
system24temp_sys16_io_dir = data;
|
||||
state->system24temp_sys16_io_dir = data;
|
||||
break;
|
||||
default:
|
||||
logerror("IO control write %02x, %02x (%s:%x)\n", offset, data & 0xff, space->cpu->tag(), cpu_get_pc(space->cpu));
|
||||
}
|
||||
}
|
||||
}
|
||||
if(offset >= 0x20 && system24temp_sys16_io_iod_w)
|
||||
system24temp_sys16_io_iod_w(space, offset & 0x1f, data, mem_mask);
|
||||
if(offset >= 0x20 && state->system24temp_sys16_io_iod_w)
|
||||
state->system24temp_sys16_io_iod_w(space, offset & 0x1f, data, mem_mask);
|
||||
}
|
||||
|
11
src/mame/machine/seibuspi.h
Normal file
11
src/mame/machine/seibuspi.h
Normal file
@ -0,0 +1,11 @@
|
||||
void seibuspi_text_decrypt(UINT8 *rom);
|
||||
void seibuspi_bg_decrypt(UINT8 *rom, int size);
|
||||
|
||||
void seibuspi_rise10_text_decrypt(UINT8 *rom);
|
||||
void seibuspi_rise10_bg_decrypt(UINT8 *rom, int size);
|
||||
void seibuspi_rise10_sprite_decrypt(UINT8 *rom, int romsize);
|
||||
|
||||
void seibuspi_rise11_text_decrypt(UINT8 *rom);
|
||||
void seibuspi_rise11_bg_decrypt(UINT8 *rom, int size);
|
||||
void seibuspi_rise11_sprite_decrypt_rfjet(UINT8 *rom, int romsize);
|
||||
void seibuspi_rise11_sprite_decrypt_feversoc(UINT8 *rom, int romsize);
|
@ -1529,18 +1529,19 @@ static UINT16 seibu_vregs[0x50/2];
|
||||
|
||||
static WRITE16_HANDLER( seibu_common_video_regs_w )
|
||||
{
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&seibu_vregs[offset]);
|
||||
|
||||
switch(offset)
|
||||
{
|
||||
case (0x01a/2): { flip_screen_set(space->machine, seibu_vregs[offset] & 0x01); break; }
|
||||
case (0x01c/2): { legionna_layer_disable = seibu_vregs[offset]; break; }
|
||||
case (0x020/2): { legionna_scrollram16[0] = seibu_vregs[offset]; break; }
|
||||
case (0x022/2): { legionna_scrollram16[1] = seibu_vregs[offset]; break; }
|
||||
case (0x024/2): { legionna_scrollram16[2] = seibu_vregs[offset]; break; }
|
||||
case (0x026/2): { legionna_scrollram16[3] = seibu_vregs[offset]; break; }
|
||||
case (0x028/2): { legionna_scrollram16[4] = seibu_vregs[offset]; break; }
|
||||
case (0x02a/2): { legionna_scrollram16[5] = seibu_vregs[offset]; break; }
|
||||
case (0x01c/2): { state->layer_disable = seibu_vregs[offset]; break; }
|
||||
case (0x020/2): { state->scrollram16[0] = seibu_vregs[offset]; break; }
|
||||
case (0x022/2): { state->scrollram16[1] = seibu_vregs[offset]; break; }
|
||||
case (0x024/2): { state->scrollram16[2] = seibu_vregs[offset]; break; }
|
||||
case (0x026/2): { state->scrollram16[3] = seibu_vregs[offset]; break; }
|
||||
case (0x028/2): { state->scrollram16[4] = seibu_vregs[offset]; break; }
|
||||
case (0x02a/2): { state->scrollram16[5] = seibu_vregs[offset]; break; }
|
||||
default: { logerror("seibu_common_video_regs_w unhandled offset %02x %04x\n",offset,data); break; }
|
||||
}
|
||||
}
|
||||
@ -1689,6 +1690,7 @@ READ16_HANDLER( copdxbl_0_r )
|
||||
|
||||
WRITE16_HANDLER( copdxbl_0_w )
|
||||
{
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&cop_mcu_ram[offset]);
|
||||
|
||||
switch(offset)
|
||||
@ -1700,14 +1702,14 @@ WRITE16_HANDLER( copdxbl_0_w )
|
||||
}
|
||||
|
||||
/*TODO: kludge on x-axis.*/
|
||||
case (0x660/2): { legionna_scrollram16[0] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x662/2): { legionna_scrollram16[1] = cop_mcu_ram[offset]; break; }
|
||||
case (0x664/2): { legionna_scrollram16[2] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x666/2): { legionna_scrollram16[3] = cop_mcu_ram[offset]; break; }
|
||||
case (0x668/2): { legionna_scrollram16[4] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x66a/2): { legionna_scrollram16[5] = cop_mcu_ram[offset]; break; }
|
||||
case (0x66c/2): { legionna_scrollram16[6] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x66e/2): { legionna_scrollram16[7] = cop_mcu_ram[offset]; break; }
|
||||
case (0x660/2): { state->scrollram16[0] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x662/2): { state->scrollram16[1] = cop_mcu_ram[offset]; break; }
|
||||
case (0x664/2): { state->scrollram16[2] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x666/2): { state->scrollram16[3] = cop_mcu_ram[offset]; break; }
|
||||
case (0x668/2): { state->scrollram16[4] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x66a/2): { state->scrollram16[5] = cop_mcu_ram[offset]; break; }
|
||||
case (0x66c/2): { state->scrollram16[6] = cop_mcu_ram[offset] - 0x1f0; break; }
|
||||
case (0x66e/2): { state->scrollram16[7] = cop_mcu_ram[offset]; break; }
|
||||
|
||||
case (0x740/2):
|
||||
{
|
||||
@ -1908,7 +1910,7 @@ static UINT32 cop_sprite_dma_param;
|
||||
|
||||
static WRITE16_HANDLER( generic_cop_w )
|
||||
{
|
||||
static UINT32 temp32;
|
||||
UINT32 temp32;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -2140,7 +2142,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
/* "automatic" movement */
|
||||
if(COP_CMD(0x188,0x282,0x082,0xb8e,0x98e,0x000,0x000,0x000,6,0xffeb))
|
||||
{
|
||||
static UINT8 offs;
|
||||
UINT8 offs;
|
||||
|
||||
offs = (offset & 3) * 4;
|
||||
|
||||
@ -2151,7 +2153,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
/* "automatic" movement, for arks in Legionnaire / Zero Team (expression adjustment) */
|
||||
if(COP_CMD(0x194,0x288,0x088,0x000,0x000,0x000,0x000,0x000,6,0xfbfb))
|
||||
{
|
||||
static UINT8 offs;
|
||||
UINT8 offs;
|
||||
|
||||
offs = (offset & 3) * 4;
|
||||
|
||||
@ -2373,8 +2375,8 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
// grainbow 0d | a | fff3 | 6980 | b80 ba0
|
||||
if(COP_CMD(0xb80,0xba0,0x000,0x000,0x000,0x000,0x000,0x000,10,0xfff3))
|
||||
{
|
||||
static UINT8 offs;
|
||||
static int abs_x,abs_y,rel_xy;
|
||||
UINT8 offs;
|
||||
int abs_x,abs_y,rel_xy;
|
||||
|
||||
offs = (offset & 3) * 4;
|
||||
|
||||
@ -2398,7 +2400,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
// grainbow 18 | a | ff00 | c480 | 080 882
|
||||
if(COP_CMD(0x080,0x882,0x000,0x000,0x000,0x000,0x000,0x000,10,0xff00))
|
||||
{
|
||||
static UINT8 offs;
|
||||
UINT8 offs;
|
||||
|
||||
offs = (offset & 3) * 4;
|
||||
|
||||
@ -2412,9 +2414,9 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
/* FIXME: x/ys are offsetted */
|
||||
if(COP_CMD(0xf80,0xaa2,0x984,0x0c2,0x000,0x000,0x000,0x000,5,0x7ff7))
|
||||
{
|
||||
static UINT8 offs;
|
||||
static int div;
|
||||
static INT16 offs_val;
|
||||
UINT8 offs;
|
||||
int div;
|
||||
INT16 offs_val;
|
||||
|
||||
//printf("%08x %08x %08x %08x %08x %08x %08x\n",cop_register[0],cop_register[1],cop_register[2],cop_register[3],cop_register[4],cop_register[5],cop_register[6]);
|
||||
|
||||
@ -2433,7 +2435,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
//(cupsoc) | 8 | f3e7 | 6200 | 3a0 3a6 380 aa0 2a6
|
||||
if(COP_CMD(0x3a0,0x3a6,0x380,0xaa0,0x2a6,0x000,0x000,0x000,8,0xf3e7))
|
||||
{
|
||||
static INT8 cur_angle;
|
||||
INT8 cur_angle;
|
||||
|
||||
cur_angle = space->read_byte(cop_register[1] + (0xc ^ 3));
|
||||
space->write_byte(cop_register[1] + (0^3),space->read_byte(cop_register[1] + (0^3)) & 0xfb); //correct?
|
||||
@ -2466,7 +2468,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
/* FIXME: still doesn't work ... */
|
||||
if(COP_CMD(0x380,0x39a,0x380,0xa80,0x29a,0x000,0x000,0x000,8,0xf3e7))
|
||||
{
|
||||
static INT8 cur_angle;
|
||||
INT8 cur_angle;
|
||||
|
||||
cur_angle = space->read_byte(cop_register[0] + (0x34 ^ 3));
|
||||
//space->write_byte(cop_register[0] + (0^3),space->read_byte(cop_register[0] + (0^3)) & 0xfb); //correct?
|
||||
@ -2507,7 +2509,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
|
||||
if (cop_dma_trigger >= 0x80 && cop_dma_trigger <= 0x87)
|
||||
{
|
||||
static UINT32 src,dst,size,i;
|
||||
UINT32 src,dst,size,i;
|
||||
|
||||
/*
|
||||
Apparently all of those are just different DMA channels, brightness effects are done thru a RAM table and the pal_brightness_val / mode
|
||||
@ -2532,7 +2534,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
|
||||
for(i = 0;i < size;i++)
|
||||
{
|
||||
static UINT16 pal_val;
|
||||
UINT16 pal_val;
|
||||
int r,g,b;
|
||||
int rt,gt,bt;
|
||||
|
||||
@ -2597,7 +2599,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
/* Seibu Cup Soccer trigger this*/
|
||||
if (cop_dma_trigger == 0x0e)
|
||||
{
|
||||
static UINT32 src,dst,size,i;
|
||||
UINT32 src,dst,size,i;
|
||||
|
||||
src = (cop_dma_src[cop_dma_trigger] << 6);
|
||||
dst = (cop_dma_dst[cop_dma_trigger] << 6);
|
||||
@ -2671,15 +2673,15 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
|
||||
case (0x2fe/2):
|
||||
{
|
||||
static UINT16 sort_size;
|
||||
UINT16 sort_size;
|
||||
|
||||
sort_size = cop_mcu_ram[offset];
|
||||
|
||||
{
|
||||
static int i,j;
|
||||
static UINT8 xchg_flag;
|
||||
static UINT32 addri,addrj;
|
||||
static UINT16 vali,valj;
|
||||
int i,j;
|
||||
UINT8 xchg_flag;
|
||||
UINT32 addri,addrj;
|
||||
UINT16 vali,valj;
|
||||
|
||||
/* TODO: use a better algorythm than bubble sort! */
|
||||
for(i=2;i<sort_size;i+=2)
|
||||
@ -2703,7 +2705,7 @@ static WRITE16_HANDLER( generic_cop_w )
|
||||
|
||||
if(xchg_flag)
|
||||
{
|
||||
static UINT16 xch_val;
|
||||
UINT16 xch_val;
|
||||
|
||||
xch_val = space->read_word(cop_sort_lookup+i);
|
||||
space->write_word(cop_sort_lookup+i,space->read_word(cop_sort_lookup+j));
|
||||
@ -2745,7 +2747,7 @@ WRITE16_HANDLER( heatbrl_mcu_w )
|
||||
/* external pin register, used for banking */
|
||||
if(offset == 0x070/2)
|
||||
{
|
||||
heatbrl_setgfxbank( cop_mcu_ram[offset] );
|
||||
heatbrl_setgfxbank(space->machine, cop_mcu_ram[offset]);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2888,7 +2890,7 @@ WRITE16_HANDLER( godzilla_mcu_w )
|
||||
|
||||
if(offset == 0x070/2)
|
||||
{
|
||||
denjinmk_setgfxbank(cop_mcu_ram[offset]);
|
||||
denjinmk_setgfxbank(space->machine, cop_mcu_ram[offset]);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2943,7 +2945,7 @@ WRITE16_HANDLER( denjinmk_mcu_w )
|
||||
|
||||
if(offset == 0x070/2)
|
||||
{
|
||||
denjinmk_setgfxbank(cop_mcu_ram[offset]);
|
||||
denjinmk_setgfxbank(space->machine, cop_mcu_ram[offset]);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -72,26 +72,8 @@
|
||||
#include "includes/itech8.h"
|
||||
|
||||
|
||||
#define YBUFFER_COUNT 15
|
||||
#define MINDY 100
|
||||
|
||||
static UINT8 z80_ctrl;
|
||||
static UINT8 z80_port_val;
|
||||
static UINT8 z80_clear_to_send;
|
||||
|
||||
static UINT16 sensor0, sensor1, sensor2, sensor3;
|
||||
|
||||
static UINT8 curvx, curvy, curx;
|
||||
|
||||
static INT8 xbuffer[YBUFFER_COUNT];
|
||||
static INT8 ybuffer[YBUFFER_COUNT];
|
||||
static int ybuffer_next;
|
||||
static int curxpos;
|
||||
static int last_ytotal;
|
||||
|
||||
static UINT8 crosshair_vis;
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -402,20 +384,21 @@ static void words_to_sensors(UINT16 word1, UINT16 word2, UINT16 word3, UINT8 bea
|
||||
|
||||
static void compute_sensors(running_machine *machine)
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
UINT16 inter1, inter2, inter3;
|
||||
UINT16 word1 = 0, word2 = 0, word3 = 0;
|
||||
UINT8 beams;
|
||||
|
||||
/* skip if we're not ready */
|
||||
if (sensor0 != 0 || sensor1 != 0 || sensor2 != 0 || sensor3 != 0)
|
||||
if (state->sensor0 != 0 || state->sensor1 != 0 || state->sensor2 != 0 || state->sensor3 != 0)
|
||||
return;
|
||||
|
||||
/* reverse map the inputs */
|
||||
vels_to_inters(curx, curvx, curvy, &inter1, &inter2, &inter3, &beams);
|
||||
vels_to_inters(state->curx, state->curvx, state->curvy, &inter1, &inter2, &inter3, &beams);
|
||||
inters_to_words(inter1, inter2, inter3, &beams, &word1, &word2, &word3);
|
||||
words_to_sensors(word1, word2, word3, beams, &sensor0, &sensor1, &sensor2, &sensor3);
|
||||
words_to_sensors(word1, word2, word3, beams, &state->sensor0, &state->sensor1, &state->sensor2, &state->sensor3);
|
||||
|
||||
logerror("%15f: Sensor values: %04x %04x %04x %04x\n", machine->time().as_double(), sensor0, sensor1, sensor2, sensor3);
|
||||
logerror("%15f: Sensor values: %04x %04x %04x %04x\n", machine->time().as_double(), state->sensor0, state->sensor1, state->sensor2, state->sensor3);
|
||||
}
|
||||
|
||||
|
||||
@ -428,22 +411,23 @@ static void compute_sensors(running_machine *machine)
|
||||
|
||||
READ8_HANDLER( slikz80_port_r )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
int result = 0;
|
||||
|
||||
/* if we have nothing, return 0x03 */
|
||||
if (!sensor0 && !sensor1 && !sensor2 && !sensor3)
|
||||
return 0x03 | (z80_clear_to_send << 7);
|
||||
if (!state->sensor0 && !state->sensor1 && !state->sensor2 && !state->sensor3)
|
||||
return 0x03 | (state->z80_clear_to_send << 7);
|
||||
|
||||
/* 1 bit for each sensor */
|
||||
if (sensor0)
|
||||
result |= 1, sensor0--;
|
||||
if (sensor1)
|
||||
result |= 2, sensor1--;
|
||||
if (sensor2)
|
||||
result |= 4, sensor2--;
|
||||
if (sensor3)
|
||||
result |= 8, sensor3--;
|
||||
result |= z80_clear_to_send << 7;
|
||||
if (state->sensor0)
|
||||
result |= 1, state->sensor0--;
|
||||
if (state->sensor1)
|
||||
result |= 2, state->sensor1--;
|
||||
if (state->sensor2)
|
||||
result |= 4, state->sensor2--;
|
||||
if (state->sensor3)
|
||||
result |= 8, state->sensor3--;
|
||||
result |= state->z80_clear_to_send << 7;
|
||||
|
||||
return result;
|
||||
}
|
||||
@ -458,8 +442,9 @@ READ8_HANDLER( slikz80_port_r )
|
||||
|
||||
WRITE8_HANDLER( slikz80_port_w )
|
||||
{
|
||||
z80_port_val = data;
|
||||
z80_clear_to_send = 0;
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
state->z80_port_val = data;
|
||||
state->z80_clear_to_send = 0;
|
||||
}
|
||||
|
||||
|
||||
@ -472,9 +457,10 @@ WRITE8_HANDLER( slikz80_port_w )
|
||||
|
||||
READ8_HANDLER( slikshot_z80_r )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
/* allow the Z80 to send us stuff now */
|
||||
z80_clear_to_send = 1;
|
||||
return z80_port_val;
|
||||
state->z80_clear_to_send = 1;
|
||||
return state->z80_port_val;
|
||||
}
|
||||
|
||||
|
||||
@ -487,7 +473,8 @@ READ8_HANDLER( slikshot_z80_r )
|
||||
|
||||
READ8_HANDLER( slikshot_z80_control_r )
|
||||
{
|
||||
return z80_ctrl;
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
return state->z80_ctrl;
|
||||
}
|
||||
|
||||
|
||||
@ -500,6 +487,7 @@ READ8_HANDLER( slikshot_z80_control_r )
|
||||
|
||||
static TIMER_CALLBACK( delayed_z80_control_w )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
int data = param;
|
||||
|
||||
/* bit 4 controls the reset line on the Z80 */
|
||||
@ -511,15 +499,15 @@ static TIMER_CALLBACK( delayed_z80_control_w )
|
||||
cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
|
||||
|
||||
/* on the rising edge, make the crosshair visible again */
|
||||
if ((data & 0x10) && !(z80_ctrl & 0x10))
|
||||
crosshair_vis = 1;
|
||||
if ((data & 0x10) && !(state->z80_ctrl & 0x10))
|
||||
state->crosshair_vis = 1;
|
||||
}
|
||||
|
||||
/* boost the interleave whenever this is written to */
|
||||
machine->scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
|
||||
|
||||
/* stash the new value */
|
||||
z80_ctrl = data;
|
||||
state->z80_ctrl = data;
|
||||
}
|
||||
|
||||
|
||||
@ -539,18 +527,19 @@ WRITE8_HANDLER( slikshot_z80_control_w )
|
||||
|
||||
VIDEO_START( slikshot )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
VIDEO_START_CALL( itech8 );
|
||||
|
||||
z80_ctrl = 0;
|
||||
z80_port_val = 0;
|
||||
z80_clear_to_send = 0;
|
||||
state->z80_ctrl = 0;
|
||||
state->z80_port_val = 0;
|
||||
state->z80_clear_to_send = 0;
|
||||
|
||||
sensor0 = sensor1 = sensor2 = sensor3 = 0;
|
||||
curvx = 0, curvy = 1, curx = 0;
|
||||
ybuffer_next = 0;
|
||||
curxpos = 0;
|
||||
last_ytotal = 0;
|
||||
crosshair_vis = 0;
|
||||
state->sensor0 = state->sensor1 = state->sensor2 = state->sensor3 = 0;
|
||||
state->curvx = 0, state->curvy = 1, state->curx = 0;
|
||||
state->ybuffer_next = 0;
|
||||
state->curxpos = 0;
|
||||
state->last_ytotal = 0;
|
||||
state->crosshair_vis = 0;
|
||||
}
|
||||
|
||||
|
||||
@ -562,6 +551,7 @@ VIDEO_START( slikshot )
|
||||
|
||||
SCREEN_UPDATE( slikshot )
|
||||
{
|
||||
itech8_state *state = screen->machine->driver_data<itech8_state>();
|
||||
int totaldy, totaldx;
|
||||
int temp, i;
|
||||
|
||||
@ -569,53 +559,53 @@ SCREEN_UPDATE( slikshot )
|
||||
SCREEN_UPDATE_CALL(itech8_2page);
|
||||
|
||||
/* add the current X,Y positions to the list */
|
||||
xbuffer[ybuffer_next % YBUFFER_COUNT] = input_port_read_safe(screen->machine, "FAKEX", 0);
|
||||
ybuffer[ybuffer_next % YBUFFER_COUNT] = input_port_read_safe(screen->machine, "FAKEY", 0);
|
||||
ybuffer_next++;
|
||||
state->xbuffer[state->ybuffer_next % YBUFFER_COUNT] = input_port_read_safe(screen->machine, "FAKEX", 0);
|
||||
state->ybuffer[state->ybuffer_next % YBUFFER_COUNT] = input_port_read_safe(screen->machine, "FAKEY", 0);
|
||||
state->ybuffer_next++;
|
||||
|
||||
/* determine where to draw the starting point */
|
||||
curxpos += xbuffer[(ybuffer_next + 1) % YBUFFER_COUNT];
|
||||
if (curxpos < -0x80) curxpos = -0x80;
|
||||
if (curxpos > 0x80) curxpos = 0x80;
|
||||
state->curxpos += state->xbuffer[(state->ybuffer_next + 1) % YBUFFER_COUNT];
|
||||
if (state->curxpos < -0x80) state->curxpos = -0x80;
|
||||
if (state->curxpos > 0x80) state->curxpos = 0x80;
|
||||
|
||||
/* compute the total X/Y movement */
|
||||
totaldx = totaldy = 0;
|
||||
for (i = 0; i < YBUFFER_COUNT - 1; i++)
|
||||
{
|
||||
totaldx += xbuffer[(ybuffer_next + i + 1) % YBUFFER_COUNT];
|
||||
totaldy += ybuffer[(ybuffer_next + i + 1) % YBUFFER_COUNT];
|
||||
totaldx += state->xbuffer[(state->ybuffer_next + i + 1) % YBUFFER_COUNT];
|
||||
totaldy += state->ybuffer[(state->ybuffer_next + i + 1) % YBUFFER_COUNT];
|
||||
}
|
||||
|
||||
/* if the shoot button is pressed, fire away */
|
||||
if (totaldy < last_ytotal && last_ytotal > 50 && crosshair_vis)
|
||||
if (totaldy < state->last_ytotal && state->last_ytotal > 50 && state->crosshair_vis)
|
||||
{
|
||||
/* compute the updated values */
|
||||
temp = totaldx;
|
||||
if (temp <= -0x80) temp = -0x7f;
|
||||
if (temp >= 0x80) temp = 0x7f;
|
||||
curvx = temp;
|
||||
state->curvx = temp;
|
||||
|
||||
temp = last_ytotal - 50;
|
||||
temp = state->last_ytotal - 50;
|
||||
if (temp <= 0x10) temp = 0x10;
|
||||
if (temp >= 0x7f) temp = 0x7f;
|
||||
curvy = temp;
|
||||
state->curvy = temp;
|
||||
|
||||
temp = 0x60 + (curxpos * 0x30 / 0x80);
|
||||
temp = 0x60 + (state->curxpos * 0x30 / 0x80);
|
||||
if (temp <= 0x30) temp = 0x30;
|
||||
if (temp >= 0x90) temp = 0x90;
|
||||
curx = temp;
|
||||
state->curx = temp;
|
||||
|
||||
compute_sensors(screen->machine);
|
||||
// popmessage("V=%02x,%02x X=%02x", curvx, curvy, curx);
|
||||
crosshair_vis = 0;
|
||||
// popmessage("V=%02x,%02x X=%02x", state->curvx, state->curvy, state->curx);
|
||||
state->crosshair_vis = 0;
|
||||
}
|
||||
last_ytotal = totaldy;
|
||||
state->last_ytotal = totaldy;
|
||||
|
||||
/* clear the buffer while the crosshair is not visible */
|
||||
if (!crosshair_vis)
|
||||
if (!state->crosshair_vis)
|
||||
{
|
||||
memset(xbuffer, 0, sizeof(xbuffer));
|
||||
memset(ybuffer, 0, sizeof(ybuffer));
|
||||
memset(state->xbuffer, 0, sizeof(state->xbuffer));
|
||||
memset(state->ybuffer, 0, sizeof(state->ybuffer));
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -15,33 +15,23 @@
|
||||
#define ASSERT 1
|
||||
|
||||
|
||||
int toaplan_main_cpu; /* Main CPU type. 0 = 68000, 1 = Z80 */
|
||||
static int twincobr_intenable;
|
||||
int wardner_membank;
|
||||
static int twincobr_dsp_on;
|
||||
static int twincobr_dsp_BIO;
|
||||
static int fsharkbt_8741;
|
||||
static int dsp_execute;
|
||||
static UINT32 dsp_addr_w, main_ram_seg;
|
||||
|
||||
static const int toaplan_port_type[2] = { 0x7800c, 0x5c };
|
||||
|
||||
UINT8 *twincobr_sharedram;
|
||||
|
||||
|
||||
|
||||
INTERRUPT_GEN( twincobr_interrupt )
|
||||
{
|
||||
if (twincobr_intenable) {
|
||||
twincobr_intenable = 0;
|
||||
twincobr_state *state = device->machine->driver_data<twincobr_state>();
|
||||
if (state->intenable) {
|
||||
state->intenable = 0;
|
||||
cpu_set_input_line(device, M68K_IRQ_4, HOLD_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
INTERRUPT_GEN( wardner_interrupt )
|
||||
{
|
||||
if (twincobr_intenable) {
|
||||
twincobr_intenable = 0;
|
||||
twincobr_state *state = device->machine->driver_data<twincobr_state>();
|
||||
if (state->intenable) {
|
||||
state->intenable = 0;
|
||||
cpu_set_input_line(device, 0, HOLD_LINE);
|
||||
}
|
||||
}
|
||||
@ -49,6 +39,7 @@ INTERRUPT_GEN( wardner_interrupt )
|
||||
|
||||
WRITE16_HANDLER( twincobr_dsp_addrsel_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* This sets the main CPU RAM address the DSP should */
|
||||
/* read/write, via the DSP IO port 0 */
|
||||
/* Top three bits of data need to be shifted left 3 places */
|
||||
@ -57,101 +48,107 @@ WRITE16_HANDLER( twincobr_dsp_addrsel_w )
|
||||
/* Lower thirteen bits of this data is shifted left one position */
|
||||
/* to move it to an even address word boundary */
|
||||
|
||||
main_ram_seg = ((data & 0xe000) << 3);
|
||||
dsp_addr_w = ((data & 0x1fff) << 1);
|
||||
state->main_ram_seg = ((data & 0xe000) << 3);
|
||||
state->dsp_addr_w = ((data & 0x1fff) << 1);
|
||||
|
||||
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(space->cpu),data,state->main_ram_seg + state->dsp_addr_w));
|
||||
}
|
||||
|
||||
READ16_HANDLER( twincobr_dsp_r )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* DSP can read data from main CPU RAM via DSP IO port 1 */
|
||||
|
||||
address_space *mainspace;
|
||||
UINT16 input_data = 0;
|
||||
switch (main_ram_seg) {
|
||||
switch (state->main_ram_seg) {
|
||||
case 0x30000:
|
||||
case 0x40000:
|
||||
case 0x50000: mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
input_data = mainspace->read_word(main_ram_seg + dsp_addr_w);
|
||||
input_data = mainspace->read_word(state->main_ram_seg + state->dsp_addr_w);
|
||||
break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),state->main_ram_seg + state->dsp_addr_w); break;
|
||||
}
|
||||
LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),input_data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),input_data,state->main_ram_seg + state->dsp_addr_w));
|
||||
return input_data;
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_dsp_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
address_space *mainspace;
|
||||
|
||||
/* Data written to main CPU RAM via DSP IO port 1 */
|
||||
dsp_execute = 0;
|
||||
switch (main_ram_seg) {
|
||||
case 0x30000: if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
|
||||
state->dsp_execute = 0;
|
||||
switch (state->main_ram_seg) {
|
||||
case 0x30000: if ((state->dsp_addr_w < 3) && (data == 0)) state->dsp_execute = 1;
|
||||
case 0x40000:
|
||||
case 0x50000: mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
mainspace->write_word(main_ram_seg + dsp_addr_w, data);
|
||||
mainspace->write_word(state->main_ram_seg + state->dsp_addr_w, data);
|
||||
break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),state->main_ram_seg + state->dsp_addr_w); break;
|
||||
}
|
||||
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),data,state->main_ram_seg + state->dsp_addr_w));
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( wardner_dsp_addrsel_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* This sets the main CPU RAM address the DSP should */
|
||||
/* read/write, via the DSP IO port 0 */
|
||||
/* Lower twelve bits of this data is shifted left one position */
|
||||
/* to move it to an even address boundary */
|
||||
|
||||
main_ram_seg = (data & 0xe000);
|
||||
dsp_addr_w = ((data & 0x07ff) << 1);
|
||||
state->main_ram_seg = (data & 0xe000);
|
||||
state->dsp_addr_w = ((data & 0x07ff) << 1);
|
||||
|
||||
if (main_ram_seg == 0x6000) main_ram_seg = 0x7000;
|
||||
if (state->main_ram_seg == 0x6000) state->main_ram_seg = 0x7000;
|
||||
|
||||
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(space->cpu),data,state->main_ram_seg + state->dsp_addr_w));
|
||||
}
|
||||
|
||||
READ16_HANDLER( wardner_dsp_r )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* DSP can read data from main CPU RAM via DSP IO port 1 */
|
||||
|
||||
address_space *mainspace;
|
||||
UINT16 input_data = 0;
|
||||
switch (main_ram_seg) {
|
||||
switch (state->main_ram_seg) {
|
||||
case 0x7000:
|
||||
case 0x8000:
|
||||
case 0xa000: mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
input_data = mainspace->read_byte(main_ram_seg + (dsp_addr_w + 0))
|
||||
| (mainspace->read_byte(main_ram_seg + (dsp_addr_w + 1)) << 8);
|
||||
input_data = mainspace->read_byte(state->main_ram_seg + (state->dsp_addr_w + 0))
|
||||
| (mainspace->read_byte(state->main_ram_seg + (state->dsp_addr_w + 1)) << 8);
|
||||
break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),state->main_ram_seg + state->dsp_addr_w); break;
|
||||
}
|
||||
LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),input_data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),input_data,state->main_ram_seg + state->dsp_addr_w));
|
||||
return input_data;
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( wardner_dsp_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
address_space *mainspace;
|
||||
|
||||
/* Data written to main CPU RAM via DSP IO port 1 */
|
||||
dsp_execute = 0;
|
||||
switch (main_ram_seg) {
|
||||
case 0x7000: if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
|
||||
state->dsp_execute = 0;
|
||||
switch (state->main_ram_seg) {
|
||||
case 0x7000: if ((state->dsp_addr_w < 3) && (data == 0)) state->dsp_execute = 1;
|
||||
case 0x8000:
|
||||
case 0xa000: mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
|
||||
mainspace->write_byte(main_ram_seg + (dsp_addr_w + 0), (data & 0xff));
|
||||
mainspace->write_byte(main_ram_seg + (dsp_addr_w + 1), ((data >> 8) & 0xff));
|
||||
mainspace->write_byte(state->main_ram_seg + (state->dsp_addr_w + 0), (data & 0xff));
|
||||
mainspace->write_byte(state->main_ram_seg + (state->dsp_addr_w + 1), ((data >> 8) & 0xff));
|
||||
break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
|
||||
default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),state->main_ram_seg + state->dsp_addr_w); break;
|
||||
}
|
||||
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),data,main_ram_seg + dsp_addr_w));
|
||||
LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(space->cpu),data,state->main_ram_seg + state->dsp_addr_w));
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_dsp_bio_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* data 0xffff means inhibit BIO line to DSP and enable */
|
||||
/* communication to main processor */
|
||||
/* Actually only DSP data bit 15 controls this */
|
||||
@ -159,46 +156,50 @@ WRITE16_HANDLER( twincobr_dsp_bio_w )
|
||||
/* communication to main processor*/
|
||||
LOG(("DSP PC:%04x IO write %04x at port 3\n",cpu_get_previouspc(space->cpu),data));
|
||||
if (data & 0x8000) {
|
||||
twincobr_dsp_BIO = CLEAR_LINE;
|
||||
state->dsp_BIO = CLEAR_LINE;
|
||||
}
|
||||
if (data == 0) {
|
||||
if (dsp_execute) {
|
||||
if (state->dsp_execute) {
|
||||
LOG(("Turning the main CPU on\n"));
|
||||
cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
|
||||
dsp_execute = 0;
|
||||
state->dsp_execute = 0;
|
||||
}
|
||||
twincobr_dsp_BIO = ASSERT_LINE;
|
||||
state->dsp_BIO = ASSERT_LINE;
|
||||
}
|
||||
}
|
||||
|
||||
READ16_HANDLER( fsharkbt_dsp_r )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
/* IO Port 2 used by Flying Shark bootleg */
|
||||
/* DSP reads data from an extra MCU (8741) at IO port 2 */
|
||||
/* Port is read three times during startup. First and last data */
|
||||
/* read must equal, but second data read must be different */
|
||||
fsharkbt_8741 += 1;
|
||||
LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",cpu_get_previouspc(space->cpu),(fsharkbt_8741 & 0x08)));
|
||||
return (fsharkbt_8741 & 1);
|
||||
state->fsharkbt_8741 += 1;
|
||||
LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",cpu_get_previouspc(space->cpu),(state->fsharkbt_8741 & 0x08)));
|
||||
return (state->fsharkbt_8741 & 1);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( fsharkbt_dsp_w )
|
||||
{
|
||||
/* Flying Shark bootleg DSP writes data to an extra MCU (8741) at IO port 2 */
|
||||
#if 0
|
||||
logerror("DSP PC:%04x IO write from DSP RAM:%04x to 8741 MCU (port 2)\n",cpu_get_previouspc(space->cpu),fsharkbt_8741);
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
logerror("DSP PC:%04x IO write from DSP RAM:%04x to 8741 MCU (port 2)\n",cpu_get_previouspc(space->cpu),state->fsharkbt_8741);
|
||||
#endif
|
||||
}
|
||||
|
||||
READ16_HANDLER ( twincobr_BIO_r )
|
||||
{
|
||||
return twincobr_dsp_BIO;
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
return state->dsp_BIO;
|
||||
}
|
||||
|
||||
|
||||
static void twincobr_dsp(running_machine *machine, int enable)
|
||||
{
|
||||
twincobr_dsp_on = enable;
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state->dsp_on = enable;
|
||||
if (enable) {
|
||||
LOG(("Turning DSP on and main CPU off\n"));
|
||||
cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, CLEAR_LINE);
|
||||
@ -214,32 +215,34 @@ static void twincobr_dsp(running_machine *machine, int enable)
|
||||
|
||||
static STATE_POSTLOAD( twincobr_restore_dsp )
|
||||
{
|
||||
twincobr_dsp(machine, twincobr_dsp_on);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
twincobr_dsp(machine, state->dsp_on);
|
||||
}
|
||||
|
||||
|
||||
static void toaplan0_control_w(running_machine *machine, int offset, int data)
|
||||
{
|
||||
LOG(("%s:Writing %08x to %08x.\n",machine->describe_context(),data,toaplan_port_type[toaplan_main_cpu] - offset));
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
LOG(("%s:Writing %08x to %08x.\n",machine->describe_context(),data,toaplan_port_type[state->toaplan_main_cpu] - offset));
|
||||
|
||||
if (toaplan_main_cpu == 1) {
|
||||
if (data == 0x0c) { data = 0x1c; wardner_sprite_hack=0; } /* Z80 ? */
|
||||
if (data == 0x0d) { data = 0x1d; wardner_sprite_hack=1; } /* Z80 ? */
|
||||
if (state->toaplan_main_cpu == 1) {
|
||||
if (data == 0x0c) { data = 0x1c; state->wardner_sprite_hack=0; } /* Z80 ? */
|
||||
if (data == 0x0d) { data = 0x1d; state->wardner_sprite_hack=1; } /* Z80 ? */
|
||||
}
|
||||
|
||||
switch (data) {
|
||||
case 0x0004: twincobr_intenable = 0; break;
|
||||
case 0x0005: twincobr_intenable = 1; break;
|
||||
case 0x0004: state->intenable = 0; break;
|
||||
case 0x0005: state->intenable = 1; break;
|
||||
case 0x0006: twincobr_flipscreen(machine, 0); break;
|
||||
case 0x0007: twincobr_flipscreen(machine, 1); break;
|
||||
case 0x0008: twincobr_bg_ram_bank = 0x0000; break;
|
||||
case 0x0009: twincobr_bg_ram_bank = 0x1000; break;
|
||||
case 0x000a: twincobr_fg_rom_bank = 0x0000; break;
|
||||
case 0x000b: twincobr_fg_rom_bank = 0x1000; break;
|
||||
case 0x0008: state->bg_ram_bank = 0x0000; break;
|
||||
case 0x0009: state->bg_ram_bank = 0x1000; break;
|
||||
case 0x000a: state->fg_rom_bank = 0x0000; break;
|
||||
case 0x000b: state->fg_rom_bank = 0x1000; break;
|
||||
case 0x000c: twincobr_dsp(machine, 1); break; /* Enable the INT line to the DSP */
|
||||
case 0x000d: twincobr_dsp(machine, 0); break; /* Inhibit the INT line to the DSP */
|
||||
case 0x000e: twincobr_display(0); break; /* Turn display off */
|
||||
case 0x000f: twincobr_display(1); break; /* Turn display on */
|
||||
case 0x000e: twincobr_display(machine, 0); break; /* Turn display off */
|
||||
case 0x000f: twincobr_display(machine, 1); break; /* Turn display on */
|
||||
}
|
||||
}
|
||||
|
||||
@ -259,22 +262,25 @@ WRITE8_HANDLER( wardner_control_w )
|
||||
|
||||
READ16_HANDLER( twincobr_sharedram_r )
|
||||
{
|
||||
return twincobr_sharedram[offset];
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
return state->sharedram[offset];
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_sharedram_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
twincobr_sharedram[offset] = data & 0xff;
|
||||
state->sharedram[offset] = data & 0xff;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void toaplan0_coin_dsp_w(address_space *space, int offset, int data)
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
if (data > 1)
|
||||
LOG(("%s:Writing %08x to %08x.\n",space->machine->describe_context(),data,toaplan_port_type[toaplan_main_cpu] - offset));
|
||||
LOG(("%s:Writing %08x to %08x.\n",space->machine->describe_context(),data,toaplan_port_type[state->toaplan_main_cpu] - offset));
|
||||
switch (data) {
|
||||
case 0x08: coin_counter_w(space->machine, 0,0); break;
|
||||
case 0x09: coin_counter_w(space->machine, 0,1); break;
|
||||
@ -321,54 +327,59 @@ WRITE8_HANDLER( wardner_coin_dsp_w )
|
||||
|
||||
MACHINE_RESET( twincobr )
|
||||
{
|
||||
toaplan_main_cpu = 0; /* 68000 */
|
||||
twincobr_display(0);
|
||||
twincobr_intenable = 0;
|
||||
dsp_addr_w = 0;
|
||||
main_ram_seg = 0;
|
||||
dsp_execute = 0;
|
||||
twincobr_dsp_BIO = CLEAR_LINE;
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state->toaplan_main_cpu = 0; /* 68000 */
|
||||
twincobr_display(machine, 0);
|
||||
state->intenable = 0;
|
||||
state->dsp_addr_w = 0;
|
||||
state->main_ram_seg = 0;
|
||||
state->dsp_execute = 0;
|
||||
state->dsp_BIO = CLEAR_LINE;
|
||||
}
|
||||
MACHINE_RESET( fsharkbt )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
MACHINE_RESET_CALL(twincobr);
|
||||
fsharkbt_8741 = -1; /* Reset the Flying Shark Bootleg MCU */
|
||||
state->fsharkbt_8741 = -1; /* Reset the Flying Shark Bootleg MCU */
|
||||
}
|
||||
|
||||
void twincobr_driver_savestate(running_machine *machine)
|
||||
{
|
||||
state_save_register_global(machine, toaplan_main_cpu);
|
||||
state_save_register_global(machine, twincobr_intenable);
|
||||
state_save_register_global(machine, twincobr_dsp_on);
|
||||
state_save_register_global(machine, dsp_addr_w);
|
||||
state_save_register_global(machine, main_ram_seg);
|
||||
state_save_register_global(machine, twincobr_dsp_BIO);
|
||||
state_save_register_global(machine, dsp_execute);
|
||||
state_save_register_global(machine, fsharkbt_8741);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state_save_register_global(machine, state->toaplan_main_cpu);
|
||||
state_save_register_global(machine, state->intenable);
|
||||
state_save_register_global(machine, state->dsp_on);
|
||||
state_save_register_global(machine, state->dsp_addr_w);
|
||||
state_save_register_global(machine, state->main_ram_seg);
|
||||
state_save_register_global(machine, state->dsp_BIO);
|
||||
state_save_register_global(machine, state->dsp_execute);
|
||||
state_save_register_global(machine, state->fsharkbt_8741);
|
||||
machine->state().register_postload(twincobr_restore_dsp, NULL);
|
||||
}
|
||||
|
||||
MACHINE_RESET( wardner )
|
||||
{
|
||||
toaplan_main_cpu = 1; /* Z80 */
|
||||
twincobr_display(1);
|
||||
twincobr_intenable = 0;
|
||||
dsp_addr_w = 0;
|
||||
main_ram_seg = 0;
|
||||
dsp_execute = 0;
|
||||
twincobr_dsp_BIO = CLEAR_LINE;
|
||||
wardner_membank = 0;
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state->toaplan_main_cpu = 1; /* Z80 */
|
||||
twincobr_display(machine, 1);
|
||||
state->intenable = 0;
|
||||
state->dsp_addr_w = 0;
|
||||
state->main_ram_seg = 0;
|
||||
state->dsp_execute = 0;
|
||||
state->dsp_BIO = CLEAR_LINE;
|
||||
state->wardner_membank = 0;
|
||||
}
|
||||
void wardner_driver_savestate(running_machine *machine)
|
||||
{
|
||||
state_save_register_global(machine, toaplan_main_cpu);
|
||||
state_save_register_global(machine, twincobr_intenable);
|
||||
state_save_register_global(machine, twincobr_dsp_on);
|
||||
state_save_register_global(machine, dsp_addr_w);
|
||||
state_save_register_global(machine, main_ram_seg);
|
||||
state_save_register_global(machine, twincobr_dsp_BIO);
|
||||
state_save_register_global(machine, dsp_execute);
|
||||
state_save_register_global(machine, wardner_membank);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state_save_register_global(machine, state->toaplan_main_cpu);
|
||||
state_save_register_global(machine, state->intenable);
|
||||
state_save_register_global(machine, state->dsp_on);
|
||||
state_save_register_global(machine, state->dsp_addr_w);
|
||||
state_save_register_global(machine, state->main_ram_seg);
|
||||
state_save_register_global(machine, state->dsp_BIO);
|
||||
state_save_register_global(machine, state->dsp_execute);
|
||||
state_save_register_global(machine, state->wardner_membank);
|
||||
machine->state().register_postload(wardner_restore_bank, NULL); /* Restore the Main CPU bank */
|
||||
machine->state().register_postload(twincobr_restore_dsp, NULL);
|
||||
}
|
||||
|
@ -103,10 +103,6 @@
|
||||
#include "video/resnet.h"
|
||||
#include "includes/funworld.h"
|
||||
|
||||
static tilemap_t *bg_tilemap;
|
||||
UINT8 *funworld_colorram;
|
||||
UINT8 *funworld_videoram;
|
||||
|
||||
|
||||
PALETTE_INIT(funworld)
|
||||
{
|
||||
@ -147,14 +143,16 @@ PALETTE_INIT(funworld)
|
||||
|
||||
WRITE8_HANDLER( funworld_videoram_w )
|
||||
{
|
||||
funworld_videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap, offset);
|
||||
funworld_state *state = space->machine->driver_data<funworld_state>();
|
||||
state->videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap, offset);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( funworld_colorram_w )
|
||||
{
|
||||
funworld_colorram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap, offset);
|
||||
funworld_state *state = space->machine->driver_data<funworld_state>();
|
||||
state->colorram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap, offset);
|
||||
}
|
||||
|
||||
|
||||
@ -168,15 +166,16 @@ WRITE8_HANDLER( funworld_colorram_w )
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
{
|
||||
funworld_state *state = machine->driver_data<funworld_state>();
|
||||
/* - bits -
|
||||
7654 3210
|
||||
xxxx ---- tiles color.
|
||||
---- xxxx unused.
|
||||
*/
|
||||
int offs = tile_index;
|
||||
int attr = funworld_videoram[offs] + (funworld_colorram[offs] << 8);
|
||||
int attr = state->videoram[offs] + (state->colorram[offs] << 8);
|
||||
int code = attr & 0xfff;
|
||||
int color = funworld_colorram[offs] >> 4; // 4 bits for color.
|
||||
int color = state->colorram[offs] >> 4; // 4 bits for color.
|
||||
|
||||
SET_TILE_INFO(0, code, color, 0);
|
||||
}
|
||||
@ -184,17 +183,20 @@ static TILE_GET_INFO( get_bg_tile_info )
|
||||
|
||||
VIDEO_START(funworld)
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 4, 8, 96, 29);
|
||||
funworld_state *state = machine->driver_data<funworld_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 4, 8, 96, 29);
|
||||
}
|
||||
|
||||
VIDEO_START(magicrd2)
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 4, 8, 112, 34);
|
||||
funworld_state *state = machine->driver_data<funworld_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 4, 8, 112, 34);
|
||||
}
|
||||
|
||||
|
||||
SCREEN_UPDATE(funworld)
|
||||
{
|
||||
tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
|
||||
funworld_state *state = screen->machine->driver_data<funworld_state>();
|
||||
tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
|
||||
return 0;
|
||||
}
|
||||
|
@ -132,34 +132,6 @@
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Global variables
|
||||
*
|
||||
*************************************/
|
||||
|
||||
UINT8 *itech8_grom_bank;
|
||||
|
||||
static UINT8 blitter_data[16];
|
||||
static UINT8 blit_in_progress;
|
||||
|
||||
static UINT8 page_select;
|
||||
|
||||
static offs_t fetch_offset;
|
||||
static UINT8 fetch_rle_count;
|
||||
static UINT8 fetch_rle_value;
|
||||
static UINT8 fetch_rle_literal;
|
||||
|
||||
static struct tms34061_display tms_state;
|
||||
static UINT8 *grom_base;
|
||||
static UINT32 grom_size;
|
||||
|
||||
static UINT8 grmatch_palcontrol;
|
||||
static UINT8 grmatch_xscroll;
|
||||
static rgb_t grmatch_palette[2][16];
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* TMS34061 interfacing
|
||||
@ -192,18 +164,19 @@ static const struct tms34061_interface tms34061intf =
|
||||
|
||||
VIDEO_START( itech8 )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
/* initialize TMS34061 emulation */
|
||||
tms34061_start(machine, &tms34061intf);
|
||||
tms34061_start(machine, &tms34061intf);
|
||||
|
||||
/* get the TMS34061 display state */
|
||||
tms34061_get_display_state(&tms_state);
|
||||
tms34061_get_display_state(&state->tms_state);
|
||||
|
||||
/* reset statics */
|
||||
page_select = 0xc0;
|
||||
state->page_select = 0xc0;
|
||||
|
||||
/* fetch the GROM base */
|
||||
grom_base = machine->region("grom")->base();
|
||||
grom_size = machine->region("grom")->bytes();
|
||||
state->grom_base = machine->region("grom")->base();
|
||||
state->grom_size = machine->region("grom")->bytes();
|
||||
}
|
||||
|
||||
|
||||
@ -229,9 +202,10 @@ WRITE8_HANDLER( itech8_palette_w )
|
||||
|
||||
WRITE8_HANDLER( itech8_page_w )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
space->machine->primary_screen->update_partial(space->machine->primary_screen->vpos());
|
||||
logerror("%04x:display_page = %02X (%d)\n", cpu_get_pc(space->cpu), data, space->machine->primary_screen->vpos());
|
||||
page_select = data;
|
||||
state->page_select = data;
|
||||
}
|
||||
|
||||
|
||||
@ -243,60 +217,60 @@ WRITE8_HANDLER( itech8_page_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
INLINE UINT8 fetch_next_raw(void)
|
||||
INLINE UINT8 fetch_next_raw(itech8_state *state)
|
||||
{
|
||||
return grom_base[fetch_offset++ % grom_size];
|
||||
return state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
}
|
||||
|
||||
|
||||
INLINE void consume_raw(int count)
|
||||
INLINE void consume_raw(itech8_state *state, int count)
|
||||
{
|
||||
fetch_offset += count;
|
||||
state->fetch_offset += count;
|
||||
}
|
||||
|
||||
|
||||
INLINE UINT8 fetch_next_rle(void)
|
||||
INLINE UINT8 fetch_next_rle(itech8_state *state)
|
||||
{
|
||||
if (fetch_rle_count == 0)
|
||||
if (state->fetch_rle_count == 0)
|
||||
{
|
||||
fetch_rle_count = grom_base[fetch_offset++ % grom_size];
|
||||
fetch_rle_literal = fetch_rle_count & 0x80;
|
||||
fetch_rle_count &= 0x7f;
|
||||
state->fetch_rle_count = state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
state->fetch_rle_literal = state->fetch_rle_count & 0x80;
|
||||
state->fetch_rle_count &= 0x7f;
|
||||
|
||||
if (!fetch_rle_literal)
|
||||
fetch_rle_value = grom_base[fetch_offset++ % grom_size];
|
||||
if (!state->fetch_rle_literal)
|
||||
state->fetch_rle_value = state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
}
|
||||
|
||||
fetch_rle_count--;
|
||||
if (fetch_rle_literal)
|
||||
fetch_rle_value = grom_base[fetch_offset++ % grom_size];
|
||||
state->fetch_rle_count--;
|
||||
if (state->fetch_rle_literal)
|
||||
state->fetch_rle_value = state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
|
||||
return fetch_rle_value;
|
||||
return state->fetch_rle_value;
|
||||
}
|
||||
|
||||
|
||||
INLINE void consume_rle(int count)
|
||||
INLINE void consume_rle(itech8_state *state, int count)
|
||||
{
|
||||
while (count)
|
||||
{
|
||||
int num_to_consume;
|
||||
|
||||
if (fetch_rle_count == 0)
|
||||
if (state->fetch_rle_count == 0)
|
||||
{
|
||||
fetch_rle_count = grom_base[fetch_offset++ % grom_size];
|
||||
fetch_rle_literal = fetch_rle_count & 0x80;
|
||||
fetch_rle_count &= 0x7f;
|
||||
state->fetch_rle_count = state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
state->fetch_rle_literal = state->fetch_rle_count & 0x80;
|
||||
state->fetch_rle_count &= 0x7f;
|
||||
|
||||
if (!fetch_rle_literal)
|
||||
fetch_rle_value = grom_base[fetch_offset++ % grom_size];
|
||||
if (!state->fetch_rle_literal)
|
||||
state->fetch_rle_value = state->grom_base[state->fetch_offset++ % state->grom_size];
|
||||
}
|
||||
|
||||
num_to_consume = (count < fetch_rle_count) ? count : fetch_rle_count;
|
||||
num_to_consume = (count < state->fetch_rle_count) ? count : state->fetch_rle_count;
|
||||
count -= num_to_consume;
|
||||
|
||||
fetch_rle_count -= num_to_consume;
|
||||
if (fetch_rle_literal)
|
||||
fetch_offset += num_to_consume;
|
||||
state->fetch_rle_count -= num_to_consume;
|
||||
if (state->fetch_rle_literal)
|
||||
state->fetch_offset += num_to_consume;
|
||||
}
|
||||
}
|
||||
|
||||
@ -310,7 +284,10 @@ INLINE void consume_rle(int count)
|
||||
|
||||
static void perform_blit(address_space *space)
|
||||
{
|
||||
offs_t addr = tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8);
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
UINT8 *blitter_data = state->blitter_data;
|
||||
offs_t addr = state->tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8);
|
||||
UINT8 shift = (BLITTER_FLAGS & BLITFLAG_SHIFT) ? 4 : 0;
|
||||
int transparent = (BLITTER_FLAGS & BLITFLAG_TRANSPARENT);
|
||||
int ydir = (BLITTER_FLAGS & BLITFLAG_YFLIP) ? -1 : 1;
|
||||
@ -329,17 +306,17 @@ static void perform_blit(address_space *space)
|
||||
if (FULL_LOGGING)
|
||||
logerror("Blit: scan=%d src=%06x @ (%05x) for %dx%d ... flags=%02x\n",
|
||||
space->machine->primary_screen->vpos(),
|
||||
(*itech8_grom_bank << 16) | (BLITTER_ADDRHI << 8) | BLITTER_ADDRLO,
|
||||
(*state->grom_bank << 16) | (BLITTER_ADDRHI << 8) | BLITTER_ADDRLO,
|
||||
tms_state.regs[TMS34061_XYADDRESS] | ((tms_state.regs[TMS34061_XYOFFSET] & 0x300) << 8),
|
||||
BLITTER_WIDTH, BLITTER_HEIGHT, BLITTER_FLAGS);
|
||||
|
||||
/* initialize the fetcher */
|
||||
fetch_offset = (*itech8_grom_bank << 16) | (BLITTER_ADDRHI << 8) | BLITTER_ADDRLO;
|
||||
fetch_rle_count = 0;
|
||||
state->fetch_offset = (*state->grom_bank << 16) | (BLITTER_ADDRHI << 8) | BLITTER_ADDRLO;
|
||||
state->fetch_rle_count = 0;
|
||||
|
||||
/* RLE starts with a couple of extra 0's */
|
||||
if (rle)
|
||||
fetch_offset += 2;
|
||||
state->fetch_offset += 2;
|
||||
|
||||
/* select 4-bit versus 8-bit transparency */
|
||||
if (BLITTER_OUTPUT & 0x40)
|
||||
@ -371,9 +348,9 @@ static void perform_blit(address_space *space)
|
||||
/* skip src and dest */
|
||||
addr += xdir * (width + skip[0] + skip[1]);
|
||||
if (rle)
|
||||
consume_rle(width + skip[0] + skip[1]);
|
||||
consume_rle(state, width + skip[0] + skip[1]);
|
||||
else
|
||||
consume_raw(width + skip[0] + skip[1]);
|
||||
consume_raw(state, width + skip[0] + skip[1]);
|
||||
|
||||
/* back up one and reverse directions */
|
||||
addr -= xdir;
|
||||
@ -388,14 +365,14 @@ static void perform_blit(address_space *space)
|
||||
/* skip left */
|
||||
addr += xdir * skip[y & 1];
|
||||
if (rle)
|
||||
consume_rle(skip[y & 1]);
|
||||
consume_rle(state, skip[y & 1]);
|
||||
else
|
||||
consume_raw(skip[y & 1]);
|
||||
consume_raw(state, skip[y & 1]);
|
||||
|
||||
/* loop over width */
|
||||
for (x = 0; x < width; x++)
|
||||
{
|
||||
UINT8 pix = rle ? fetch_next_rle() : fetch_next_raw();
|
||||
UINT8 pix = rle ? fetch_next_rle(state) : fetch_next_raw(state);
|
||||
|
||||
/* swap pixels for X flip in 4bpp mode */
|
||||
if (xflip && transmaskhi != 0xff)
|
||||
@ -424,9 +401,9 @@ static void perform_blit(address_space *space)
|
||||
/* skip right */
|
||||
addr += xdir * skip[~y & 1];
|
||||
if (rle)
|
||||
consume_rle(skip[~y & 1]);
|
||||
consume_rle(state, skip[~y & 1]);
|
||||
else
|
||||
consume_raw(skip[~y & 1]);
|
||||
consume_raw(state, skip[~y & 1]);
|
||||
|
||||
/* back up one and reverse directions */
|
||||
addr -= xdir;
|
||||
@ -446,8 +423,9 @@ static void perform_blit(address_space *space)
|
||||
|
||||
static TIMER_CALLBACK( blitter_done )
|
||||
{
|
||||
itech8_state *state = machine->driver_data<itech8_state>();
|
||||
/* turn off blitting and generate an interrupt */
|
||||
blit_in_progress = 0;
|
||||
state->blit_in_progress = 0;
|
||||
itech8_update_interrupts(machine, -1, -1, 1);
|
||||
|
||||
if (FULL_LOGGING) logerror("------------ BLIT DONE (%d) --------------\n", machine->primary_screen->vpos());
|
||||
@ -463,7 +441,8 @@ static TIMER_CALLBACK( blitter_done )
|
||||
|
||||
READ8_HANDLER( itech8_blitter_r )
|
||||
{
|
||||
int result = blitter_data[offset / 2];
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
int result = state->blitter_data[offset / 2];
|
||||
static const char *const portnames[] = { "AN_C", "AN_D", "AN_E", "AN_F" };
|
||||
|
||||
/* debugging */
|
||||
@ -476,7 +455,7 @@ READ8_HANDLER( itech8_blitter_r )
|
||||
if (offset == 3)
|
||||
{
|
||||
itech8_update_interrupts(space->machine, -1, -1, 0);
|
||||
if (blit_in_progress)
|
||||
if (state->blit_in_progress)
|
||||
result |= 0x80;
|
||||
else
|
||||
result &= 0x7f;
|
||||
@ -492,6 +471,10 @@ READ8_HANDLER( itech8_blitter_r )
|
||||
|
||||
WRITE8_HANDLER( itech8_blitter_w )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
UINT8 *blitter_data = state->blitter_data;
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
|
||||
/* low bit seems to be ignored */
|
||||
offset /= 2;
|
||||
blitter_data[offset] = data;
|
||||
@ -504,7 +487,7 @@ WRITE8_HANDLER( itech8_blitter_w )
|
||||
{
|
||||
logerror("Blit: XY=%1X%04X SRC=%02X%02X%02X SIZE=%3dx%3d FLAGS=%02x",
|
||||
(tms_state.regs[TMS34061_XYOFFSET] >> 8) & 0x0f, tms_state.regs[TMS34061_XYADDRESS],
|
||||
*itech8_grom_bank, blitter_data[0], blitter_data[1],
|
||||
*state->grom_bank, blitter_data[0], blitter_data[1],
|
||||
blitter_data[4], blitter_data[5],
|
||||
blitter_data[2]);
|
||||
logerror(" %02X %02X %02X [%02X] %02X %02X %02X [%02X]-%02X %02X %02X %02X [%02X %02X %02X %02X]\n",
|
||||
@ -520,7 +503,7 @@ WRITE8_HANDLER( itech8_blitter_w )
|
||||
|
||||
/* perform the blit */
|
||||
perform_blit(space);
|
||||
blit_in_progress = 1;
|
||||
state->blit_in_progress = 1;
|
||||
|
||||
/* set a timer to go off when we're done */
|
||||
space->machine->scheduler().timer_set(attotime::from_hz(12000000/4) * (BLITTER_WIDTH * BLITTER_HEIGHT + 12), FUNC(blitter_done));
|
||||
@ -577,26 +560,30 @@ READ8_HANDLER( itech8_tms34061_r )
|
||||
|
||||
WRITE8_HANDLER( grmatch_palette_w )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
/* set the palette control; examined in the scanline callback */
|
||||
grmatch_palcontrol = data;
|
||||
state->grmatch_palcontrol = data;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_HANDLER( grmatch_xscroll_w )
|
||||
{
|
||||
itech8_state *state = space->machine->driver_data<itech8_state>();
|
||||
/* update the X scroll value */
|
||||
space->machine->primary_screen->update_now();
|
||||
grmatch_xscroll = data;
|
||||
state->grmatch_xscroll = data;
|
||||
}
|
||||
|
||||
|
||||
TIMER_DEVICE_CALLBACK( grmatch_palette_update )
|
||||
{
|
||||
itech8_state *state = timer.machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
/* if the high bit is set, we are supposed to latch the palette values */
|
||||
if (grmatch_palcontrol & 0x80)
|
||||
if (state->grmatch_palcontrol & 0x80)
|
||||
{
|
||||
/* the TMS34070s latch at the start of the frame, based on the first few bytes */
|
||||
UINT32 page_offset = (tms_state.dispstart & 0x0ffff) | grmatch_xscroll;
|
||||
UINT32 page_offset = (tms_state.dispstart & 0x0ffff) | state->grmatch_xscroll;
|
||||
int page, x;
|
||||
|
||||
/* iterate over both pages */
|
||||
@ -607,7 +594,7 @@ TIMER_DEVICE_CALLBACK( grmatch_palette_update )
|
||||
{
|
||||
UINT8 data0 = base[x * 2 + 0];
|
||||
UINT8 data1 = base[x * 2 + 1];
|
||||
grmatch_palette[page][x] = MAKE_RGB(pal4bit(data0 >> 0), pal4bit(data1 >> 4), pal4bit(data1 >> 0));
|
||||
state->grmatch_palette[page][x] = MAKE_RGB(pal4bit(data0 >> 0), pal4bit(data1 >> 4), pal4bit(data1 >> 0));
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -623,6 +610,8 @@ TIMER_DEVICE_CALLBACK( grmatch_palette_update )
|
||||
|
||||
SCREEN_UPDATE( itech8_2layer )
|
||||
{
|
||||
itech8_state *state = screen->machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
UINT32 page_offset;
|
||||
int x, y;
|
||||
const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
|
||||
@ -659,6 +648,8 @@ SCREEN_UPDATE( itech8_2layer )
|
||||
|
||||
SCREEN_UPDATE( itech8_grmatch )
|
||||
{
|
||||
itech8_state *state = screen->machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
UINT32 page_offset;
|
||||
int x, y;
|
||||
|
||||
@ -677,7 +668,7 @@ SCREEN_UPDATE( itech8_grmatch )
|
||||
/* bottom layer @ 0x20000 is 4bpp, colors come from TMS34070, enabled via palette control */
|
||||
/* 4bpp pixels are packed 2 to a byte */
|
||||
/* xscroll is set via a separate register */
|
||||
page_offset = (tms_state.dispstart & 0x0ffff) | grmatch_xscroll;
|
||||
page_offset = (tms_state.dispstart & 0x0ffff) | state->grmatch_xscroll;
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
{
|
||||
UINT8 *base0 = &tms_state.vram[0x00000 + ((page_offset + y * 256) & 0xffff)];
|
||||
@ -690,14 +681,14 @@ SCREEN_UPDATE( itech8_grmatch )
|
||||
UINT8 pix2 = base2[x / 2];
|
||||
|
||||
if ((pix0 & 0xf0) != 0)
|
||||
dest[x] = grmatch_palette[0][pix0 >> 4];
|
||||
dest[x] = state->grmatch_palette[0][pix0 >> 4];
|
||||
else
|
||||
dest[x] = grmatch_palette[1][pix2 >> 4];
|
||||
dest[x] = state->grmatch_palette[1][pix2 >> 4];
|
||||
|
||||
if ((pix0 & 0x0f) != 0)
|
||||
dest[x + 1] = grmatch_palette[0][pix0 & 0x0f];
|
||||
dest[x + 1] = state->grmatch_palette[0][pix0 & 0x0f];
|
||||
else
|
||||
dest[x + 1] = grmatch_palette[1][pix2 & 0x0f];
|
||||
dest[x + 1] = state->grmatch_palette[1][pix2 & 0x0f];
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
@ -706,6 +697,8 @@ SCREEN_UPDATE( itech8_grmatch )
|
||||
|
||||
SCREEN_UPDATE( itech8_2page )
|
||||
{
|
||||
itech8_state *state = screen->machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
UINT32 page_offset;
|
||||
int x, y;
|
||||
const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
|
||||
@ -722,7 +715,7 @@ SCREEN_UPDATE( itech8_2page )
|
||||
|
||||
/* there are two pages, each of which is a full 8bpp */
|
||||
/* page index is selected by the top bit of the page_select register */
|
||||
page_offset = ((page_select & 0x80) << 10) | (tms_state.dispstart & 0x0ffff);
|
||||
page_offset = ((state->page_select & 0x80) << 10) | (tms_state.dispstart & 0x0ffff);
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
{
|
||||
UINT8 *base = &tms_state.vram[(page_offset + y * 256) & 0x3ffff];
|
||||
@ -737,6 +730,8 @@ SCREEN_UPDATE( itech8_2page )
|
||||
|
||||
SCREEN_UPDATE( itech8_2page_large )
|
||||
{
|
||||
itech8_state *state = screen->machine->driver_data<itech8_state>();
|
||||
struct tms34061_display &tms_state = state->tms_state;
|
||||
UINT32 page_offset;
|
||||
int x, y;
|
||||
const rgb_t *pens = tlc34076_get_pens(screen->machine->device("tlc34076"));
|
||||
@ -755,7 +750,7 @@ SCREEN_UPDATE( itech8_2page_large )
|
||||
/* the low 4 bits come from the bitmap directly */
|
||||
/* the upper 4 bits were latched on each write into a separate bitmap */
|
||||
/* page index is selected by the top bit of the page_select register */
|
||||
page_offset = ((~page_select & 0x80) << 10) | (tms_state.dispstart & 0x0ffff);
|
||||
page_offset = ((~state->page_select & 0x80) << 10) | (tms_state.dispstart & 0x0ffff);
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
{
|
||||
UINT8 *base = &tms_state.vram[(page_offset + y * 256) & 0x3ffff];
|
||||
|
@ -7,75 +7,73 @@
|
||||
#include "emu.h"
|
||||
#include "includes/legionna.h"
|
||||
|
||||
UINT16 *legionna_back_data,*legionna_fore_data,*legionna_mid_data,*legionna_scrollram16,*legionna_textram;
|
||||
|
||||
static tilemap_t *background_layer,*foreground_layer,*midground_layer,*text_layer;
|
||||
UINT16 legionna_layer_disable;
|
||||
int legionna_sprite_xoffs,legionna_sprite_yoffs;
|
||||
static int legionna_has_extended_banking;
|
||||
static int legionna_has_extended_priority;
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
static UINT16 back_gfx_bank = 0,fore_gfx_bank = 0,mid_gfx_bank = 0;
|
||||
UINT8 grainbow_pri_n;
|
||||
|
||||
void heatbrl_setgfxbank(UINT16 data)
|
||||
void heatbrl_setgfxbank(running_machine *machine, UINT16 data)
|
||||
{
|
||||
back_gfx_bank = (data &0x4000) >> 2;
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
state->back_gfx_bank = (data &0x4000) >> 2;
|
||||
}
|
||||
|
||||
/*xxx- --- ---- ---- banking*/
|
||||
void denjinmk_setgfxbank(UINT16 data)
|
||||
void denjinmk_setgfxbank(running_machine *machine, UINT16 data)
|
||||
{
|
||||
fore_gfx_bank = (data &0x2000) >> 1;//???
|
||||
back_gfx_bank = (data &0x4000) >> 2;
|
||||
mid_gfx_bank = (data &0x8000) >> 3;//???
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
state->fore_gfx_bank = (data &0x2000) >> 1;//???
|
||||
state->back_gfx_bank = (data &0x4000) >> 2;
|
||||
state->mid_gfx_bank = (data &0x8000) >> 3;//???
|
||||
|
||||
tilemap_mark_all_tiles_dirty (background_layer);
|
||||
tilemap_mark_all_tiles_dirty (foreground_layer);
|
||||
tilemap_mark_all_tiles_dirty (midground_layer);
|
||||
tilemap_mark_all_tiles_dirty (text_layer);
|
||||
tilemap_mark_all_tiles_dirty (state->background_layer);
|
||||
tilemap_mark_all_tiles_dirty (state->foreground_layer);
|
||||
tilemap_mark_all_tiles_dirty (state->midground_layer);
|
||||
tilemap_mark_all_tiles_dirty (state->text_layer);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( legionna_background_w )
|
||||
{
|
||||
COMBINE_DATA(&legionna_back_data[offset]);
|
||||
tilemap_mark_tile_dirty(background_layer,offset);
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&state->back_data[offset]);
|
||||
tilemap_mark_tile_dirty(state->background_layer,offset);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( legionna_midground_w )
|
||||
{
|
||||
COMBINE_DATA(&legionna_mid_data[offset]);
|
||||
tilemap_mark_tile_dirty(midground_layer,offset);
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&state->mid_data[offset]);
|
||||
tilemap_mark_tile_dirty(state->midground_layer,offset);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( legionna_foreground_w )
|
||||
{
|
||||
COMBINE_DATA(&legionna_fore_data[offset]);
|
||||
tilemap_mark_tile_dirty(foreground_layer,offset);
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&state->fore_data[offset]);
|
||||
tilemap_mark_tile_dirty(state->foreground_layer,offset);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( legionna_text_w )
|
||||
{
|
||||
COMBINE_DATA(&legionna_textram[offset]);
|
||||
tilemap_mark_tile_dirty(text_layer,offset);
|
||||
legionna_state *state = space->machine->driver_data<legionna_state>();
|
||||
COMBINE_DATA(&state->textram[offset]);
|
||||
tilemap_mark_tile_dirty(state->text_layer,offset);
|
||||
}
|
||||
|
||||
static TILE_GET_INFO( get_back_tile_info )
|
||||
{
|
||||
int tile=legionna_back_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->back_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
tile |= back_gfx_bank; /* Heatbrl uses banking */
|
||||
tile |= state->back_gfx_bank; /* Heatbrl uses banking */
|
||||
|
||||
SET_TILE_INFO(1,tile,color,0);
|
||||
}
|
||||
|
||||
static TILE_GET_INFO( get_mid_tile_info )
|
||||
{
|
||||
int tile=legionna_mid_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->mid_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
@ -85,18 +83,20 @@ static TILE_GET_INFO( get_mid_tile_info )
|
||||
|
||||
static TILE_GET_INFO( get_mid_tile_info_denji )
|
||||
{
|
||||
int tile=legionna_mid_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->mid_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
tile |= mid_gfx_bank;
|
||||
tile |= state->mid_gfx_bank;
|
||||
|
||||
SET_TILE_INFO(5,tile,color,0);
|
||||
}
|
||||
|
||||
static TILE_GET_INFO( get_mid_tile_info_cupsoc )
|
||||
{
|
||||
int tile=legionna_mid_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->mid_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
@ -109,7 +109,8 @@ static TILE_GET_INFO( get_mid_tile_info_cupsoc )
|
||||
|
||||
static TILE_GET_INFO( get_fore_tile_info ) /* this is giving bad tiles... */
|
||||
{
|
||||
int tile=legionna_fore_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->fore_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
// legionnaire tile numbers / gfx set wrong, see screen after coin insertion
|
||||
@ -120,18 +121,20 @@ static TILE_GET_INFO( get_fore_tile_info ) /* this is giving bad tiles... */
|
||||
|
||||
static TILE_GET_INFO( get_fore_tile_info_denji )
|
||||
{
|
||||
int tile=legionna_fore_data[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile=state->fore_data[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
tile |= fore_gfx_bank;
|
||||
tile |= state->fore_gfx_bank;
|
||||
|
||||
SET_TILE_INFO(4,tile,color,0);
|
||||
}
|
||||
|
||||
static TILE_GET_INFO( get_text_tile_info )
|
||||
{
|
||||
int tile = legionna_textram[tile_index];
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
int tile = state->textram[tile_index];
|
||||
int color=(tile>>12)&0xf;
|
||||
|
||||
tile &= 0xfff;
|
||||
@ -141,79 +144,84 @@ static TILE_GET_INFO( get_text_tile_info )
|
||||
|
||||
VIDEO_START( legionna )
|
||||
{
|
||||
background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
foreground_layer = tilemap_create(machine, get_fore_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
midground_layer = tilemap_create(machine, get_mid_tile_info, tilemap_scan_rows,16,16,32,32);
|
||||
text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
state->background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
state->foreground_layer = tilemap_create(machine, get_fore_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
state->midground_layer = tilemap_create(machine, get_mid_tile_info, tilemap_scan_rows,16,16,32,32);
|
||||
state->text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
|
||||
legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
legionna_sprite_xoffs = 0;
|
||||
legionna_sprite_yoffs = 0;
|
||||
state->scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
state->sprite_xoffs = 0;
|
||||
state->sprite_yoffs = 0;
|
||||
|
||||
legionna_has_extended_banking = 0;
|
||||
legionna_has_extended_priority = 0;
|
||||
state->has_extended_banking = 0;
|
||||
state->has_extended_priority = 0;
|
||||
|
||||
tilemap_set_transparent_pen(background_layer,15);
|
||||
tilemap_set_transparent_pen(midground_layer,15);
|
||||
tilemap_set_transparent_pen(foreground_layer,15);
|
||||
tilemap_set_transparent_pen(text_layer,15);
|
||||
tilemap_set_transparent_pen(state->background_layer,15);
|
||||
tilemap_set_transparent_pen(state->midground_layer,15);
|
||||
tilemap_set_transparent_pen(state->foreground_layer,15);
|
||||
tilemap_set_transparent_pen(state->text_layer,15);
|
||||
}
|
||||
|
||||
VIDEO_START( denjinmk )
|
||||
{
|
||||
background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
foreground_layer = tilemap_create(machine, get_fore_tile_info_denji,tilemap_scan_rows,16,16,32,32);
|
||||
midground_layer = tilemap_create(machine, get_mid_tile_info_denji, tilemap_scan_rows,16,16,32,32);
|
||||
text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
state->background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
state->foreground_layer = tilemap_create(machine, get_fore_tile_info_denji,tilemap_scan_rows,16,16,32,32);
|
||||
state->midground_layer = tilemap_create(machine, get_mid_tile_info_denji, tilemap_scan_rows,16,16,32,32);
|
||||
state->text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
|
||||
legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
legionna_sprite_xoffs = 0;
|
||||
legionna_sprite_yoffs = 0;
|
||||
state->scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
state->sprite_xoffs = 0;
|
||||
state->sprite_yoffs = 0;
|
||||
|
||||
legionna_has_extended_banking = 1;
|
||||
legionna_has_extended_priority = 0;
|
||||
state->has_extended_banking = 1;
|
||||
state->has_extended_priority = 0;
|
||||
|
||||
tilemap_set_transparent_pen(background_layer,15);
|
||||
tilemap_set_transparent_pen(midground_layer,15);
|
||||
tilemap_set_transparent_pen(foreground_layer,15);
|
||||
tilemap_set_transparent_pen(text_layer,7);//?
|
||||
tilemap_set_transparent_pen(state->background_layer,15);
|
||||
tilemap_set_transparent_pen(state->midground_layer,15);
|
||||
tilemap_set_transparent_pen(state->foreground_layer,15);
|
||||
tilemap_set_transparent_pen(state->text_layer,7);//?
|
||||
}
|
||||
|
||||
VIDEO_START( cupsoc )
|
||||
{
|
||||
background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
foreground_layer = tilemap_create(machine, get_fore_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
midground_layer = tilemap_create(machine, get_mid_tile_info_cupsoc, tilemap_scan_rows,16,16,32,32);
|
||||
text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
state->background_layer = tilemap_create(machine, get_back_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
state->foreground_layer = tilemap_create(machine, get_fore_tile_info,tilemap_scan_rows,16,16,32,32);
|
||||
state->midground_layer = tilemap_create(machine, get_mid_tile_info_cupsoc, tilemap_scan_rows,16,16,32,32);
|
||||
state->text_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows, 8,8,64,32);
|
||||
|
||||
legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
legionna_sprite_xoffs = 0;
|
||||
legionna_sprite_yoffs = 0;
|
||||
state->scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
|
||||
state->sprite_xoffs = 0;
|
||||
state->sprite_yoffs = 0;
|
||||
|
||||
legionna_has_extended_banking = 0;
|
||||
legionna_has_extended_priority = 1;
|
||||
state->has_extended_banking = 0;
|
||||
state->has_extended_priority = 1;
|
||||
|
||||
tilemap_set_transparent_pen(background_layer,15);
|
||||
tilemap_set_transparent_pen(midground_layer,15);
|
||||
tilemap_set_transparent_pen(foreground_layer,15);
|
||||
tilemap_set_transparent_pen(text_layer,15);
|
||||
tilemap_set_transparent_pen(state->background_layer,15);
|
||||
tilemap_set_transparent_pen(state->midground_layer,15);
|
||||
tilemap_set_transparent_pen(state->foreground_layer,15);
|
||||
tilemap_set_transparent_pen(state->text_layer,15);
|
||||
}
|
||||
|
||||
VIDEO_START(grainbow)
|
||||
{
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
VIDEO_START_CALL(legionna);
|
||||
legionna_sprite_xoffs = legionna_sprite_yoffs = 16;
|
||||
state->sprite_xoffs = state->sprite_yoffs = 16;
|
||||
|
||||
legionna_has_extended_banking = 0;
|
||||
legionna_has_extended_priority = 1;
|
||||
state->has_extended_banking = 0;
|
||||
state->has_extended_priority = 1;
|
||||
}
|
||||
|
||||
VIDEO_START(godzilla)
|
||||
{
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
VIDEO_START_CALL(legionna);
|
||||
|
||||
legionna_has_extended_banking = 1;
|
||||
legionna_has_extended_priority = 0;
|
||||
state->has_extended_banking = 1;
|
||||
state->has_extended_priority = 0;
|
||||
|
||||
}
|
||||
|
||||
@ -245,6 +253,7 @@ VIDEO_START(godzilla)
|
||||
|
||||
static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
|
||||
{
|
||||
legionna_state *state = machine->driver_data<legionna_state>();
|
||||
UINT16 *spriteram16 = machine->generic.spriteram.u16;
|
||||
int offs,fx,fy,x,y,color,sprite,cur_pri;
|
||||
int dx,dy,ax,ay;
|
||||
@ -257,7 +266,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
|
||||
pri_mask = 0;
|
||||
|
||||
if (legionna_has_extended_priority)
|
||||
if (state->has_extended_priority)
|
||||
{
|
||||
|
||||
cur_pri = (spriteram16[offs+1] & 0xc000) >> 14;
|
||||
@ -308,7 +317,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
|
||||
sprite &= 0x3fff;
|
||||
|
||||
if (legionna_has_extended_banking)
|
||||
if (state->has_extended_banking)
|
||||
{
|
||||
if(data & 0x0040)
|
||||
{
|
||||
@ -360,7 +369,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
{
|
||||
pdrawgfx_transpen(bitmap,cliprect,machine->gfx[3],
|
||||
sprite++,
|
||||
color,fx,fy,(x+ax*16)+legionna_sprite_xoffs,y+ay*16+legionna_sprite_yoffs,
|
||||
color,fx,fy,(x+ax*16)+state->sprite_xoffs,y+ay*16+state->sprite_yoffs,
|
||||
machine->priority_bitmap,pri_mask, 15);
|
||||
}
|
||||
}
|
||||
@ -371,7 +380,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
{
|
||||
pdrawgfx_transpen(bitmap,cliprect,machine->gfx[3],
|
||||
sprite++,
|
||||
color,fx,fy,(x+ax*16)+legionna_sprite_xoffs,y+(dy-ay-1)*16+legionna_sprite_yoffs,
|
||||
color,fx,fy,(x+ax*16)+state->sprite_xoffs,y+(dy-ay-1)*16+state->sprite_yoffs,
|
||||
machine->priority_bitmap,pri_mask,15);
|
||||
}
|
||||
}
|
||||
@ -385,7 +394,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
{
|
||||
pdrawgfx_transpen(bitmap,cliprect,machine->gfx[3],
|
||||
sprite++,
|
||||
color,fx,fy,(x+(dx-ax-1)*16)+legionna_sprite_xoffs,y+ay*16+legionna_sprite_yoffs,
|
||||
color,fx,fy,(x+(dx-ax-1)*16)+state->sprite_xoffs,y+ay*16+state->sprite_yoffs,
|
||||
machine->priority_bitmap,pri_mask,15);
|
||||
}
|
||||
}
|
||||
@ -396,7 +405,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
{
|
||||
pdrawgfx_transpen(bitmap,cliprect,machine->gfx[3],
|
||||
sprite++,
|
||||
color,fx,fy,(x+(dx-ax-1)*16)+legionna_sprite_xoffs,y+(dy-ay-1)*16+legionna_sprite_yoffs,
|
||||
color,fx,fy,(x+(dx-ax-1)*16)+state->sprite_xoffs,y+(dy-ay-1)*16+state->sprite_yoffs,
|
||||
machine->priority_bitmap,pri_mask, 15);
|
||||
}
|
||||
}
|
||||
@ -408,25 +417,26 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
|
||||
|
||||
SCREEN_UPDATE( legionna )
|
||||
{
|
||||
legionna_state *state = screen->machine->driver_data<legionna_state>();
|
||||
/* Setup the tilemaps */
|
||||
tilemap_set_scrollx( background_layer, 0, legionna_scrollram16[0] );
|
||||
tilemap_set_scrolly( background_layer, 0, legionna_scrollram16[1] );
|
||||
tilemap_set_scrollx( midground_layer, 0, legionna_scrollram16[2] );
|
||||
tilemap_set_scrolly( midground_layer, 0, legionna_scrollram16[3] );
|
||||
tilemap_set_scrollx( foreground_layer, 0, legionna_scrollram16[4] );
|
||||
tilemap_set_scrolly( foreground_layer, 0, legionna_scrollram16[5] );
|
||||
tilemap_set_scrollx( text_layer, 0, 0/*legionna_scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( text_layer, 0, 0/*legionna_scrollram16[7]*/ );
|
||||
tilemap_set_scrollx( state->background_layer, 0, state->scrollram16[0] );
|
||||
tilemap_set_scrolly( state->background_layer, 0, state->scrollram16[1] );
|
||||
tilemap_set_scrollx( state->midground_layer, 0, state->scrollram16[2] );
|
||||
tilemap_set_scrolly( state->midground_layer, 0, state->scrollram16[3] );
|
||||
tilemap_set_scrollx( state->foreground_layer, 0, state->scrollram16[4] );
|
||||
tilemap_set_scrolly( state->foreground_layer, 0, state->scrollram16[5] );
|
||||
tilemap_set_scrollx( state->text_layer, 0, 0/*state->scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( state->text_layer, 0, 0/*state->scrollram16[7]*/ );
|
||||
|
||||
bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
|
||||
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine)); /* wrong color? */
|
||||
|
||||
/* legionna_layer_disable is a guess based on 'stage 1' screen in heatbrl */
|
||||
/* state->layer_disable is a guess based on 'stage 1' screen in heatbrl */
|
||||
|
||||
if (!(legionna_layer_disable&0x0020)) tilemap_draw(bitmap,cliprect,foreground_layer,0, 0);
|
||||
if (!(legionna_layer_disable&0x0010)) tilemap_draw(bitmap,cliprect,midground_layer,0, 0);
|
||||
if (!(legionna_layer_disable&0x0002)) tilemap_draw(bitmap,cliprect,background_layer,0, 1);
|
||||
if (!(legionna_layer_disable&0x0001)) tilemap_draw(bitmap,cliprect,text_layer,0, 2);
|
||||
if (!(state->layer_disable&0x0020)) tilemap_draw(bitmap,cliprect,state->foreground_layer,0, 0);
|
||||
if (!(state->layer_disable&0x0010)) tilemap_draw(bitmap,cliprect,state->midground_layer,0, 0);
|
||||
if (!(state->layer_disable&0x0002)) tilemap_draw(bitmap,cliprect,state->background_layer,0, 1);
|
||||
if (!(state->layer_disable&0x0001)) tilemap_draw(bitmap,cliprect,state->text_layer,0, 2);
|
||||
|
||||
draw_sprites(screen->machine,bitmap,cliprect);
|
||||
|
||||
@ -437,26 +447,27 @@ SCREEN_UPDATE( legionna )
|
||||
|
||||
SCREEN_UPDATE( godzilla )
|
||||
{
|
||||
// tilemap_set_scrollx( text_layer, 0, 0 );
|
||||
// tilemap_set_scrolly( text_layer, 0, 112 );
|
||||
legionna_state *state = screen->machine->driver_data<legionna_state>();
|
||||
// tilemap_set_scrollx( state->text_layer, 0, 0 );
|
||||
// tilemap_set_scrolly( state->text_layer, 0, 112 );
|
||||
/* Setup the tilemaps */
|
||||
tilemap_set_scrollx( background_layer, 0, legionna_scrollram16[0] );
|
||||
tilemap_set_scrolly( background_layer, 0, legionna_scrollram16[1] );
|
||||
tilemap_set_scrollx( midground_layer, 0, legionna_scrollram16[2] );
|
||||
tilemap_set_scrolly( midground_layer, 0, legionna_scrollram16[3] );
|
||||
tilemap_set_scrollx( foreground_layer, 0, legionna_scrollram16[4] );
|
||||
tilemap_set_scrolly( foreground_layer, 0, legionna_scrollram16[5] );
|
||||
tilemap_set_scrollx( text_layer, 0, 0/*legionna_scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( text_layer, 0, 0/*legionna_scrollram16[7]*/ );
|
||||
tilemap_set_scrollx( state->background_layer, 0, state->scrollram16[0] );
|
||||
tilemap_set_scrolly( state->background_layer, 0, state->scrollram16[1] );
|
||||
tilemap_set_scrollx( state->midground_layer, 0, state->scrollram16[2] );
|
||||
tilemap_set_scrolly( state->midground_layer, 0, state->scrollram16[3] );
|
||||
tilemap_set_scrollx( state->foreground_layer, 0, state->scrollram16[4] );
|
||||
tilemap_set_scrolly( state->foreground_layer, 0, state->scrollram16[5] );
|
||||
tilemap_set_scrollx( state->text_layer, 0, 0/*state->scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( state->text_layer, 0, 0/*state->scrollram16[7]*/ );
|
||||
|
||||
|
||||
bitmap_fill(bitmap,cliprect,0x0200);
|
||||
bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
|
||||
|
||||
if (!(legionna_layer_disable&0x0001)) tilemap_draw(bitmap,cliprect,background_layer,0,0);
|
||||
if (!(legionna_layer_disable&0x0002)) tilemap_draw(bitmap,cliprect,midground_layer,0,0);
|
||||
if (!(legionna_layer_disable&0x0004)) tilemap_draw(bitmap,cliprect,foreground_layer,0,1);
|
||||
if (!(legionna_layer_disable&0x0008)) tilemap_draw(bitmap,cliprect,text_layer,0,2);
|
||||
if (!(state->layer_disable&0x0001)) tilemap_draw(bitmap,cliprect,state->background_layer,0,0);
|
||||
if (!(state->layer_disable&0x0002)) tilemap_draw(bitmap,cliprect,state->midground_layer,0,0);
|
||||
if (!(state->layer_disable&0x0004)) tilemap_draw(bitmap,cliprect,state->foreground_layer,0,1);
|
||||
if (!(state->layer_disable&0x0008)) tilemap_draw(bitmap,cliprect,state->text_layer,0,2);
|
||||
|
||||
draw_sprites(screen->machine,bitmap,cliprect);
|
||||
|
||||
@ -465,30 +476,31 @@ SCREEN_UPDATE( godzilla )
|
||||
|
||||
SCREEN_UPDATE( grainbow )
|
||||
{
|
||||
legionna_state *state = screen->machine->driver_data<legionna_state>();
|
||||
/* Setup the tilemaps */
|
||||
tilemap_set_scrollx( background_layer, 0, legionna_scrollram16[0] );
|
||||
tilemap_set_scrolly( background_layer, 0, legionna_scrollram16[1] );
|
||||
tilemap_set_scrollx( midground_layer, 0, legionna_scrollram16[2] );
|
||||
tilemap_set_scrolly( midground_layer, 0, legionna_scrollram16[3] );
|
||||
tilemap_set_scrollx( foreground_layer, 0, legionna_scrollram16[4] );
|
||||
tilemap_set_scrolly( foreground_layer, 0, legionna_scrollram16[5] );
|
||||
tilemap_set_scrollx( text_layer, 0, 0/*legionna_scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( text_layer, 0, 0/*legionna_scrollram16[7]*/ );
|
||||
tilemap_set_scrollx( state->background_layer, 0, state->scrollram16[0] );
|
||||
tilemap_set_scrolly( state->background_layer, 0, state->scrollram16[1] );
|
||||
tilemap_set_scrollx( state->midground_layer, 0, state->scrollram16[2] );
|
||||
tilemap_set_scrolly( state->midground_layer, 0, state->scrollram16[3] );
|
||||
tilemap_set_scrollx( state->foreground_layer, 0, state->scrollram16[4] );
|
||||
tilemap_set_scrolly( state->foreground_layer, 0, state->scrollram16[5] );
|
||||
tilemap_set_scrollx( state->text_layer, 0, 0/*state->scrollram16[6]*/ );
|
||||
tilemap_set_scrolly( state->text_layer, 0, 0/*state->scrollram16[7]*/ );
|
||||
|
||||
bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
|
||||
bitmap_fill(screen->machine->priority_bitmap,cliprect,0);
|
||||
|
||||
if(!(legionna_layer_disable & 1))
|
||||
tilemap_draw(bitmap,cliprect,background_layer,0,1);
|
||||
if(!(state->layer_disable & 1))
|
||||
tilemap_draw(bitmap,cliprect,state->background_layer,0,1);
|
||||
|
||||
if(!(legionna_layer_disable & 2))
|
||||
tilemap_draw(bitmap,cliprect,midground_layer,0,2);
|
||||
if(!(state->layer_disable & 2))
|
||||
tilemap_draw(bitmap,cliprect,state->midground_layer,0,2);
|
||||
|
||||
if(!(legionna_layer_disable & 4))
|
||||
tilemap_draw(bitmap,cliprect,foreground_layer,0,4);
|
||||
if(!(state->layer_disable & 4))
|
||||
tilemap_draw(bitmap,cliprect,state->foreground_layer,0,4);
|
||||
|
||||
if(!(legionna_layer_disable & 8))
|
||||
tilemap_draw(bitmap,cliprect,text_layer,0,8);
|
||||
if(!(state->layer_disable & 8))
|
||||
tilemap_draw(bitmap,cliprect,state->text_layer,0,8);
|
||||
|
||||
draw_sprites(screen->machine,bitmap,cliprect);
|
||||
|
||||
|
@ -21,29 +21,6 @@
|
||||
#define LOG_COMM 0
|
||||
|
||||
|
||||
|
||||
struct vram_state_data
|
||||
{
|
||||
UINT16 addr;
|
||||
UINT8 latch[2];
|
||||
};
|
||||
|
||||
|
||||
/* video RAM */
|
||||
UINT8 *ataxx_qram;
|
||||
static UINT8 *leland_video_ram;
|
||||
|
||||
/* video RAM bitmap drawing */
|
||||
static struct vram_state_data vram_state[2];
|
||||
|
||||
/* scroll background registers */
|
||||
static UINT16 xscroll;
|
||||
static UINT16 yscroll;
|
||||
static UINT8 gfxbank;
|
||||
static UINT16 last_scanline;
|
||||
|
||||
static emu_timer *scanline_timer;
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Scanline callback
|
||||
@ -52,22 +29,23 @@ static emu_timer *scanline_timer;
|
||||
|
||||
static TIMER_CALLBACK( scanline_callback )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
device_t *audio = machine->device("custom");
|
||||
int scanline = param;
|
||||
|
||||
/* update the DACs */
|
||||
if (!(leland_dac_control & 0x01))
|
||||
leland_dac_update(audio, 0, leland_video_ram[(last_scanline) * 256 + 160]);
|
||||
if (!(state->dac_control & 0x01))
|
||||
leland_dac_update(audio, 0, state->video_ram[(state->last_scanline) * 256 + 160]);
|
||||
|
||||
if (!(leland_dac_control & 0x02))
|
||||
leland_dac_update(audio, 1, leland_video_ram[(last_scanline) * 256 + 161]);
|
||||
if (!(state->dac_control & 0x02))
|
||||
leland_dac_update(audio, 1, state->video_ram[(state->last_scanline) * 256 + 161]);
|
||||
|
||||
last_scanline = scanline;
|
||||
state->last_scanline = scanline;
|
||||
|
||||
scanline = (scanline+1) % 256;
|
||||
|
||||
/* come back at the next appropriate scanline */
|
||||
scanline_timer->adjust(machine->primary_screen->time_until_pos(scanline), scanline);
|
||||
state->scanline_timer->adjust(machine->primary_screen->time_until_pos(scanline), scanline);
|
||||
}
|
||||
|
||||
|
||||
@ -79,23 +57,25 @@ static TIMER_CALLBACK( scanline_callback )
|
||||
|
||||
static VIDEO_START( leland )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* allocate memory */
|
||||
leland_video_ram = auto_alloc_array_clear(machine, UINT8, VRAM_SIZE);
|
||||
state->video_ram = auto_alloc_array_clear(machine, UINT8, VRAM_SIZE);
|
||||
|
||||
/* scanline timer */
|
||||
scanline_timer = machine->scheduler().timer_alloc(FUNC(scanline_callback));
|
||||
scanline_timer->adjust(machine->primary_screen->time_until_pos(0));
|
||||
state->scanline_timer = machine->scheduler().timer_alloc(FUNC(scanline_callback));
|
||||
state->scanline_timer->adjust(machine->primary_screen->time_until_pos(0));
|
||||
|
||||
}
|
||||
|
||||
|
||||
static VIDEO_START( ataxx )
|
||||
{
|
||||
leland_state *state = machine->driver_data<leland_state>();
|
||||
/* first do the standard stuff */
|
||||
VIDEO_START_CALL(leland);
|
||||
|
||||
/* allocate memory */
|
||||
ataxx_qram = auto_alloc_array_clear(machine, UINT8, QRAM_SIZE);
|
||||
state->ataxx_qram = auto_alloc_array_clear(machine, UINT8, QRAM_SIZE);
|
||||
}
|
||||
|
||||
|
||||
@ -108,6 +88,7 @@ static VIDEO_START( ataxx )
|
||||
|
||||
WRITE8_HANDLER( leland_scroll_w )
|
||||
{
|
||||
leland_state *state = space->machine->driver_data<leland_state>();
|
||||
int scanline = space->machine->primary_screen->vpos();
|
||||
if (scanline > 0)
|
||||
space->machine->primary_screen->update_partial(scanline - 1);
|
||||
@ -116,19 +97,19 @@ WRITE8_HANDLER( leland_scroll_w )
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
xscroll = (xscroll & 0xff00) | (data & 0x00ff);
|
||||
state->xscroll = (state->xscroll & 0xff00) | (data & 0x00ff);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
xscroll = (xscroll & 0x00ff) | ((data << 8) & 0xff00);
|
||||
state->xscroll = (state->xscroll & 0x00ff) | ((data << 8) & 0xff00);
|
||||
break;
|
||||
|
||||
case 2:
|
||||
yscroll = (yscroll & 0xff00) | (data & 0x00ff);
|
||||
state->yscroll = (state->yscroll & 0xff00) | (data & 0x00ff);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
yscroll = (yscroll & 0x00ff) | ((data << 8) & 0xff00);
|
||||
state->yscroll = (state->yscroll & 0x00ff) | ((data << 8) & 0xff00);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -140,8 +121,9 @@ WRITE8_HANDLER( leland_scroll_w )
|
||||
|
||||
WRITE8_DEVICE_HANDLER( leland_gfx_port_w )
|
||||
{
|
||||
leland_state *state = device->machine->driver_data<leland_state>();
|
||||
device->machine->primary_screen->update_partial(device->machine->primary_screen->vpos());
|
||||
gfxbank = data;
|
||||
state->gfxbank = data;
|
||||
}
|
||||
|
||||
|
||||
@ -152,9 +134,10 @@ WRITE8_DEVICE_HANDLER( leland_gfx_port_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void leland_video_addr_w(int offset, int data, int num)
|
||||
static void leland_video_addr_w(address_space *space, int offset, int data, int num)
|
||||
{
|
||||
struct vram_state_data *state = vram_state + num;
|
||||
leland_state *drvstate = space->machine->driver_data<leland_state>();
|
||||
struct vram_state_data *state = drvstate->vram_state + num;
|
||||
|
||||
if (!offset)
|
||||
state->addr = (state->addr & 0xfe00) | ((data << 1) & 0x01fe);
|
||||
@ -172,7 +155,8 @@ static void leland_video_addr_w(int offset, int data, int num)
|
||||
|
||||
static int leland_vram_port_r(address_space *space, int offset, int num)
|
||||
{
|
||||
struct vram_state_data *state = vram_state + num;
|
||||
leland_state *drvstate = space->machine->driver_data<leland_state>();
|
||||
struct vram_state_data *state = drvstate->vram_state + num;
|
||||
int addr = state->addr;
|
||||
int inc = (offset >> 2) & 2;
|
||||
int ret;
|
||||
@ -180,18 +164,18 @@ static int leland_vram_port_r(address_space *space, int offset, int num)
|
||||
switch (offset & 7)
|
||||
{
|
||||
case 3: /* read hi/lo (alternating) */
|
||||
ret = leland_video_ram[addr];
|
||||
ret = drvstate->video_ram[addr];
|
||||
addr += inc & (addr << 1);
|
||||
addr ^= 1;
|
||||
break;
|
||||
|
||||
case 5: /* read hi */
|
||||
ret = leland_video_ram[addr | 1];
|
||||
ret = drvstate->video_ram[addr | 1];
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
case 6: /* read lo */
|
||||
ret = leland_video_ram[addr & ~1];
|
||||
ret = drvstate->video_ram[addr & ~1];
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
@ -219,7 +203,9 @@ static int leland_vram_port_r(address_space *space, int offset, int num)
|
||||
|
||||
static void leland_vram_port_w(address_space *space, int offset, int data, int num)
|
||||
{
|
||||
struct vram_state_data *state = vram_state + num;
|
||||
leland_state *drvstate = space->machine->driver_data<leland_state>();
|
||||
UINT8 *video_ram = drvstate->video_ram;
|
||||
struct vram_state_data *state = drvstate->vram_state + num;
|
||||
int addr = state->addr;
|
||||
int inc = (offset >> 2) & 2;
|
||||
int trans = (offset >> 4) & num;
|
||||
@ -237,24 +223,24 @@ static void leland_vram_port_w(address_space *space, int offset, int data, int n
|
||||
switch (offset & 7)
|
||||
{
|
||||
case 1: /* write hi = data, lo = latch */
|
||||
leland_video_ram[addr & ~1] = state->latch[0];
|
||||
leland_video_ram[addr | 1] = data;
|
||||
video_ram[addr & ~1] = state->latch[0];
|
||||
video_ram[addr | 1] = data;
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
case 2: /* write hi = latch, lo = data */
|
||||
leland_video_ram[addr & ~1] = data;
|
||||
leland_video_ram[addr | 1] = state->latch[1];
|
||||
video_ram[addr & ~1] = data;
|
||||
video_ram[addr | 1] = state->latch[1];
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
case 3: /* write hi/lo = data (alternating) */
|
||||
if (trans)
|
||||
{
|
||||
if (!(data & 0xf0)) data |= leland_video_ram[addr] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= leland_video_ram[addr] & 0x0f;
|
||||
if (!(data & 0xf0)) data |= video_ram[addr] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= video_ram[addr] & 0x0f;
|
||||
}
|
||||
leland_video_ram[addr] = data;
|
||||
video_ram[addr] = data;
|
||||
addr += inc & (addr << 1);
|
||||
addr ^= 1;
|
||||
break;
|
||||
@ -263,10 +249,10 @@ static void leland_vram_port_w(address_space *space, int offset, int data, int n
|
||||
state->latch[1] = data;
|
||||
if (trans)
|
||||
{
|
||||
if (!(data & 0xf0)) data |= leland_video_ram[addr | 1] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= leland_video_ram[addr | 1] & 0x0f;
|
||||
if (!(data & 0xf0)) data |= video_ram[addr | 1] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= video_ram[addr | 1] & 0x0f;
|
||||
}
|
||||
leland_video_ram[addr | 1] = data;
|
||||
video_ram[addr | 1] = data;
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
@ -274,10 +260,10 @@ static void leland_vram_port_w(address_space *space, int offset, int data, int n
|
||||
state->latch[0] = data;
|
||||
if (trans)
|
||||
{
|
||||
if (!(data & 0xf0)) data |= leland_video_ram[addr & ~1] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= leland_video_ram[addr & ~1] & 0x0f;
|
||||
if (!(data & 0xf0)) data |= video_ram[addr & ~1] & 0xf0;
|
||||
if (!(data & 0x0f)) data |= video_ram[addr & ~1] & 0x0f;
|
||||
}
|
||||
leland_video_ram[addr & ~1] = data;
|
||||
video_ram[addr & ~1] = data;
|
||||
addr += inc;
|
||||
break;
|
||||
|
||||
@ -301,7 +287,7 @@ static void leland_vram_port_w(address_space *space, int offset, int data, int n
|
||||
|
||||
WRITE8_HANDLER( leland_master_video_addr_w )
|
||||
{
|
||||
leland_video_addr_w(offset, data, 0);
|
||||
leland_video_addr_w(space, offset, data, 0);
|
||||
}
|
||||
|
||||
|
||||
@ -337,7 +323,7 @@ READ8_HANDLER( leland_mvram_port_r )
|
||||
|
||||
WRITE8_HANDLER( leland_slave_video_addr_w )
|
||||
{
|
||||
leland_video_addr_w(offset, data, 1);
|
||||
leland_video_addr_w(space, offset, data, 1);
|
||||
}
|
||||
|
||||
|
||||
@ -404,13 +390,14 @@ READ8_HANDLER( ataxx_svram_port_r )
|
||||
|
||||
static SCREEN_UPDATE( leland )
|
||||
{
|
||||
leland_state *state = screen->machine->driver_data<leland_state>();
|
||||
int y;
|
||||
|
||||
const UINT8 *bg_prom = screen->machine->region("user1")->base();
|
||||
const UINT8 *bg_gfx = screen->machine->region("gfx1")->base();
|
||||
offs_t bg_gfx_bank_page_size = screen->machine->region("gfx1")->bytes() / 3;
|
||||
offs_t char_bank = (((gfxbank >> 4) & 0x03) * 0x2000) & (bg_gfx_bank_page_size - 1);
|
||||
offs_t prom_bank = ((gfxbank >> 3) & 0x01) * 0x2000;
|
||||
offs_t char_bank = (((state->gfxbank >> 4) & 0x03) * 0x2000) & (bg_gfx_bank_page_size - 1);
|
||||
offs_t prom_bank = ((state->gfxbank >> 3) & 0x01) * 0x2000;
|
||||
|
||||
/* for each scanline in the visible region */
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
@ -419,14 +406,14 @@ static SCREEN_UPDATE( leland )
|
||||
UINT8 fg_data = 0;
|
||||
|
||||
UINT16 *dst = BITMAP_ADDR16(bitmap, y, 0);
|
||||
UINT8 *fg_src = &leland_video_ram[y << 8];
|
||||
UINT8 *fg_src = &state->video_ram[y << 8];
|
||||
|
||||
/* for each pixel on the scanline */
|
||||
for (x = 0; x < VIDEO_WIDTH; x++)
|
||||
{
|
||||
/* compute the effective scrolled pixel coordinates */
|
||||
UINT16 sx = (x + xscroll) & 0x07ff;
|
||||
UINT16 sy = (y + yscroll) & 0x07ff;
|
||||
UINT16 sx = (x + state->xscroll) & 0x07ff;
|
||||
UINT16 sy = (y + state->yscroll) & 0x07ff;
|
||||
|
||||
/* get the byte address this background pixel comes from */
|
||||
offs_t bg_prom_offs = (sx >> 3) |
|
||||
@ -472,6 +459,7 @@ static SCREEN_UPDATE( leland )
|
||||
|
||||
static SCREEN_UPDATE( ataxx )
|
||||
{
|
||||
leland_state *state = screen->machine->driver_data<leland_state>();
|
||||
int y;
|
||||
|
||||
const UINT8 *bg_gfx = screen->machine->region("gfx1")->base();
|
||||
@ -485,14 +473,14 @@ static SCREEN_UPDATE( ataxx )
|
||||
UINT8 fg_data = 0;
|
||||
|
||||
UINT16 *dst = BITMAP_ADDR16(bitmap, y, 0);
|
||||
UINT8 *fg_src = &leland_video_ram[y << 8];
|
||||
UINT8 *fg_src = &state->video_ram[y << 8];
|
||||
|
||||
/* for each pixel on the scanline */
|
||||
for (x = 0; x < VIDEO_WIDTH; x++)
|
||||
{
|
||||
/* compute the effective scrolled pixel coordinates */
|
||||
UINT16 sx = (x + xscroll) & 0x07ff;
|
||||
UINT16 sy = (y + yscroll) & 0x07ff;
|
||||
UINT16 sx = (x + state->xscroll) & 0x07ff;
|
||||
UINT16 sy = (y + state->yscroll) & 0x07ff;
|
||||
|
||||
/* get the byte address this background pixel comes from */
|
||||
offs_t qram_offs = (sx >> 3) |
|
||||
@ -500,8 +488,8 @@ static SCREEN_UPDATE( ataxx )
|
||||
((sy << 6) & 0x8000);
|
||||
|
||||
offs_t bg_gfx_offs = ((sy & 0x07) |
|
||||
(ataxx_qram[qram_offs] << 3) |
|
||||
((ataxx_qram[0x4000 | qram_offs] & 0x7f) << 11)) & bg_gfx_offs_mask;
|
||||
(state->ataxx_qram[qram_offs] << 3) |
|
||||
((state->ataxx_qram[0x4000 | qram_offs] & 0x7f) << 11)) & bg_gfx_offs_mask;
|
||||
|
||||
/* build the pen, background is d0-d5 */
|
||||
pen_t pen = (((bg_gfx[bg_gfx_offs + (0 * bg_gfx_bank_page_size)] << (sx & 0x07)) & 0x80) >> 7) | /* d0 */
|
||||
|
@ -19,36 +19,6 @@
|
||||
|
||||
static STATE_POSTLOAD( twincobr_restore_screen );
|
||||
|
||||
INT32 twincobr_fg_rom_bank;
|
||||
INT32 twincobr_bg_ram_bank;
|
||||
INT32 wardner_sprite_hack; /* Required for weird sprite priority in wardner */
|
||||
/* when hero is in shop. Hero should cover shop owner */
|
||||
|
||||
static UINT16 *twincobr_bgvideoram16;
|
||||
static UINT16 *twincobr_fgvideoram16;
|
||||
static UINT16 *twincobr_txvideoram16;
|
||||
|
||||
static size_t twincobr_bgvideoram_size;
|
||||
static size_t twincobr_fgvideoram_size;
|
||||
static size_t twincobr_txvideoram_size;
|
||||
|
||||
static INT32 txscrollx;
|
||||
static INT32 txscrolly;
|
||||
static INT32 fgscrollx;
|
||||
static INT32 fgscrolly;
|
||||
static INT32 bgscrollx;
|
||||
static INT32 bgscrolly;
|
||||
static INT32 txoffs;
|
||||
static INT32 fgoffs;
|
||||
static INT32 bgoffs;
|
||||
static INT32 scroll_x;
|
||||
static INT32 scroll_y;
|
||||
static INT32 twincobr_display_on;
|
||||
static INT32 twincobr_flip_screen;
|
||||
|
||||
static tilemap_t *bg_tilemap, *fg_tilemap, *tx_tilemap;
|
||||
|
||||
|
||||
/* 6845 used for video sync signals only */
|
||||
const mc6845_interface twincobr_mc6845_intf =
|
||||
{
|
||||
@ -72,9 +42,10 @@ const mc6845_interface twincobr_mc6845_intf =
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
int code, tile_number, color;
|
||||
|
||||
code = twincobr_bgvideoram16[tile_index+twincobr_bg_ram_bank];
|
||||
code = state->bgvideoram16[tile_index+state->bg_ram_bank];
|
||||
tile_number = code & 0x0fff;
|
||||
color = (code & 0xf000) >> 12;
|
||||
SET_TILE_INFO(
|
||||
@ -86,10 +57,11 @@ static TILE_GET_INFO( get_bg_tile_info )
|
||||
|
||||
static TILE_GET_INFO( get_fg_tile_info )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
int code, tile_number, color;
|
||||
|
||||
code = twincobr_fgvideoram16[tile_index];
|
||||
tile_number = (code & 0x0fff) | twincobr_fg_rom_bank;
|
||||
code = state->fgvideoram16[tile_index];
|
||||
tile_number = (code & 0x0fff) | state->fg_rom_bank;
|
||||
color = (code & 0xf000) >> 12;
|
||||
SET_TILE_INFO(
|
||||
1,
|
||||
@ -100,9 +72,10 @@ static TILE_GET_INFO( get_fg_tile_info )
|
||||
|
||||
static TILE_GET_INFO( get_tx_tile_info )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
int code, tile_number, color;
|
||||
|
||||
code = twincobr_txvideoram16[tile_index];
|
||||
code = state->txvideoram16[tile_index];
|
||||
tile_number = code & 0x07ff;
|
||||
color = (code & 0xf800) >> 11;
|
||||
SET_TILE_INFO(
|
||||
@ -118,56 +91,59 @@ static TILE_GET_INFO( get_tx_tile_info )
|
||||
|
||||
static void twincobr_create_tilemaps(running_machine *machine)
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,8,8,64,64);
|
||||
fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,64,64);
|
||||
tx_tilemap = tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows,8,8,64,32);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,8,8,64,64);
|
||||
state->fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,64,64);
|
||||
state->tx_tilemap = tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows,8,8,64,32);
|
||||
|
||||
tilemap_set_transparent_pen(fg_tilemap,0);
|
||||
tilemap_set_transparent_pen(tx_tilemap,0);
|
||||
tilemap_set_transparent_pen(state->fg_tilemap,0);
|
||||
tilemap_set_transparent_pen(state->tx_tilemap,0);
|
||||
}
|
||||
|
||||
VIDEO_START( toaplan0 )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
/* the video RAM is accessed via ports, it's not memory mapped */
|
||||
twincobr_txvideoram_size = 0x0800;
|
||||
twincobr_bgvideoram_size = 0x2000; /* banked two times 0x1000 */
|
||||
twincobr_fgvideoram_size = 0x1000;
|
||||
state->txvideoram_size = 0x0800;
|
||||
state->bgvideoram_size = 0x2000; /* banked two times 0x1000 */
|
||||
state->fgvideoram_size = 0x1000;
|
||||
|
||||
twincobr_create_tilemaps(machine);
|
||||
|
||||
twincobr_txvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_txvideoram_size);
|
||||
twincobr_fgvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_fgvideoram_size);
|
||||
twincobr_bgvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_bgvideoram_size);
|
||||
state->txvideoram16 = auto_alloc_array_clear(machine, UINT16, state->txvideoram_size);
|
||||
state->fgvideoram16 = auto_alloc_array_clear(machine, UINT16, state->fgvideoram_size);
|
||||
state->bgvideoram16 = auto_alloc_array_clear(machine, UINT16, state->bgvideoram_size);
|
||||
|
||||
twincobr_display_on = 0;
|
||||
twincobr_display(twincobr_display_on);
|
||||
state->display_on = 0;
|
||||
twincobr_display(machine, state->display_on);
|
||||
|
||||
state_save_register_global_pointer(machine, twincobr_txvideoram16, twincobr_txvideoram_size);
|
||||
state_save_register_global_pointer(machine, twincobr_fgvideoram16, twincobr_fgvideoram_size);
|
||||
state_save_register_global_pointer(machine, twincobr_bgvideoram16, twincobr_bgvideoram_size);
|
||||
state_save_register_global(machine, txoffs);
|
||||
state_save_register_global(machine, fgoffs);
|
||||
state_save_register_global(machine, bgoffs);
|
||||
state_save_register_global(machine, scroll_x);
|
||||
state_save_register_global(machine, scroll_y);
|
||||
state_save_register_global(machine, txscrollx);
|
||||
state_save_register_global(machine, fgscrollx);
|
||||
state_save_register_global(machine, bgscrollx);
|
||||
state_save_register_global(machine, txscrolly);
|
||||
state_save_register_global(machine, fgscrolly);
|
||||
state_save_register_global(machine, bgscrolly);
|
||||
state_save_register_global(machine, twincobr_display_on);
|
||||
state_save_register_global(machine, twincobr_fg_rom_bank);
|
||||
state_save_register_global(machine, twincobr_bg_ram_bank);
|
||||
state_save_register_global(machine, twincobr_flip_screen);
|
||||
state_save_register_global(machine, wardner_sprite_hack);
|
||||
state_save_register_global_pointer(machine, state->txvideoram16, state->txvideoram_size);
|
||||
state_save_register_global_pointer(machine, state->fgvideoram16, state->fgvideoram_size);
|
||||
state_save_register_global_pointer(machine, state->bgvideoram16, state->bgvideoram_size);
|
||||
state_save_register_global(machine, state->txoffs);
|
||||
state_save_register_global(machine, state->fgoffs);
|
||||
state_save_register_global(machine, state->bgoffs);
|
||||
state_save_register_global(machine, state->scroll_x);
|
||||
state_save_register_global(machine, state->scroll_y);
|
||||
state_save_register_global(machine, state->txscrollx);
|
||||
state_save_register_global(machine, state->fgscrollx);
|
||||
state_save_register_global(machine, state->bgscrollx);
|
||||
state_save_register_global(machine, state->txscrolly);
|
||||
state_save_register_global(machine, state->fgscrolly);
|
||||
state_save_register_global(machine, state->bgscrolly);
|
||||
state_save_register_global(machine, state->display_on);
|
||||
state_save_register_global(machine, state->fg_rom_bank);
|
||||
state_save_register_global(machine, state->bg_ram_bank);
|
||||
state_save_register_global(machine, state->flip_screen);
|
||||
state_save_register_global(machine, state->wardner_sprite_hack);
|
||||
machine->state().register_postload(twincobr_restore_screen, NULL);
|
||||
}
|
||||
|
||||
static STATE_POSTLOAD( twincobr_restore_screen )
|
||||
{
|
||||
twincobr_display(twincobr_display_on);
|
||||
twincobr_flipscreen(machine, twincobr_flip_screen);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
twincobr_display(machine, state->display_on);
|
||||
twincobr_flipscreen(machine, state->flip_screen);
|
||||
}
|
||||
|
||||
|
||||
@ -175,108 +151,122 @@ static STATE_POSTLOAD( twincobr_restore_screen )
|
||||
Video I/O interface
|
||||
***************************************************************************/
|
||||
|
||||
void twincobr_display(int enable)
|
||||
void twincobr_display(running_machine *machine, int enable)
|
||||
{
|
||||
twincobr_display_on = enable;
|
||||
tilemap_set_enable(bg_tilemap, enable);
|
||||
tilemap_set_enable(fg_tilemap, enable);
|
||||
tilemap_set_enable(tx_tilemap, enable);
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
state->display_on = enable;
|
||||
tilemap_set_enable(state->bg_tilemap, enable);
|
||||
tilemap_set_enable(state->fg_tilemap, enable);
|
||||
tilemap_set_enable(state->tx_tilemap, enable);
|
||||
}
|
||||
|
||||
void twincobr_flipscreen(running_machine *machine, int flip)
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
tilemap_set_flip_all(machine, (flip ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0));
|
||||
twincobr_flip_screen = flip;
|
||||
state->flip_screen = flip;
|
||||
if (flip) {
|
||||
scroll_x = 0x008;
|
||||
scroll_y = 0x0c5;
|
||||
state->scroll_x = 0x008;
|
||||
state->scroll_y = 0x0c5;
|
||||
}
|
||||
else {
|
||||
scroll_x = 0x037;
|
||||
scroll_y = 0x01e;
|
||||
state->scroll_x = 0x037;
|
||||
state->scroll_y = 0x01e;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
WRITE16_HANDLER( twincobr_txoffs_w )
|
||||
{
|
||||
COMBINE_DATA(&txoffs);
|
||||
txoffs %= twincobr_txvideoram_size;
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->txoffs);
|
||||
state->txoffs %= state->txvideoram_size;
|
||||
}
|
||||
READ16_HANDLER( twincobr_txram_r )
|
||||
{
|
||||
return twincobr_txvideoram16[txoffs];
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
return state->txvideoram16[state->txoffs];
|
||||
}
|
||||
WRITE16_HANDLER( twincobr_txram_w )
|
||||
{
|
||||
COMBINE_DATA(&twincobr_txvideoram16[txoffs]);
|
||||
tilemap_mark_tile_dirty(tx_tilemap,txoffs);
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->txvideoram16[state->txoffs]);
|
||||
tilemap_mark_tile_dirty(state->tx_tilemap,state->txoffs);
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_bgoffs_w )
|
||||
{
|
||||
COMBINE_DATA(&bgoffs);
|
||||
bgoffs %= (twincobr_bgvideoram_size >> 1);
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->bgoffs);
|
||||
state->bgoffs %= (state->bgvideoram_size >> 1);
|
||||
}
|
||||
READ16_HANDLER( twincobr_bgram_r )
|
||||
{
|
||||
return twincobr_bgvideoram16[bgoffs+twincobr_bg_ram_bank];
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
return state->bgvideoram16[state->bgoffs+state->bg_ram_bank];
|
||||
}
|
||||
WRITE16_HANDLER( twincobr_bgram_w )
|
||||
{
|
||||
COMBINE_DATA(&twincobr_bgvideoram16[bgoffs+twincobr_bg_ram_bank]);
|
||||
tilemap_mark_tile_dirty(bg_tilemap,(bgoffs+twincobr_bg_ram_bank));
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->bgvideoram16[state->bgoffs+state->bg_ram_bank]);
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap,(state->bgoffs+state->bg_ram_bank));
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_fgoffs_w )
|
||||
{
|
||||
COMBINE_DATA(&fgoffs);
|
||||
fgoffs %= twincobr_fgvideoram_size;
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->fgoffs);
|
||||
state->fgoffs %= state->fgvideoram_size;
|
||||
}
|
||||
READ16_HANDLER( twincobr_fgram_r )
|
||||
{
|
||||
return twincobr_fgvideoram16[fgoffs];
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
return state->fgvideoram16[state->fgoffs];
|
||||
}
|
||||
WRITE16_HANDLER( twincobr_fgram_w )
|
||||
{
|
||||
COMBINE_DATA(&twincobr_fgvideoram16[fgoffs]);
|
||||
tilemap_mark_tile_dirty(fg_tilemap,fgoffs);
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
COMBINE_DATA(&state->fgvideoram16[state->fgoffs]);
|
||||
tilemap_mark_tile_dirty(state->fg_tilemap,state->fgoffs);
|
||||
}
|
||||
|
||||
|
||||
WRITE16_HANDLER( twincobr_txscroll_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
if (offset == 0) {
|
||||
COMBINE_DATA(&txscrollx);
|
||||
tilemap_set_scrollx(tx_tilemap,0,(txscrollx+scroll_x) & 0x1ff);
|
||||
COMBINE_DATA(&state->txscrollx);
|
||||
tilemap_set_scrollx(state->tx_tilemap,0,(state->txscrollx+state->scroll_x) & 0x1ff);
|
||||
}
|
||||
else {
|
||||
COMBINE_DATA(&txscrolly);
|
||||
tilemap_set_scrolly(tx_tilemap,0,(txscrolly+scroll_y) & 0x1ff);
|
||||
COMBINE_DATA(&state->txscrolly);
|
||||
tilemap_set_scrolly(state->tx_tilemap,0,(state->txscrolly+state->scroll_y) & 0x1ff);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_bgscroll_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
if (offset == 0) {
|
||||
COMBINE_DATA(&bgscrollx);
|
||||
tilemap_set_scrollx(bg_tilemap,0,(bgscrollx+scroll_x) & 0x1ff);
|
||||
COMBINE_DATA(&state->bgscrollx);
|
||||
tilemap_set_scrollx(state->bg_tilemap,0,(state->bgscrollx+state->scroll_x) & 0x1ff);
|
||||
}
|
||||
else {
|
||||
COMBINE_DATA(&bgscrolly);
|
||||
tilemap_set_scrolly(bg_tilemap,0,(bgscrolly+scroll_y) & 0x1ff);
|
||||
COMBINE_DATA(&state->bgscrolly);
|
||||
tilemap_set_scrolly(state->bg_tilemap,0,(state->bgscrolly+state->scroll_y) & 0x1ff);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( twincobr_fgscroll_w )
|
||||
{
|
||||
twincobr_state *state = space->machine->driver_data<twincobr_state>();
|
||||
if (offset == 0) {
|
||||
COMBINE_DATA(&fgscrollx);
|
||||
tilemap_set_scrollx(fg_tilemap,0,(fgscrollx+scroll_x) & 0x1ff);
|
||||
COMBINE_DATA(&state->fgscrollx);
|
||||
tilemap_set_scrollx(state->fg_tilemap,0,(state->fgscrollx+state->scroll_x) & 0x1ff);
|
||||
}
|
||||
else {
|
||||
COMBINE_DATA(&fgscrolly);
|
||||
tilemap_set_scrolly(fg_tilemap,0,(fgscrolly+scroll_y) & 0x1ff);
|
||||
COMBINE_DATA(&state->fgscrolly);
|
||||
tilemap_set_scrolly(state->fg_tilemap,0,(state->fgscrolly+state->scroll_y) & 0x1ff);
|
||||
}
|
||||
}
|
||||
|
||||
@ -378,9 +368,10 @@ WRITE8_HANDLER( wardner_sprite_w )
|
||||
|
||||
static void wardner_sprite_priority_hack(running_machine *machine)
|
||||
{
|
||||
if (fgscrollx != bgscrollx) {
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
if (state->fgscrollx != state->bgscrollx) {
|
||||
UINT16 *buffered_spriteram16 = machine->generic.buffered_spriteram.u16;
|
||||
if ((fgscrollx==0x1c9) || (twincobr_flip_screen && (fgscrollx==0x17a))) { /* in the shop ? */
|
||||
if ((state->fgscrollx==0x1c9) || (state->flip_screen && (state->fgscrollx==0x17a))) { /* in the shop ? */
|
||||
int wardner_hack = buffered_spriteram16[0x0b04/2];
|
||||
/* sprite position 0x6300 to 0x8700 -- hero on shop keeper (normal) */
|
||||
/* sprite position 0x3900 to 0x5e00 -- hero on shop keeper (flip) */
|
||||
@ -406,6 +397,7 @@ static void wardner_sprite_priority_hack(running_machine *machine)
|
||||
|
||||
static void twincobr_log_vram(running_machine *machine)
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
#ifdef MAME_DEBUG
|
||||
if ( input_code_pressed(machine, KEYCODE_M) )
|
||||
{
|
||||
@ -413,28 +405,28 @@ static void twincobr_log_vram(running_machine *machine)
|
||||
int tcode[4];
|
||||
while (input_code_pressed(machine, KEYCODE_M)) ;
|
||||
logerror("Scrolls BG-X BG-Y FG-X FG-Y TX-X TX-Y\n");
|
||||
logerror("------> %04x %04x %04x %04x %04x %04x\n",bgscrollx,bgscrolly,fgscrollx,fgscrolly,txscrollx,txscrolly);
|
||||
for ( tile_voffs = 0; tile_voffs < (twincobr_txvideoram_size/2); tile_voffs++ )
|
||||
logerror("------> %04x %04x %04x %04x %04x %04x\n",state->bgscrollx,state->bgscrolly,state->fgscrollx,state->fgscrolly,state->txscrollx,state->txscrolly);
|
||||
for ( tile_voffs = 0; tile_voffs < (state->txvideoram_size/2); tile_voffs++ )
|
||||
{
|
||||
tcode[1] = twincobr_bgvideoram16[tile_voffs];
|
||||
tcode[2] = twincobr_fgvideoram16[tile_voffs];
|
||||
tcode[3] = twincobr_txvideoram16[tile_voffs];
|
||||
tcode[1] = state->bgvideoram16[tile_voffs];
|
||||
tcode[2] = state->fgvideoram16[tile_voffs];
|
||||
tcode[3] = state->txvideoram16[tile_voffs];
|
||||
logerror("$(%04x) (Col-Tile) BG1:%01x-%03x FG1:%01x-%03x TX1:%02x-%03x\n", tile_voffs,
|
||||
tcode[1] & 0xf000 >> 12, tcode[1] & 0x0fff,
|
||||
tcode[2] & 0xf000 >> 12, tcode[2] & 0x0fff,
|
||||
tcode[3] & 0xf800 >> 11, tcode[3] & 0x07ff);
|
||||
}
|
||||
for ( tile_voffs = (twincobr_txvideoram_size/2); tile_voffs < (twincobr_fgvideoram_size/2); tile_voffs++ )
|
||||
for ( tile_voffs = (state->txvideoram_size/2); tile_voffs < (state->fgvideoram_size/2); tile_voffs++ )
|
||||
{
|
||||
tcode[1] = twincobr_bgvideoram16[tile_voffs];
|
||||
tcode[2] = twincobr_fgvideoram16[tile_voffs];
|
||||
tcode[1] = state->bgvideoram16[tile_voffs];
|
||||
tcode[2] = state->fgvideoram16[tile_voffs];
|
||||
logerror("$(%04x) (Col-Tile) BG1:%01x-%03x FG1:%01x-%03x\n", tile_voffs,
|
||||
tcode[1] & 0xf000 >> 12, tcode[1] & 0x0fff,
|
||||
tcode[2] & 0xf000 >> 12, tcode[2] & 0x0fff);
|
||||
}
|
||||
for ( tile_voffs = (twincobr_fgvideoram_size/2); tile_voffs < (twincobr_bgvideoram_size/2); tile_voffs++ )
|
||||
for ( tile_voffs = (state->fgvideoram_size/2); tile_voffs < (state->bgvideoram_size/2); tile_voffs++ )
|
||||
{
|
||||
tcode[1] = twincobr_bgvideoram16[tile_voffs];
|
||||
tcode[1] = state->bgvideoram16[tile_voffs];
|
||||
logerror("$(%04x) (Col-Tile) BG1:%01x-%03x\n", tile_voffs,
|
||||
tcode[1] & 0xf000 >> 12, tcode[1] & 0x0fff);
|
||||
}
|
||||
@ -449,9 +441,10 @@ static void twincobr_log_vram(running_machine *machine)
|
||||
|
||||
static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority )
|
||||
{
|
||||
twincobr_state *state = machine->driver_data<twincobr_state>();
|
||||
int offs;
|
||||
|
||||
if (twincobr_display_on)
|
||||
if (state->display_on)
|
||||
{
|
||||
UINT16 *buffered_spriteram16 = machine->generic.buffered_spriteram.u16;
|
||||
for (offs = 0;offs < machine->generic.spriteram_size/2;offs += 4)
|
||||
@ -487,17 +480,18 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
|
||||
|
||||
SCREEN_UPDATE( toaplan0 )
|
||||
{
|
||||
twincobr_state *state = screen->machine->driver_data<twincobr_state>();
|
||||
twincobr_log_vram(screen->machine);
|
||||
|
||||
if (wardner_sprite_hack) wardner_sprite_priority_hack(screen->machine);
|
||||
if (state->wardner_sprite_hack) wardner_sprite_priority_hack(screen->machine);
|
||||
|
||||
bitmap_fill(bitmap,cliprect,0);
|
||||
|
||||
tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_OPAQUE,0);
|
||||
tilemap_draw(bitmap,cliprect,state->bg_tilemap,TILEMAP_DRAW_OPAQUE,0);
|
||||
draw_sprites(screen->machine, bitmap,cliprect,0x0400);
|
||||
tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
|
||||
tilemap_draw(bitmap,cliprect,state->fg_tilemap,0,0);
|
||||
draw_sprites(screen->machine, bitmap,cliprect,0x0800);
|
||||
tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
|
||||
tilemap_draw(bitmap,cliprect,state->tx_tilemap,0,0);
|
||||
draw_sprites(screen->machine, bitmap,cliprect,0x0c00);
|
||||
return 0;
|
||||
}
|
||||
|
@ -11,15 +11,6 @@
|
||||
#include "includes/warpwarp.h"
|
||||
|
||||
|
||||
UINT8 *geebee_videoram,*warpwarp_videoram;
|
||||
int geebee_bgw;
|
||||
int warpwarp_ball_on;
|
||||
int warpwarp_ball_h,warpwarp_ball_v;
|
||||
int warpwarp_ball_pen, warpwarp_ball_sizex, warpwarp_ball_sizey;
|
||||
|
||||
static tilemap_t *bg_tilemap;
|
||||
|
||||
|
||||
static const rgb_t geebee_palette[] =
|
||||
{
|
||||
MAKE_RGB(0x00,0x00,0x00), /* black */
|
||||
@ -136,8 +127,9 @@ static TILEMAP_MAPPER( tilemap_scan )
|
||||
|
||||
static TILE_GET_INFO( geebee_get_tile_info )
|
||||
{
|
||||
int code = geebee_videoram[tile_index];
|
||||
int color = (geebee_bgw & 1) | ((code & 0x80) >> 6);
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
int code = state->geebee_videoram[tile_index];
|
||||
int color = (state->geebee_bgw & 1) | ((code & 0x80) >> 6);
|
||||
SET_TILE_INFO(
|
||||
0,
|
||||
code,
|
||||
@ -147,8 +139,9 @@ static TILE_GET_INFO( geebee_get_tile_info )
|
||||
|
||||
static TILE_GET_INFO( navarone_get_tile_info )
|
||||
{
|
||||
int code = geebee_videoram[tile_index];
|
||||
int color = geebee_bgw & 1;
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
int code = state->geebee_videoram[tile_index];
|
||||
int color = state->geebee_bgw & 1;
|
||||
SET_TILE_INFO(
|
||||
0,
|
||||
code,
|
||||
@ -158,10 +151,11 @@ static TILE_GET_INFO( navarone_get_tile_info )
|
||||
|
||||
static TILE_GET_INFO( warpwarp_get_tile_info )
|
||||
{
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
SET_TILE_INFO(
|
||||
0,
|
||||
warpwarp_videoram[tile_index],
|
||||
warpwarp_videoram[tile_index + 0x400],
|
||||
state->videoram[tile_index],
|
||||
state->videoram[tile_index + 0x400],
|
||||
0);
|
||||
}
|
||||
|
||||
@ -175,17 +169,20 @@ static TILE_GET_INFO( warpwarp_get_tile_info )
|
||||
|
||||
VIDEO_START( geebee )
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, geebee_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, geebee_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
}
|
||||
|
||||
VIDEO_START( navarone )
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, navarone_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, navarone_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
}
|
||||
|
||||
VIDEO_START( warpwarp )
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, warpwarp_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
state->bg_tilemap = tilemap_create(machine, warpwarp_get_tile_info,tilemap_scan,8,8,34,28);
|
||||
}
|
||||
|
||||
|
||||
@ -198,14 +195,16 @@ VIDEO_START( warpwarp )
|
||||
|
||||
WRITE8_HANDLER( geebee_videoram_w )
|
||||
{
|
||||
geebee_videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap,offset & 0x3ff);
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
state->geebee_videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap,offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( warpwarp_videoram_w )
|
||||
{
|
||||
warpwarp_videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap,offset & 0x3ff);
|
||||
warpwarp_state *state = space->machine->driver_data<warpwarp_state>();
|
||||
state->videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap,offset & 0x3ff);
|
||||
}
|
||||
|
||||
|
||||
@ -222,24 +221,26 @@ INLINE void geebee_plot(bitmap_t *bitmap, const rectangle *cliprect, int x, int
|
||||
*BITMAP_ADDR16(bitmap, y, x) = pen;
|
||||
}
|
||||
|
||||
static void draw_ball(bitmap_t *bitmap, const rectangle *cliprect,pen_t pen)
|
||||
static void draw_ball(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect,pen_t pen)
|
||||
{
|
||||
if (warpwarp_ball_on)
|
||||
warpwarp_state *state = machine->driver_data<warpwarp_state>();
|
||||
if (state->ball_on)
|
||||
{
|
||||
int x = 256+8 - warpwarp_ball_h;
|
||||
int y = 240 - warpwarp_ball_v;
|
||||
int x = 256+8 - state->ball_h;
|
||||
int y = 240 - state->ball_v;
|
||||
int i,j;
|
||||
|
||||
for (i = warpwarp_ball_sizey;i > 0;i--)
|
||||
for (j = warpwarp_ball_sizex;j > 0;j--)
|
||||
for (i = state->ball_sizey;i > 0;i--)
|
||||
for (j = state->ball_sizex;j > 0;j--)
|
||||
geebee_plot(bitmap, cliprect, x-j, y-i, pen);
|
||||
}
|
||||
}
|
||||
|
||||
SCREEN_UPDATE( geebee )
|
||||
{
|
||||
tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
|
||||
warpwarp_state *state = screen->machine->driver_data<warpwarp_state>();
|
||||
tilemap_draw(bitmap,cliprect,state->bg_tilemap,0,0);
|
||||
|
||||
draw_ball(bitmap,cliprect,warpwarp_ball_pen);
|
||||
draw_ball(screen->machine, bitmap, cliprect, state->ball_pen);
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user