diff --git a/hash/c64_cart.xml b/hash/c64_cart.xml index 94f52457d33..c56eac8a518 100644 --- a/hash/c64_cart.xml +++ b/hash/c64_cart.xml @@ -6661,18 +6661,63 @@ - - The Final ChessCard (Ger) + + The Final ChessCard (Eng, v1.0) 1989 Tasc - - + + - - + + + + + + + + + + + + + The Final ChessCard (Ger, v1.5) + 1990 + Tasc + + + + + + + + + + + + + + + + + + + The Final ChessCard (Ger, v1.0) + 1989 + Tasc + + + + + + + + + + + diff --git a/hash/c64_flop.xml b/hash/c64_flop.xml index 39dd8029187..3882171eacd 100644 --- a/hash/c64_flop.xml +++ b/hash/c64_flop.xml @@ -149,6 +149,27 @@ + + The Final ChessCard + 1990 + Tasc + + + + + + + + + + + + + + + + + Green Beret 1986 diff --git a/src/devices/bus/c64/fcc.cpp b/src/devices/bus/c64/fcc.cpp index 24aaa6ec523..d669d38ac5d 100644 --- a/src/devices/bus/c64/fcc.cpp +++ b/src/devices/bus/c64/fcc.cpp @@ -1,38 +1,19 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder +// copyright-holders:Curt Coder, hap /********************************************************************** - Tasc Final ChessCard cartridge emulation +Tasc Final ChessCard cartridge emulation + +The cartridge includes its own CPU (G65SC02P-4 @ 5MHz), making a relatively +strong chess program possible on C64. +It was also released for IBM PC, with an ISA card. **********************************************************************/ -/* - - TODO: - - 629D ldx #$00 - 629F stx $0e - 62A1 sta $df00 - 62A4 inc $d020 - 62A7 dec $d020 - 62AA cpx $0e - 62AC beq $62a4 <-- eternal loop here - 62AE rts - -*/ - #include "emu.h" #include "fcc.h" - -//************************************************************************** -// MACROS/CONSTANTS -//************************************************************************** - -#define G65SC02P4_TAG "g65sc02p4" - - //************************************************************************** // DEVICE DEFINITIONS //************************************************************************** @@ -40,34 +21,15 @@ DEFINE_DEVICE_TYPE(C64_FCC, c64_final_chesscard_device, "c64_fcc", "Final ChessCard") -//------------------------------------------------- -// ROM( c64_fcc ) -//------------------------------------------------- - -ROM_START( c64_fcc ) - ROM_REGION( 0x8000, G65SC02P4_TAG, 0 ) - ROM_LOAD( "fcc_rom1", 0x0000, 0x8000, CRC(2949836a) SHA1(9e6283095df9e3f4802ed0c654101f8e37168bf6) ) -ROM_END - - -//------------------------------------------------- -// rom_region - device-specific ROM region -//------------------------------------------------- - -const tiny_rom_entry *c64_final_chesscard_device::device_rom_region() const -{ - return ROM_NAME( c64_fcc ); -} - - //------------------------------------------------- // ADDRESS_MAP( c64_fcc_map ) //------------------------------------------------- void c64_final_chesscard_device::c64_fcc_map(address_map &map) { - map(0x0000, 0x1fff).mirror(0x6000).rw(FUNC(c64_final_chesscard_device::nvram_r), FUNC(c64_final_chesscard_device::nvram_w)); - map(0x8000, 0xffff).rom().region(G65SC02P4_TAG, 0); + map(0x0000, 0x1fff).rw(FUNC(c64_final_chesscard_device::nvram_r), FUNC(c64_final_chesscard_device::nvram_w)); // A13-A15 = low + map(0x7f00, 0x7f00).mirror(0x00ff).r(m_sublatch, FUNC(generic_latch_8_device::read)).w(m_mainlatch, FUNC(generic_latch_8_device::write)); // A8-A14 = high + map(0x8000, 0xffff).r(FUNC(c64_final_chesscard_device::rom_r)); } @@ -79,6 +41,11 @@ void c64_final_chesscard_device::device_add_mconfig(machine_config &config) { M65SC02(config, m_maincpu, XTAL(5'000'000)); m_maincpu->set_addrmap(AS_PROGRAM, &c64_final_chesscard_device::c64_fcc_map); + + config.m_perfect_cpu_quantum = subtag("maincpu"); + + GENERIC_LATCH_8(config, m_mainlatch).data_pending_callback().set(FUNC(c64_final_chesscard_device::mainlatch_int)); + GENERIC_LATCH_8(config, m_sublatch).data_pending_callback().set_inputline(m_maincpu, INPUT_LINE_NMI); } @@ -114,9 +81,11 @@ c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mco device_t(mconfig, C64_FCC, tag, owner, clock), device_c64_expansion_card_interface(mconfig, *this), device_nvram_interface(mconfig, *this), - m_maincpu(*this, G65SC02P4_TAG), + m_maincpu(*this, "maincpu"), + m_mainlatch(*this, "mainlatch"), + m_sublatch(*this, "sublatch"), m_bank(0), - m_ramen(0) + m_hidden(0) { } @@ -127,6 +96,9 @@ c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mco void c64_final_chesscard_device::device_start() { + // state saving + save_item(NAME(m_bank)); + save_item(NAME(m_hidden)); } @@ -139,7 +111,8 @@ void c64_final_chesscard_device::device_reset() m_maincpu->reset(); m_bank = 0; - m_ramen = 0; + m_hidden = 0; + m_exrom = 0; m_game = 0; } @@ -150,21 +123,10 @@ void c64_final_chesscard_device::device_reset() uint8_t c64_final_chesscard_device::c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) { - if (!roml) - { - if (m_ramen) - { - data = m_nvram[offset & 0x1fff]; - } - else - { - data = m_roml[(m_bank << 14) | (offset & 0x3fff)]; - } - } - else if (!romh) - { + if (!roml || !romh) data = m_roml[(m_bank << 14) | (offset & 0x3fff)]; - } + else if (!io2) + data = m_mainlatch->read(); return data; } @@ -176,72 +138,16 @@ uint8_t c64_final_chesscard_device::c64_cd_r(offs_t offset, uint8_t data, int sp void c64_final_chesscard_device::c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) { - if (!roml) + if (!m_hidden && !io1) { - if (m_ramen) - { - m_nvram[offset & 0x1fff] = data; - } - } - else if (!io1) - { - /* - - bit description - - 0 ? - 1 - 2 - 3 - 4 - 5 - 6 - 7 - - */ - - printf("IO1 %04x %02x\n", offset, data); + // d0: rom bank + // d1: EXROM/GAME + // d7: hide register m_bank = BIT(data, 0); + m_exrom = BIT(data, 1); + m_game = BIT(data, 1); + m_hidden = BIT(data, 7); } else if (!io2) - { - /* - - bit description - - 0 ? - 1 - 2 - 3 - 4 - 5 - 6 - 7 ? - - */ - - printf("IO2 %04x %02x\n", offset, data); - m_ramen = BIT(data, 0); - m_game = BIT(data, 7); - } -} - - -//------------------------------------------------- -// nvram_r - NVRAM read -//------------------------------------------------- - -READ8_MEMBER( c64_final_chesscard_device::nvram_r ) -{ - return m_nvram[offset & m_nvram.mask()]; -} - - -//------------------------------------------------- -// nvram_w - NVRAM write -//------------------------------------------------- - -WRITE8_MEMBER( c64_final_chesscard_device::nvram_w ) -{ - m_nvram[offset & m_nvram.mask()] = data; + m_sublatch->write(data); } diff --git a/src/devices/bus/c64/fcc.h b/src/devices/bus/c64/fcc.h index 3988a597fd4..44ae1ac7574 100644 --- a/src/devices/bus/c64/fcc.h +++ b/src/devices/bus/c64/fcc.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder +// copyright-holders:Curt Coder, hap /********************************************************************** Tasc Final ChessCard cartridge emulation @@ -13,6 +13,7 @@ #include "exp.h" #include "cpu/m6502/m65sc02.h" +#include "machine/gen_latch.h" @@ -36,7 +37,6 @@ protected: virtual void device_reset() override; // optional information overrides - virtual const tiny_rom_entry *device_rom_region() const override; virtual void device_add_mconfig(machine_config &config) override; virtual ioport_constructor device_input_ports() const override; @@ -51,12 +51,16 @@ protected: private: required_device m_maincpu; + required_device m_mainlatch; + required_device m_sublatch; uint8_t m_bank; - int m_ramen; + int m_hidden; - DECLARE_READ8_MEMBER( nvram_r ); - DECLARE_WRITE8_MEMBER( nvram_w ); + DECLARE_WRITE_LINE_MEMBER(mainlatch_int) { m_slot->nmi_w(state); } + DECLARE_READ8_MEMBER(rom_r) { return m_romh[offset]; } // cartridge cpu rom + DECLARE_READ8_MEMBER(nvram_r) { return m_nvram[offset & m_nvram.mask()]; } + DECLARE_WRITE8_MEMBER(nvram_w) { m_nvram[offset & m_nvram.mask()] = data; } void c64_fcc_map(address_map &map); };