Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-05 08:41:31 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

devices\bus: few less MCFG macros (nw)

Browse Source
This commit is contained in:
Ivan Vangelista 2019-02-01 20:08:15 +01:00
parent 17d37ba751
commit f76b001dfe
10 changed files with 53 additions and 123 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/devices/bus/cpc/hd20.cpp
View File

@ -15,12 +15,13 @@
DEFINE_DEVICE_TYPE(CPC_HD20, cpc_hd20_device, "cpc_hd20", "Dobbertin HD20")
MACHINE_CONFIG_START(cpc_hd20_device::device_add_mconfig)
MCFG_DEVICE_ADD("hdc",ST11M_HDC,0)
MCFG_XTHDC_IRQ_HANDLER(WRITELINE(*this, cpc_hd20_device, irq_w))
MCFG_HARDDISK_ADD("hdc:primary")
void cpc_hd20_device::device_add_mconfig(machine_config &config)
{
ST11M_HDC(config, m_hdc,0);
m_hdc->irq_handler().set(FUNC(cpc_hd20_device::irq_w));
HARDDISK(config, "hdc:primary");
// no pass-through (?)
MACHINE_CONFIG_END
}
ROM_START( cpc_hd20 )

43
src/devices/bus/isa/gus.h
View File

@ -45,38 +45,6 @@
#include "isa.h"
#include "machine/6850acia.h"
#define MCFG_GF1_TXIRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_txirq_handler(DEVCB_##_devcb);
#define MCFG_GF1_RXIRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_rxirq_handler(DEVCB_##_devcb);
#define MCFG_GF1_WAVE_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_wave_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_RAMP_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_ramp_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_TIMER1_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_timer1_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_TIMER2_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_timer2_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_SB_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_sb_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_DMA_IRQ_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_dma_irq_handler(DEVCB_##_devcb);
#define MCFG_GF1_DRQ1_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_drq1_handler(DEVCB_##_devcb);
#define MCFG_GF1_DRQ2_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_drq2_handler(DEVCB_##_devcb);
#define MCFG_GF1_NMI_HANDLER(_devcb) \
downcast<gf1_device &>(*device).set_nmi_handler(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
@ -112,17 +80,6 @@ public:
// construction/destruction
gf1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_txirq_handler(Object &&cb) { return m_txirq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_rxirq_handler(Object &&cb) { return m_rxirq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_wave_irq_handler(Object &&cb) { return m_wave_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ramp_irq_handler(Object &&cb) { return m_ramp_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_timer1_irq_handler(Object &&cb) { return m_timer1_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_timer2_irq_handler(Object &&cb) { return m_timer2_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_sb_irq_handler(Object &&cb) { return m_sb_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_dma_irq_handler(Object &&cb) { return m_dma_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_drq1_handler(Object &&cb) { return m_drq1_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_drq2_handler(Object &&cb) { return m_drq2_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_nmi_handler(Object &&cb) { return m_nmi_handler.set_callback(std::forward<Object>(cb)); }
auto txirq_handler() { return m_txirq_handler.bind(); }
auto rxirq_handler() { return m_rxirq_handler.bind(); }
auto wave_irq_handler() { return m_wave_irq_handler.bind(); }

30
src/devices/bus/isa/hdc.cpp
View File

@ -918,21 +918,23 @@ DEFINE_DEVICE_TYPE(ISA8_HDC_EC1841, isa8_hdc_ec1841_device, "isa_hdc_ec1841", "E
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(isa8_hdc_device::device_add_mconfig)
MCFG_DEVICE_ADD("hdc",XT_HDC,0)
MCFG_XTHDC_IRQ_HANDLER(WRITELINE(*this, isa8_hdc_device,irq_w))
MCFG_XTHDC_DRQ_HANDLER(WRITELINE(*this, isa8_hdc_device,drq_w))
MCFG_HARDDISK_ADD("hdc:primary")
MCFG_HARDDISK_ADD("hdc:slave")
MACHINE_CONFIG_END
void isa8_hdc_device::device_add_mconfig(machine_config &config)
{
XT_HDC(config, m_hdc,0);
m_hdc->irq_handler().set(FUNC(isa8_hdc_device::irq_w));
m_hdc->drq_handler().set(FUNC(isa8_hdc_device::drq_w));
HARDDISK(config, "hdc:primary");
HARDDISK(config, "hdc:slave");
}
MACHINE_CONFIG_START(isa8_hdc_ec1841_device::device_add_mconfig)
MCFG_DEVICE_ADD("hdc",EC1841_HDC,0)
MCFG_XTHDC_IRQ_HANDLER(WRITELINE(*this, isa8_hdc_ec1841_device,irq_w))
MCFG_XTHDC_DRQ_HANDLER(WRITELINE(*this, isa8_hdc_ec1841_device,drq_w))
MCFG_HARDDISK_ADD("hdc:primary")
MCFG_HARDDISK_ADD("hdc:slave")
MACHINE_CONFIG_END
void isa8_hdc_ec1841_device::device_add_mconfig(machine_config &config)
{
EC1841_HDC(config, m_hdc,0);
m_hdc->irq_handler().set(FUNC(isa8_hdc_ec1841_device::irq_w));
m_hdc->drq_handler().set(FUNC(isa8_hdc_ec1841_device::drq_w));
HARDDISK(config, "hdc:primary");
HARDDISK(config, "hdc:slave");
}
//-------------------------------------------------
// rom_region - device-specific ROM region

9
src/devices/bus/isa/hdc.h
View File

@ -19,11 +19,6 @@
// XT HD controller device
#define MCFG_XTHDC_IRQ_HANDLER(_devcb) \
downcast<xt_hdc_device &>(*device).set_irq_handler(DEVCB_##_devcb);
#define MCFG_XTHDC_DRQ_HANDLER(_devcb) \
downcast<xt_hdc_device &>(*device).set_drq_handler(DEVCB_##_devcb);
class xt_hdc_device :
public device_t
@ -32,8 +27,8 @@ public:
// construction/destruction
xt_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); }
auto irq_handler() { return m_irq_handler.bind(); }
auto drq_handler() { return m_drq_handler.bind(); }
int dack_r();
int dack_rs();

4
src/devices/bus/lpci/mpc105.cpp
View File

@ -32,11 +32,10 @@ DEFINE_DEVICE_TYPE(MPC105, mpc105_device, "mpc105", "Motorola MPC105")
mpc105_device::mpc105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, MPC105, tag, owner, clock),
pci_device_interface( mconfig, *this ),
m_cpu_tag(nullptr),
m_bank_base_default(0),
m_bank_base(0),
m_bank_enable(0),
m_maincpu(nullptr)
m_maincpu(*this, finder_base::DUMMY_TAG)
{
}
@ -46,7 +45,6 @@ mpc105_device::mpc105_device(const machine_config &mconfig, const char *tag, dev
void mpc105_device::device_start()
{
m_maincpu = machine().device<cpu_device>(m_cpu_tag);
}
//-------------------------------------------------

10
src/devices/bus/lpci/mpc105.h
View File

@ -17,11 +17,6 @@
#define MPC105_MEMORYBANK_COUNT 8
#define MCFG_MPC105_CPU( _tag ) \
downcast<mpc105_device &>(*device).set_cpu(_tag);
#define MCFG_MPC105_BANK_BASE_DEFAULT( bank_base_default ) \
downcast<mpc105_device &>(*device).set_bank_base_default(bank_base_default);
// ======================> mpc105_device
@ -32,7 +27,7 @@ public:
// construction/destruction
mpc105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_cpu(const char *tag) { m_cpu_tag = tag; }
template <typename T> void set_cpu(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); }
void set_bank_base_default(int bank_base_default) { m_bank_base_default = bank_base_default; }
virtual uint32_t pci_read(pci_bus_device *pcibus, int function, int offset, uint32_t mem_mask) override;
@ -46,13 +41,12 @@ protected:
void update_memory();
private:
const char *m_cpu_tag;
int m_bank_base_default;
int m_bank_base;
uint8_t m_bank_enable;
uint32_t m_bank_registers[8];
cpu_device* m_maincpu;
required_device<cpu_device> m_maincpu;
};

23
src/devices/bus/ql/cst_q_plus4.cpp
View File

@ -50,21 +50,22 @@ const tiny_rom_entry *cst_q_plus4_device::device_rom_region() const
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(cst_q_plus4_device::device_add_mconfig)
MCFG_DEVICE_ADD(MC6821_TAG, PIA6821, 0)
void cst_q_plus4_device::device_add_mconfig(machine_config &config)
{
PIA6821(config, MC6821_TAG, 0);
MCFG_DEVICE_ADD("exp1", QL_EXPANSION_SLOT, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr)
MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(WRITELINE(*this, cst_q_plus4_device, exp1_extintl_w))
QL_EXPANSION_SLOT(config, m_exp1, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr);
m_exp1->extintl_wr_callback().set(FUNC(cst_q_plus4_device::exp1_extintl_w));
MCFG_DEVICE_ADD("exp2", QL_EXPANSION_SLOT, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr)
MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(WRITELINE(*this, cst_q_plus4_device, exp2_extintl_w))
QL_EXPANSION_SLOT(config, m_exp2, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr);
m_exp2->extintl_wr_callback().set(FUNC(cst_q_plus4_device::exp2_extintl_w));
MCFG_DEVICE_ADD("exp3", QL_EXPANSION_SLOT, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr)
MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(WRITELINE(*this, cst_q_plus4_device, exp3_extintl_w))
QL_EXPANSION_SLOT(config, m_exp3, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr);
m_exp3->extintl_wr_callback().set(FUNC(cst_q_plus4_device::exp3_extintl_w));
MCFG_DEVICE_ADD("exp4", QL_EXPANSION_SLOT, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr)
MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(WRITELINE(*this, cst_q_plus4_device, exp4_extintl_w))
MACHINE_CONFIG_END
QL_EXPANSION_SLOT(config, m_exp4, DERIVED_CLOCK(1, 1), ql_expansion_cards, nullptr);
m_exp4->extintl_wr_callback().set(FUNC(cst_q_plus4_device::exp4_extintl_w));
}

26
src/devices/bus/ql/exp.h
View File

@ -48,24 +48,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_QL_EXPANSION_SLOT_IPL0L_CALLBACK(_write) \
downcast<ql_expansion_slot_device &>(*device).set_ipl0l_wr_callback(DEVCB_##_write);
#define MCFG_QL_EXPANSION_SLOT_IPL1L_CALLBACK(_write) \
downcast<ql_expansion_slot_device &>(*device).set_ipl1l_wr_callback(DEVCB_##_write);
#define MCFG_QL_EXPANSION_SLOT_BERRL_CALLBACK(_write) \
downcast<ql_expansion_slot_device &>(*device).set_berrl_wr_callback(DEVCB_##_write);
#define MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(_write) \
downcast<ql_expansion_slot_device &>(*device).set_extintl_wr_callback(DEVCB_##_write);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -112,10 +94,10 @@ public:
}
ql_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_ipl0l_wr_callback(Object &&cb) { return m_write_ipl0l.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_ipl1l_wr_callback(Object &&cb) { return m_write_ipl1l.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_berrl_wr_callback(Object &&cb) { return m_write_berrl.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_extintl_wr_callback(Object &&cb) { return m_write_extintl.set_callback(std::forward<Object>(cb)); }
auto ipl0l_wr_callback() { return m_write_ipl0l.bind(); }
auto ipl1l_wr_callback() { return m_write_ipl1l.bind(); }
auto berrl_wr_callback() { return m_write_berrl.bind(); }
auto extintl_wr_callback() { return m_write_extintl.bind(); }
// computer interface
uint8_t read(address_space &space, offs_t offset, uint8_t data) { if (m_card) data = m_card->read(space, offset, data); return data; }

5
src/mame/drivers/bebox.cpp
View File

@ -117,8 +117,9 @@ FLOPPY_FORMATS_END
void bebox_state::mpc105_config(device_t *device)
{
MCFG_MPC105_CPU( "ppc1" )
MCFG_MPC105_BANK_BASE_DEFAULT( 0 )
mpc105_device &mpc105 = *downcast<mpc105_device *>(device);
mpc105.set_cpu(":ppc1");
mpc105.set_bank_base_default(0);
}
/*************************************

15
src/mame/drivers/ql.cpp
View File

@ -921,8 +921,7 @@ MACHINE_CONFIG_START(ql_state::ql)
// sound hardware
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.25);
// devices
ZX8301(config, m_zx8301, X1, m_maincpu);
@ -954,13 +953,13 @@ MACHINE_CONFIG_START(ql_state::ql)
RS232_PORT(config, m_ser2, default_rs232_devices, nullptr); // wired as DTE
m_ser2->cts_handler().set(m_zx8302, FUNC(zx8302_device::write_cts2));
MCFG_DEVICE_ADD("exp", QL_EXPANSION_SLOT, 0, ql_expansion_cards, nullptr) // FIXME: what's the clock on the slot?
//MCFG_QL_EXPANSION_SLOT_IPL0L_CALLBACK()
//MCFG_QL_EXPANSION_SLOT_IPL1L_CALLBACK()
//MCFG_QL_EXPANSION_SLOT_BERRL_CALLBACK()
MCFG_QL_EXPANSION_SLOT_EXTINTL_CALLBACK(WRITELINE(*this, ql_state, exp_extintl_w))
QL_EXPANSION_SLOT(config, m_exp, 0, ql_expansion_cards, nullptr); // FIXME: what's the clock on the slot?
//m_exp->ipl0l_wr_callback().set();
//m_exp->ipl1l_wr_callback().set();(
//m_exp->berrl_wr_callback().set();
m_exp->extintl_wr_callback().set(FUNC(ql_state::exp_extintl_w));
MCFG_DEVICE_ADD("rom", QL_ROM_CARTRIDGE_SLOT, ql_rom_cartridge_cards, nullptr)
QL_ROM_CARTRIDGE_SLOT(config, m_cart, ql_rom_cartridge_cards, nullptr);
QIMI(config, m_qimi, 0);
m_qimi->extint_wr_callback().set(FUNC(ql_state::qimi_extintl_w));