gen_latch: Allow device to be configured for acknowledgement to occur separately from data reads; use this for batrider (nw)

This commit is contained in:
AJR 2017-06-13 17:07:12 -04:00
parent 2cbdb17ed8
commit f78f115d0f
4 changed files with 30 additions and 26 deletions

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@ -28,6 +28,7 @@ DEFINE_DEVICE_TYPE(GENERIC_LATCH_16, generic_latch_16_device, "generic_latch_16"
generic_latch_base_device::generic_latch_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
m_separate_acknowledge(false),
m_latch_written(false),
m_data_pending_cb(*this)
{
@ -88,7 +89,8 @@ generic_latch_8_device::generic_latch_8_device(const machine_config &mconfig, co
READ8_MEMBER( generic_latch_8_device::read )
{
set_latch_written(false);
if (!has_separate_acknowledge())
set_latch_written(false);
return m_latched_value;
}
@ -117,6 +119,17 @@ WRITE_LINE_MEMBER( generic_latch_8_device::clear_w )
m_latched_value = 0x00;
}
READ8_MEMBER( generic_latch_8_device::acknowledge_r )
{
set_latch_written(false);
return space.unmap();
}
WRITE8_MEMBER( generic_latch_8_device::acknowledge_w )
{
set_latch_written(false);
}
//-------------------------------------------------
// soundlatch_sync_callback - time-delayed
// callback to set a latch value
@ -158,7 +171,8 @@ generic_latch_16_device::generic_latch_16_device(const machine_config &mconfig,
READ16_MEMBER( generic_latch_16_device::read )
{
set_latch_written(false);
if (!has_separate_acknowledge())
set_latch_written(false);
return m_latched_value;
}

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@ -34,6 +34,9 @@ DECLARE_DEVICE_TYPE(GENERIC_LATCH_16, generic_latch_16_device)
#define MCFG_GENERIC_LATCH_DATA_PENDING_CB(_devcb) \
devcb = &generic_latch_base_device::set_data_pending_callback(*device, DEVCB_##_devcb);
#define MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(_ack) \
generic_latch_base_device::set_separate_acknowledge(*device, _ack);
//**************************************************************************
// TYPE DEFINITIONS
@ -51,6 +54,7 @@ public:
// static configuration
template <class Object> static devcb_base &set_data_pending_callback(device_t &device, Object &&cb)
{ return downcast<generic_latch_base_device &>(device).m_data_pending_cb.set_callback(std::forward<Object>(cb)); }
static void set_separate_acknowledge(device_t &device, bool ack) { downcast<generic_latch_base_device &>(device).m_separate_acknowledge = ack; }
DECLARE_READ_LINE_MEMBER(pending_r);
@ -58,10 +62,12 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
bool has_separate_acknowledge() const { return m_separate_acknowledge; }
bool is_latch_written() const { return m_latch_written; }
void set_latch_written(bool latch_written);
private:
bool m_separate_acknowledge;
bool m_latch_written;
devcb_write_line m_data_pending_cb;
};
@ -83,6 +89,9 @@ public:
DECLARE_WRITE_LINE_MEMBER( preset_w );
DECLARE_WRITE_LINE_MEMBER( clear_w );
DECLARE_READ8_MEMBER( acknowledge_r );
DECLARE_WRITE8_MEMBER( acknowledge_w );
void preset_w(u8 value) { m_latched_value = value; }
protected:

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@ -850,30 +850,11 @@ WRITE8_MEMBER(toaplan2_state::raizing_oki_bankswitch_w)
}
WRITE16_MEMBER(toaplan2_state::bgaregga_soundlatch_w)
{
if (ACCESSING_BITS_0_7)
{
m_soundlatch->write(space, offset, data & 0xff);
m_audiocpu->set_input_line(0, HOLD_LINE);
}
}
READ8_MEMBER(toaplan2_state::bgaregga_E01D_r)
{
// the Z80 reads this address during its IRQ routine,
// and reads the soundlatch only if the lowest bit is clear.
return 0;
}
WRITE8_MEMBER(toaplan2_state::bgaregga_E00C_w)
{
// the Z80 writes here after reading the soundlatch.
// I would think that this was an acknowledge latch like
// batrider and bbakraid have, except that on the 68000 side
// there's no corresponding read...
return m_soundlatch->pending_r() ? 0 : 1;
}
@ -1371,7 +1352,7 @@ static ADDRESS_MAP_START( bgaregga_68k_mem, AS_PROGRAM, 16, toaplan2_state )
AM_RANGE(0x502000, 0x502fff) AM_RAM AM_SHARE("tx_lineselect")
AM_RANGE(0x503000, 0x5031ff) AM_RAM_WRITE(toaplan2_tx_linescroll_w) AM_SHARE("tx_linescroll")
AM_RANGE(0x503200, 0x503fff) AM_RAM
AM_RANGE(0x600000, 0x600001) AM_WRITE(bgaregga_soundlatch_w)
AM_RANGE(0x600000, 0x600001) AM_DEVWRITE8("soundlatch", generic_latch_8_device, write, 0x00ff)
ADDRESS_MAP_END
@ -1460,7 +1441,7 @@ static ADDRESS_MAP_START( bgaregga_sound_z80_mem, AS_PROGRAM, 8, toaplan2_state
AM_RANGE(0xe004, 0xe004) AM_DEVREADWRITE("oki", okim6295_device, read, write)
AM_RANGE(0xe006, 0xe008) AM_WRITE(raizing_oki_bankswitch_w)
AM_RANGE(0xe00a, 0xe00a) AM_WRITE(raizing_z80_bankswitch_w)
AM_RANGE(0xe00c, 0xe00c) AM_WRITE(bgaregga_E00C_w)
AM_RANGE(0xe00c, 0xe00c) AM_DEVWRITE("soundlatch", generic_latch_8_device, acknowledge_w)
AM_RANGE(0xe01c, 0xe01c) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
AM_RANGE(0xe01d, 0xe01d) AM_READ(bgaregga_E01D_r)
ADDRESS_MAP_END
@ -4176,6 +4157,8 @@ static MACHINE_CONFIG_START( bgaregga )
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_GENERIC_LATCH_8_ADD("soundlatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("audiocpu", 0))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_YM2151_ADD("ymsnd", XTAL_32MHz/8)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)

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@ -102,9 +102,7 @@ public:
DECLARE_READ8_MEMBER(fixeight_region_r);
DECLARE_WRITE8_MEMBER(raizing_z80_bankswitch_w);
DECLARE_WRITE8_MEMBER(raizing_oki_bankswitch_w);
DECLARE_WRITE16_MEMBER(bgaregga_soundlatch_w);
DECLARE_READ8_MEMBER(bgaregga_E01D_r);
DECLARE_WRITE8_MEMBER(bgaregga_E00C_w);
DECLARE_READ16_MEMBER(batrider_z80_busack_r);
DECLARE_WRITE16_MEMBER(batrider_z80_busreq_w);
DECLARE_READ16_MEMBER(batrider_z80rom_r);