diff --git a/src/mame/drivers/isbc.cpp b/src/mame/drivers/isbc.cpp index 9e8d648e93d..7a468794fb3 100644 --- a/src/mame/drivers/isbc.cpp +++ b/src/mame/drivers/isbc.cpp @@ -25,7 +25,8 @@ able to deal with 256byte sectors so fails to load the irmx 512byte sector image #include "machine/pit8253.h" #include "machine/i8255.h" #include "machine/i8251.h" -#include "machine/z80dart.h" +//#include "machine/z80dart.h" +#include "machine/z80sio.h" #include "bus/centronics/ctronics.h" #include "bus/isbx/isbx.h" #include "machine/isbc_215g.h" @@ -48,7 +49,8 @@ public: required_device m_maincpu; optional_device m_uart8251; - optional_device m_uart8274; +// optional_device m_uart8274; + optional_device m_uart8274; required_device m_pic_0; optional_device m_pic_1; optional_device m_centronics; @@ -140,7 +142,7 @@ static ADDRESS_MAP_START(isbc286_io, AS_IO, 16, isbc_state) AM_RANGE(0x00c4, 0x00c7) AM_DEVREADWRITE8("pic_1", pic8259_device, read, write, 0x00ff) AM_RANGE(0x00c8, 0x00cf) AM_DEVREADWRITE8("ppi", i8255_device, read, write, 0x00ff) AM_RANGE(0x00d0, 0x00d7) AM_DEVREADWRITE8("pit", pit8254_device, read, write, 0x00ff) - AM_RANGE(0x00d8, 0x00df) AM_DEVREADWRITE8("uart8274", i8274_device, cd_ba_r, cd_ba_w, 0x00ff) + AM_RANGE(0x00d8, 0x00df) AM_DEVREADWRITE8("uart8274", i8274N_device, cd_ba_r, cd_ba_w, 0x00ff) AM_RANGE(0x0100, 0x0101) AM_DEVWRITE8("isbc_215g", isbc_215g_device, write, 0x00ff) ADDRESS_MAP_END @@ -325,7 +327,8 @@ static MACHINE_CONFIG_START( isbc286, isbc_state ) MCFG_PIT8253_CLK0(XTAL_22_1184MHz/18) MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic_0", pic8259_device, ir0_w)) MCFG_PIT8253_CLK1(XTAL_22_1184MHz/18) - MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("uart8274", z80dart_device, rxtxcb_w)) +// MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("uart8274", z80dart_device, rxtxcb_w)) + MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("uart8274", i8274N_device, rxtxcb_w)) MCFG_PIT8253_CLK2(XTAL_22_1184MHz/18) MCFG_PIT8253_OUT2_HANDLER(WRITELINE(isbc_state, isbc286_tmr2_w)) @@ -344,6 +347,7 @@ static MACHINE_CONFIG_START( isbc286, isbc_state ) MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") MCFG_I8274_ADD("uart8274", XTAL_16MHz/4, 0, 0, 0, 0) +#if 0 MCFG_Z80DART_OUT_TXDA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd)) MCFG_Z80DART_OUT_DTRA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_dtr)) MCFG_Z80DART_OUT_RTSA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_rts)) @@ -351,16 +355,37 @@ static MACHINE_CONFIG_START( isbc286, isbc_state ) MCFG_Z80DART_OUT_DTRB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_dtr)) MCFG_Z80DART_OUT_RTSB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_rts)) MCFG_Z80DART_OUT_INT_CB(WRITELINE(isbc_state, isbc_uart8274_irq)) +#else + MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_txd)) + MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_dtr)) + MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232a", rs232_port_device, write_rts)) + MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_txd)) + MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_dtr)) + MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232b", rs232_port_device, write_rts)) + MCFG_Z80SIO_OUT_INT_CB(WRITELINE(isbc_state, isbc_uart8274_irq)) +#endif MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, nullptr) +#if 0 MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart8274", z80dart_device, rxa_w)) MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart8274", z80dart_device, dcda_w)) MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart8274", z80dart_device, ctsa_w)) +#else + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart8274", i8274N_device, rxa_w)) + MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart8274", i8274N_device, dcda_w)) + MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart8274", i8274N_device, ctsa_w)) +#endif MCFG_RS232_PORT_ADD("rs232b", default_rs232_devices, "terminal") +#if 0 MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart8274", z80dart_device, rxb_w)) MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart8274", z80dart_device, dcdb_w)) MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart8274", z80dart_device, ctsb_w)) +#else + MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart8274", i8274N_device, rxb_w)) + MCFG_RS232_DCD_HANDLER(DEVWRITELINE("uart8274", i8274N_device, dcdb_w)) + MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart8274", i8274N_device, ctsb_w)) +#endif MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", isbc286_terminal) MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, nullptr) @@ -413,6 +438,78 @@ ROM_START( isbc286 ) ROM_LOAD16_BYTE( "u36.bin", 0x00000, 0x10000, CRC(22db075f) SHA1(fd29ea77f5fc0697c8f8b66aca549aad5b9db3ea)) ROM_END +/* + * :uart8274 A Reg 00 <- 18 - Channel reset command + * :uart8274 A Reg 04 <- 44 - x16 clock, 1 stop bit, no parity + * :uart8274 A Reg 05 <- ea - Tx Enabled, Tx 8 bits, Send Break 0, RTS=0, ?? - Read out Status Register 1 (Errors and All Sent flag) + * :uart8274 A Reg 05 <- e2 - Tx Disabled, Tx 8 bits, Send Break 0, RTS=0, DTR=0 + * :uart8274 A Reg 03 <- c0 - Rx Disabled, Rx 8 bits, No Auto Enables + * :uart8274 A Reg 05 <- ea - Tx Enabled, Tx 8 bits, Send Break 0, RTS=0, DTR=0 + * :uart8274 A Reg 04 <- 4e - x16 clock, 2 stop bit, even parity but parity disabled + * :uart8274 A Reg 05 <- ea - Tx Enabled, Tx 8 bits, Send Break 0, RTS=0, DTR=0 + * :uart8274 A Reg 03 <- c1 - Rx Enabled, Rx 8 bits, No Auto Enables + * :uart8274 A Reg 07 <- 00 - Hi SYNC bits + * :uart8274 A Reg 06 <- 00 - Lo SYNC bits + * :uart8274 A Reg 02 <- 04 - RTSB selected, non vectored mode, 85-1 mode selected, A over B interleaved int prios + * :uart8274 B Reg 02 <- 26 - interrupt vector 26 + * :uart8274 A Reg 01 <- 00 - Rx INT/DMA int disabled, no vector modification + * :uart8274 A Reg 02 <- 04 - RTSB selected, non vectored mode, 85-1 mode selected, A over B interleaved int prios + + * :uart8274 B Reg 02 <- a5 - interrupt vector a5 + * :uart8274 B Reg 02 <- 00 - interrupt vector 0 + + * :uart8274 B Reg 04 <- 44 - x16 clock, 1 stop bit, no parity + * :uart8274 B Reg 01 <- 1e - Wait disabled, Int mode 3, vector modified, Tx int/DMA enabled + * :uart8274 A Reg 04 <- 44 - x16 clock, 1 stop bit, no parity + * :uart8274 A Reg 01 <- 1e - Wait disabled, Int mode 3, vector modified, Tx int/DMA enabled + + * :uart8274 B Reg 04 <- 44 - x16 clock, 1 stop bit, no parity + * :uart8274 B Reg 01 <- 1e - Wait disabled, Int mode 3, vector modified, Tx int/DMA enabled + * :uart8274 B Reg 03 <- c1 - Rx Enabled, Rx 8 bits, No Auto Enables + * :uart8274 B Reg 05 <- ea - Tx Enabled, Tx 8 bits, Send Break 0, RTS=0, DTR=0 + + * :uart8274 B Reg 04 <- 44 - x16 clock, 1 stop bit, no parity + * :uart8274 B Reg 01 <- 1e - Wait disabled, Int mode 3, vector modified, Tx int/DMA enabled + * :uart8274 B Reg 03 <- c1 - Rx Enabled, Rx 8 bits, No Auto Enables + * :uart8274 B Reg 05 <- ea - Tx Enabled, Tx 8 bits, Send Break 0, RTS=0, DTR=0 +*/ ROM_START( isbc2861 ) ROM_REGION( 0x10000, "user1", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "v11", "iSDM Monitor V1.1" )