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Preliminary driver support for the HP 49 G [Antoine Mine]

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This commit is contained in:
Miodrag Milanovic 2014-03-25 07:25:03 +00:00
parent a88ea275b5
commit f86fdb70d7
4 changed files with 543 additions and 121 deletions
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76
src/emu/cpu/saturn/satops.inc
View File

@ -86,22 +86,36 @@ int saturn_device::READ_NIBBLE(UINT32 adr)
int saturn_device::READ_8(UINT32 adr)
{
return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4);
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
return n0|(n1<<4);
}
int saturn_device::READ_12(UINT32 adr)
{
return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8);
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
int n2=READ_NIBBLE(adr+2);
return n0|(n1<<4)|(n2<<8);
}
int saturn_device::READ_16(UINT32 adr)
{
return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8)|(READ_NIBBLE(adr+3)<<12);
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
int n2=READ_NIBBLE(adr+2);
int n3=READ_NIBBLE(adr+3);
return n0|(n1<<4)|(n2<<8)|(n3<<12);
}
int saturn_device::READ_20(UINT32 adr)
{
return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8)|(READ_NIBBLE(adr+3)<<12)|(READ_NIBBLE(adr+4)<<16);
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
int n2=READ_NIBBLE(adr+2);
int n3=READ_NIBBLE(adr+3);
int n4=READ_NIBBLE(adr+4);
return n0|(n1<<4)|(n2<<8)|(n3<<12)|(n4<<16);
}
void saturn_device::WRITE_NIBBLE(UINT32 adr, UINT8 nib)
@ -490,7 +504,7 @@ void saturn_device::saturn_equals_zero(int reg, int begin, int count)
{
int i, t;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=1;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -505,7 +519,7 @@ void saturn_device::saturn_equals(int reg, int begin, int count, int right)
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=1;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -520,7 +534,7 @@ void saturn_device::saturn_not_equals_zero(int reg, int begin, int count)
{
int i, t;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -535,7 +549,7 @@ void saturn_device::saturn_not_equals(int reg, int begin, int count, int right)
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -551,7 +565,7 @@ void saturn_device::saturn_greater(int reg, int begin, int count, int right)
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=count-1; i>=0; i--) {
t=m_reg[reg][begin+i];
@ -568,7 +582,7 @@ void saturn_device::saturn_greater_equals(int reg, int begin, int count, int rig
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=1;
for (i=count-1; i>=0; i--) {
t=m_reg[reg][begin+i];
@ -585,7 +599,7 @@ void saturn_device::saturn_smaller_equals(int reg, int begin, int count, int rig
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=1;
for (i=count-1; i>=0; i--) {
t=m_reg[reg][begin+i];
@ -602,7 +616,7 @@ void saturn_device::saturn_smaller(int reg, int begin, int count, int right)
int i, t,t2;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=count-1; i>=0; i--) {
t=m_reg[reg][begin+i];
@ -737,7 +751,7 @@ void saturn_device::saturn_load_nibbles(int reg, int begin, int count, int adr)
int i;
saturn_assert(reg>=0 && reg<9);
saturn_assert(adr>=0 && adr<2);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_reg[reg][begin+i]=READ_NIBBLE(m_d[adr]+i);
m_icount-=2;
@ -749,7 +763,7 @@ void saturn_device::saturn_store_nibbles(int reg, int begin, int count, int adr)
int i;
saturn_assert(reg>=0 && reg<9);
saturn_assert(adr>=0 && adr<2);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
WRITE_NIBBLE((m_d[adr]+i)&0xfffff,m_reg[reg][begin+i]);
m_icount-=2;
@ -777,7 +791,7 @@ void saturn_device::saturn_clear(int reg, int begin, int count)
{
int i;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_reg[reg][begin+i]=0;
m_icount-=2;
@ -793,7 +807,7 @@ void saturn_device::saturn_exchange(int left, int begin, int count, int right)
UINT8 temp;
saturn_assert(left>=0 && left<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
temp=m_reg[left][begin+i];
m_reg[left][begin+i]=m_reg[right][begin+i];
@ -810,7 +824,7 @@ void saturn_device::saturn_copy(int dest, int begin, int count, int src)
int i;
saturn_assert(dest>=0 && dest<9);
saturn_assert(src>=0 && src<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_reg[dest][begin+i]=m_reg[src][begin+i];
m_icount-=2;
@ -826,7 +840,7 @@ void saturn_device::saturn_add(int reg, int begin, int count, int right)
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -848,7 +862,7 @@ void saturn_device::saturn_add_const(int reg, int begin, int count, UINT8 right)
int i, t;
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
saturn_assert(count>1 || !m_decimal); /* SATURN bug */
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -875,7 +889,7 @@ void saturn_device::saturn_sub(int reg, int begin, int count, int right)
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -897,7 +911,7 @@ void saturn_device::saturn_sub_const(int reg, int begin, int count, int right)
int i, t;
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
saturn_assert(count>1 || !m_decimal); /* SATURN bug */
for (i=0; i<count; i++) {
t=m_reg[reg][begin+i];
@ -924,7 +938,7 @@ void saturn_device::saturn_sub2(int reg, int begin, int count, int right)
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
t=m_reg[right][begin+i];
@ -949,7 +963,7 @@ void saturn_device::saturn_increment(int reg, int begin, int count)
int i, t=0;
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_icount-=2;
t=m_reg[reg][begin+i];
@ -968,7 +982,7 @@ void saturn_device::saturn_decrement(int reg, int begin, int count)
int i, t=0;
int base=m_decimal?10:16;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_icount-=2;
t=m_reg[reg][begin+i];
@ -987,7 +1001,7 @@ void saturn_device::saturn_invert(int reg, int begin, int count)
int i;
int max=m_decimal?9:15;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
m_carry=0;
for (i=0; i<count; i++) {
m_reg[reg][begin+i]=(max-m_reg[reg][begin+i])&0xf;
@ -1003,7 +1017,7 @@ void saturn_device::saturn_negate(int reg, int begin, int count)
int i, n, c;
int max=m_decimal?9:15;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
c=1;
m_carry=0;
for (i=0; i<count; i++) {
@ -1026,7 +1040,7 @@ void saturn_device::saturn_or(int dest, int begin, int count, int src)
int i;
saturn_assert(dest>=0 && dest<9);
saturn_assert(src>=0 && src<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_reg[dest][begin+i]|=m_reg[src][begin+i];
m_icount-=2;
@ -1041,7 +1055,7 @@ void saturn_device::saturn_and(int dest, int begin, int count, int src)
int i;
saturn_assert(dest>=0 && dest<9);
saturn_assert(src>=0 && src<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=0; i<count; i++) {
m_reg[dest][begin+i]&=m_reg[src][begin+i];
m_icount-=2;
@ -1055,7 +1069,7 @@ void saturn_device::saturn_shift_nibble_left(int reg, int begin, int count)
{
int i;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
if (m_reg[reg][begin+count-1]) m_hst|=SB;
for (i=count-1; i>=1; i--) {
m_reg[reg][begin+i]=m_reg[reg][begin+i-1];
@ -1072,7 +1086,7 @@ void saturn_device::saturn_shift_nibble_right(int reg, int begin, int count)
{
int i;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
if (m_reg[reg][begin]) m_hst|=SB;
for (i=1; i<count; i++) {
m_reg[reg][begin+i-1]=m_reg[reg][begin+i];
@ -1122,7 +1136,7 @@ void saturn_device::saturn_shift_right(int reg, int begin, int count)
{
int i, t, c=0;
saturn_assert(reg>=0 && reg<9);
saturn_assert(begin>=0 && count>=0 && begin+count<=16);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
for (i=count-1; i>=0; i--) {
t=m_reg[reg][begin+i];
t|=(c<<4);

357
src/mess/drivers/hp48.c
View File

@ -2,7 +2,7 @@
Copyright (C) Antoine Mine' 2008
Hewlett Packard HP48 S/SX & G/GX/G+
Hewlett Packard HP48 S/SX & G/GX/G+ and HP49 G
**********************************************************************/
@ -25,6 +25,8 @@
IO RAM is & CPU state are discarded; save-state saves base & IO RAM,
CPU state, but not expansion port RAM)
- more accurate IRQ, NMI, sleep and wake-up handling
- HP49 G flash ROM write
- HP49 xmodem
*/
@ -97,6 +99,17 @@
+ 128 KB RAM, not expandable
+ no expansion port
HP49 G:
similar to HP48 G with the following differences:
- 2048 KB flash ROM (re-writtable)
- 512 KB RAM (not expandable)
- Keyboard: 51 keys
- no IR I/O port
- rewritten optimized OS makes the HP49 G much faster than HP48 despite
having the same CPU and clock rate (4 MHz York Saturn)
*/
@ -169,7 +182,7 @@
/* KEYBOARD
--------
keyboard layout (all models)
keyboard layout for 48 models
-------------------------------------------------
| A | B | C | D | E | F |
@ -749,6 +762,324 @@ INPUT_PORTS_END
/*
keyboard layout for 49 G model
-------------------------------------------------
| F1 | F2 | F3 | F4 | F5 | F6 |
|-----------------------------------------------|
| APPS | MODE | TOOL | up |
|---------+--------+--------| left right |
| VAR | STO | NXT | down |
|---------+--------+--------+-------------------|
| HIST | CAT | EQW | SYMB | <= |
|---------+--------+--------+---------+---------|
| y^x | sqrt | SIN | COS | TAN |
|---------+--------+--------+---------+---------|
| EEX | +/- | X | 1/x | / |
|---------+--------+--------+---------+---------|
| alpha | 7 | 8 | 9 | * |
|---------+--------+--------+---------+---------|
| blue | 4 | 5 | 6 | - |
|---------+--------+--------+---------+---------|
| red | 1 | 2 | 3 | + |
|---------+--------+--------+---------+---------|
| ON | 0 | . | SPC | ENTER |
-------------------------------------------------
* 51 keys
* including 3 modifier keys:
- a red shift (upper right)
- a blue shift (upper left)
- a cyan alpha key (lower right)
*/
static INPUT_PORTS_START( hp49g_kbd )
PORT_START( "LINE0" ) /* OUT = 0x001 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "ENTER ANS NUM")
PORT_CODE ( KEYCODE_ENTER )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "+ { } \xC2\xAB \xC2\xBB") /* << >> */
PORT_CODE ( KEYCODE_EQUALS )
PORT_CODE ( KEYCODE_PLUS_PAD )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "- ( ) _")
PORT_CODE ( KEYCODE_MINUS )
PORT_CODE ( KEYCODE_MINUS_PAD )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "* [ ] \" \"")
PORT_CODE ( KEYCODE_ASTERISK )
PORT_CODE ( KEYCODE_CLOSEBRACE )
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "/ ABS ARG Z")
PORT_CODE ( KEYCODE_SLASH )
PORT_CODE ( KEYCODE_SLASH_PAD )
PORT_CODE ( KEYCODE_Z)
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "TAN ATAN \xE2\x88\xAB U") /* integral */
PORT_CODE ( KEYCODE_U )
PORT_BIT ( 64, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x87\x90 DEL CLEAR") /* double left arrow */
PORT_CODE ( KEYCODE_BACKSPACE )
PORT_CODE ( KEYCODE_DEL )
PORT_CODE ( KEYCODE_DEL_PAD )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "NXT PREV PASTE L")
PORT_CODE ( KEYCODE_L )
PORT_BIT ( 0x7f00, 0, IPT_UNUSED )
PORT_START( "LINE1" ) /* OUT = 0x002 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "SPC \xCF\x80 ,") /* pi */
PORT_CODE ( KEYCODE_SPACE )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "3 # BASE")
PORT_CODE ( KEYCODE_3 )
PORT_CODE ( KEYCODE_3_PAD )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "6 CONVERT UNITS")
PORT_CODE ( KEYCODE_6 )
PORT_CODE ( KEYCODE_6_PAD )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "9 FINANCE TIME")
PORT_CODE ( KEYCODE_9 )
PORT_CODE ( KEYCODE_9_PAD )
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "1/x \xE2\x89\xA5 > Y") /* >= */
PORT_CODE ( KEYCODE_Y )
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "COS ACOS \xE2\x88\x82 T") /* delta */
PORT_CODE ( KEYCODE_T )
PORT_BIT ( 64, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "SYMB MTH EVAL P")
PORT_CODE ( KEYCODE_P )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "STO\xE2\x8A\xB3 RCL CUT K")
PORT_CODE ( KEYCODE_K )
PORT_BIT ( 0x7f00, 0, IPT_UNUSED )
PORT_START( "LINE2" ) /* OUT = 0x004 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( ". : : \xE2\x86\xb5") /* return arrow */
PORT_CODE ( KEYCODE_STOP )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "2 DEF LIB")
PORT_CODE ( KEYCODE_2 )
PORT_CODE ( KEYCODE_2_PAD )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "5 MATRICES STAT")
PORT_CODE ( KEYCODE_5 )
PORT_CODE ( KEYCODE_5_PAD )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "8 EXP&LN TRIG")
PORT_CODE ( KEYCODE_8 )
PORT_CODE ( KEYCODE_8_PAD )
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "X \xE2\x89\xA4 < X") /* <= */
PORT_CODE ( KEYCODE_X )
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "SIN ASIN \xE2\x88\x91 S") /* sum */
PORT_CODE ( KEYCODE_S )
PORT_BIT ( 64, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "EQW MTRW ' O")
PORT_CODE ( KEYCODE_O )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "VAR UPDIR COPY J")
PORT_CODE ( KEYCODE_J )
PORT_BIT ( 0x7f00, 0, IPT_UNUSED )
PORT_START( "LINE3" ) /* OUT = 0x008 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "0 \xE2\x88\x9E \xE2\x86\x92") /* infinity, right arrow */
PORT_CODE ( KEYCODE_0 )
PORT_CODE ( KEYCODE_0_PAD )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "1 ARITH CMPLX")
PORT_CODE ( KEYCODE_1 )
PORT_CODE ( KEYCODE_1_PAD )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "4 CALC ALG")
PORT_CODE ( KEYCODE_4 )
PORT_CODE ( KEYCODE_4_PAD )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "7 SSLV NUMSLV")
PORT_CODE ( KEYCODE_7 )
PORT_CODE ( KEYCODE_7_PAD )
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "+/- \xE2\x89\xA0 = W") /* =/ */
PORT_CODE ( KEYCODE_W )
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x88\x9A x^2 sqrt(x,y) R") /* square root */
PORT_CODE ( KEYCODE_R )
PORT_BIT ( 64, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "CAT PRG CHARS N")
PORT_CODE ( KEYCODE_N )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "TOOL i | I")
PORT_CODE ( KEYCODE_I )
PORT_BIT ( 0x7f00, 0, IPT_UNUSED )
PORT_START( "LINE4" ) /* OUT = 0x010 */
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "EEX 10^x LOG V")
PORT_CODE ( KEYCODE_V )
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "y^x e^x LN Q")
PORT_CODE ( KEYCODE_Q )
PORT_BIT ( 64, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "HIST CMD UNDO M")
PORT_CODE ( KEYCODE_M )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "MODE CUSTOM END H")
PORT_CODE ( KEYCODE_H )
PORT_BIT ( 0x7f0f, 0, IPT_UNUSED )
PORT_START( "LINE5" ) /* OUT = 0x020 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F1 Y= A")
PORT_CODE ( KEYCODE_A )
PORT_CODE ( KEYCODE_F1 )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F2 WIN B")
PORT_CODE ( KEYCODE_B )
PORT_CODE ( KEYCODE_F2 )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F3 GRAPH C")
PORT_CODE ( KEYCODE_C )
PORT_CODE ( KEYCODE_F3 )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F4 2D/3D D")
PORT_CODE ( KEYCODE_D )
PORT_CODE ( KEYCODE_F4 )
PORT_BIT ( 16, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F5 TBLSET E")
PORT_CODE ( KEYCODE_E )
PORT_CODE ( KEYCODE_F5 )
PORT_BIT ( 32, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "F6 TABLE F")
PORT_CODE ( KEYCODE_F )
PORT_CODE ( KEYCODE_F6 )
PORT_BIT ( 128, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "APPS FILES BEGIN G")
PORT_CODE ( KEYCODE_G )
PORT_BIT ( 0x7f40, 0, IPT_UNUSED )
PORT_START( "LINE6" ) /* OUT = 0x040 */
PORT_BIT ( 1, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x86\x92") /* right arrow */
PORT_CODE ( KEYCODE_RIGHT )
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x86\x93") /* down arrow */
PORT_CODE ( KEYCODE_DOWN )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x86\x90") /* left arrow */
PORT_CODE ( KEYCODE_LEFT )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xE2\x86\x91") /* up arrow */
PORT_CODE ( KEYCODE_UP )
PORT_BIT ( 0x7ff0, 0, IPT_UNUSED )
PORT_START( "LINE7" ) /* OUT = 0x080 */
PORT_BIT ( 2, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "right shift")
PORT_CODE ( KEYCODE_RSHIFT )
PORT_BIT ( 4, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "left shift")
PORT_CODE ( KEYCODE_LSHIFT )
PORT_BIT ( 8, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "\xCE\xB1 USER ENTRY") /* alpha */
PORT_CODE ( KEYCODE_LALT )
PORT_BIT ( 0x7ff1, 0, IPT_UNUSED )
PORT_START( "LINE8" ) /* OUT = 0x100 */
PORT_BIT ( 0xffff, 0, IPT_UNUSED )
PORT_START( "ON" ) /* ON key, appears on all OUT lines */
PORT_BIT ( 0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD )
PORT_NAME ( "ON CONT OFF CANCEL" )
PORT_CODE ( KEYCODE_ESC )
PORT_CODE ( KEYCODE_HOME )
PORT_BIT ( 0x7fff, 0, IPT_UNUSED )
INPUT_PORTS_END
/* BATTERY
-------
*/
@ -777,6 +1108,10 @@ static INPUT_PORTS_START( hp48gx )
PORT_INCLUDE( hp48_battery )
INPUT_PORTS_END
static INPUT_PORTS_START( hp49g )
PORT_INCLUDE( hp49g_kbd )
PORT_INCLUDE( hp48_battery )
INPUT_PORTS_END
@ -921,6 +1256,7 @@ static const char layout_hp48g [] = "hp48g";
static const char layout_hp48gp[] = "hp48gp";
static const char layout_hp48sx[] = "hp48sx";
static const char layout_hp48s [] = "hp48s";
static const char layout_hp49g [] = "hp49g";
/*************************** driver ********************************/
@ -1014,13 +1350,22 @@ static MACHINE_CONFIG_DERIVED( hp48s, hp48_common )
//MCFG_KERMIT_ADD( "rs232_k", hp48_kermit_rs232_conf )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( hp49g, hp48_common )
MCFG_CPU_MODIFY ( "maincpu" )
MCFG_MACHINE_START_OVERRIDE (hp48_state, hp49g )
MCFG_DEFAULT_LAYOUT ( layout_hp49g )
/* serial I/O */
//MCFG_XMODEM_ADD( "rs232_x", hp48_xmodem_rs232_conf )
//MCFG_KERMIT_ADD( "rs232_k", hp48_kermit_rs232_conf )
MACHINE_CONFIG_END
COMP ( 1990, hp48sx, 0 , 0, hp48sx, hp48sx, hp48_state, hp48, "Hewlett Packard", "HP48SX", 0 )
COMP ( 1991, hp48s , hp48sx, 0, hp48s, hp48sx, hp48_state, hp48, "Hewlett Packard", "HP48S", 0 )
COMP ( 1993, hp48gx, 0 , 0, hp48gx, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP48GX", 0 )
COMP ( 1993, hp48g , hp48gx, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP48G", 0 )
COMP ( 1998, hp48gp, hp48gx, 0, hp48gp, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP48G+", 0 )
COMP ( 1995, hp38g , hp48gx, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP38G", 0 )
COMP ( 2000, hp39g , hp48gx, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP39G", GAME_NOT_WORKING )
COMP ( 1999, hp49g , hp48gx, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP49G", 0 )
COMP ( 1999, hp49g , 0, 0, hp49g, hp49g, hp48_state, hp48, "Hewlett Packard", "HP49G", 0 )
COMP ( 1995, hp38g , 0, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP38G", 0 )
COMP ( 2000, hp39g , 0, 0, hp48g, hp48gx, hp48_state, hp48, "Hewlett Packard", "HP39G", GAME_NOT_WORKING )

28
src/mess/includes/hp48.h
View File

@ -2,7 +2,7 @@
Copyright (C) Antoine Mine' 2008
Hewlett Packard HP48 S/SX & G/GX
Hewlett Packard HP48 S/SX & G/GX and HP49 G
**********************************************************************/
@ -11,20 +11,22 @@
#endif
#include "sound/dac.h"
/* model */
enum hp48_models {
typedef enum {
HP48_S,
HP48_SX,
HP48_G,
HP48_GX,
HP48_GP,
};
HP49_G,
} hp48_models;
/* memory module configuration */
struct hp48_module
typedef struct
{
/* static part */
UINT32 off_mask; /* offset bit-mask, indicates the real size */
read8_delegate read;
const char *read_name;
write8_delegate write;
void* data; /* non-NULL for banks */
int isnop;
@ -34,7 +36,7 @@ struct hp48_module
UINT32 base; /* base address */
UINT32 mask; /* often improperly called size, it is an address select mask */
};
} hp48_module;
/* screen image averaging */
@ -52,12 +54,24 @@ public:
UINT8 *m_videoram;
UINT8 m_io[64];
hp48_models m_model;
/* OUT register from SATURN (actually 12-bit) */
UINT16 m_out;
/* keyboard interrupt */
UINT8 m_kdn;
/* from highest to lowest priority: HDW, NCE2, CE1, CE2, NCE3, NCE1 */
hp48_module m_modules[6];
/* RAM/ROM extensions, GX/SX only (each UINT8 stores one nibble)
port1: SX/GX: 32/128 KB
port2: SX:32/128KB, GX:128/512/4096 KB
*/
UINT32 m_port_size[2];
UINT8 m_port_write[2];
UINT8* m_port_data[2];
UINT32 m_bank_switch;
UINT32 m_io_addr;
UINT16 m_crc;
@ -68,9 +82,12 @@ public:
#endif
UINT8 m_screens[ HP48_NB_SCREENS ][ 64 ][ 144 ];
int m_cur_screen;
UINT8* m_rom;
DECLARE_DRIVER_INIT(hp48);
virtual void machine_reset();
DECLARE_PALETTE_INIT(hp48);
DECLARE_MACHINE_START(hp49g);
DECLARE_MACHINE_START(hp48gx);
DECLARE_MACHINE_START(hp48g);
DECLARE_MACHINE_START(hp48gp);
@ -81,6 +98,7 @@ public:
DECLARE_WRITE8_MEMBER(hp48_io_w);
DECLARE_READ8_MEMBER(hp48_io_r);
DECLARE_READ8_MEMBER(hp48_bank_r);
DECLARE_WRITE8_MEMBER(hp49_bank_w);
TIMER_CALLBACK_MEMBER(hp48_rs232_byte_recv_cb);
TIMER_CALLBACK_MEMBER(hp48_rs232_byte_sent_cb);
TIMER_CALLBACK_MEMBER(hp48_chardev_byte_recv_cb);

203
src/mess/machine/hp48.c
View File

@ -2,7 +2,7 @@
Copyright (C) Antoine Mine' 2008
Hewlett Packard HP48 S/SX & G/GX/G+
Hewlett Packard HP48 S/SX & G/GX/G+ and HP49 G
**********************************************************************/
@ -32,6 +32,15 @@
TYPE DEFINITIONS
***************************************************************************/
/* list of memory modules from highest to lowest priority */
#define HP48_HDW 0
#define HP48_NCE2 1
#define HP48_CE1 2
#define HP48_CE2 3
#define HP48_NCE3 4
#define HP48_NCE1 5
/* state field in hp48_module */
#define HP48_MODULE_UNCONFIGURED 0
#define HP48_MODULE_MASK_KNOWN 1
@ -47,12 +56,7 @@
#define HP48_S_SERIES ((m_model==HP48_S) || (m_model==HP48_SX))
#define HP48_X_SERIES ((m_model==HP48_SX) || (m_model==HP48_GX))
#define HP48_GX_MODEL ((m_model==HP48_GX) || (m_model==HP48_GP))
/* OUT register from SATURN (actually 12-bit) */
/* keyboard interrupt */
/* from highest to lowest priority: HDW, NCE2, CE1, CE2, NCE3, NCE1 */
#define HP49_G_MODEL ((m_model==HP49_G))
static const char *const hp48_module_names[6] =
{ "HDW (I/O)", "NCE2 (RAM)", "CE1", "CE2", "NCE3", "NCE1 (ROM)" };
@ -61,16 +65,8 @@ static const char *const hp48_module_names[6] =
static const UINT8 hp48_module_mask_id[6] = { 0x00, 0x03, 0x05, 0x07, 0x01, 0x00 };
static const UINT8 hp48_module_addr_id[6] = { 0x19, 0xf4, 0xf6, 0xf8, 0xf2, 0x00 };
/* RAM/ROM extensions, GX/SX only (each UINT8 stores one nibble)
port1: SX/GX: 32/128 KB
port2: SX:32/128KB, GX:128/512/4096 KB
*/
/* CRC state */
/* timers state */
#ifdef CHARDEV
#include "devices/chardev.h"
#endif
@ -454,6 +450,7 @@ WRITE8_MEMBER(hp48_state::hp48_io_w)
bit 1: transmitting
bit 2: irq enable on buffer empty
bit 3: led on (direct mode)
on HP49 G, flash ROM write enable
- 0x1d: I/R output buffer
*/
@ -575,10 +572,21 @@ READ8_MEMBER(hp48_state::hp48_io_r)
}
/* ---------- GX's bank switcher --------- */
/* ---------- bank switcher --------- */
READ8_MEMBER(hp48_state::hp48_bank_r)
{
/* HP48 GX
bit 0: ignored
bits 2-5: bank number
bit 6: enable
*/
/* HP49 G
bit 0: ignored
bits 1-2: select bank 0x00000-0x3ffff
bits 3-6: select bank 0x40000-0x7ffff
*/
/* bit 0: ignored, bits 2-5: bank number, bit 6: enable */
offset &= 0x7e;
if ( m_bank_switch != offset )
@ -591,6 +599,19 @@ READ8_MEMBER(hp48_state::hp48_bank_r)
}
WRITE8_MEMBER(hp48_state::hp49_bank_w)
{
offset &= 0x7e;
if ( m_bank_switch != offset )
{
LOG(( "%05x %f hp49_bank_w: off=%03x\n", space.device().safe_pcbase(), space.machine().time().as_double(), offset ));
m_bank_switch = offset;
hp48_apply_modules();
}
}
/* ---------------- timers --------------- */
TIMER_CALLBACK_MEMBER(hp48_state::hp48_timer1_cb)
@ -660,19 +681,19 @@ TIMER_CALLBACK_MEMBER(hp48_state::hp48_timer2_cb)
However, controller usage is different in both series:
controller S series G series
(Clark CPU) (York CPU)
controller 48 S series 48 G series 49 G series
(Clark CPU) (York CPU) (York CPU)
HDW I/O RAM I/O RAM
NCE2 RAM RAM
CE1 port1 bank switcher
CE2 port2 port1
NCE3 unused port2
NCE1 ROM ROM
HDW 32B I/O RAM 32B I/O RAM 32B I/O RAM
NCE2 32KB RAM 32/128KB RAM 256KB RAM
CE1 port1 bank switcher bank switcher
CE2 port2 port1 128KB RAM
NCE3 unused port2 128KB RAM
NCE1 256KB ROM 512KB ROM 2MB flash ROM
- NCE1 (ROM) cannot be configured, it is always visible at addresses
00000-7ffff not covered by higher priority modules.
not covered by higher priority modules.
- only the address of HDW (I/O) can be configured, its size is constant
(64 nibbles)
@ -686,47 +707,60 @@ TIMER_CALLBACK_MEMBER(hp48_state::hp48_timer2_cb)
void hp48_state::hp48_apply_modules()
{
int i;
int nce2_enable = 1;
int nce3_enable = 1;
address_space& space = m_maincpu->space(AS_PROGRAM);
m_io_addr = 0x100000;
if ( HP48_G_SERIES )
/* NCE1 (ROM) is a bit special, so treat it separately */
space.unmap_readwrite( 0, 0xfffff, 0, 0 );
if ( HP49_G_MODEL )
{
int bank_lo = (m_bank_switch >> 5) & 3;
int bank_hi = (m_bank_switch >> 1) & 15;
LOG(( "hp48_apply_modules: low ROM bank is %i\n", bank_lo ));
LOG(( "hp48_apply_modules: high ROM bank is %i\n", bank_hi ));
space.install_read_bank( 0x00000, 0x3ffff, 0, 0x80000, "bank5" );
space.install_read_bank( 0x40000, 0x7ffff, 0, 0x80000, "bank6" );
membank("bank5")->set_base( m_rom + bank_lo * 0x40000 );
membank("bank6")->set_base( m_rom + bank_hi * 0x40000 );
}
else if ( HP48_G_SERIES )
{
/* port 2 bank switch */
if ( m_port_size[1] > 0 )
{
int off = (m_bank_switch << 16) % m_port_size[1];
LOG(( "hp48_apply_modules: port 2 offset is %i\n", off ));
m_modules[4].data = m_port_data[1] + off;
}
/* ROM A19 (hi 256 KB) / NCE2 (port 2) control switch */
/* ROM A19 (hi 256 KB) / NCE3 (port 2) control switch */
if ( m_io[0x29] & 8 )
{
/* A19 */
m_modules[5].off_mask = 0xfffff;
nce2_enable = 0;
LOG(( "hp48_apply_modules: A19 enabled, NCE3 disabled\n" ));
nce3_enable = 0;
space.install_read_bank( 0, 0xfffff, 0, 0, "bank5" );
}
else
{
/* NCE2 */
m_modules[5].off_mask = 0x7ffff;
nce2_enable = m_bank_switch >> 6;
/* NCE3 */
nce3_enable = m_bank_switch >> 6;
LOG(( "hp48_apply_modules: A19 disabled, NCE3 %s\n", nce3_enable ? "enabled" : "disabled" ));
space.install_read_bank( 0, 0x7ffff, 0, 0x80000, "bank5" );
}
}
/* S series ROM mapping compatibility */
if ( HP48_S_SERIES || !(m_io[0x29] & 8) )
{
m_modules[5].off_mask = 0x7ffff;
membank("bank5")->set_base( m_rom );
}
else
{
m_modules[5].off_mask = 0xfffff;
space.install_read_bank( 0, 0x7ffff, 0, 0x80000, "bank5" );
membank("bank5")->set_base( m_rom );
}
/* from lowest to highest priority */
for ( i = 5; i >= 0; i-- )
for ( i = 4; i >= 0; i-- )
{
UINT32 select_mask = m_modules[i].mask;
UINT32 nselect_mask = ~select_mask & 0xfffff;
@ -739,7 +773,7 @@ void hp48_state::hp48_apply_modules()
if ( m_modules[i].state != HP48_MODULE_CONFIGURED ) continue;
if ( (i == 4) && !nce2_enable ) continue;
if ( (i == 4) && !nce3_enable ) continue;
/* our code assumes that the 20-bit select_mask is all 1s followed by all 0s */
if ( nselect_mask & (nselect_mask+1) )
@ -754,7 +788,7 @@ void hp48_state::hp48_apply_modules()
else
{
if (!m_modules[i].read.isnull())
space.install_read_handler( base, end, 0, mirror, m_modules[i].read);
space.install_read_handler( base, end, 0, mirror, m_modules[i].read );
}
if (m_modules[i].isnop)
@ -766,7 +800,7 @@ void hp48_state::hp48_apply_modules()
else
{
if (!m_modules[i].write.isnull())
space.install_write_handler( base, end, 0, mirror, m_modules[i].write);
space.install_write_handler( base, end, 0, mirror, m_modules[i].write );
}
}
@ -791,8 +825,8 @@ void hp48_state::hp48_reset_modules( )
{
int i;
/* fixed size for HDW */
m_modules[0].state = HP48_MODULE_MASK_KNOWN;
m_modules[0].mask = 0xfffc0;
m_modules[HP48_HDW].state = HP48_MODULE_MASK_KNOWN;
m_modules[HP48_HDW].mask = 0xfffc0;
/* unconfigure NCE2, CE1, CE2, NCE3 */
for ( i = 1; i < 5; i++ )
{
@ -800,9 +834,9 @@ void hp48_state::hp48_reset_modules( )
}
/* fixed configuration for NCE1 */
m_modules[5].state = HP48_MODULE_CONFIGURED;
m_modules[5].base = 0;
m_modules[5].mask = 0;
m_modules[HP48_NCE1].state = HP48_MODULE_CONFIGURED;
m_modules[HP48_NCE1].base = 0;
m_modules[HP48_NCE1].mask = 0;
hp48_apply_modules();
}
@ -944,10 +978,10 @@ void hp48_state::hp48_encode_nibble( UINT8* dst, UINT8* src, int size )
/* ----- card images ------ */
/* port information configurations */
const struct hp48_port_interface hp48sx_port1_config = { 0, 2, 128*1024 };
const struct hp48_port_interface hp48sx_port2_config = { 1, 3, 128*1024 };
const struct hp48_port_interface hp48gx_port1_config = { 0, 3, 128*1024 };
const struct hp48_port_interface hp48gx_port2_config = { 1, 4, 4*1024*1024 };
const struct hp48_port_interface hp48sx_port1_config = { 0, HP48_CE1, 128*1024 };
const struct hp48_port_interface hp48sx_port2_config = { 1, HP48_CE2, 128*1024 };
const struct hp48_port_interface hp48gx_port1_config = { 0, HP48_CE2, 128*1024 };
const struct hp48_port_interface hp48gx_port2_config = { 1, HP48_NCE3, 4*1024*1024 };
const device_type HP48_PORT = &device_creator<hp48_port_image_device>;
@ -1081,13 +1115,14 @@ DRIVER_INIT_MEMBER(hp48_state,hp48)
void hp48_state::machine_reset()
{
LOG(( "hp48: machine reset called\n" ));
m_bank_switch = 0;
hp48_reset_modules();
hp48_update_annunciators();
}
void hp48_state::hp48_machine_start( hp48_models model )
{
UINT8* rom, *ram;
UINT8 *ram;
int ram_size, rom_size, i;
LOG(( "hp48_machine_start: model %i\n", model ));
@ -1095,16 +1130,20 @@ void hp48_state::hp48_machine_start( hp48_models model )
m_model = model;
/* internal RAM */
ram_size = HP48_GX_MODEL ? (128 * 1024) : (32 * 1024);
ram_size =
HP49_G_MODEL ? (512 * 1024) :
HP48_GX_MODEL ? (128 * 1024) : (32 * 1024);
ram = auto_alloc_array(machine(), UINT8, 2 * ram_size);
machine().device<nvram_device>("nvram")->set_base(ram, 2 * ram_size);
/* ROM load */
rom_size = HP48_S_SERIES ? (256 * 1024) : (512 * 1024);
rom = auto_alloc_array(machine(), UINT8, 2 * rom_size);
hp48_decode_nibble( rom, memregion( "maincpu" )->base(), rom_size );
rom_size =
HP49_G_MODEL ? (2048 * 1024) :
HP48_S_SERIES ? (256 * 1024) : (512 * 1024);
m_rom = auto_alloc_array(machine(), UINT8, 2 * rom_size);
hp48_decode_nibble( m_rom, memregion( "maincpu" )->base(), rom_size );
/* init state */
memset( ram, 0, 2 * ram_size );
@ -1119,30 +1158,33 @@ void hp48_state::hp48_machine_start( hp48_models model )
/* static module configuration */
memset(m_modules,0,sizeof(m_modules)); // to put all on 0
/* I/O RAM */
m_modules[0].off_mask = 0x0003f; /* 32 B */
m_modules[0].read = read8_delegate(FUNC(hp48_state::hp48_io_r),this);
m_modules[0].write = write8_delegate(FUNC(hp48_state::hp48_io_w),this);
m_modules[HP48_HDW].off_mask = 0x0003f; /* 32 B */
m_modules[HP48_HDW].read = read8_delegate(FUNC(hp48_state::hp48_io_r),this);
m_modules[HP48_HDW].write = write8_delegate(FUNC(hp48_state::hp48_io_w),this);
/* internal RAM */
m_modules[1].off_mask = 2 * ram_size - 1;
m_modules[1].read = read8_delegate();
m_modules[1].write = write8_delegate();
m_modules[1].data = ram;
if ( HP48_G_SERIES )
if ( HP49_G_MODEL )
{
/* bank switcher */
m_modules[2].off_mask = 0x00fff; /* 2 KB */
m_modules[2].read = read8_delegate(FUNC(hp48_state::hp48_bank_r),this);
m_modules[2].write = write8_delegate();
m_modules[HP48_NCE2].off_mask = 2 * 256 * 1024 - 1;
m_modules[HP48_NCE2].data = ram;
m_modules[HP48_CE2].off_mask = 2 * 128 * 1024 - 1;
m_modules[HP48_CE2].data = ram + 2 * 256 * 1024;
m_modules[HP48_NCE3].off_mask = 2 * 128 * 1024 - 1;
m_modules[HP48_NCE3].data = ram + 2 * (128+256) * 1024;
}
else
{
m_modules[HP48_NCE2].off_mask = 2 * ram_size - 1;
m_modules[HP48_NCE2].data = ram;
}
/* ROM */
m_modules[5].off_mask = 2 * rom_size - 1;
m_modules[5].read = read8_delegate();
m_modules[5].write = write8_delegate();
m_modules[5].isnop = 1;
m_modules[5].data = rom;
/* bank switcher */
if ( HP48_G_SERIES )
{
m_modules[HP48_CE1].off_mask = 0x00fff; /* 2 KB */
m_modules[HP48_CE1].read = read8_delegate(FUNC(hp48_state::hp48_bank_r),this);
m_modules[HP48_CE1].write = HP49_G_MODEL ? write8_delegate(FUNC(hp48_state::hp49_bank_w),this) : write8_delegate();
}
/* timers */
machine().scheduler().timer_pulse(attotime::from_hz( 16 ), timer_expired_delegate(FUNC(hp48_state::hp48_timer1_cb),this));
@ -1166,8 +1208,6 @@ void hp48_state::hp48_machine_start( hp48_models model )
state_save_register_item(machine(), "globals", NULL, i, m_modules[i].mask );
}
save_item(NAME(m_io) );
//save_pointer(NAME(machine.generic.nvram.u8), machine.generic.nvram_size );
machine().save().register_postload( save_prepost_delegate(FUNC(hp48_state::hp48_update_annunciators), this ));
machine().save().register_postload( save_prepost_delegate(FUNC(hp48_state::hp48_apply_modules), this ));
@ -1204,3 +1244,8 @@ MACHINE_START_MEMBER(hp48_state,hp48gp)
{
hp48_machine_start( HP48_GP );
}
MACHINE_START_MEMBER(hp48_state,hp49g)
{
hp48_machine_start( HP49_G );
}